A novel selective passivation contact battery structure and preparation method thereof

Abstract

The present invention relates to the technical field of solar cells, and in particular to a novel selective passivation contact cell structure and a preparation method thereof, comprising the following steps: polishing an N-type silicon wafer to 5-10 μm; doping P + ‑poly; front pickling and polishing; front PECVD doping N + ‑poly; laser filming the non-contact area on the front side, remove the mask oxide layer on the surface and then perform poly removal and cleaning; laser filming the laser filming area on the front side to remove the tunnel oxide layer; polish the laser filming area on the front side and then make a texture; double-sided co-annealing; clean and remove the PSG on the front side and the BSG on the back side; deposit aluminum oxide and anti-reflection film on both sides in sequence; print electrodes on both sides, sinter and perform photoelectric injection to obtain a battery. The present invention realizes in-situ doping on both sides of an N-type silicon wafer with the same tube, and the tunneling layer forms a tunneling barrier, so that the majority carriers can tunnel while the minority carriers are blocked, which is beneficial to improve the theoretical open circuit voltage.

Description

Technical Field

[0001] The invention relates to the technical field of solar cells, and in particular to a novel selective passivation contact cell structure and a preparation method thereof. Background Art

[0002] TOPCon's back passivation contact structure provides good surface passivation for the back of the silicon wafer. The ultra-thin oxide layer allows majority carriers (electrons) to tunnel into the polysilicon layer while blocking the recombination of minority carriers (holes). Then, majority carriers are transmitted laterally in the polysilicon layer and collected by metal, thereby greatly reducing the metal contact recombination current and improving the open circuit voltage and short circuit current of the battery.

[0003] Among them, the silicon oxide at the interface between the Poly-Si and Si substrate of the TOPCon passivated contact cell plays a very critical role in passivation. Silicon oxide reduces the interface state density between the Si substrate and the Poly-Si through chemical passivation. The majority carrier concentration is much higher than the minority carrier, which reduces the probability of electron-hole recombination while increasing the resistivity to form selective contact for the majority carriers. However, it is inevitable that a very thin boron-rich layer (boron-rich layer, abbreviated as BRL) will be formed during the boron diffusion process of N-type silicon wafers. Since this layer of B atoms is inactive and BRL will cause structural defects in this part, the boron-rich layer seriously affects the life of the minority carriers of the silicon wafer, and ultimately affects the efficiency of the battery.

[0004] High-efficiency solar cells require emitters with low surface doping concentrations, which can reduce losses caused by minority carrier recombination and improve open-circuit voltage and solar cell efficiency. Minority carrier recombination at the metal-semiconductor interface has always been considered one of the key challenges in achieving high-efficiency silicon solar cells. Front-metal contact-induced recombination and resistance are the main limiting factors for the efficiency of N-type front-junction silicon solar cells.

[0005] The information disclosed in this background technology section is only intended to deepen the understanding of the overall background technology of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes the prior art known to those skilled in the art. Summary of the invention

[0006] The main purpose of the present invention is to provide a novel selective passivation contact battery structure preparation method, to obtain a front side N + -Poly-Si selective doping, P on the back + -poly-Si doped bifacial TOPCon cells.

[0007] The innovation of the present invention is that the double-sided TOPCon cell uses a layer of ultra-thin silicon oxide (SiOx) on the front side and phosphorus-heavy doped polycrystalline silicon (N +-poly-Si) for electron selective contact, with boron-doped polysilicon (P + -poly-Si) is used for hole selective contact, and the selective polysilicon passivation contact (Poly-SE) is an ideal choice for reducing the parasitic absorption and contact resistivity of N-type silicon solar cells and providing better current collection; the front side of the present invention adopts a poly-SE structure, and the contact area is N + -poly-Si, the non-contact area is a passivation film layer, which solves the problem of severe light absorption and low current caused by excessive poly-Si thickness, and the problem of poor contact and low FF caused by excessive poly-Si thickness.

[0008] In order to achieve the above object, the technical solution adopted by the present invention is:

[0009] A method for preparing a novel selectively passivated contact battery structure comprises the following steps:

[0010] S1: N-type silicon wafers are polished in a slot machine with a polishing thickness of 5~10μm. If it is too thin, it may not be enough to remove the surface damage layer, while if it is too thick, it may waste materials and affect the consistency of battery thickness.

[0011] Furthermore, in step S1, the resistivity of the N-type silicon wafer is 1-3Ω.cm, and the minority carrier lifetime is >10ms.

[0012] S2: The back side is in-situ doped by PECVD, and the first tunneling oxide layer, the first i-poly layer, the second tunneling oxide layer, the second i-poly layer, boron doping and the mask oxide layer (used as a mask to protect the back poly layer when removing the front poly plating) are prepared on the same tube;

[0013] After the second layer of i-poly is deposited, the present invention immediately introduces a boron doping gas (borane B2H6) for in-situ doping. During the doping process, it is necessary to control the flow rate, doping time and temperature of the doping gas to achieve uniform doping of boron atoms. According to the needs, the boron doping concentration of the first layer of i-poly and the second layer of i-poly can be controlled by adjusting the doping conditions to form lightly doped and heavily doped areas. Since the solid solubility of B in silicon is low, it is necessary to thicken the poly to ensure that it does not penetrate. The present invention designs a second tunneling oxide layer between the two layers of intrinsic amorphous silicon. Relying on the second tunneling oxide layer to block the doped atoms, the thickness of the intrinsic amorphous silicon is thinned to a certain extent, while improving the battery performance.

[0014] Specifically, the first tunneling oxide layer is SiNx or SiOx, with a thickness of 1-3nm, and the preparation process of the first tunneling oxide layer is: temperature of 430-460°C, reaction time of 100s, power of 10000W, pressure of 160mTorr, and N2O flow rate of 7000sccm; the uniformity of the tunneling oxide layer is ensured.

[0015] The thickness of the first i-poly layer is 80~100nm. The preparation process of the first i-poly layer is: temperature 430~460℃, reaction time 400s, power 13500W, pressure 180mTorr; deposition forms an undoped i-poly layer to provide support for the subsequent second tunneling oxide layer and ensure the high quality and uniformity of the layer.

[0016] The second tunneling oxide layer is SiNx or SiOx with a thickness of 1~3nm. The preparation process of the second tunneling oxide layer is: temperature of 430~460℃, reaction time of 150s, power of 10000W, pressure of 160mTorr, and N2O flow rate of 7000sccm; it is used to isolate and regulate the transmission of charges while allowing some doped atoms to pass through.

[0017] The thickness of the second i-poly layer is 80~100nm. The preparation process of the second i-poly layer is: temperature is 430~460℃, reaction time is 600s, power is 13500W, and pressure is 180mTorr. After forming the second i-poly layer, a doping process will be carried out to adjust the electrical properties and achieve effective electrical contact with the first i-poly layer.

[0018] During boron doping, the B2H6 flow rate is 700~1200sccm, the SiH4 flow rate is 800~1000sccm, and the Ar flow rate is 4000~5000sccm; the time is 100~150s. The flow ratio of B2H6 and SiH4 directly affects the doping concentration. It is preferably controlled at a flow ratio of 7:10 to optimize the doping concentration and uniformity. The high Ar flow rate may play a role in diluting and stabilizing the plasma, but it is necessary to ensure that it does not affect the electrical properties of the film. The plasma stability can be further optimized by adjusting the Ar flow rate. Since some doping atoms can penetrate the tunneling oxide layer, this will help to form a good electrical contact between the first layer i-poly and the second layer i-poly while maintaining the stability of the overall structure.

[0019] The preparation process of the mask oxide layer is as follows: time is 100s, SiH4:N2O=1:6, power is 9000W, and pressure is 180mTorr; by fine-tuning the ratio of SiH4 to N2O and the deposition time, the thickness of the mask oxide layer is controlled to be 3~10nm; the settings of power 9000 W and pressure 180 mTorr ensure the density and uniformity of the oxide layer.

[0020] S3: Pickling on the front side to remove the mask oxide layer and polishing, polishing weight reduction of 0.15g (4-inch silicon wafer);

[0021] Furthermore, in step S3, the mask layer on the front and sides is removed on a chain cleaning machine with an HF concentration volume ratio of 25%-50%; then a single-side polishing is performed using a tank cleaning machine, KOH: polishing additive = 2:1~5:1; the temperature is controlled at 80°C, and the polishing weight loss is 0.15g.

[0022] S4: The front side is in-situ doped by PECVD, and the tunneling oxide layer, i-poly layer, phosphorus doping and mask oxide layer are prepared on the same tube;

[0023] Further, in step S4, the tunnel oxide layer is SiNx or SiOx with a thickness of 1-3 nm, the thickness of the i-poly layer is 80-100 nm, and the thickness of the mask oxide layer is 3-10 nm; the mask oxide layer is used as a mask to protect the N-doped region during the poly plating. + -poly layer; specifically, the preparation process of the tunneling oxide layer is: temperature of 430~460℃, reaction time of 100s, power of 10000W, pressure of 160mTorr, and N2O flow rate of 7000sccm; forming an ultra-thin and uniform tunneling oxide layer to support efficient electron tunneling.

[0024] The preparation process of the i-poly layer is as follows: temperature of 430-460°C, reaction time of 1200s, power of 13500W, pressure of 180mTorr, PH3 flow of 500-800sccm, SiH4 flow of 800-1000sccm, Ar flow of 4000-5000sccm; or temperature of 430-460°C, reaction time of 1200s, power of 14500W, pressure of 350mTorr, PH3 flow of 200-400sccm, SiH4 flow of 900-1200sccm, H2 flow of 7500-9000sccm; deposit an i-poly layer with good electrical properties, and form N by doping + -poly layer, which plays the role of charge collection and transmission in the device.

[0025] The preparation process of the Mask oxide layer is as follows: time 150s, SiH4:N2O flow ratio 1:6, power 9000W, pressure 180mTorr; in the subsequent process, prevent N + -The poly layer is over-etched or damaged, and acts as a mask when removing the poly plating of the non-doped area.

[0026] After the i-poly layer is deposited, phosphorus doping gas (PH3) is immediately introduced for in-situ doping. During the doping process, the flow rate, doping time and temperature of the doping gas need to be controlled to achieve uniform doping of phosphorus atoms. After the laser film is opened to form the metallized contact area and the non-contact area, the present invention performs annealing on the entire structure to activate the doping atoms, so that the first and second i-poly layers doped with boron on the back are transformed into p-poly layers, and the i-poly layer doped with phosphorus on the front is transformed into n-poly layers, and the interface characteristics between the layers are optimized. Among them, the back side can form a structure of a first tunneling layer, a lightly boron-doped p-poly layer, a second tunneling layer, a heavily boron-doped p-poly layer and a mask oxide layer. The tunneling layer and i-poly layer in the multilayer structure help to improve the charge transfer path inside the battery, reduce the internal resistance of the battery, and thus improve the charge and discharge efficiency of the battery. By precisely controlling the concentration and distribution of boron doping, the present invention can form lightly doped and heavily doped p-poly layers in different regions, thereby optimizing the open circuit voltage and fill factor of the battery.

[0027] The present invention prepares N + The lower surface of -poly is a polished structure, which can reduce the scattering and reflection of light and improve the absorption rate of light. The polished surface makes the current density distribution more uniform, which is beneficial to the overall performance of the battery.

[0028] The present invention performs single-sided in-situ doping on the front and back sides of an N-type silicon wafer respectively by PECVD, and then performs co-annealing to activate the doping elements, thereby omitting an annealing step and reducing production costs. On this basis, the present invention arranges the laser film opening step between the in-situ doping and the annealing, and forms a selective structure on the front side and the poly on the back side is not activated, thereby reducing the difficulty of cleaning, improving controllability, and ensuring structural integrity.

[0029] S5: A green laser (wavelength of 532 nm) is used for a single scan to open the non-metallized contact area on the front side. The width of the opening is 10~50μm to ensure sufficient electrical contact area and minimize the light absorption loss caused by the opening. The power of the green laser is 15W; the beam diameter is 2~10μm, and the scanning rate is set at 200mm / s to ensure sufficient energy to remove the mask oxide layer on the surface; the green laser beam is irradiated on the mask oxide layer, and the high energy of the laser is absorbed by the material and converted into heat energy. The heat energy causes the mask oxide layer to heat up rapidly locally, reaching its melting point or boiling point, thereby achieving contactless and mechanical force-free material removal.

[0030] S6: The front laser film opening area is subjected to poly removal and cleaning; the cleaning agent is a mixture of KOH and an additive in a mass ratio of 3:1 to 5:1, the temperature is maintained at 60 to 80°C, and the cleaning time is 1 to 6 minutes to remove the poly layer in the laser film opening area.

[0031] S7: Use a single scan of the green laser to open the front laser opening area to remove the tunneling oxide layer in this area; the power of the green laser is 10W, and the scanning rate is set at 400mm / s to meet the removal requirements of the tunneling oxide layer.

[0032] The present invention adopts a three-stage treatment step of "laser removal of mask oxide layer, alkaline washing to remove n-poly, and laser removal of tunnel oxide layer" for the removal of each layer in the front laser area. Compared with direct laser removal, the three-stage treatment step can avoid the problem of difficult to accurately control the depth of laser treatment, local over-treatment or insufficient treatment, and ensure that the integrity of the layer is not affected. At the same time, it avoids stress and lattice defects caused by laser damage in non-laser areas.

[0033] Specifically, step S6 uses alkaline washing for removal. The unactivated n-poly layer material is relatively loose and easily soluble in alkaline solution, while the mask oxide layer and the tunnel oxide layer have high chemical stability and will not cause excessive damage. Therefore, alkaline washing is more likely to achieve precise removal and ensure the integrity of the structure. On this basis, step S7 is only performed in the area removed by the first laser to further remove the deeper tunnel oxide layer without affecting the surrounding area. The step-by-step treatment of the two lasers can ensure that the removal of each layer is more accurate and reduce potential damage to other layers. The present invention uses secondary laser film opening to avoid etching of the poly edge that has not been annealed and activated at the connection position between the contact area and the non-contact area, thereby ensuring the integrity and accuracy of the poly layer and helping to improve the overall stability and performance of the device.

[0034] S8: The front laser film-opening area is first polished to remove possible surface roughness or damage, and then the texturing liquid is used for texturing; it helps to reduce light reflection and increase light absorption, thereby improving the photoelectric conversion efficiency of solar cells.

[0035] Furthermore, in step S8, the laser film opening area is first polished to a depth of 1~5μm on the substrate; then a texturing liquid is used for rapid texturing, and the texturing liquid is a mixture of KOH and additives in a mass ratio of 4:1~10:1. The temperature is maintained at 75~85°C for 4~6 minutes to prevent cracks caused by deformation of the silicon wafer or thermal stress, and the thinning amount is controlled at 0.1~0.3g.

[0036] In this process, the polished structure of the laser film opening area is textured, while the non-laser area on the front side is kept as a polished surface, which can reduce light scattering and reflection losses, reduce the formation of surface recombination centers, and reduce the recombination rate of carriers, thereby improving the open circuit voltage (Voc) and photoelectric conversion efficiency of the battery. It can also avoid unnecessary surface roughness, help achieve more stable metal contact, and improve the conductivity of the electrode and the overall performance of the device.

[0037] S9: Use nitrogen gas at a pressure of 200-600Pa to perform annealing process, gradually increase the temperature from 500℃ to 900℃, and take about 30~60min; complete the front and back annealing simultaneously to better control the doping diffusion depth and interface quality, which helps to ensure the uniformity of the entire silicon wafer during the annealing process, forming a N front side. + -Poly-Si selective doping, P on the back + -poly-Si doped structure; back P + - In poly-Si, the phosphorus doping concentration is about 7E19, and the square resistance is 200-500; the front N + -poly-Si, the boron doping concentration is about 2E20, and the square resistance is 30~60. During the process, annealing activates the dopant and repairs the tiny lattice defects caused by laser processing to improve the crystal quality of the material, reduce lattice defects and surface defects, thereby increasing the carrier lifetime and reducing the recombination rate. + -poly-Si, P + -Poly-Si has higher activity and conductivity, thus improving the short-circuit current density (Jsc) and fill factor (FF) of the battery.

[0038] S10: Clean and remove the front PSG and the back BSG;

[0039] Furthermore, in step S10, the PSG on the front side and the BSG on the back side are removed by a chain cleaning machine with a HF concentration volume ratio of 25%, and then a mixed solution of ammonia water and hydrogen peroxide is used for cleaning at 80°C for 2 minutes. The ratio of the ammonia water to the hydrogen peroxide is 1:1 to 1:4. The PSG and BSG layers on the surface of the silicon wafer can be removed efficiently, while reducing damage and contamination to the surface of the silicon wafer.

[0040] S11: depositing aluminum oxide and anti-reflection film on both sides in sequence;

[0041] Furthermore, in step S11, TMA, N2, and H2O are periodically introduced into the ALD chamber under vacuum conditions to deposit aluminum oxide on both sides, and the thickness of the aluminum oxide is 1~5nm; the anti-reflection film is a multilayer film of SiNx or SiOx, SiNx, and SiON superimposed on each other deposited in sequence using PECVD, with a total film thickness of 70~90nm and a refractive index of 1.9~2.1.

[0042] S12: Electrodes are made on the front and back sides respectively, and gate lines are printed, and then sintered at 700°C to 820°C and photoelectrically injected to obtain a battery.

[0043] The second purpose of the present invention is to provide a new type of selective passivation contact battery structure, in which N-poly is prepared on the front side of the battery and laser film is opened on the front side, so as to avoid the situation in which B is simultaneously promoted during the laser film opening of P-poly in the prior art, thereby increasing the surface concentration and increasing the surface recombination, making cleaning more difficult and reducing the protective ability of the mask under the same cleaning effect.

[0044] In order to achieve the above object, the technical solution adopted by the present invention is:

[0045] A novel selective passivation contact cell structure is prepared by the above-mentioned preparation method, comprising an N-type silicon wafer, wherein the front side of the N-type silicon wafer comprises a contact area and a non-contact area, wherein the contact area is provided with a tunneling oxide layer, an N-type silicon wafer, and a non-contact area in sequence from the inside to the outside. + -poly-si layer, a first aluminum oxide layer, a first anti-reflection layer and a front metal electrode, the non-contact area is provided with a second aluminum oxide layer and a second anti-reflection layer in sequence from the inside to the outside; the contact area is a polished structure, and the non-contact area is a suede structure;

[0046] The back side of the N-type silicon wafer is provided with a first tunnel oxide layer, a first P + -poly-si layer, second tunnel oxide layer, second P + -poly-si layer, a third aluminum oxide layer, a third anti-reflection layer and a back metal electrode.

[0047] Beneficial effects of the present invention:

[0048] (1) The present invention first forms a tunneling layer, an i-poly layer, a p-poly layer and a mask layer on the back and front sides of an N-type silicon wafer by a PECVD method, and then forms intrinsic polysilicon by in-situ doping and multiple laser treatments, and then high-temperature annealing. In the state where the poly is not activated, the cleaning difficulty is reduced, and then the high-temperature annealing is performed to activate the doping source, eliminating the additional high-temperature diffusion process, simplifying the process as a whole, reducing investment, and improving efficiency by more than 0.5%.

[0049] (2) The difficulty of the present invention lies in achieving the generation of front poly-SE. In the laser ablation process of the prior art, the PSG area on the surface is cleaned. After etching the poly, there is a tunneling oxide layer blocking it. The tunneling oxide layer grown by PECVD has good density, while the mask layer on the surface is relatively loose. It is difficult to perfectly remove it while retaining the mask layer by cleaning, which increases the difficulty of cleaning. The present invention adopts secondary laser film opening, which reduces the requirements for cleaning and can take into account that the area that needs to be retained is not etched. Among them, the first laser film opening removes N + -The mask oxide layer on the surface of poly-si, and then the secondary laser film opening can selectively remove the tunneling oxide layer while retaining the mask oxide layer in the contact area to achieve the preparation of poly-SE. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0051] Figure 1 This is a flow chart of the preparation of a novel selective passivation contact battery structure in an embodiment of the present invention;

[0052] Figure 2 is a schematic structural diagram of a novel selective passivation contact battery structure in an embodiment of the present invention;

[0053] Reference numerals: 01, N-type silicon wafer; 11, contact region; 12, non-contact region; 111, tunnel oxide layer; 112, N + -poly-si layer; 113, first aluminum oxide layer; 114, first anti-reflection layer; 115, front metal electrode; 121, second aluminum oxide layer; 122, second anti-reflection layer; 21, first tunneling oxide layer; 22, first P + -poly-si layer; 23, second tunnel oxide layer; 24, second P +-poly-si layer; 25. third aluminum oxide layer; 26. third anti-reflection layer; 27. back metal electrode. DETAILED DESCRIPTION

[0054] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined invention purpose, a novel selective passivation contact battery structure and its preparation method proposed according to the present invention, its specific implementation method, characteristics and effects are described in detail as follows.

[0055] In the examples of the present invention, the sources of commercially available materials are shown in Table 1 below:

[0056] Table 1

[0057]

[0058] Example 1

[0059] like Figure 1 A method for preparing a novel selectively passivated contact battery structure is listed, comprising the following steps:

[0060] S1: N-type silicon wafers with resistivity of 1~3Ω.cm and minority carrier lifetime>10ms are polished in a slot machine with a polishing thickness of 6μm. If it is too thin, it may not be enough to remove the surface damage layer, and if it is too thick, it may waste materials and affect the consistency of battery thickness.

[0061] S2: In-situ doping is performed on the back side by PECVD, and the first tunneling oxide layer, the first i-poly layer, the second tunneling oxide layer, the second i-poly layer, boron doping and the mask oxide layer are prepared on the same tube;

[0062] Among them, the first tunneling oxide layer and the second tunneling oxide layer are SiNx or SiOx, with a thickness of 2nm respectively, the thickness of the first i-poly layer and the second i-poly layer are 80nm respectively, and the thickness of the mask oxide layer is 5nm; the mask oxide layer is used as a mask to protect the back poly layer when removing the front poly plating; after the second i-poly layer is deposited, boron doping gas (borane B2H6) is immediately introduced for in-situ doping.

[0063] S3: The mask layer on the front and sides was removed on a chain cleaning machine with an HF concentration volume ratio of 35%; then single-sided polishing was performed using a tank cleaning machine, KOH: polishing additive = 3:1, the temperature was controlled at 80°C, and the polishing weight loss was 0.15g.

[0064] S4: The front side is in-situ doped by PECVD, and the tunneling oxide layer, i-poly layer, phosphorus doping and mask oxide layer are performed on the same tube; the tunneling oxide layer is SiNx or SiOx with a thickness of 2nm, the thickness of the i-poly layer is 80nm, and the thickness of the mask oxide layer is 5nm; the mask oxide layer is used as a mask to protect N when removing the poly plating of the non-doped area + -poly layer;

[0065] S5: Use a green laser to scan once to open the film on the non-metallized contact area on the front side, where the power of the green laser is 15W;

[0066] S6: The front laser film opening area is subjected to poly removal and cleaning; the cleaning agent is a mixture of KOH and an additive in a mass ratio of 4:1, the temperature is maintained at 70° C., the cleaning time is 2 minutes, and the poly layer in the laser film opening area is removed.

[0067] S7: Use a green laser to scan once to open the film in the same area on the front side (the area opened by laser once) to remove the tunnel oxide layer in this area; the power of the green laser is 10W;

[0068] S8: Polish the front laser-opened area to a depth of 2μm on the substrate. Then use a texturing solution for rapid texturing. The texturing solution is a mixture of KOH and additives in a mass ratio of 6:1. The temperature is maintained at 80°C for 4 to 6 minutes to prevent cracks caused by deformation of the silicon wafer or thermal stress. The thinning amount is controlled at 0.2g.

[0069] S9: Use nitrogen to perform annealing process at a pressure of 500Pa for about 40 minutes; complete the front and back annealing simultaneously, which helps to ensure the uniformity of the entire silicon wafer during the annealing process, forming a N front side. + -Poly-Si selective doping, P on the back + -poly-Si doped structure;

[0070] S10: Use a mixture of ammonia and hydrogen peroxide to clean at 80°C for 2 minutes to remove the PSG on the front side and the BSG on the back side;

[0071] S11: Aluminum oxide and anti-reflection film are deposited on both sides in sequence; the thickness of aluminum oxide is 1~5nm; the anti-reflection film is a multilayer film of SiNx or SiOx, SiNx, and SiON deposited in sequence using PECVD, with a total film thickness of 80nm and a refractive index of 2.0.

[0072] S12: Electrodes are made on the front and back sides respectively and gate lines are printed, and then sintered at 800°C and photoelectrically injected to obtain a battery.

[0073] like Figure 2 As shown, a novel selective passivation contact cell structure is prepared by the above preparation method, including an N-type silicon wafer 01, the front side of the N-type silicon wafer 01 includes a contact area 11 and a non-contact area 12, and the contact area 11 is sequentially provided with a tunneling oxide layer 111, an N + -poly-si layer 112, first aluminum oxide layer 113, first anti-reflection layer 114 and front metal electrode 115, the non-contact area 12 is sequentially provided with second aluminum oxide layer 121 and second anti-reflection layer 122 from inside to outside; the contact area 11 is a polished structure, and the non-contact area 12 is a suede structure;

[0074] The back side of the N-type silicon wafer 01 is provided with a first tunnel oxide layer 21, a first P + -poly-si layer 22, second tunnel oxide layer 23, second P + -poly-si layer 24, third aluminum oxide layer 25, third anti-reflection layer 26 and back metal electrode 27.

[0075] Comparative Example 1

[0076] 1) Use N-type silicon wafers with a resistivity of 0.5~2Ω.cm and a minority carrier lifetime of >10 ms for alkali texturing to form a pyramid structure for surface light trapping;

[0077] 2) Diffusion of B on the front side to prepare PN junction;

[0078] 3) After the back side chain HF cleaning removes the BSG on the back side and around, the back side is polished with a mixed aqueous solution of additives and alkali, and the B wrapping on the back side and edge is removed at the same time;

[0079] 4) The tunneling oxide passivation structure was prepared by back PECVD method, and the SiOx mask layer was deposited at the same time. The thickness of the tunneling oxide layer was 1.5 nm, the thickness of the poly-Si was 80 nm, the square resistance was controlled to be 40 Ω / sq, and the surface concentration was 2×10 20 atoms / cm 3 , the inflection point concentration is 8×10 18 atoms / cm 3 ;

[0080] 5) Oxidation annealing;

[0081] 6) Front chain HF cleaning removes BPSG at the edge, retains part of BSG on the front, and performs front alkaline polishing to remove the plating cleaning;

[0082] 7) Front aluminum oxide passivation;

[0083] 8) Front / back silicon nitride passivation;

[0084] 9) Printing metal electrodes on both sides and sintering to form ohmic contacts;

[0085] 10) Light injection.

[0086] Comparative Example 2

[0087] A method for preparing a novel selectively passivated contact battery structure comprises the following steps:

[0088] S1: N-type silicon wafers with resistivity of 1~3Ω.cm and minority carrier lifetime>10ms are polished in a slot machine with a polishing thickness of 6μm. If it is too thin, it may not be enough to remove the surface damage layer, and if it is too thick, it may waste materials and affect the consistency of battery thickness.

[0089] S2: In-situ doping is performed on the back side by PECVD, and the first tunneling oxide layer, the first i-poly layer, the second tunneling oxide layer, the second i-poly layer, boron doping and the mask oxide layer are prepared on the same tube;

[0090] Among them, the first tunneling oxide layer and the second tunneling oxide layer are SiNx or SiOx, with a thickness of 2nm respectively, the thickness of the first i-poly layer and the second i-poly layer are 80nm respectively, and the thickness of the mask oxide layer is 5nm; the mask oxide layer is used as a mask to protect the back poly layer when removing the front poly plating; after the second i-poly layer is deposited, boron doping gas (borane B2H6) is immediately introduced for in-situ doping.

[0091] S3: The mask layer on the front and sides was removed on a chain cleaning machine with an HF concentration volume ratio of 35%; then single-sided polishing was performed using a tank cleaning machine, KOH: polishing additive = 3:1, the temperature was controlled at 80°C, and the polishing weight loss was 0.15g.

[0092] S4: The front side is in-situ doped by PECVD, and the tunneling oxide layer, i-poly layer, phosphorus doping and mask oxide layer are performed on the same tube; the tunneling oxide layer is SiNx or SiOx with a thickness of 2nm, the thickness of the i-poly layer is 80nm, and the thickness of the mask oxide layer is 5nm; the mask oxide layer is used as a mask to protect N when removing the poly plating of the non-doped area + -poly layer;

[0093] S5: Use a green laser to scan once to open the film on the non-metallized contact area on the front side, where the power of the green laser is 15W;

[0094] S6: The front laser film opening area is subjected to poly removal and cleaning; the cleaning agent is a mixture of KOH and an additive in a mass ratio of 4:1, the temperature is maintained at 70° C., the cleaning time is 2 minutes, and the poly layer in the laser film opening area is removed.

[0095] S7: Use a green laser to scan once to open the film in the same area on the front side (the area opened by laser once) to remove the tunnel oxide layer in this area; the power of the green laser is 10W;

[0096] S8: The front laser film opening area is first polished to a depth of 2 μm from the substrate;

[0097] S9: Use nitrogen to perform annealing process at a pressure of 500Pa for about 40 minutes; complete the front and back annealing simultaneously, which helps to ensure the uniformity of the entire silicon wafer during the annealing process, forming a N front side. + -Poly-Si selective doping, P on the back + -poly-Si doped structure;

[0098] S10: Use a mixture of ammonia and hydrogen peroxide to clean at 80°C for 2 minutes to remove the PSG on the front side and the BSG on the back side;

[0099] S11: Aluminum oxide and anti-reflection film are deposited on both sides in sequence; the thickness of aluminum oxide is 3nm; the anti-reflection film is a multilayer film of SiNx or SiOx, SiNx, and SiON superimposed on each other, which is deposited in sequence using PECVD, with a total film thickness of 80nm and a refractive index of 2.0.

[0100] S12: Electrodes are made on the front and back sides respectively and gate lines are printed, and then sintered at 800°C and photoelectrically injected to obtain a battery.

[0101] Comparative Example 3

[0102] S1: Double-sided polishing: N-type silicon wafers with resistivity of 1~3Ω.cm and minority carrier lifetime>10ms are polished in a slot machine with a polishing thickness of 5μm;

[0103] S2: Positive P + -poly-si: PECVD is used for in-situ doping to generate tunneling oxide layer, i-poly layer, p-poly layer and mask oxide layer in the same tube;

[0104] S3: Back pickling to remove mask and polishing: Use a chain cleaning machine with an HF concentration volume ratio of 35% to remove the mask layer on the front and sides; then use a tank cleaning machine for single-side polishing, KOH: polishing additive = 4:1, the temperature is controlled at 80°C, and the polishing weight loss is about 0.2g;

[0105] S4: Back N +-poly-si: PECVD is used for in-situ doping to generate tunneling oxide layer, i-poly layer, p-poly layer and mask oxide layer in the same tube;

[0106] S5: One-time laser film opening: Green laser single scan, using 10W power to face P + -Laser film opening is performed on the non-metallized contact area of ​​poly-si to remove the mask layer on the surface; + -Poly-si has a significant increase in concentration when laser film is opened, which can reach an order of magnitude. The surface compound increases exponentially, making cleaning more difficult and the window narrower.

[0107] S6: Front poly removal cleaning: Poly removal cleaning is performed on the laser film opening area, KOH: additive = 5:1, the temperature is maintained at 70°C, the time is about 6 minutes, and the poly removal of the film opening area is performed; the concentration ratio of the cleaning solution increases and the time increases, which reduces the protective ability of the surface mask;

[0108] S7: Second laser film opening: The green laser is scanned once, and the power of 10W is used to open the same area (the area of ​​the first laser film opening). The laser function this time is to remove the tunneling oxide layer.

[0109] S8: Polishing + texturing: Polishing is performed first, and the depth of the substrate is about 3μm; then the texturing liquid (KOH: additive = 6:1) is used, the temperature is maintained at 80℃, and the time is about 5 minutes for rapid texturing. The thinning amount is controlled at about 0.20g;

[0110] S9: Co-annealing: Synchronous annealing of the front and back sides, with the front side being P + -Poly-Si selective doping, N on the back + -poly-si doping;

[0111] S10: Use a mixture of ammonia and hydrogen peroxide to clean at 80°C for 2 minutes to remove the PSG on the front side and the BSG on the back side;

[0112] S11: Aluminum oxide and anti-reflection film are deposited on both sides in sequence; the thickness of aluminum oxide is 3nm; the anti-reflection film is a multilayer film of SiNx or SiOx, SiNx, and SiON superimposed on each other, which is deposited in sequence using PECVD, with a total film thickness of 80nm and a refractive index of 2.0.

[0113] S12: Electrodes are made on the front and back sides respectively and gate lines are printed, and then sintered at 800°C and photoelectrically injected to obtain a battery.

[0114] Comparative Example 4

[0115] S1: N-type silicon wafers with resistivity of 1~3Ω.cm and minority carrier lifetime>10ms are polished in a slot machine with a polishing thickness of 5μm. If it is too thin, it may not be enough to remove the surface damage layer, and if it is too thick, it may waste materials and affect the consistency of battery thickness.

[0116] S2: In-situ doping is performed on the back side by PECVD, and the first tunneling oxide layer, the first i-poly layer, the second tunneling oxide layer, the second i-poly layer, boron doping and the mask oxide layer are prepared on the same tube;

[0117] Among them, the first tunneling oxide layer and the second tunneling oxide layer are SiNx or SiOx, with a thickness of 2nm respectively, the thickness of the first i-poly layer and the second i-poly layer are 80nm respectively, and the thickness of the mask oxide layer is 5nm; the mask oxide layer is used as a mask to protect the back poly layer when removing the front poly plating; after the second i-poly layer is deposited, boron doping gas (borane B2H6) is immediately introduced for in-situ doping.

[0118] S3: The mask layer on the front and sides was removed on a chain cleaning machine with an HF concentration volume ratio of 35%; then single-sided polishing was performed using a tank cleaning machine, KOH: polishing additive = 3:1, the temperature was controlled at 80°C, and the polishing weight loss was 0.15g.

[0119] S4: The front side is in-situ doped by PECVD, and the tunneling oxide layer, i-poly layer, phosphorus doping and mask oxide layer are performed on the same tube; the tunneling oxide layer is SiNx or SiOx with a thickness of 2nm, the thickness of the i-poly layer is 80nm, and the thickness of the mask oxide layer is 5nm; the mask oxide layer is used as a mask to protect N when removing the poly plating of the non-doped area + -poly layer;

[0120] S5: Use printing method to partially print ink on the front contact area of ​​the mask, the printing line width is controlled at 90-110um, the line width is controlled at 80-100um after drying, and the line height is about 2um;

[0121] S6: Use 25% HF solution and a chain cleaning machine to clean the single side to remove the mask layer in the non-mask area on the front side;

[0122] S7: Use KOH: additive 4:1 mixed solution to remove poly-si, the temperature is controlled at 85℃, the time is 5min, and the thinning amount is controlled at 0.1;

[0123] S8: Use 10% HF solution to remove the tunneling oxide layer on the front non-mask area on one side (the density of the tunneling oxide layer is higher than that of the surface mask, and the removal rate is slow. If no secondary chain is added, the surface mask layer on the back cannot block the erosion of the alkaline solution)

[0124] S9: Use a mixture of ammonia and hydrogen peroxide to remove the ink mask layer in the contact area; (the tank body is highly contaminated, and a customized cleaning tank is required, which is costly)

[0125] S10: Polish the non-contact area on the front side to a depth of about 3μm on the substrate; then use a texturing solution (KOH: additive = 6:1) and maintain the temperature at 80°C for about 5 minutes for rapid texturing. The thinning amount is controlled at 0.20g;

[0126] S11: Co-annealing: Synchronous annealing of the front and back sides, with the front side being P + -Poly-Si selective doping, N on the back + -poly-si doping;

[0127] S12: Use a mixture of ammonia and hydrogen peroxide to clean at 80°C for 2 minutes to remove the PSG on the front side and the BSG on the back side;

[0128] S13: Aluminum oxide and anti-reflection film are deposited on both sides in sequence; the thickness of the aluminum oxide is 3nm; the anti-reflection film is a multilayer film of SiNx or SiOx, SiNx, and SiON deposited in sequence using PECVD, with a total film thickness of 80nm and a refractive index of 2.0.

[0129] S14: Electrodes are made on the front and back sides respectively and gate lines are printed, and then sintered at 800°C and photoelectrically injected to obtain a battery.

[0130] Battery performance test results

[0131] The blue diaphragm structure of the embodiment was characterized, that is, the test was performed before the electrode was prepared, and the performance test results are shown in Table 2: This data is the blue diaphragm data of the battery structure, and the data can reflect that the solution is feasible.

[0132] Table 2

[0133] Battery structure UOC[mV] Isc[mA] FF[%] Eta[%] Example 1 compared with Comparative Example 1 3 50 0.4 0.3 Comparative Example 1-Conventional Process 0 0 0 0 Comparative Example 2 compared to Comparative Example 1 3 -300 0.4 -0.4 Comparative Example 3 compared to Comparative Example 1 - - 0.4 0.1 Comparative Example 4 compared to Comparative Example 1 2 30 0.3 0.2

[0134] As shown in Table 2 above, in Comparative Example 1, a basic TOPCon structure is prepared by conventional process, forming a structure of B diffusion on the whole surface and n-poly on the back surface. Based on this structure, the embodiment of the present invention is tested, and it can be seen that UOC is improved by 3mV, Isc is improved by 50mA, FF is improved by 0.4%, and Eta is improved by 0.3%, indicating that the front surface of the present invention is N + -Poly-Si selective doping, P on the back+ -Poly-Si doped double-sided TOPCon cells. This solves the problem of severe light absorption and low current caused by excessively thick poly-Si, and the problem of poor contact and low FF caused by excessively thin poly-Si.

[0135] In step S8 of comparative example 2, the laser film opening area is directly polished to a depth of 1-5um of the substrate; no texturing is performed, there is no light trapping effect, the absorption of photons is small, and the current is low;

[0136] In comparative example 3, the front side is selectively doped with P + -poly-si, P-poly doped with boron, due to the low solid solubility of B in silicon, it is necessary to thicken the poly to ensure that it does not penetrate, and the thickness of the poly needs to be 80-300nm; at the same time, thick poly has large near-infrared parasitic absorption losses; During the laser film opening process of P-poly, B is also pushed forward, increasing the surface concentration and increasing the surface recombination, making cleaning more difficult, and the protective ability of the mask decreases under the same cleaning effect;

[0137] In comparative example 4, alkaline etching is used to remove the poly structure of the non-doped area. Compared with laser film opening, the steps are complicated, the controllability is low, and the cost is high.

[0138] Those skilled in the art should understand that the present invention is not limited to the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, and these changes and improvements fall within the scope of the present invention to be protected. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. A method for preparing a novel selectively passivated contact battery structure, characterized in that: The steps are as follows: S1: N-type silicon wafer is used for polishing, and the polishing thickness is 5~10μm; S2: preparing the first tunneling oxide layer, the first i-poly layer, the second tunneling oxide layer, the second i-poly layer, boron doping and the mask oxide layer on the back side; S3: Pickling on the front side to remove the mask oxide layer and polishing; S4: Preparation of tunnel oxide layer, i-poly layer, phosphorus doping and mask oxide layer on the front side; S5: Use a single scan of the green laser to open the film on the non-metallized contact area on the front side to remove the mask oxide layer on the surface; S6: remove poly and clean the front laser film opening area; S7: Use a green laser to scan once to open the front laser opening area and remove the tunneling oxide layer in this area; S8: Polish the laser-opened area on the front side first, and then use the texturing liquid to texturize; S9: Use nitrogen at a pressure of 200~600Pa for 30~60min to simultaneously complete the front and back annealing. + -Poly-Si selective doping, P on the back + -poly-Si doping; S10: Clean and remove the front PSG and the back BSG; S11: Depositing aluminum oxide and anti-reflection film on both sides in sequence; S12: Electrodes are made on the front and back sides respectively, and gate lines are printed, followed by sintering and photoelectric injection to obtain a battery.

2. The method for preparing a novel selectively passivated contact battery structure according to claim 1, characterized in that: In step S2, in step S2, the back side is in-situ doped by PECVD, and the first tunneling oxide layer, the first i-poly layer, the second tunneling oxide layer, the second i-poly layer, boron doping and the mask oxide layer are prepared on the same tube; the first tunneling oxide layer and the second tunneling oxide layer are SiNx or SiOx, and the thickness is 1~3nm respectively, the thickness of the first i-poly layer and the second i-poly layer is 80~100nm respectively, and the thickness of the mask oxide layer is 3~10nm.

3. The method for preparing a novel selectively passivated contact battery structure according to claim 1, characterized in that: In step S3, the mask oxide layer on the front and side is removed using a chain cleaning machine with an HF concentration volume ratio of 25% to 50%; then a single-side polishing is performed using a tank cleaning machine, the temperature is controlled at 80°C, and the polishing weight loss is 0.15g.

4. The method for preparing a novel selectively passivated contact battery structure according to claim 1, characterized in that: In step S4, the tunnel oxide layer is SiNx or SiOx with a thickness of 1-3 nm, the thickness of the i-poly layer is 80-100 nm, and the thickness of the mask oxide layer is 3-10 nm.

5. The method for preparing a novel selectively passivated contact battery structure according to claim 1, characterized in that: In step S6, the cleaning agent is KOH and the additive mixed in a mass ratio of 3:1 to 5:1, the temperature is maintained at 60 to 80°C, and the time is 1 to 6 minutes to remove the poly layer in the laser film opening area.

6. The method for preparing a novel selectively passivated contact battery structure according to claim 1, characterized in that: In step S8, the laser film opening area is first polished to a depth of 1~5μm from the substrate; then a texturing liquid is used for rapid texturing, wherein the texturing liquid is a mixture of KOH and additives in a mass ratio of 4:1~10:1, the temperature is maintained at 75~85°C, the time is 4~6min, and the thinning amount is controlled at 0.1~0.3g.

7. The method for preparing a novel selectively passivated contact battery structure according to claim 1, characterized in that: In step S10, the front PSG and the back BSG are removed by a chain cleaning machine with an HF concentration volume ratio of 25%, and then a mixed solution of ammonia and hydrogen peroxide is used for cleaning at 80° C. for 2 minutes.

8. The method for preparing a novel selectively passivated contact battery structure according to claim 1, characterized in that: In step S11, the thickness of aluminum oxide deposited on both sides is 1~5nm; PECVD is used to deposit SiNx or a multilayer film of SiOx, SiNx, and SiON superimposed on each other in sequence, with a total film thickness of 70~90nm and a refractive index of 1.9~2.

1.

9. A novel selectively passivated contact battery structure, prepared by the preparation method according to any one of claims 1 to 8, characterized in that: The N-type silicon wafer comprises a front surface of the N-type silicon wafer including a contact area and a non-contact area, wherein the contact area is provided with a tunnel oxide layer, an N + -poly-Si layer, aluminum oxide layer, anti-reflection layer and front metal electrode, the non-contact area is sequentially provided with aluminum oxide layer and anti-reflection layer from inside to outside; The back side of the N-type silicon wafer is provided with a tunnel oxide layer, a P + -poly-Si layer, aluminum oxide layer, anti-reflection layer and back metal electrode.

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