An NPC three-level multi-tube fault-tolerant rectifier and control method thereof

By introducing a fault-tolerant unit circuit of bidirectional thyristor and relay into an NPC three-level rectifier, the system recovery is realized when the IGBT power switch tube fails, solving the problem of failure in the existing technology when the internal and external tubes fail at the same time, and reducing the rectifier failure recovery cost and complexity.

CN118920843BActive Publication Date: 2025-01-10NANJING UNIV OF SCI & TECH
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Patent Information

Application Number
CN202411380561.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-09-30
Publication Date
2025-01-10
Estimated Expiration
2044-09-30

AI Technical Summary

Technical Problem

Existing NPC three-level rectifiers are difficult to effectively tolerate faults in the event of failure, especially when internal and external pipes fail at the same time, the complete recovery of the system cannot be achieved, and the hardware fault tolerance method increases cost and complexity.

Method used

A NPC three-level multi-tube fault-tolerant rectifier was designed. By introducing bidirectional thyristors and relays into each phase bridge arm, the fault-tolerant unit circuit can be realized. The topology can be reconstructed when the IGBT power switch tube fails, and the SVPWM control method is used to ensure that The system can still operate normally in a faulty state.

Benefits of technology

It realizes fault-tolerant control in the event of IGBT power switch tube failure, can recover three-phase current on the AC side and DC side voltage. It is suitable for a variety of fault types, including single-tube and double-tube faults, reducing the fault recovery cost and complexity of rectifiers .

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Abstract

The present invention discloses an NPC three-level multi-tube fault-tolerant rectifier and a control method thereof. According to the position of the fault switch tube and the fault type, the rectifier switches to the corresponding reconstruction topology by controlling the on and off of the bidirectional thyristor and the relay; adopts a two-level modulation method to re-divide six sectors, reconstruct the basic voltage vector and calculate the action time and action order of the basic voltage vector; determines the duty cycle of each switch tube, generates a PWM pulse signal by comparing it with a triangular carrier, and outputs it to the gate of the IGBT power switch tube to control the on and off, thereby completing the fault-tolerant control of the NPC three-level multi-tube fault-tolerant rectifier. The present invention can enable the rectifier to restore the distorted three-phase current to the maximum extent after a fault, balance the midpoint voltage, and improve the reliability of the NPC three-level rectifier.
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Description

Technical Field

[0001] The invention belongs to the technical field of power generation, and in particular relates to an NPC three-level multi-tube fault-tolerant rectifier and a control method thereof. Background Art

[0002] The neutral point clamped NPC (Neutral Point Clamped) three-level rectifier consists of four IGBT devices in each bridge arm from top to bottom. By controlling the on and off of the IGBT, the three-level NPC rectifier can input -U dc / 2 / 0, U dc / 2 three different level states. Compared with the two-level rectifier, the NPC three-level rectifier has the advantages of large output power, strong voltage resistance and low harmonic content. It is gradually replacing the two-level rectifier in high-power power generation applications and is widely used in wind power generation, aerospace, variable frequency speed regulation and other fields. Due to the increased system complexity of the NPC rectifier compared to the two-level rectifier, the increase in the number of power switching devices leads to an increased probability of rectifier failure. During the operation of the rectifier system, once the rectifier fails, the output waveform may be distorted, the device will be subjected to increased stress, and secondary failures or even the failure of the entire system may occur. In order to improve the stability of the power generation system, it is necessary to study the fault-tolerant control of the rectifier, reduce the maintenance cost of the power generation system, and improve the overall economic benefits.

[0003] The fault-tolerant control of rectifiers at home and abroad is mainly divided into two categories, namely software fault-tolerant methods and hardware fault-tolerant methods. The software fault-tolerant method does not need to increase the hardware cost. It only needs to switch the fault-tolerant control algorithm to achieve the maximum recovery of the system after the switch tube fails. However, the pure software fault-tolerant method cannot completely restore the three-phase current, and the applicable fault types are limited, and it cannot handle the simultaneous failure of the inner and outer tubes. The hardware fault-tolerant method is to restore the system to the operating state before the fault by reconstructing the topology after the fault occurs. The paper "Ceballos, S, et al. "Performance Evaluation ofFault-Tolerant Neutral-Point-Clamped Converters." IEEE Transactions onIndustrial Electronics 57.8(2010):2709-2718" proposed a power switch device fault-tolerant control method suitable for three-level NPC rectifiers, that is, by adding two power switch devices per phase to convert to ANPC topology to achieve fault-tolerant control. Due to the increase of IGBT devices, the cost is increased, and this scheme is only applicable to the inner tube failure, and cannot handle the simultaneous failure of the inner and outer tubes. Summary of the invention

[0004] The present invention aims to provide an NPC three-level multi-tube fault-tolerant rectifier and a control method thereof.

[0005] The technical solution to achieve the purpose of the present invention is: an NPC three-level multi-tube fault-tolerant rectifier, including three-phase bridge arms of phase a, phase b, and phase c, two voltage-dividing capacitors C d1 , C d2 , and relay K dc and load; each phase bridge arm consists of an NPC main circuit and a fault-tolerant unit circuit, where:

[0006] (1) NPC main circuit of each phase bridge arm

[0007] The NPC main circuit includes the filter inductor L x , relay K x , four IGBT power switch tubes S x1 , S x2 , S x3 , S x4 And the corresponding four anti-parallel diodes D x1 , D x2 , D x3 , D x4 , and two clamping diodes D zx1 , D zx2 ; The power supply of each phase bridge arm is connected in series with the filter inductor L x Connected to the bridge arm starting point x, the bridge arm starting point x passes through the relay K x Connect to IGBT power switch tube S x2 , S x3 The midpoint of the bridge arm x 0 ; Among them, IGBT power switch tube S x1 The collector and the voltage divider capacitor C d1 The positive pole of the IGBT power switch tube S is connected to x1 The emitter of the IGBT power switch tube S x2 The collector of the IGBT power switch tube S x2 The emitter of the IGBT power switch tube S x3 The collector of the IGBT power switch tube S x3 The emitter of the IGBT power switch tube S x4 The collector of the IGBT power switch tube S x4 The emitter and the voltage divider capacitor C d2 The negative electrode of the clamping diode D zx1 The negative pole of the IGBT power switch tube S is connected x1 , S x2 The midpoint x + , clamping diode D zx1 The positive terminal of the clamping diode Dzx2 The cathode of the clamping diode D zx2 The positive pole of the IGBT power switch tube S is connected x3 and S x4 The midpoint x - ; Three-phase clamping diode D zx1 With D zx2 The midpoint of the dc Connected to two voltage-dividing capacitors C in series on the DC side d1 , C d2 The midpoint n;

[0008] (2) Fault-tolerant unit circuit of each phase bridge arm

[0009] The fault-tolerant unit circuit includes four bidirectional thyristors TR x1 ,TR x2 ,TR x3 ,TR x4 , bidirectional thyristor TR x1 Connect the bridge arm starting point x to the IGBT power switch tube S x1 and S x2 The midpoint x + , bidirectional thyristor TR x2 Connect the bridge arm starting point x to the IGBT power switch tube S x3 and S x4 The midpoint x - , bidirectional thyristor TR x3 Connect IGBT power switch tube S x1 and S x2 The midpoint x + With the voltage divider capacitor C d1 The positive pole of the bidirectional thyristor TR x4 Connect IGBT power switch tube S x3 and S x4 The midpoint x - With the voltage divider capacitor C d2 The negative pole of the device, where x=a, b, c.

[0010] A control method for an NPC three-level multi-tube fault-tolerant rectifier is provided, which is used for the fault-tolerant control of the NPC three-level multi-tube fault-tolerant rectifier, and comprises the following steps:

[0011] 1. Determine SVPWM control under normal operation

[0012] Determine the switch state and basic voltage vector under normal operating conditions, perform sector division, determine the action time and action order of the basic voltage vector under normal operating conditions, and complete SVPWM control.

[0013] (II) Determine SVPWM control under fault-tolerant operation

[0014] Under the fault state of IGBT power switch tube, according to the fault location, the corresponding bidirectional thyristor is turned on and the relay contacts are switched, and the corresponding fault-tolerant topology is reconstructed. The switch state and basic voltage vector under the fault-tolerant operation state are determined, and sector division is performed. The action time and action order of the basic voltage vector under the fault-tolerant operation state are determined to complete SVPWM control.

[0015] A control system for an NPC three-level multi-tube fault-tolerant rectifier implements the control method for the NPC three-level multi-tube fault-tolerant rectifier to achieve control of the NPC three-level multi-tube fault-tolerant rectifier.

[0016] A computer device comprises a memory, a processor and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the control method of the NPC three-level multi-tube fault-tolerant rectifier is implemented to realize the control of the NPC three-level multi-tube fault-tolerant rectifier.

[0017] A computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the control method of the NPC three-level multi-tube fault-tolerant rectifier is implemented to realize the control of the NPC three-level multi-tube fault-tolerant rectifier.

[0018] Compared with the prior art, the present invention has the following significant advantages: 1) The proposed NPC three-level multi-tube fault-tolerant rectifier only adds three-phase thyristors and relays, and does not need to add IGBT power switch tubes, so it is low-cost and simple to control; 2) The proposed fault-tolerant method has a good compensation effect, and both the three-phase current on the AC side and the voltage on the DC side can be restored to the maximum extent; 3) The proposed fault-tolerant topology is suitable for a variety of open circuit or short circuit fault types, and can realize single-tube and double-tube faults of inner and outer tubes, and double inner tubes, and can also realize fault tolerance under simultaneous faults of different bridge arms, and is also suitable for rectifiers and inverters. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is the topology diagram of the NPC three-level multi-tube fault-tolerant rectifier.

[0020] Figure 2 This is the fault-tolerant control block diagram of the NPC three-level multi-tube fault-tolerant rectifier.

[0021] Figure 3 This is the sector and space vector division diagram of the NPC three-level multi-tube fault-tolerant rectifier during normal operation.

[0022] Figure 4 This is the sector and space vector division diagram of the NPC three-level multi-transistor fault-tolerant rectifier during fault-tolerant operation.

[0023] Figure 5 NPC three-level multi-transistor fault-tolerant rectifier S a1 , S a2 Three-phase current diagram on the AC side during open circuit fault.

[0024] Figure 6 NPC three-level multi-transistor fault-tolerant rectifier S a1 , S a2 DC side midpoint voltage diagram during open circuit fault.

[0025] Figure 7 NPC three-level multi-transistor fault-tolerant rectifier S a1 , S a2 Three-phase current diagram on the AC side during short circuit fault.

[0026] Figure 8 NPC three-level multi-transistor fault-tolerant rectifier S a1 , S a2 DC side midpoint voltage diagram during short circuit fault.

[0027] Fig. 9 NPC three-level multi-transistor fault-tolerant rectifier S a1 , S a2 Three-phase current diagram of the AC side after fault-tolerant control.

[0028] Fig.10 NPC three-level multi-transistor fault-tolerant rectifier S a1 , S a2 DC side midpoint voltage diagram after fault-tolerant control.

[0029] Fig.11 NPC three-level multi-transistor fault-tolerant rectifier S a2 , S a3 Three-phase current diagram on the AC side during open circuit fault.

[0030] Fig.12 NPC three-level multi-transistor fault-tolerant rectifier S a2 , S a3 DC side midpoint voltage diagram during open circuit fault.

[0031] Fig.13 NPC three-level multi-transistor fault-tolerant rectifier S a2 , S a3 Three-phase current diagram on the AC side during short circuit fault.

[0032] Fig.14 NPC three-level multi-transistor fault-tolerant rectifier S a2 , S a3 DC side midpoint voltage diagram during short circuit fault.

[0033] Fig.15NPC three-level multi-transistor fault-tolerant rectifier S a2 , S a3 Three-phase current diagram of the AC side after fault-tolerant control.

[0034] Fig.16 NPC three-level multi-transistor fault-tolerant rectifier S a2 , S a3 DC side midpoint voltage diagram after fault-tolerant control. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0036] Figure 1 This is the topology diagram of the NPC three-level multi-transistor fault-tolerant rectifier. The input side is a three-phase voltage source U a , U b , U c , and the filter inductor L a , L b , L c ; S a1 , S a2 , S a3 , S a4 , S b1 , S b2 , S b3 , S b4 , S c1 , S c2 , S c3 , S c4 D is the IGBT power switch tube; a1 , D a2 , D a3 , D a4 , D b1 , D b2 , D b3 , D b4 , D c1 , D c2 , D c3 , D c4 D is the anti-parallel diode of the IGBT power switch tube; za1 , D za2 , D zb1 , D zb2 , D zc1 , D zc2 is the clamping diode; TR a1 ,TR a2 ,TR a3 ,TR a4,TR b1 ,TR b2 ,TR b3 ,TR b4 ,TR c1 ,TR c2 ,TR c3 ,TR c4 is a bidirectional thyristor; K a , K b , K c , K dc For relay, C d1 With C d2 is the DC side voltage dividing capacitor; U ndc is the DC side midpoint voltage, U dc is the voltage across the DC load.

[0037] Figure 2 The control block diagram of the NPC three-level multi-transistor fault-tolerant rectifier is shown in Figure 2. The three-phase AC current input from the power grid is phase-locked by the PLL phase-locked loop to obtain the electrical angle θ. The three-phase current i a 、i b 、i c The current value i in the two-phase rotating coordinate system is obtained by Clark transformation and Park transformation. d 、i q , using the reactive current reference value i q * =0 control method, artificially set the active current reference value i d * , the reference values ​​of active current and reactive current are compared with the corresponding actual values, and the reference voltage U of d and q axes is output through the PI regulator. d , U q , the voltage reference value U in the two-phase stationary coordinate system is obtained by inverse Park transformation α , U β , combined with the voltage U across the DC load dc They are input together to the SVPWM module, and 12 PWM signals are output to control the on and off of the IGBT power switch tubes of the NPC three-level multi-tube fault-tolerant rectifier.

[0038] according to Figure 1 The proposed topology and Figure 2 The control block diagram shown in the figure shows a control method for an NPC three-level multi-tube fault-tolerant rectifier, comprising the following steps:

[0039] 1. Determine SVPWM control under normal operation

[0040] Determine the switch state and basic voltage vector under normal operation, divide the sectors, determine the action time and action order of the basic voltage vector under normal operation, and complete SVPWM control. The specific method is:

[0041] (1) Determine the switch state and basic voltage vector under normal operating conditions

[0042] Each phase of the NPC three-level multi-transistor fault-tolerant rectifier has three switching states: P, O, and N. The "P" state represents the two IGBT power switch tubes S of the upper bridge arm of the x phase. x1 , S x2 The two IGBT power switch tubes S in the lower bridge arm are turned on. x3 , S x4 Off; "O" state means that the two internal IGBT power switches S of phase x are x2 , S x3 The two external IGBT power switches S x1 , S x4 The "N" state indicates that the two IGBT power switch tubes S of the lower bridge arm of phase x are turned off. x3 , S x4 The two IGBT power switch tubes S on the upper bridge arm are turned on. x1 , S x2 Shutdown; where x=a, b, c.

[0043] A total of 27 switch states are output, corresponding to 27 basic voltage vectors, which are three zero vectors: V 0P (PPP), V 0O (OOO), V 0N (NNN); twelve small vectors: V 1P (POO), V 1N (ONN); V 2P (PPO), V 2N (OON); V 3P (OPO), V 3N (NON); V 4P (OPP), V 4N (NOO); V 5P (OOP), V 5N (NNO); V 6P (POP), V 6N (ONO); six vectors: V 7 (PON), V 8 (OPN), V 9 (NPO), V 10 (NOP), V 11 (ONP), V 12 (PNO); six large vectors: V13 (PNN), V 14 (PPN), V 15 (NPN), V 16 (NPP), V 17 (NNP), V 18 (PNP); the first letter represents the switching state of phase a, the second letter represents the switching state of phase b, and the third letter represents the switching state of phase c.

[0044] Since the small vectors are divided into N-type small vectors and P-type small vectors, they are redundant with each other, and the three zero vectors are also redundant with each other, so the 27 basic voltage vectors are divided into 19 independent vertex voltage vectors, that is, a zero vector: V 0 ; Six small vectors: V 1 ,V 2 ,V 3 ,V 4 ,V 5 ,V 6 ; Six mid vectors: V 7 ,V 8 , V 9 , V 10 , V 11 , V 12 ; Six large vectors: V 13 ,V 14 , V 15 , V 16 , V 17 , V 18 ; The zero vector V in the vertex voltage vector 0 Contains three zero vectors in the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN); small vector V 1 Contains V in the basic voltage vector 1P (POO), V 1N (ONN); small vector V 2 Contains V in the basic voltage vector 2P (PPO), V 2N (OON); small vector V 3 Contains V in the basic voltage vector 3P (OPO), V 3N (NON); small vector V 4 Contains V in the basic voltage vector 4P (OPP), V 4N (NOO); small vector V 5 Contains V in the basic voltage vector 5P(OOP), V 5N (NNO); small vector V 6 Contains V in the basic voltage vector 6P (POP), V 6N (ONO); the six middle vectors and six large vectors in the vertex voltage vector correspond one to one with the six middle vectors and six large vectors in the basic voltage vector.

[0045] (2) Determine the sector division under normal operation

[0046] According to the basic voltage vector of NPC three-level multi-transistor fault-tolerant rectifier, the space vector diagram in the α and β two-phase stationary coordinate system can be obtained. Figure 3 As shown, in order to synthesize a reference voltage vector that is close to an ideal circular trajectory, the space vector diagram is divided into 36 sectors, namely sectors I1, I2, I3, I4, I5, I6, II1, II2, II3, II4, II5, II6, III1, III2, III3, III4, III5, III6, IV1, IV2, IV3, IV4, IV5, IV6, V1, V2, V3, V4, V5, V6, VI1, VI2, VI3, VI4, VI5, VI6.

[0047] Each sector has a corresponding basic voltage vector. The I1 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 1P (POO), V 1N (ONN), V 2P ,(PPO),V 2N (OON), which corresponds to the vertex voltage vector V 0 、V 1 、V 2 ; I2 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 1P (POO), V 1N (ONN), V 2P ,(PPO),V 2N (OON), which corresponds to the vertex voltage vector V 0 、V 1 、V 2 ; I3 sector corresponds to the basic voltage vector V 1P (POO), V 1N (ONN), V 2P (PPO), V 2N (OON), V7 (PON), which corresponds to the vertex voltage vector V 1 、V 2 、V 7 ; I4 sector corresponds to the basic voltage vector V 1P (POO), V 1N (ONN), V 2P (PPO), V 2N (OON), V 7 (PON), which corresponds to the vertex voltage vector V 1 、V 2 、V 7 ; I5 sector corresponds to the basic voltage vector V 1P (POO), V 1N (ONN), V 7 (PON), V 13 (PNN), that is, the corresponding vertex voltage vector V 1 、V 7 、V 13 ; I6 sector corresponds to the basic voltage vector V 2P (PPO), V 2N (OON), V 7 (PON), V 14 (PPN), which corresponds to the vertex voltage vector V 2 、V 7 、V 14 ;

[0048] II1 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 2P (PPO), V 2N (OON), V 3P (OPO), V 3N (NON), which corresponds to the vertex voltage vector V 0 、V 2 、V 3 ;, II2 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 2P (PPO), V 2N (OON), V 3P (OPO), V 3N (NON), which corresponds to the vertex voltage vector V 0 、V 2 、V 3 ; II3 sector corresponds to the basic voltage vector V 2P(PPO), V 2N (OON), V 3P (OPO), V 3N (NON), V 8 (OPN), which corresponds to the vertex voltage vector V 2 、V 3 、V 8 ; II4 sector corresponds to the basic voltage vector V 2P (PPO), V 2N (OON), V 3P (OPO), V 3N (NON), V 8 (OPN), which corresponds to the vertex voltage vector V 2 、V 3 、V 8 ; II5 sector corresponds to the basic voltage vector V 2P (PPO), V 2N (OON), V 8 (OPN), V 14 (PPN), which corresponds to the vertex voltage vector V 2 、V 8 、V 14 ; II6 sector corresponds to the basic voltage vector V 3P (OPO), V 3N (NON), V 8 (OPN), V 15 (NPN), which corresponds to the vertex voltage vector V 3 、V 8 、V 15 ;

[0049] III1 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 3P (OPO), V 3N (NON), V 4P (OPP), V 4N (NOO), which corresponds to the vertex voltage vector V 0 、V 3 、V 4 ; III2 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 3P (OPO), V 3N (NON), V 4P (OPP), V 4N (NOO), which corresponds to the vertex voltage vector V0 、V 3 、V 4 ; III3 sector corresponds to the basic voltage vector V 3P (OPO), V 3N (NON), V 4P (OPP), V 4N (NOO), V 9 (NPO), which corresponds to the vertex voltage vector V 3 、V 4 、V 9 ; III4 sector corresponds to the basic voltage vector V 3P (OPO), V 3N (NON), V 4P (OPP), V 4N (NOO), V 9 (NPO), which corresponds to the vertex voltage vector V 3 、V 4 、V 9 ; III5 sector corresponds to the basic voltage vector V 3P (OPO), V 3N (NON), V 9 (NPO), V 15 (NPN), which corresponds to the vertex voltage vector V 3 、V 9 、V 15 ; III6 sector corresponds to the basic voltage vector V 4P (OPP), V 4N (NOO), V 9 (NPO), V 16 (NPP), which corresponds to the vertex voltage vector V 4 、V 9 、V 16 ;

[0050] IV1 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 4P (OPP), V 4N (NOO), V 5P (OOP), V 5N (NNO), which corresponds to the vertex voltage vector V 0 、V 4 、V 5 ; The basic voltage vector V corresponding to the IV2 sector 0P (PPP), V 0O (OOO), V 0N (NNN), V 4P (OPP), V4N (NOO), V 5P (OOP), V 5N (NNO), which corresponds to the vertex voltage vector V 0 、V 4 、V 5 ; V3 sector corresponds to the basic voltage vector V 4P (OPP), V 4N (NOO), V 5P (OOP), V 5N (NNO), V 10 (NOP), which corresponds to the vertex voltage vector V 4 、V 5 、V 10 ; The basic voltage vector V corresponding to the IV4 sector 4P (OPP), V 4N (NOO), V 5P (OOP), V 5N (NNO), V 10 (NOP), which corresponds to the vertex voltage vector V 4 、V 5 、V 10 ; The basic voltage vector V corresponding to the IV5 sector 4P (OPP), V 4N (NOO), V 10 (NOP), V 16 (NPP), which corresponds to the vertex voltage vector V 4 、V 10 、V 16 ; The basic voltage vector V corresponding to the IV6 sector 5P (OOP), V 5N (NNO), V 10 (NOP), V 17 (NNP), corresponding to the vertex voltage vector V 5 、V 10 、V 17 ;

[0051] The V1 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 5P (OOP), V 5N (NNO), V 6P (POP), V 6N (ONO), which corresponds to the vertex voltage vector V 0 、V 5 、V 6 ; V2 sector corresponds to the basic voltage vector V 0P(PPP), V 0O (OOO), V 0N (NNN), V 5P (OOP), V 5N (NNO), V 6P (POP), V 6N (ONO), which corresponds to the vertex voltage vector V 0 、V 5 、V 6 ; V3 sector corresponds to the basic voltage vector V 5P (OOP), V 5N (NNO), V 6P (POP), V 6N (ONO), V 11 (ONP), which corresponds to the vertex voltage vector V 5 、V 6 、V 11 ; V4 sector corresponds to the basic voltage vector V 5P (OOP), V 5N (NNO), V 6P (POP), V 6N (ONO), V 11 (ONP), which corresponds to the vertex voltage vector V 5 、V 6 、V 11 ; V5 sector corresponds to the basic voltage vector V 5P (OOP), V 5N (NNO), V 11 (ONP), V 17 (NNP), corresponding to the vertex voltage vector V 5 、V 11 、V 17 ; V6 sector corresponds to the basic voltage vector V 6P (POP), V 6N (ONO), V 11 (ONP), V 18 (PNP), corresponding to the vertex voltage vector V 6 、V 11 、V 18 ;

[0052] VI1 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 1P (POO), V 1N (ONN), V 6P (POP), V 6N (ONO), which corresponds to the vertex voltage vector V0 、V 1 、V 6 ; VI2 sector corresponds to the basic voltage vector V 0P (PPP), V 0O (OOO), V 0N (NNN), V 1P (POO), V 1N (ONN), V 6P (POP), V 6N (ONO), which corresponds to the vertex voltage vector V 0 、V 1 、V 6 ; VI3 sector corresponds to the basic voltage vector V 1P (POO), V 1N (ONN), V 6P (POP), V 6N (ONO), V 12 (PNO), which corresponds to the vertex voltage vector V 1 、V 6 、V 12 ; VI4 sector corresponds to the basic voltage vector V 1P (POO), V 1N (ONN), V 6P (POP), V 6N (ONO), V 12 (PNO), which corresponds to the vertex voltage vector V 1 、V 6 、V 12 ; VI5 sector corresponds to the basic voltage vector V 6P (POP), V 6N (ONO), V 12 (PNO), V 18 (PNP), corresponding to the vertex voltage vector V 6 、V 12 、V 18 ; VI6 sector corresponds to the basic voltage vector V 1P (POO), V 1N (ONN), V 12 (PNO), V 13 (PNN), that is, the corresponding vertex voltage vector V 1 、V 12 、V 13 .

[0053] (3) Determine the basic voltage vector action time and action order under normal operation

[0054] The modulation index k is defined as:

[0055]

[0056] in, is the reference voltage vector, is the DC side voltage;

[0057] The formula for the time distribution of the vertex voltage vector action is: in Indicates the vertex voltage vector that ranks first in the order of action during normal operation. Indicates the vertex voltage vector that ranks second in the order of action during normal operation. It represents the vertex voltage vector that ranks third in the order of action during normal operation; the action time of the vertex voltage vectors in sectors I1, I2, I3, I4, I5, I6, II1, II2, II3, II4, II5, and II6 are shown in Table 1;

[0058] Table 1. Vertex voltage vector action time in different sectors

[0059]

[0060] In Table 1, T s is the switching period, θ is the reference voltage vector V ref The angle between the α axis and the

[0061] The action time of each vertex voltage vector in sectors I1, I2, I3, I4, I5, I6 and the corresponding sectors III1, III2, III3, III4, III5, III6 and sectors V1, V2, V3, V4, V5, V6 is equal; the action time of each vertex voltage vector in sectors II1, II2, II3, II4, II5, II6 and the corresponding sectors IV1, IV2, IV3, IV4, IV5, IV6 and sectors VI1, VI2, VI3, VI4, VI5, VI6 is equal, so the action time of the vertex voltage vectors in the other 24 sectors can be calculated from the sectors in Table 1.

[0062] By splitting the vertex voltage vector into basic voltage vectors, the action time of the basic voltage vectors can be obtained.

[0063] The seven-segment method is used to synthesize the reference voltage vector V ref , that is, use The order of synthesized reference voltage vector V ref ; Split the vertex voltage vector into basic voltage vectors, and the action time of each basic voltage vector is , the basic voltage vector action order is shown in Table 2.

[0064] Table 2 Basic voltage vector action order in different sectors

[0065]

[0066] (4) According to the action time and action order of the basic voltage vector, the conduction time of each IGBT power switch tube is determined, and a PWM signal is generated and input to the gate of each IGBT power switch tube to control the on and off of the IGBT power switch tube and complete the normal control of the three-phase three-level NPC rectifier.

[0067] (II) Determine SVPWM control under fault-tolerant operation

[0068] In the case of an IGBT power switch failure, according to the fault location, the corresponding bidirectional thyristor is turned on and the relay contacts are switched, and the corresponding fault-tolerant topology is reconstructed to determine the switch state and basic voltage vector under the fault-tolerant operation state, and the sector division is performed to determine the action time and action order of the basic voltage vector under the fault-tolerant operation state, and complete the SVPWM control. The specific method is:

[0069] (1) In the event of an IGBT power switch failure, the corresponding bidirectional thyristor is turned on and the relay contacts are switched according to the fault location to reconstruct the corresponding fault-tolerant topology. The specific action method is shown in Table 3:

[0070] Table 3 Bidirectional thyristor and relay switching methods corresponding to different IGBT power switch tube faults

[0071]

[0072] When the external IGBT power switch tube S of the upper bridge arm of phase x is diagnosed x1 When an open circuit or short circuit occurs, the bidirectional thyristor TR x2 ,TR x3 The control signal input is in high level state, the bidirectional thyristor TR x1 ,TR x4 The control electrode signal input is in low level state; the relay is connected to the current signal, at this time, the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 The two-level rectifier is composed of the following steps: x1 , S x2 The signal input only controls the fault phase IGBT power switch tube S x3 , S x4 The on-off;

[0073] When the internal IGBT power switch tube S of the upper bridge arm of phase x is diagnosedx2 When an open circuit or short circuit occurs, the bidirectional thyristor TR x2 ,TR x3 The control signal input is in high level state, the bidirectional thyristor TR x1 ,TR x4 The control electrode signal input is in low level state; the relay is connected to the current signal, at this time, the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 The two-level rectifier is composed of the following steps: x1 , S x2 The signal input only controls the fault phase IGBT power switch tube S x3 , S x4 The on-off;

[0074] When the internal IGBT power switch tube S of the lower bridge arm of phase x is diagnosed x3 When an open circuit or short circuit occurs, the bidirectional thyristor TR x1 ,TR x4 The control signal input is in high level state, the bidirectional thyristor TR x2 ,TR x3 The control electrode signal input is in low level state; the relay is connected to the current signal, and the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 The two-level rectifier is composed of the following steps: x3 , S x4 The signal input only controls the fault phase IGBT power switch tube S x1 , S x2 The on-off;

[0075] When the external IGBT power switch tube S of the lower bridge arm of phase x is diagnosed x4 When an open circuit or short circuit occurs, the bidirectional thyristor TR x1 ,TR x4 The control signal input is in high level state, the bidirectional thyristor TR x2 ,TR x3 The control electrode signal input is in low level state; the relay is connected to the current signal, and the relay K x With K dcThe normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 The two-level rectifier is composed of the following steps: x3 , S x4 The signal input only controls the fault phase IGBT power switch tube S x1 , S x2 The on-off;

[0076] When the IGBT power switch tube S of the upper bridge arm of phase x is diagnosed x1 and S x2 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x2 ,TR x3 The control signal input is in high level state, the bidirectional thyristor TR x1 ,TR x4 The control electrode signal input is in low level state; the relay is connected to the current signal, at this time, the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 The two-level rectifier is composed of the following steps: x1 , S x2 The signal input only controls the fault phase IGBT power switch tube S x3 , S x4 The on-off;

[0077] When the IGBT power switch tube S in the upper bridge arm of phase x is diagnosed x2 With the IGBT power switch tube S inside the lower bridge arm x3 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x1 ,TR x2 The control signal input is in high level state, the bidirectional thyristor TR x3 ,TR x4 The control electrode signal input is in low level state; the relay is connected to the current signal, at this time, the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x4 The two-level rectifier is composed of the following steps: x2 , S x3The signal input only controls the fault phase IGBT power switch tube S x1 , S x4 The on-off;

[0078] When the IGBT power switch tube S of the lower bridge arm of phase x is diagnosed x3 and S x4 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x1 ,TR x4 The control signal input is in high level state, the bidirectional thyristor TR x2 ,TR x3 The control electrode signal input is in low level state; the relay is connected to the current signal, and the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 The two-level rectifier is composed of the following steps: x3 , S x4 The signal input only controls the fault phase IGBT power switch tube S x1 , S x2 The on and off.

[0079] (2) Determine the switch state and basic voltage vector under fault-tolerant operation

[0080] The NPC three-level multi-tube fault-tolerant rectifier is reconstructed into a two-level topology, switching from the three-level "P", "O", and "N" switching states to the two-level "1" and "0" switching states;

[0081] Define the switching function S x :

[0082]

[0083] The single-phase upper bridge arm IGBT power switch tube is turned on, and the lower bridge arm IGBT power switch tube is turned off, which is recorded as state "1"; the single-phase lower bridge arm IGBT power switch tube is turned on, and the upper bridge arm IGBT power switch tube is turned off, which is recorded as state "0";

[0084] When the upper bridge arm external IGBT power switch tube S x1 A fault occurs, the IGBT power switch tube S inside the upper bridge arm x2 Fault occurs, the internal and external IGBT power switch tube S of the upper bridge arm x1 , S x2 When failures occur simultaneously, the fault-tolerant topology is reconstructed to S x3 is the upper arm, with S x4is a two-level rectifier in the lower arm. At this time, S x3 Conducting and S x4 The shutdown state is "1", S x4 Conducting and S x3 The shutdown state is "0";

[0085] When the lower bridge arm external IGBT power switch tube S x4 A fault occurs, and the IGBT power switch tube S in the lower bridge arm x3 When a fault occurs, the internal and external IGBT power switch tubes S of the lower bridge arm x3 , S x4 When failures occur simultaneously, the fault-tolerant topology is reconstructed to S x1 is the upper arm, with S x2 is a two-level rectifier in the lower arm. At this time, S x1 Conducting and S x2 The shutdown state is "1", S x2 Conducting and S x1 Shutdown is state "0";

[0086] When the IGBT power switch tube S in the upper and lower bridge arms x2 , S x3 When failures occur simultaneously, the fault-tolerant topology is reconstructed to S x1 is the upper arm, with S x4 is a two-level rectifier in the lower arm. At this time, S x1 Conducting and S x4 The shutdown state is "1", S x4 Conducting and S x1 Shutdown is state "0";

[0087] Since the two-level rectifier is divided into three phases a, b, and c, only one side of the upper and lower bridge arms of the same phase is turned on, so the switching function (S a S b S c ) corresponds to eight switch state combinations, that is, eight basic voltage vectors, which are two zero vectors V 0 (000), V 7 (111), six effective vectors V 1 (100), V 2 (110), V 3 (010), V 4 (011), V 5 (001), V 6 (101);

[0088] (3) Determine the sector division in the fault-tolerant operation state

[0089] Define the function:

[0090]

[0091] In the formula, is the voltage component of the reference voltage vector in the α and β two-phase stationary coordinate system;

[0092] Define a symbolic function:

[0093]

[0094] In the formula, is the grid-side current of phases a, b, and c;

[0095] Define the sector number calculation value N:

[0096]

[0097] Determine the correspondence between the N value and the actual sector number to complete the sector division, such as Figure 4 As shown in Table 4; when the calculation result of the sector number N is 3, it corresponds to the I sector; when the calculation result of the sector number N is 1, it corresponds to the II sector; when the calculation result of the sector number N is 5, it corresponds to the III sector; when the calculation result of the sector number N is 4, it corresponds to the IV sector; when the calculation result of the sector number N is 6, it corresponds to the V sector; when the calculation result of the sector number N is 2, it corresponds to the VI sector; as shown in Table 4:

[0098] Table 4 Correspondence between sector calculation value number N and sector

[0099]

[0100] The corresponding relationship between the basic voltage vector and each sector is: Sector I corresponds to the basic voltage vector V 0 (000), V 1 (100), V 2 (110), V 7 (111), sector II corresponds to the basic voltage vector V 0 (000), V 2 (110), V 3 (010), V 7 (111), sector III corresponds to the basic voltage vector V 0 (000), V 3 (010), V 4 (011), V 7 (111), the IV sector corresponds to the basic voltage vector V 0 (000), V 4 (011), V 5 (001), V 7 (111), V sector corresponds to the basic voltage vector V0 (000), V 5 (001), V 6 (101), V 7 (111), the VI sector corresponds to the basic voltage vector V 0 (000), V 6 (101), V1(100), V 7 (111);

[0101] (4) Determine the action time of the basic voltage vector under the fault-tolerant operation state;

[0102] Define the intermediate variables as:

[0103]

[0104] Where U dc is the DC side voltage, T s is the switching cycle;

[0105] The reference voltage vector consists of two effective vectors V n1 、V n2 and two zero vectors V 0 (000) and V 7 (111) are synthesized together to determine the effective vector and its action time in each sector according to Table 5;

[0106] Table 5 Basic voltage vectors acting in each sector and their action time

[0107]

[0108] The action time of the zero vector in each sector is T 0 =T s -T 1 -T 2 , where the zero vector V 0 (000) and V 7 (111) each accounted for half, and the action time was ;

[0109] (5) Determine the action order of the basic voltage vectors under the fault-tolerant operation state;

[0110] The vector is switched by a seven-segment vector synthesis method. In order to reduce switching losses and minimize the number of IGBT power switch tube switches each time the vector is switched, the basic voltage vector action order in fault-tolerant control is shown in Table 6.

[0111] Table 6 Action order of basic voltage vectors in fault-tolerant control

[0112]

[0113] (6) According to the action time and action order of the basic voltage vector, the conduction time of each IGBT power switch tube is determined, and a PWM signal is generated and input to the gate of each IGBT power switch tube to control the on and off of the IGBT power switch tube, thereby completing the fault-tolerant control of the three-phase three-level NPC rectifier;

[0114] The present invention also proposes a fault-tolerant control system of an NPC three-level multi-tube fault-tolerant rectifier, implements the fault-tolerant control method of the NPC three-level multi-tube fault-tolerant rectifier, and realizes the fault-tolerant control of the NPC three-level multi-tube fault-tolerant rectifier.

[0115] A computer device comprises a memory, a processor and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the fault-tolerant control method of an NPC three-level multi-tube fault-tolerant rectifier is implemented to realize the fault-tolerant control of the NPC three-level multi-tube fault-tolerant rectifier.

[0116] A computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the fault-tolerant control method of the NPC three-level multi-tube fault-tolerant rectifier is implemented to realize the fault-tolerant control of the NPC three-level multi-tube fault-tolerant rectifier.

[0117] Example 1

[0118] In order to verify the effectiveness of the solution of the present invention, this embodiment uses the internal and external IGBT power switch tubes S of the upper bridge arm of phase a. a1 , S a2 Take the case of an open circuit and short circuit fault occurring at the same time as an example. When the a-phase IGBT power switch tube S a1 , S a2 When an open circuit fault occurs at the same time in 0.3s, the output three-phase current waveform is as follows Figure 5 As shown, the output midpoint voltage waveform is as follows Figure 6 As shown in the figure, the negative half cycle of phase a current is almost completely missing, resulting in serious distortion, and the currents of phase b and phase c are also distorted. a1 , S a2 In case of a fault, the P and O switch states of the rectifier phase a will be distorted into the N-type switch state, resulting in an imbalance in the basic voltage vector, thereby generating a midpoint voltage offset; at this time, the voltage of the voltage divider capacitors at the upper and lower ends of the DC side will be unbalanced. If the midpoint voltage is not controlled, over time, the voltage value at both ends of the upper voltage divider capacitor will eventually be equal to the DC side voltage U dc , the voltage value across the voltage divider capacitor will approach 0, which will damage the voltage divider capacitor; when the a-phase IGBT power switch tube S a1 , S a2When a short circuit fault occurs at the same time at 0.3s, the output three-phase current waveform is as follows Figure 7 As shown, the output midpoint voltage waveform is as follows Figure 8 As shown in the figure, the three-phase current is severely distorted and its amplitude far exceeds the set value, and the voltage of the voltage-dividing capacitors at the upper and lower ends of the DC side is unbalanced;

[0119] After the fault location and fault type are diagnosed and the corresponding fault-tolerant algorithm and topology are switched, the output three-phase current is as follows: Fig. 9 As shown, the midpoint voltage is Fig.10 As shown, the three-phase current waveform and midpoint voltage waveform output by the NPC three-level multi-transistor fault-tolerant rectifier are restored to be basically consistent with those before the fault.

[0120] Example 2

[0121] In this embodiment, the IGBT power switch tube S in the upper bridge arm of phase a is used. a2 With the IGBT power switch tube S inside the lower bridge arm a3 Take the case of an open circuit or short circuit fault occurring at the same time as an example. When the a-phase IGBT power switch tube S a2 , S a3 When an open circuit fault occurs at the same time in 0.3s, the output three-phase current waveform is as follows Fig.11 As shown, the output midpoint voltage waveform is as follows Fig.12 As shown in the figure, the a-phase current is seriously distorted, the output current waveform is almost completely missing, and the b-phase and c-phase currents are also distorted. a2 , S a3 The rectifier has a fault, and the current i in phase a is a In the sector with a value less than 0, the P and O switch states will be distorted into the N switch state. a >0, the N and O switch states will be distorted into P-type switch states, so the basic voltage vector is still in a conservation state. At this time, the upper and lower capacitor voltages on the DC side are in dynamic balance. a2 , S a3 When a short circuit fault occurs at the same time at 0.3s, the output three-phase current waveform is as follows Fig.13 As shown, the output midpoint voltage waveform is as follows Fig.14 At this time, the three-phase current is severely distorted, the current harmonics increase significantly, and the capacitor voltages at the upper and lower ends of the DC side are unbalanced.

[0122] After the fault location and fault type are diagnosed and the corresponding fault-tolerant algorithm and topology are switched, the output three-phase current is as follows: Fig.15 As shown, the midpoint voltage is Fig.16 As shown, the three-phase current waveform and midpoint voltage waveform output by the NPC three-level multi-transistor fault-tolerant rectifier are restored to be basically consistent with those before the fault.

[0123] The above two embodiments show that the NPC three-level multi-tube fault-tolerant rectifier and control method thereof proposed in the present invention can realize fault-tolerant control of two internal IGBT power switch tubes of the rectifier system and fault-tolerant control of the internal IGBT power switch tube and the external IGBT power switch tube of the same bridge arm.

[0124] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0125] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. An NPC three-level multi-tube fault-tolerant rectifier, characterized in that: It includes three-phase bridge arms of phase a, phase b and phase c, and two voltage-dividing capacitors C d1 , C d2 , and relay K dc and load; each phase bridge arm consists of an NPC main circuit and a fault-tolerant unit circuit, where: (1) NPC main circuit of each phase bridge arm The NPC main circuit includes the filter inductor L x , relay K x , four IGBT power switch tubes S x1 , S x2 , S x3 , S x4 And the corresponding four anti-parallel diodes D x1 , D x2 , D x3 , D x4 , and two clamping diodes D zx1 , D zx2 ; The power supply of each phase bridge arm is connected in series with the filter inductor L x Connected to the bridge arm starting point x, the bridge arm starting point x passes through the relay K x Connect to IGBT power switch tube S x2 , S x3 The bridge arm midpoint x0; the IGBT power switch tube S x1 The collector and the voltage divider capacitor C d1 The positive pole of the IGBT power switch tube S is connected to x1 The emitter of the IGBT power switch tube S x2 The collector of the IGBT power switch tube S x2 The emitter of the IGBT power switch tube S x3 The collector of the IGBT power switch tube S x3 The emitter of the IGBT power switch tube S x4 The collector of the IGBT power switch tube S x4 The emitter and the voltage divider capacitor C d2 The negative electrode of the clamping diode D zx1 The negative pole of the IGBT power switch tube S is connected x1 , S x2 The midpoint x + , clamping diode D zx1 The positive terminal of the clamping diode D zx2 The cathode of the clamping diode D zx2 The positive pole is connected to the IGBT power switch tube S x3 and S x4 The midpoint x - ; Three-phase clamping diode D zx1 With D zx2 The midpoint of the dc Connected to two voltage-dividing capacitors C in series on the DC side d1 , C d2 The midpoint n; (2) Fault-tolerant unit circuit of each phase bridge arm The fault-tolerant unit circuit includes four bidirectional thyristors TR x1 ,TR x2 ,TR x3 ,TR x4 , bidirectional thyristor TR x1 Connect the bridge arm starting point x to the IGBT power switch tube S x1 and S x2 The midpoint x + , bidirectional thyristor TR x2 Connect the bridge arm starting point x to the IGBT power switch tube S x3 and S x4 The midpoint x - , bidirectional thyristor TR x3 Connect IGBT power switch tube S x1 and S x2 The midpoint x + With the voltage divider capacitor C d1 The positive pole of the bidirectional thyristor TR x4 Connect IGBT power switch tube S x3 and S x4 The midpoint x - With the voltage divider capacitor C d2 The negative pole, where x = a, b, c; (1) Under normal operating conditions, relay K a , K b , K c , K dc The contacts of the three phases are all in contact with the normally closed contacts, that is, the starting point a of the a phase bridge arm and the midpoint a0 of the a phase bridge arm, the starting point b of the b phase bridge arm and the midpoint b0 of the b phase bridge arm, the starting point c of the c phase bridge arm and the midpoint c0 of the c phase bridge arm, and the connection point N of the midpoint of the clamping diode and the midpoint n of the voltage dividing capacitor are all in the on state; the bidirectional thyristor TR a1 ,TR a2 ,TR a3 ,TR a4 ,TR b1 ,TR b2 ,TR b3 ,TR b4 ,TR c1 ,TR c2 ,TR c3 ,TR c4 The connected paths are all in an open circuit state, that is, the starting point x of each phase bridge arm and the IGBT power switch tube S x1 and S x2 The midpoint x + , the bridge arm starting point x and the IGBT power switch tube S x3 and S x4 The midpoint x - 、IGBT power switch tube S x1 and S x2 The midpoint x + With the voltage divider capacitor C d1 The positive electrode, IGBT power switch tube S x3 and S x4 The midpoint x - With the voltage divider capacitor C d2 The negative electrodes are in an open circuit state; (2) When the IGBT power switch tube fails, the corresponding fault-tolerant topology is determined according to the fault location; When the external IGBT power switch tube S of the upper bridge arm of phase x x1 When an open circuit or short circuit occurs, the bidirectional thyristor TR x2 ,TR x3 Turn on, bidirectional thyristor TR x1 ,TR x4 Shut down; relay K x With K dc The normally closed contact is switched to the normally open contact, that is, the bridge arm starting point x of each phase and the bridge arm midpoint x0 are switched to an open circuit, and the midpoint connection point N of the clamping diode of the three-phase bridge arm and the voltage dividing capacitor C d1 , C d2 The midpoint n is switched to an open circuit; the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 A two-level rectifier is formed; When the internal IGBT power switch tube S of the upper bridge arm of phase x x2 When an open circuit or short circuit occurs, the bidirectional thyristor TR x2 ,TR x3 Turn on, bidirectional thyristor TR x1 ,TR x4 Shut down; relay K x With K dc The normally closed contact is switched to the normally open contact, that is, the bridge arm starting point x of each phase and the bridge arm midpoint x0 are switched to an open circuit, and the midpoint connection point N of the clamping diode of the three-phase bridge arm and the voltage dividing capacitor C d1 , C d2 The midpoint n is switched to an open circuit; the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 A two-level rectifier is formed; When the internal IGBT power switch tube S of the lower bridge arm of phase x x3 When an open circuit or short circuit occurs, the bidirectional thyristor TR x1 ,TR x4 Turn on, bidirectional thyristor TR x2 ,TR x3 Shut down; relay K x With K dc The normally closed contact is switched to the normally open contact, that is, the bridge arm starting point x of each phase and the bridge arm midpoint x0 are switched to an open circuit, and the midpoint connection point N of the clamping diode of the three-phase bridge arm and the voltage dividing capacitor C d1 , C d2 The midpoint n is switched to an open circuit, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 A two-level rectifier is formed; When the external IGBT power switch tube S of the lower bridge arm of phase x x4 When an open circuit or short circuit occurs, the bidirectional thyristor TR x1 ,TR x4 Turn on, bidirectional thyristor TR x2 ,TR x3 Shut down; relay K x With K dc The normally closed contact is switched to the normally open contact, that is, the bridge arm starting point x of each phase and the bridge arm midpoint x0 are switched to an open circuit, and the midpoint connection point N of the clamping diode of the three-phase bridge arm and the voltage dividing capacitor C d1 , C d2 The midpoint n is switched to an open circuit; the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 A two-level rectifier is formed; When the IGBT power switch tube S of the upper bridge arm of phase x x1 and S x2 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x2 ,TR x3 Turn on, bidirectional thyristor TR x1 ,TR x4 Shut down; relay K x With K dc The normally closed contact is switched to the normally open contact, that is, the bridge arm starting point x of each phase and the bridge arm midpoint x0 are switched to an open circuit, and the midpoint connection point N of the clamping diode of the three-phase bridge arm and the voltage dividing capacitor C d1 , C d2 The midpoint n is switched to an open circuit, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 A two-level rectifier is formed; When the IGBT power switch tube S in the upper bridge arm of phase x is x2 With the IGBT power switch tube S inside the lower bridge arm x3 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x1 ,TR x2 Turn on, bidirectional thyristor TR x3 ,TR x4 Shut down; relay K x With K dc The normally closed contact is switched to the normally open contact, that is, the bridge arm starting point x of each phase and the bridge arm midpoint x0 are switched to an open circuit, and the midpoint connection point N of the three-phase clamping diode and the voltage dividing capacitor C d1 , C d2 The midpoint n is switched to an open circuit; the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x4 A two-level rectifier is formed; When the IGBT power switch tube S of the lower bridge arm of phase x x3 and S x4 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x1 ,TR x4 Turn on, bidirectional thyristor TR x2 ,TR x3 Shut down; relay K x With K dc The normally closed contact is switched to the normally open contact, that is, the bridge arm starting point x of each phase and the bridge arm midpoint x0 are switched to an open circuit, and the midpoint connection point N of the clamping diode of the three-phase bridge arm and the voltage dividing capacitor C d1 , C d2 The midpoint n is switched to an open circuit; the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 A two-level rectifier.

2. A control method for an NPC three-level multi-transistor fault-tolerant rectifier, characterized in that: The fault-tolerant control for the NPC three-level multi-transistor fault-tolerant rectifier according to claim 1 comprises the following steps:

1. Determine SVPWM control under normal operation Determine the switch state and basic voltage vector under normal operation, perform sector division, determine the action time and action order of the basic voltage vector under normal operation, and complete SVPWM control; (II) Determine SVPWM control under fault-tolerant operation Under the fault state of IGBT power switch tube, according to the fault location, the corresponding bidirectional thyristor is turned on and the relay contacts are switched to reconstruct the corresponding fault-tolerant topology; the switch state and basic voltage vector under the fault-tolerant operation state are determined, sector division is performed, the action time and action order of the basic voltage vector under the fault-tolerant operation state are determined, and SVPWM control is completed.

3. The control method of the NPC three-level multi-transistor fault-tolerant rectifier according to claim 2 is characterized in that: (II) Determine the SVPWM control under the fault-tolerant operation state. In the case of an IGBT power switch failure, the corresponding bidirectional thyristor is turned on and the relay contacts are switched according to the fault location to reconstruct to the corresponding fault-tolerant topology. The specific method is as follows: When the external IGBT power switch tube S of the upper bridge arm of phase x is diagnosed x1 When an open circuit or short circuit occurs, the bidirectional thyristor TR x2 ,TR x3 The control signal input is in high level state, the bidirectional thyristor TR x1 ,TR x4 The control electrode signal input is in low level state; the relay is connected to the current signal, at this time, the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 The two-level rectifier is composed of the following steps: x1 , S x2 The signal input only controls the fault phase IGBT power switch tube S x3 , S x4 The on-off; When the internal IGBT power switch tube S of the upper bridge arm of phase x is diagnosed x2 When an open circuit or short circuit occurs, the bidirectional thyristor TR x2 ,TR x3 The control signal input is in high level state, the bidirectional thyristor TR x1 ,TR x4 The control electrode signal input is in low level state; the relay is connected to the current signal, at this time, the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 The two-level rectifier is composed of the following steps: x1 , S x2 The signal input only controls the fault phase IGBT power switch tube S x3 , S x4 The on-off; When the internal IGBT power switch tube S of the lower bridge arm of phase x is diagnosed x3 When an open circuit or short circuit occurs, the bidirectional thyristor TR x1 ,TR x4 The control signal input is in high level state, the bidirectional thyristor TR x2 ,TR x3 The control electrode signal input is in low level state; the relay is connected to the current signal, and the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 The two-level rectifier is composed of the following steps: x3 , S x4 The signal input only controls the fault phase IGBT power switch tube S x1 , S x2 The on-off; When the external IGBT power switch tube S of the lower bridge arm of phase x is diagnosed x4 When an open circuit or short circuit occurs, the bidirectional thyristor TR x1 ,TR x4 The control signal input is in high level state, the bidirectional thyristor TR x2 ,TR x3 The control electrode signal input is in low level state; the relay is connected to the current signal, and the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 The two-level rectifier is composed of the following steps: x3 , S x4 The signal input only controls the fault phase IGBT power switch tube S x1 , S x2 The on-off; When the IGBT power switch tube S of the upper bridge arm of phase x is diagnosed x1 and S x2 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x2 ,TR x3 The control signal input is in high level state, the bidirectional thyristor TR x1 ,TR x4 The control electrode signal input is in low level state; the relay is connected to the current signal, at this time, the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x3 The lower bridge arm is composed of IGBT power switch tube S x4 The two-level rectifier is composed of the following steps: x1 , S x2 The signal input only controls the fault phase IGBT power switch tube S x3 , S x4 The on-off; When the IGBT power switch tube S in the upper bridge arm of phase x is diagnosed x2 With the IGBT power switch tube S inside the lower bridge arm x3 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x1 ,TR x2 The control signal input is in high level state, the bidirectional thyristor TR x3 ,TR x4 The control electrode signal input is in low level state; the relay is connected to the current signal, at this time, the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x4 The two-level rectifier is composed of the following steps: x2 , S x3 The signal input only controls the fault phase IGBT power switch tube S x1 , S x4 The on-off; When the IGBT power switch tube S of the lower bridge arm of phase x is diagnosed x3 and S x4 When an open circuit or short circuit fault occurs at the same time, the bidirectional thyristor TR x1 ,TR x4 The control signal input is in high level state, the bidirectional thyristor TR x2 ,TR x3 The control electrode signal input is in low level state; the relay is connected to the current signal, and the relay K x With K dc The normally closed contact is switched to a normally open contact, so that the fault phase is reconstructed into an upper bridge arm composed of an IGBT power switch tube S x1 The lower bridge arm is composed of IGBT power switch tube S x2 The two-level rectifier is composed of the following steps: x3 , S x4 The signal input only controls the fault phase IGBT power switch tube S x1 , S x2 The on and off.

4. The control method of the NPC three-level multi-transistor fault-tolerant rectifier according to claim 2 is characterized in that: (II) Determine the SVPWM control under the fault-tolerant operation state, determine the switch state and basic voltage vector under the fault-tolerant operation state, perform sector division, and determine the action time and action order of the basic voltage vector under the fault-tolerant operation state. The specific method is as follows: (1) Determine the switch state and basic voltage vector under fault-tolerant operation The NPC three-level multi-tube fault-tolerant rectifier is reconstructed into a two-level topology, switching from the three-level "P", "O", and "N" switching states to the two-level "1" and "0" switching states; Define the switching function S x : ; The single-phase upper bridge arm IGBT power switch tube is turned on, and the lower bridge arm IGBT power switch tube is turned off, which is recorded as state "1"; the single-phase lower bridge arm IGBT power switch tube is turned on, and the upper bridge arm IGBT power switch tube is turned off, which is recorded as state "0"; When the upper bridge arm external IGBT power switch tube S x1 A fault occurs, the IGBT power switch tube S inside the upper bridge arm x2 Fault occurs, the internal and external IGBT power switch tube S of the upper bridge arm x1 , S x2 When failures occur simultaneously, the fault-tolerant topology is reconstructed to S x3 is the upper arm, with S x4 is a two-level rectifier in the lower arm. At this time, S x3 Conducting and S x4 Shutdown is state "1", S x4 Conducting and S x3 Shutdown is state "0"; When the lower bridge arm external IGBT power switch tube S x4 A fault occurs, and the IGBT power switch tube S in the lower bridge arm x3 When a fault occurs, the internal and external IGBT power switch tubes S of the lower bridge arm x3 , S x4 When failures occur simultaneously, the fault-tolerant topology is reconstructed to S x1 is the upper arm, with S x2 is a two-level rectifier in the lower arm. At this time, S x1 Conducting and S x2 Shutdown is state "1", S x2 Conducting and S x1 Shutdown is state "0"; When the IGBT power switch tube S in the upper and lower bridge arms x2 , S x3 When failures occur simultaneously, the fault-tolerant topology is reconstructed to S x1 is the upper bridge arm, with S x4 is a two-level rectifier in the lower arm. At this time, S x1 Conducting and S x4 Shutdown is state "1", S x4 Conducting and S x1 Shutdown is state "0"; Since the two-level rectifier is divided into three phases a, b, and c, only one side of the upper and lower bridge arms of the same phase is turned on, so the switching function (S a S b S c ) corresponds to eight switch state combinations, that is, eight basic voltage vectors, namely two zero vectors V0 (000) and V7 (111), and six effective vectors V1 (100), V2 (110), V3 (010), V4 (011), V5 (001), and V6 (101); (2) Determine the sector division in the fault-tolerant operation state Define the function: ; In the formula, is the voltage component of the reference voltage vector in the α and β two-phase stationary coordinate system; Define a symbolic function: ; In the formula, is the grid-side current of phases a, b, and c; Define the sector number calculation value N: ; Determine the corresponding relationship between the N value and the actual sector number to complete the sector division; when the sector number N is calculated to be 3, it corresponds to the I sector; when the sector number N is calculated to be 1, it corresponds to the II sector; when the sector number N is calculated to be 5, it corresponds to the III sector; when the sector number N is calculated to be 4, it corresponds to the IV sector; when the sector number N is calculated to be 6, it corresponds to the V sector; when the sector number N is calculated to be 2, it corresponds to the VI sector; The corresponding relationship between the basic voltage vector and each sector is as follows: the I sector corresponds to the basic voltage vector V0 (000), V1 (100), V2 (110), V7 (111); the II sector corresponds to the basic voltage vector V0 (000), V2 (110), V3 (010), V7 (111); the III sector corresponds to the basic voltage vector V0 (000), V3 (010), V4 (011), V7 (111); the IV sector corresponds to the basic voltage vector V0 (000), V4 (011), V5 (001), V7 (111); the V sector corresponds to the basic voltage vector V0 (000), V5 (001), V6 (101), V7 (111); the VI sector corresponds to the basic voltage vector V0 (000), V6 (101), V1 (100), V7 (111); (3) Determine the action time and action order of the basic voltage vector under the fault-tolerant operation state Define the intermediate variables as: ; Where U dc is the DC side voltage, T s is the switching cycle; In sector I, the two effective vectors are V1(100) and V2(110), where the action time of V1(100) is T1=-Z, the action time of V2(110) is T2=X, and the action time of zero vector V0(000) and zero vector V7(111) are both ; The order of action is V0 (000), V1 (100), V2 (110), V7 (111), V2 (110), V1 (100), V0 (000); In sector II, the two effective vectors are V2(110) and V3(010), where the action time of V2(110) is T1=Z, the action time of V3(010) is T2=Y, and the action time of zero vector V0(000) and zero vector V7(111) are both ; The order of action is V0 (000), V3 (010), V2 (110), V7 (111), V2 (110), V3 (010), V0 (000); In sector III, the two effective vectors are V3(010) and V4(011), where the action time of V3(010) is T1=X, the action time of V4(011) is T2=-Y, and the action time of zero vector V0(000) and zero vector V7(111) are both ; The order of action is V0 (000), V3 (010), V4 (011), V7 (111), V4 (011), V3 (010), V0 (000); In sector IV, the two effective vectors are V4(011) and V5(001), where the action time of V4(011) is T1=-X, the action time of V5(001) is T2=Z, and the action time of zero vector V0(000) and zero vector V7(111) are both ; The order of action is V0 (000), V5 (001), V4 (011), V7 (111), V4 (011), V5 (001), V0 (000); In sector V, the two effective vectors are V5(001) and V6(101), where the action time of V5(001) is T1=-Y, the action time of V6(101) is T2=-Z, and the action time of zero vector V0(000) and zero vector V7(111) are both ; The order of action is V0 (000), V5 (001), V6 (101), V7 (111), V6 (101), V5 (001), V0 (000); In sector VI, the two effective vectors are V6 (101) and V1 (100), where the action time of V6 (101) is T1 = Y, the action time of V1 (100) is T2 = -X, and the action time of zero vector V0 (000) and zero vector V7 (111) are both ; The order of action is V0 (000), V1 (100), V6 (101), V7 (111), V6 (101), V1 (100), V0 (000); According to the action time and action order of the basic voltage vector, the conduction time of each IGBT power switch tube is determined, and a PWM signal is generated and input to the gate of each IGBT power switch tube to control the on and off of the IGBT power switch tube, thereby completing the control of the NPC three-level multi-tube fault-tolerant rectifier in the fault-tolerant operation state.

5. A control system for an NPC three-level multi-tube fault-tolerant rectifier, characterized in that: The control method of the NPC three-level multi-transistor fault-tolerant rectifier described in any one of claims 2 to 4 is implemented to realize the control of the NPC three-level multi-transistor fault-tolerant rectifier.

6. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the control method of the NPC three-level multi-transistor fault-tolerant rectifier according to any one of claims 2 to 4 is implemented to realize the control of the NPC three-level multi-transistor fault-tolerant rectifier.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, the control method of the NPC three-level multi-transistor fault-tolerant rectifier according to any one of claims 2 to 4 is implemented to realize the control of the NPC three-level multi-transistor fault-tolerant rectifier.

Citation Information

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