A method for simulating quantum circuits

Abstract

The present invention provides a method for simulating a quantum circuit, comprising: obtaining data structure information of the quantum circuit, including multiple quantum bits and multiple quantum gates; constructing multiple queues for the quantum circuit, each queue including multiple operations and quantum gates acted on by each operation; obtaining matrix multiplication rules of multiple quantum gate matrix types, the rules including multiplying elements at non-zero positions in the quantum gate matrix with elements at multiplication positions of another matrix; initializing a quantum state vector, using multiple queues to process the initialized quantum state vectors respectively to obtain multiple final quantum state vectors, including executing all operations of each queue to obtain the final quantum state vector, executing the operation between the quantum gate matrix and the latest quantum state vector according to the matrix multiplication rule corresponding to the quantum gate matrix type of the quantum gate corresponding to the operation when executing each operation, to obtain an updated quantum state vector; and obtaining a quantum state probability distribution according to the results of sampling the multiple final quantum state vectors.

Description

Technical Field

[0001] The present invention relates to the field of quantum computing technology, in particular to the field of computer simulation technology of quantum circuits, and more particularly to a method for simulating quantum circuits. Background Art

[0002] At present, quantum computing is an emerging frontier research field, and many countries and technology giants are actively investing in research and development. Therefore, quantum computing is developing rapidly around the world. Quantum computing is a computing paradigm based on the principles of quantum mechanics, using quantum bits to encode and process information; and through phenomena such as quantum superposition and quantum entanglement, efficient parallel processing of information is achieved. Quantum algorithms (such as Shor's algorithm and Grover's algorithm) demonstrate the significant speed advantage of quantum computing over classical computing on specific problems. With the development of quantum computing, quantum computing may play an important role in materials science, cryptography, combinatorial optimization and other fields in the future.

[0003] Existing quantum computing is still in the era of noisy intermediate-scale quantum computing (NISQ). Quantum circuit simulation provides researchers with a platform that can verify the correctness and effectiveness of quantum algorithms and quantum systems in the absence of noisy or noisy actual quantum hardware. In related technologies, quantum circuit simulation usually represents the state of a quantum system as a complex vector, whose length grows exponentially with the increase in the number of bits. During the simulation process, the state of the quantum system is gradually evolved by multiplying the state vector (i.e., quantum state vector) with the unitary matrix corresponding to the quantum gate in the quantum circuit, and the final quantum state vector is obtained.

[0004] There are two problems in the existing quantum circuit simulation:

[0005] On the one hand, a large amount of computing resources are needed to perform quantum gate operations, quantum state operations and other quantum operations, which involve a large number of matrix operations, which increase rapidly with the increase of quantum circuit scale. At the same time, in the usual simulation process, the quantum state vector needs to be constantly reordered according to the quantum bit positions of the quantum gate, which will lead to the problem of discontinuity of memory space and increase of computing time.

[0006] On the other hand, it is also difficult for quantum circuit simulation to simulate actual quantum noise. In actual quantum computing, quantum systems are affected by various noises, such as decoherence and quantum transitions. General quantum circuit simulation only considers the quantum state evolution of quantum systems under ideal conditions. If the influence of noise is taken into account, and quantum noise mainly comes from the interaction between the quantum computer system and the environment, this interaction will lead to the loss or error of quantum information. How to accurately simulate the quantum noise of quantum computers is crucial for quantum circuit simulation. Existing simulations that consider noise usually construct a quantum noise model and use a density matrix to describe the state of the noisy quantum system. The density matrix is ​​usually 2 Q ×2 Q Q represents the number of quantum bits in the quantum system. This method will cause the computational workload and memory requirements to increase quadratically.

[0007] In addition, the quantum circuit of a quantum algorithm or the quantum gate instruction set of a quantum computer only contains a few or a dozen types of quantum gates. A complete quantum circuit is often composed of a combination of these quantum gates. The circuits of many quantum algorithms will reach the scale of hundreds of thousands of quantum gates, which further increases the demand for computing resources and memory. In order to calculate the multiplication operation of the quantum state vector and the quantum gate matrix, the matrix tensor product of the quantum gate is generally 2 according to the quantum bit position. Q ×2 Q The size of the quantum state vector can be multiplied by the matrix. When the number of bits in the quantum circuit reaches a certain scale, a graphics processing unit (GPU) is often needed to perform a large number of parallel calculations. And as the number of bits and scale of quantum circuits increase, the computing resources required for quantum circuit simulation also show an exponential upward trend.

[0008] Therefore, among the existing quantum circuit simulation methods, whether it is circuit simulation under ideal conditions or circuit simulation under noisy conditions, there are problems such as long calculation time and large computing resource requirements.

[0009] It should be noted that this background technology is only used to introduce the relevant information of the present invention to help understand the technical solution of the present invention, but it does not mean that the relevant information is necessarily the prior art. If there is no evidence that the relevant information has been disclosed before the application date of the present invention, the relevant information shall not be regarded as the prior art. Summary of the invention

[0010] Therefore, the object of the present invention is to overcome the above-mentioned defects of the prior art and provide a method for simulating quantum circuits.

[0011] The objective of the present invention is achieved through the following technical solutions:

[0012] According to a first aspect of the present invention, a method for simulating a quantum circuit is provided, the method comprising:

[0013] S1. Acquire data structure information of a quantum circuit, including multiple quantum bits and multiple quantum gates; S2. Construct multiple quantum gate operation queues for the quantum circuit, each queue including multiple operations and quantum gates acted upon by each operation; S3. Acquire multiple types of matrix multiplication rules constructed for quantum gate matrix types of multiple quantum gates, wherein the multiplication rules include multiplying elements corresponding to non-zero element positions in a quantum gate matrix with elements at multiplication positions of another matrix; S4. Initialize a quantum state vector according to multiple quantum bits, and use multiple queues to process the initialized quantum state vectors respectively to obtain multiple final quantum state vectors, including processing the initialized quantum state vector by executing all operations of each queue to obtain a final quantum state vector, wherein when executing each operation of all operations, according to the quantum gate matrix type of the quantum gate corresponding to each operation, perform a multiplication operation between the quantum gate matrix and the latest quantum state vector according to the matrix multiplication rule constructed for the type to obtain an updated quantum state vector; S5. Sample the quantum states in the multiple final quantum state vectors to obtain sampling results, and obtain a probability distribution of the quantum state according to the sampling results.

[0014] In some embodiments of the present invention, in step S3, the multiple types of quantum gate matrix multiplication rules include:

[0015] Diagonal quantum gate matrix multiplication rule, inverse diagonal quantum gate matrix multiplication rule, single-bit control quantum gate matrix multiplication rule, diagonal quantum gate matrix multiplication rule with control bit, inverse diagonal quantum gate matrix multiplication rule with control bit, single target bit quantum gate matrix multiplication rule, quantum exchange gate matrix multiplication rule, composite two-bit quantum gate matrix multiplication rule, diagonal composite two-bit quantum gate matrix multiplication rule and control composite two-bit quantum gate matrix multiplication rule or a combination thereof.

[0016] In some embodiments of the present invention, the multiple quantum gate operation queues in step S2 are multiple quantum gate operation queues without noise or multiple quantum gate operation queues containing different noises, wherein the data structure information includes multiple quantum noise instances, and multiple quantum gate operation queues containing different noises are constructed for the quantum circuit according to the multiple quantum noise instances;

[0017] The step S2 also includes: merging the quantum gate matrices of the quantum gates acted upon by the multiple operations of each queue into an information vector, including taking the union of the quantum gate matrices of the quantum gates acted upon by the multiple operations, converting all the quantum gate matrices in the union into one-dimensional vectors and splicing them to obtain the information vector; generating a corresponding quantum gate matrix dictionary for each queue, which includes multiple rows of dictionary data, each row of dictionary data includes a quantum gate identification code corresponding to the quantum gate matrix, and a starting position and length of the one-dimensional vector corresponding to the matrix in the information vector, wherein the quantum gate identification code of each quantum gate matrix is ​​generated according to the quantum gate type and quantum gate parameters corresponding to the matrix.

[0018] In some embodiments of the present invention, each operation includes a quantum gate type and a quantum gate parameter, wherein in step S4, a method of obtaining a final quantum state vector includes: obtaining an information vector and a quantum gate matrix dictionary corresponding to each queue, and generating a quantum gate identification code for each operation according to the quantum gate type and quantum gate parameter of each operation of all operations of each queue; searching for a quantum gate identification code identical to the quantum gate identification code of each operation of all operations of each queue from a quantum gate matrix dictionary, and searching for a quantum gate matrix corresponding to each operation from an information vector according to a row of dictionary data corresponding to the same quantum gate identification code; and executing all operations of each queue to process the initialized quantum state vector according to the quantum gate matrix corresponding to each operation of each queue.

[0019] In some embodiments of the present invention, each operation includes the information of the quantum bit position of the operation. In step S4, the process of executing each operation of all the operations includes: obtaining the quantum gate matrix and the latest quantum state vector of the quantum gate acted on by the operation, wherein the first operation in the execution queue uses the initialized quantum state vector, and each operation after the first operation uses the updated quantum state vector obtained after the previous operation is executed; according to the information of the quantum bit position of the operation, the latest quantum state vector is subjected to dimension change processing to obtain the quantum state matrix; according to the type of the quantum gate matrix, the matrix multiplication algorithm corresponding to the type is used to perform the multiplication operation between the quantum gate matrix and the quantum state matrix to obtain the operation result, and the operation result is transformed into a one-dimensional vector according to the position to obtain the updated quantum state vector, wherein the quantum state vector updated for the last time is the final quantum state vector.

[0020] In some embodiments of the present invention, the action quantum bit information includes the number of action quantum bits and the action quantum bits, and the method of performing dimension-changing processing on the latest quantum state vector is as follows:

[0021]

[0022] Among them, [V0,…,V N] represents the latest quantum state vector, V0 represents the 0th quantum state, V N Represents the Nth quantum state, N = 2 Q , Q represents the number of quantum bits in the quantum circuit, Represents the quantum state matrix after dimension change. Each column of the quantum state matrix includes quantum states, each row of the quantum state matrix includes quantum state, Q g represents the number of active qubits, represents the quantum state of row 0 and column 0 after dimension change, represents the quantum state of the 0th row and nth column after dimension change, represents the quantum state of the mth row and 0th column after dimension change, represents the quantum state of the mth row and nth column after dimension transformation, I represents the position information of the quantum state obtained by dimension transformation of the action quantum bit information, j∈[0,n], each I j The length is

[0023] In some embodiments of the present invention, step S5 includes performing a random sampling on each of a plurality of final quantum state vectors to obtain a plurality of sampling results, wherein the method of performing a random sampling includes: calculating the probability value of the quantum state at each element position in the final quantum state vector being sampled according to the complex number of the quantum state corresponding to the position of the position; performing a random sampling according to the probability value corresponding to the quantum state at each element position to obtain a sampling result including the sampled quantum state and the quantum bit position where the quantum state is located; wherein the method of obtaining the probability distribution includes: counting the number of times the quantum state at each element position is sampled according to the plurality of sampling results, and obtaining the probability distribution of the quantum state according to the ratio of the number of times the quantum state at each element position is sampled to the total number of samplings.

[0024] According to a second aspect of the present invention, there is provided a quantum circuit simulation device implemented based on the method according to the first aspect of the present invention, the device comprising:

[0025] A quantum circuit building module, used to generate data structure information of a quantum circuit, including multiple quantum bits and multiple quantum gates;

[0026] A quantum operation building module, used to build multiple quantum gate operation queues for a quantum circuit, each queue including multiple operations and the quantum gates acted on by each operation;

[0027] A quantum gate storage module, used to store quantum gate information and call quantum gate information according to the quantum gate acted on by the operation, including a quantum gate matrix;

[0028] A quantum circuit simulation module, for initializing a quantum state vector according to a plurality of quantum bits, and using a plurality of queues to process the initialized quantum state vectors respectively to obtain a plurality of final quantum state vectors, including processing the initialized quantum state vector by executing all operations of each queue to obtain a final quantum state vector, and randomly sampling quantum states in the plurality of final quantum state vectors to obtain sampling results, and obtaining a probability distribution of the quantum state according to the sampling results;

[0029] A matrix multiplication operation module is used to pre-build multiple types of matrix multiplication rules for quantum gate matrix types of multiple quantum gates, wherein the multiplication rule includes multiplying the elements corresponding to the non-zero element positions in the quantum gate matrix with the elements at the multiplication positions of another matrix, and when executing each operation of all operations in each queue, according to the quantum gate matrix type of the quantum gate corresponding to each operation, the multiplication operation between the quantum gate matrix and the latest quantum state vector is performed according to the matrix multiplication rule constructed for the type to obtain an updated quantum state vector.

[0030] According to a third aspect of the present invention, there is provided an electronic device comprising: one or more processors; and a memory, wherein the memory is used to store executable instructions; the one or more processors are configured to implement the steps of any one of the methods described in the first aspect of the present invention by executing the executable instructions.

[0031] Compared with the prior art, the advantages of the present invention are:

[0032] The present invention subdivides the types of quantum gate matrices and constructs a variety of matrix multiplication rules for a variety of quantum gate matrix types in advance. When used for quantum circuit simulation in a noisy or non-noisy state, the utilization rate of computing resources in the simulation process can be improved, as well as the computing speed. In addition, the present invention constructs a plurality of quantum gate operation queues for quantum circuits, and processes the initialized quantum state vectors by executing the operations of the plurality of queues to simulate the execution of quantum circuits in quantum computers, and samples a plurality of final quantum state vectors to obtain the probability distribution of quantum states. When the simulation method is applied to noisy quantum circuit simulation, the use of density matrices for noisy quantum circuit simulation is avoided, and the computing efficiency and computing resource utilization are significantly improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The embodiments of the present invention are further described below with reference to the accompanying drawings, in which:

[0034] Figure 1 A schematic diagram of a flow chart of a method for simulating a quantum circuit according to an embodiment of the present invention;

[0035] Figure 2A schematic diagram of the structure of a quantum circuit according to an embodiment of the present invention;

[0036] Figure 3 A schematic diagram of a complete process of simulating a quantum circuit containing noise according to an embodiment of the present invention;

[0037] Figure 4 FIG. 4 is a schematic diagram of the architecture of a quantum circuit simulation device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below through specific embodiments in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0039] As mentioned in the background technology section, existing quantum circuit simulation methods, whether circuit simulation under ideal conditions or circuit simulation under noisy conditions, have problems such as long calculation time and large demand for computing resources.

[0040] Based on the above problems, the present invention provides a method for simulating a quantum circuit. On the one hand, by subdividing the types of quantum gate matrices, a variety of matrix multiplication rules are pre-constructed for a variety of quantum gate matrix types, and the rules include performing point multiplication of non-zero elements in the quantum gate matrix with elements of another matrix, thereby reducing unnecessary calculations and reducing the demand for computing resources during quantum circuit simulation. When used for quantum circuit simulation in a noisy or non-noisy state, the utilization rate of computing resources and the computing speed are improved. On the other hand, according to the data structure information of the quantum circuit, a plurality of quantum gate operation queues are constructed for the quantum circuit, and the initialized quantum state vector is processed by executing operations of the plurality of queues to simulate the execution of the quantum circuit in a quantum computer, and a plurality of final quantum state vectors are sampled to approximate the state of the quantum system, that is, the probability distribution of the quantum state. When applied to noisy quantum circuit simulation, the use of a density matrix for noisy quantum circuit simulation is avoided, which can further improve the computing efficiency and the utilization rate of computing resources.

[0041] Before specifically introducing the embodiments of the present invention, some of the terms used therein are explained as follows:

[0042] Quantum state: used to describe the state of a quantum system and is a basic concept in quantum mechanics.

[0043] Quantum bit: In quantum computing, a quantum bit is the basic unit of information, which can be represented as 0, 1, or a superposition of these two states.

[0044] Quantum gate parameters: refers to the various settings and characteristics that define and control the behavior of quantum gates in quantum computing. For example, the quantum gate parameter corresponding to a phase gate is the phase parameter, and the quantum gate parameter corresponding to a rotation gate is the angle parameter.

[0045] According to one embodiment of the present invention, see Figure 1 , which is a schematic flow chart of the simulation method of quantum circuit of the present invention, the method comprises steps S1, S2, S3, S4 and S5. In order to better understand the present invention, each step is described in detail below in conjunction with specific embodiments.

[0046] In step S1, data structure information of a quantum circuit is obtained, including a plurality of quantum bits and a plurality of quantum gates.

[0047] According to one embodiment of the present invention, see Figure 2 , which is a schematic diagram of the structure of a quantum circuit. Each horizontal line in the figure represents a quantum bit, that is, the three lines from top to bottom represent the 0th quantum bit, the 1st quantum bit and the 2nd quantum bit respectively, and each square box is a quantum gate. From the figure, it can be seen that the data structure information of the quantum circuit includes 3 quantum bits and 6 quantum gates. Among them, the arrangement queues of the 6 quantum gates are Hardamard gate (H gate for short), Rotation around Z-axis gate (Rz gate for short), Rz gate, H gate, Rz gate and H gate. Therefore, the data structure information of the quantum circuit is a description of the data of the quantum bit and the description of the arrangement and combination queue of the quantum gate. For a quantum circuit, there can be any number of quantum bits and any length of quantum gate arrangement and combination queues.

[0048] According to one embodiment of the present invention, when performing a noisy quantum circuit simulation, the data structure information of the quantum circuit includes Q quantum bits, M quantum gates, and P quantum noise instances, where Q, M, and P are all positive integers. Schematically, the current quantum circuit has 5 quantum bits, 5 quantum gates, and the arrangement and combination queues of the 5 quantum gates are Pauli-X gates (abbreviated as X gates), Controlled-X gates (abbreviated as CX gates), H gates, Rz gates, and H gates, and 3 quantum noise instances, and the 3 quantum noise instances act on the second quantum bit, H gate, and X gate, respectively.

[0049] According to one embodiment of the present invention, when performing noise-free quantum circuit simulation, that is, quantum circuit simulation under ideal conditions, the data structure information of the quantum circuit includes Q quantum bits and M quantum gates, and does not include quantum noise instances.

[0050] In step S2, multiple quantum gate operation queues are constructed for the quantum circuit, each queue including multiple operations and the quantum gates acted upon by each operation.

[0051] According to one embodiment of the present invention, the multiple quantum gate operation queues in step S2 are multiple noise-free quantum gate operation queues or multiple quantum gate operation queues containing different noises. Each queue includes multiple operations and quantum gates acted upon by each operation, and each operation includes quantum gate information of the quantum gate acted upon by it, and the quantum gate information includes quantum gate type, quantum gate parameters, action quantum bit information, and quantum gate matrix representation information. The action quantum bit information includes the number of action quantum bits and the action quantum bits. Quantum gate types include H gate, Rz gate, X gate, CX gate, etc. Figure 2 For example, the number of active quantum bits of the first H gate is 1, and the active quantum bit is the 0th quantum bit. The number of active quantum bits of the first Rz gate is 2, and the active quantum bits are the 0th quantum bit and the 1st quantum bit.

[0052] According to an embodiment of the present invention, for noise-free quantum circuit simulation, since the data structure information of the noise-free quantum circuit does not change, that is, all queues in multiple noise-free quantum gate operation queues are the same. Therefore, the construction method of multiple noise-free quantum gate operation queues includes: after constructing a quantum gate operation queue, it is copied multiple times to obtain multiple noise-free quantum gate operation queues.

[0053] According to one embodiment of the present invention, in order to simulate the uncertainty and randomness of noise in a quantum circuit, multiple quantum gate operation queues containing different noises are constructed for the quantum circuit according to multiple quantum noise instances, and all constructed queues are not in the same form. The construction method of multiple quantum gate operation queues containing different noises includes the following steps a1 and a2:

[0054] Step a1: Obtain a quantum noise model.

[0055] According to one embodiment of the present invention, the quantum noise model represents a simulation model of the interaction between a quantum computer and an external environment, for example, using a Pauli noise model, a depolarization noise model, a damped noise model, and a bit readout noise model or a combination thereof. All noise models support the noise processing of any quantum bit and any quantum gate. Each quantum noise model performs noise processing on any quantum bit or any quantum gate according to a certain probability value.

[0056] Step a2: Generate corresponding multiple quantum gate operation queues for the quantum circuit according to multiple quantum noise instances and quantum noise models.

[0057] According to one embodiment of the present invention, a quantum noise model is used to randomly add noise gates according to quantum noise instances, that is, quantum gates are added to the quantum bits or quantum gates acted on by the quantum noise instances (the added quantum gates are noise gates in the original quantum circuit, usually similar to X gates, Pauli-Y gates (referred to as Y gates)), to obtain a noisy quantum circuit. According to the data structure information of the noisy quantum circuit, all quantum gates in the noisy quantum circuit are traversed to obtain a quantum gate operation queue, and each operation in the quantum gate operation queue acts on a quantum gate in the noisy quantum circuit. This step is repeated n times to obtain n quantum gate operation queues.

[0058] Indicatively, Figure 2 For example, if the data structure information includes two quantum noise instances, and the two quantum noise instances act on the H gate and the Rz gate respectively, the noise simulation operation is performed on the H gate and the Rz gate. For example, the quantum noise model is used to randomly add an X gate after the first H gate with a probability of 5%, and the quantum noise model is used to randomly add a Pauli-Y gate (referred to as Y gate) after the second Rz gate with a probability of 10%. The obtained noisy quantum circuit includes 8 quantum gates, and the arrangement queue of the 8 quantum gates is H gate, X gate, Rz gate, Y gate, Rz gate, H gate, Rz gate and H gate in sequence. Traverse all quantum gates in the noisy quantum circuit to obtain a quantum gate operation queue. The queue includes 8 operations, and the 8 operations act on the H gate, X gate, Rz gate, Y gate, Rz gate, H gate, Rz gate and H gate in sequence. Alternatively, the quantum noise model is used to randomly add an X gate after the fourth H gate, and the quantum noise model is used to randomly add a Y gate after the third Rz gate. The resulting quantum gate operation queue includes 8 operations, and the 8 operations act on the H gate, Rz gate, Rz gate, Y gate, H gate, X gate, Rz gate and H gate in sequence.

[0059] According to one embodiment of the present invention, in the prior art, in quantum circuit simulation, the quantum gate matrix data of each quantum gate is usually transmitted separately, and when the GPU is used to perform matrix operations, it is inevitable to perform multiple data transmissions between the memory and the video memory, resulting in a long data transmission time, thereby increasing the overall computing overhead. Therefore, step S2 of the present invention also includes: merging the quantum gate matrices corresponding to all operations of each queue into a vector and storing it in a continuous memory, and batch transmitting the entire vector to the computing device for matrix operations before starting to execute all operations of each queue, such as transmitting it to the GPU to perform matrix operations. The present invention can reduce the number of data transmissions by batch transmission, avoid multiple memory and video memory conversions caused by multiple transmissions, and improve computing efficiency.

[0060] According to an embodiment of the present invention, the method of merging the quantum gate matrices corresponding to all operations of each queue into one vector includes: merging the quantum gate matrices of the quantum gates acted upon by multiple operations of each queue into one information vector, and generating a corresponding quantum gate matrix dictionary for each queue. The method of merging into one information vector includes:

[0061] The quantum gate matrices of the quantum gates acted upon by the multiple operations are taken as a union, and all the quantum gate matrices in the union are converted into one-dimensional vectors and concatenated to obtain an information vector. The quantum gate matrix dictionary corresponding to each queue includes multiple rows of dictionary data, and each row of dictionary data includes a quantum gate identification code corresponding to the quantum gate matrix, and a starting position and length of the one-dimensional vector corresponding to the matrix in the information vector, wherein the quantum gate identification code of each quantum gate matrix is ​​generated according to the quantum gate type and quantum gate parameters corresponding to the matrix.

[0062] The method of taking the union includes: when the quantum gate types and quantum gate parameters of the two quantum gates are the same, indicating that the quantum gate matrices of the two quantum gates are the same, only one of the quantum gate matrices is taken, and one of the quantum gate matrices is converted into a one-dimensional vector and spliced ​​into the information vector. The method of generating a quantum gate identification code includes: performing unique coding conversion according to the quantum gate type and quantum gate parameters to obtain a quantum gate identification code.

[0063] The technical solution of the above embodiment can at least achieve the following beneficial technical effects: on the one hand, by taking the union method to avoid repeated generation and transmission of the same quantum gate matrix, the quantum gate matrix in the quantum circuit is merged into a vector, and one vector is transmitted at a time, and the data transmission time is significantly reduced. On the other hand, the quantum gate identification code and the corresponding starting position information and length are stored as a typical data structure, which is convenient for querying the position information of the corresponding quantum gate matrix through the quantum gate identification code in subsequent use, so as to obtain the required quantum gate matrix.

[0064] According to one embodiment of the present invention, the quantum gate matrices corresponding to all quantum gates in the quantum circuit are traversed. If a non-identical quantum gate matrix appears, a unique quantum gate identification code is generated and its quantum gate matrix is ​​converted into a one-dimensional vector and stored in a unified information vector G. Schematically, the quantum gate identification code is in the form of: quantum gate type (for example: quantum gate Y / quantum gate CRz) + [quantum gate parameter (floating point number floats)], and the quantum gate matrix is ​​converted into a one-dimensional vector as follows:

[0065]

[0066] Among them, U 00 represents the element at row 0 and column 0 of the quantum gate matrix, U 01 represents the element in row 0 and column 1 of the quantum gate matrix, U10 represents the element in row 1 and column 0 of the quantum gate matrix, U 11 Represents the element in the first row and first column of the quantum gate matrix. After the quantum gate matrix is ​​converted to a one-dimensional vector, it is concatenated into the information vector, and the information of the quantum gate matrix dictionary is updated, with the quantum gate identification code as the key and (vector starting position, length) as the value (value), for example: {'X':(0,4)}, where quantum gate X has no corresponding quantum gate parameter, and the quantum gate type X is used as the key, and 0 and 4 represent the starting position and length of the one-dimensional vector respectively.

[0067] According to one embodiment of the present invention, when the quantum gate matrix is ​​a diagonal matrix or an inverse diagonal matrix, only the elements on the diagonal or inverse diagonal need to be converted into a one-dimensional vector, which can improve the utilization of storage space to a certain extent. The method of converting the quantum gate matrix which is a diagonal matrix into a one-dimensional vector is as follows:

[0068]

[0069] In step S3, multiple types of matrix multiplication rules constructed for multiple quantum gate matrix types of quantum gates are obtained, wherein the multiplication rules include multiplying elements corresponding to non-zero element positions in the quantum gate matrix with elements at multiplication positions of another matrix.

[0070] According to one embodiment of the present invention, the various types of quantum gate matrix multiplication rules in step S3 include: diagonal quantum gate matrix multiplication rule, inverse diagonal quantum gate matrix multiplication rule, single-bit control quantum gate matrix multiplication rule, diagonal quantum gate matrix multiplication rule containing control bit, inverse diagonal quantum gate matrix multiplication rule containing control bit, single target bit quantum gate matrix multiplication rule, quantum exchange gate matrix multiplication rule, composite two-bit quantum gate matrix multiplication rule, diagonal composite two-bit quantum gate matrix multiplication rule and control composite two-bit quantum gate matrix multiplication rule or a combination thereof. The present invention subdivides the types of quantum gate matrices and constructs a variety of matrix multiplication operations optimized according to the characteristics of quantum gate matrices to optimize the multiplication operations of quantum gate matrices and quantum states, so that the computing speed and resource usage are significantly optimized.

[0071] According to one embodiment of the present invention, the multiple quantum gate matrix types and the matrix multiplication rules corresponding to each type are as follows:

[0072] 1) Matrix type: conventional quantum gate matrix. The corresponding rule is: diagonal quantum gate matrix multiplication rule.

[0073] According to one embodiment of the present invention, for a conventional quantum gate matrix, the distribution position of its non-zero elements is irregular. Therefore, when a conventional quantum gate matrix is ​​multiplied with another matrix, each row of the quantum gate matrix needs to be multiplied with each column of the other matrix. The applicable quantum gates of this rule include: Hadamard Gate (H gate for short), Hy Gate (Hy gate for short), Sqrt-X Gate (SX gate for short), Sqrt-Y Gate (SY gate for short), Sqrt-W Gate (SW gate for short), U2 Gate (U2 gate for short), U3 Gate (U3 gate for short), Rotation-X Gate (Rx gate for short) and Rotation-Y Gate (Ry gate for short). The calculation method of this rule V′ is as follows:

[0074]

[0075] in, represents a quantum gate matrix of the conventional quantum gate matrix type, U 00 represents the element at row 0 and column 0 of the quantum gate matrix, U 0m represents the element in the 0th row and the mth column of the quantum gate matrix, U m0 represents the element in the mth row and 0th column of the quantum gate matrix, U mm represents the element in the mth row and mth column of the quantum gate matrix, × represents the dot multiplication operation, It means that the quantum state matrix after dimension change is obtained by dimension change processing of the latest quantum state vector according to the quantum bit information of an operation. represents the quantum state of the 0th row and 0th column of the quantum state matrix, represents the quantum state of the 0th row and nth column of the quantum state matrix, represents the quantum state of the mth row and 0th column of the quantum state matrix, represents the quantum state of the mth row and nth column of the quantum state matrix, represents the quantum state of the ith row and 0th column of the quantum state matrix, U 0i represents the element in the 0th row and the ith column of the quantum gate matrix, represents the quantum state of the i-th row and n-th column of the quantum state matrix, U mi represents the element in the mth row and ith column of the quantum gate matrix, The subscript i in U represents the row number of the element position in the quantum state matrix (also called the quantum state position). 0i The subscript i in represents the column number of the element position in the quantum gate matrix.

[0076] 2) Matrix type: diagonal quantum gate matrix. The corresponding rule is: diagonal quantum gate matrix multiplication rule.

[0077] According to one embodiment of the present invention, the diagonal quantum gate matrix is ​​a diagonal matrix, and the distribution position of its non-zero elements is on the diagonal line. Therefore, it can be optimized to perform only the dot multiplication operation of the elements on the diagonal position. The applicable quantum gates of this rule include: Rotation-Z Gate (abbreviated as Rz Gate) and Phase Gate (abbreviated as Phase Gate). This rule V 1 The calculation method is as follows:

[0078]

[0079] in, represents a column vector consisting of all elements on the diagonal of a quantum gate matrix of the diagonal quantum gate matrix type.

[0080] 3) Matrix type: inverse diagonal quantum gate matrix, corresponding rule: inverse diagonal quantum gate matrix multiplication rule.

[0081] According to one embodiment of the present invention, the inverse diagonal quantum gate matrix belongs to an inverse diagonal matrix, and the distribution position of its non-zero elements is on the inverse diagonal line. Therefore, it can be optimized to perform only the dot multiplication operation of the elements on the inverse diagonal position. The applicable quantum gates of this rule include: Pauli-Y Gate (abbreviated as Y Gate). This rule V 2 The calculation method is as follows:

[0082]

[0083] in, represents a column vector consisting of all elements on the inverse diagonal of a quantum gate matrix of the inverse diagonal quantum gate matrix type.

[0084] 4) Matrix type: single-bit controlled quantum gate matrix, corresponding rule: single-bit controlled quantum gate matrix multiplication rule.

[0085] According to one embodiment of the present invention, the single-bit control quantum gate matrix is ​​a special case of a diagonal matrix. It is a diagonal matrix, but all elements on its diagonal are 1 except the last one. Its matrix multiplication rule can be optimized to only multiply the last element on the diagonal by the last bit of the corresponding quantum state vector. The applicable quantum gates of this rule include: SGate (abbreviated as S gate), S-Dagger Gate (abbreviated as SDG gate), Pauli-Z Gate (abbreviated as Z gate), U1 Gate (abbreviated as U1 gate), T Gate (abbreviated as T gate) and T-Dagger Gate (abbreviated as TDG gate). This rule V 2 The calculation method is as follows:

[0086]

[0087] in, represents a quantum gate matrix of the type of single-bit controlled quantum gate matrix, It means that the quantum state matrix after dimension change is obtained by dimension change processing of the latest quantum state vector according to the quantum bit information of an operation. represents the quantum state of the 1st row and 0th column of the quantum state matrix, Represents the quantum state of the 1st row and nth column of the quantum state matrix.

[0088] Next, we divide the matrix types and construct multiplication rules for the quantum gate matrix containing control bits. The division and construction rules include the following four parts 5), 6), 7) and 8).

[0089] According to one embodiment of the present invention, among many quantum gates, the action qubits can be divided into action control qubits and action target qubits, which are usually expressed as performing an evolution operation on the quantum state of the action target qubit when the action control qubit is 1. At this time, only the quantum state of the action target qubit whose action control qubit is 1 is selected. Assume Indicates that the quantum gate controls the quantum bit to be 1. Indicates that the quantum gate controls the quantum bit to be 0. Let the number of quantum bits controlled by the quantum gate be The symbol U is used to represent the non-0 and non-1 elements in the quantum gate matrix. Among them, the control bit matrix categories and multiplication rules include the following three:

[0090] 5) Matrix type: regular quantum gate matrix with control bits, corresponding rule: regular quantum gate matrix multiplication rule with control bits.

[0091] According to one embodiment of the present invention, in the conventional quantum gate matrix multiplication rule containing control bits, it can be optimized so that the target quantum bit part and the control quantum bit part of the quantum gate matrix are all 1, and the quantum state corresponding to the target quantum bit part performs matrix multiplication operation. The applicable quantum gates of this rule include: Control Hadamard Gate (abbreviated as CH gate), Control Rotation-Y Gate (abbreviated as CRy gate) and Control U3 Gate (abbreviated as CU3 gate). The calculation method of this rule V″ is as follows:

[0092]

[0093] in, represents a quantum gate matrix of the type of conventional quantum gate matrix with control bits, U cc represents the element in the cth row and cth column of the quantum gate matrix, U cc and Positional subscripts of elements such as In To control the number of qubits, U cm represents the element in the cth row and mth column of the quantum gate matrix, U mc represents the element in the mth row and cth column of the quantum gate matrix, It means that the quantum state matrix after dimension change is obtained by dimension change processing of the latest quantum state vector according to the quantum bit information of an operation. It represents the quantum state of row 0 and column 0 corresponding to the action control quantum bit being 0. It represents the quantum state of the 0th row and the nth column corresponding to the action control quantum bit being 0, It represents the quantum state of the c-1th row and the 0th column corresponding to the action control quantum bit being 0. It represents the quantum state of the c-1th row and nth column corresponding to the action control quantum bit being 0. It represents the quantum state of the cth row and the 0th column corresponding to the action control quantum bit being 1. It represents the quantum state of the cth row and nth column corresponding to the action control quantum bit being 1. It represents the quantum state of the mth row and 0th column corresponding to the action control quantum bit being 1. It represents the quantum state of the mth row and nth column corresponding to the action control quantum bit being 1. Indicates that the quantum gate controls the quantum bit to 1. It means that the quantum gate controls the quantum bit to 0.

[0094] 6) Matrix type: diagonal quantum gate matrix with control bits, corresponding rule: diagonal quantum gate matrix multiplication rule with control bits.

[0095] According to one embodiment of the present invention, in the diagonal quantum gate matrix multiplication rule containing control bits, the diagonal elements of the quantum gate matrix optimized for the target quantum bit and the control quantum bit are all 1, and the quantum state corresponding to the target quantum bit is subjected to a point multiplication operation. The applicable quantum gates of this rule include: Control Rotation-Z Gate (abbreviated as CRz gate) and Double-Control Rotation-Z Gate (abbreviated as CCRz gate). This rule V 4 The calculation method is as follows:

[0096]

[0097]

[0098] 7) Matrix type: inverse diagonal quantum gate matrix with control bits. The corresponding rule is: inverse diagonal quantum gate matrix multiplication rule with control bits.

[0099] According to one embodiment of the present invention, in the inverse diagonal quantum gate matrix multiplication rule containing control bits, it can be optimized so that the inverse diagonal elements of the quantum gate matrix of the target quantum bit and the control quantum bit are all 1, and the quantum state corresponding to the target quantum bit is subjected to a point multiplication operation. The applicable quantum gates of this rule include: Contorl Pauli-X Gate (referred to as CX gate), Control Pauli-YGate (referred to as CY gate) and Double-Control Pauli-X Gate (referred to as CCX gate). This rule V 5 The calculation method is as follows:

[0100]

[0101] 8) Matrix type: (multi-control) single target bit quantum gate matrix, the corresponding rule is: single target bit quantum gate matrix multiplication rule.

[0102] According to one embodiment of the present invention, this type of quantum gate matrix is ​​a diagonal matrix, and all elements on the diagonal except the last one are 1. Its matrix operation can be optimized to multiply the last element on the diagonal by the last one of the corresponding quantum state vector (the quantum state matrix after the dimension is changed). The applicable quantum gates of this rule include: Control Pauli-Z Gate (abbreviated as CZ Gate), Control U1 Gate (abbreviated as CU1 Gate) and Double-Control Pauli-Z Gate (abbreviated as CCZ Gate). This rule V 6 The calculation method is as follows:

[0103]

[0104] in, It means that the latest quantum state vector is transformed according to the quantum bit information of an operation to obtain the quantum state matrix after the transformation.

[0105] The matrix types are divided and multiplication rules are constructed for the two-bit quantum gate matrix. The divided and constructed structure includes the following four parts 9), 10), 11) and 12).

[0106] 9) Matrix type: quantum exchange gate matrix, corresponding rule: quantum exchange gate matrix multiplication rule.

[0107] According to one embodiment of the present invention, for the quantum swap gate matrix multiplication rule, the control quantum bit and the target quantum bit in another matrix (the quantum state matrix after the quantum state vector is transformed) are exchanged, and the matrix multiplication result can be directly obtained, avoiding the execution of matrix multiplication operations and improving the calculation efficiency. The applicable quantum gates of this rule include: Swap Gate (abbreviated as Swap Gate), ISwap Gate (abbreviated as ISwap Gate) and ISwap-Dagger Gate (abbreviated as ISwapdag Gate). This rule V 7 The calculation method is as follows:

[0108]

[0109] in, represents a quantum gate matrix of the quantum commutation gate matrix type, U 12 represents the element in the first row and second column of the quantum gate matrix, U 21 represents the element in the 2nd row and 1st column of the quantum gate matrix, It means that the quantum state matrix after dimension change is obtained by dimension change processing of the latest quantum state vector according to the quantum bit information of an operation. represents the quantum state of the 1st row and 0th column of the quantum state matrix, represents the quantum state of the 1st row and nth column of the quantum state matrix, represents the quantum state of the 2nd row and 0th column of the quantum state matrix, represents the quantum state of the 2nd row and nth column of the quantum state matrix, represents the quantum state of the 3rd row and 0th column of the quantum state matrix, represents the quantum state of the 3rd row and nth column of the quantum state matrix. When the quantum gate is a Swap gate, U 12 and U 21 Equal to 1.

[0110] 10) Matrix type: composite two-bit quantum gate matrix, corresponding rule: composite two-bit quantum gate matrix multiplication rule.

[0111] According to one embodiment of the present invention, this type of two-bit quantum gate matrix is ​​usually characterized by all non-zero elements being distributed on the diagonal and anti-diagonal. By decomposing the original matrix into two conventional matrices of single quantum bits, and performing matrix multiplication operations with the corresponding quantum states respectively. As shown below, the originally required 4×4 matrix-vector multiplication can be converted into two 2×2 matrix-vector multiplications. The applicable quantum gates of this rule include: Rotation-XX Gate (abbreviated as Rxx gate) and Rotation-YY Gate (abbreviated as Ryy gate). This rule V 8 The calculation method is as follows:

[0112]

[0113] in, represents a quantum gate matrix of the composite two-bit quantum gate matrix type, U 03 represents the element in row 0 and column 3 of the quantum gate matrix, U 11 represents the element in the first row and first column of the quantum gate matrix, U 12 represents the element in the first row and second column of the quantum gate matrix, U 21 represents the element in the second row and first column of the quantum gate matrix, U 22 represents the element in the second row and second column of the quantum gate matrix, U 30 represents the element in row 3 and column 0 of the quantum gate matrix, U 33 Represents the element in the 3rd row and 3rd column of the quantum gate matrix.

[0114] 11) Matrix type: diagonal composite two-bit quantum gate matrix, corresponding rule: diagonal composite two-bit quantum gate matrix multiplication rule.

[0115] According to an embodiment of the present invention, this type of two-bit quantum gate matrix is ​​usually composed of two regular matrices and distributed on the diagonal, and the remaining positions are all 0. Similar to the above type of composite two-bit quantum gate matrix, this type of quantum gate matrix multiplication operation can be optimized by decomposing it into two 2×2 matrix-vector multiplications. The applicable quantum gates of this rule include: 9 The calculation method is as follows:

[0116]

[0117] Among them, U 01 represents the element in row 0 and column 1 of the quantum gate matrix, U 10 represents the element in row 1 and column 0 of the quantum gate matrix, U 23 represents the element in the second row and third column of the quantum gate matrix, U 32 Represents the element in the 3rd row and 2nd column of the quantum gate matrix.

[0118] 12) Matrix type: controlled composite two-bit quantum gate matrix, corresponding rule: controlled composite two-bit quantum gate matrix multiplication rule.

[0119] According to one embodiment of the present invention, this type of two-bit quantum gate matrix consists of a general single-bit matrix and a single-bit control diagonal matrix. It can be optimized by decomposing its matrix multiplication operation into a 2×2 conventional quantum gate matrix multiplication rule and a single-bit control quantum gate matrix multiplication rule. Applicable quantum gates of this rule include: Fermions Simulation Quantum Gate (FSim Gate for short) and Sqrt-iSwap Gate (SqiSwap Gate for short). This rule V 10 The calculation method is as follows:

[0120]

[0121] In step S4, a quantum state vector is initialized according to a plurality of quantum bits, and the initialized quantum state vectors are processed respectively by using a plurality of queues to obtain a plurality of final quantum state vectors, including processing the initialized quantum state vector by executing all operations of each queue to obtain a final quantum state vector, wherein, when executing each of all the operations, according to the quantum gate matrix type of the quantum gate corresponding to each operation, a multiplication operation between the quantum gate matrix and the latest quantum state vector is performed according to a matrix multiplication rule constructed for the type to obtain an updated quantum state vector.

[0122] According to one embodiment of the present invention, in step S4, the quantum state vector V of the simulated quantum system is initialized according to the number of quantum bits Q in the quantum circuit. The obtained quantum state vector is usually of length 2. Q A complex vector with the first bit being 1 and the rest being 0.

[0123] According to one embodiment of the present invention, in step S4, the method of processing the initialized quantum state vector by executing all operations of each queue to obtain a final quantum state vector includes: obtaining the information vector and quantum gate matrix dictionary corresponding to each queue, and generating the quantum gate identification code of each operation according to the quantum gate type and quantum gate parameter of each operation of all operations of each queue; searching for the same quantum gate identification code from the quantum gate matrix dictionary according to the quantum gate identification code of each operation of all operations of each queue, and searching for the quantum gate matrix corresponding to each operation from the information vector according to a row of dictionary data corresponding to the same quantum gate identification code; executing all operations of each queue to process the initialized quantum state vector according to the quantum gate matrix corresponding to all operations of each queue. Schematically, if the quantum gate type corresponding to the quantum gate acted on by the current operation is X, and the quantum gate has no corresponding quantum gate parameter, then the quantum gate identification code of the operation is X, and the quantum gate identification code identical to X is found from the dictionary, and the starting position and length of the quantum gate matrix in the information vector after the quantum gate matrix is ​​transformed into a one-dimensional vector are obtained, for example, the starting position is 0 and the length is 4, then the one-dimensional vector [U] corresponding to the quantum gate matrix is ​​obtained from the information vector. 00 U 01 U 10 U 11 ], according to the conversion process of the above formula (1), it is reversely converted into a quantum gate matrix Thus, the quantum gate matrix is ​​obtained. For the diagonal quantum gate matrix type and the inverse diagonal quantum gate matrix type, the one-dimensional vector obtained according to the rule of formula (2) is directly converted into a column vector as shown in formula (4) and the column vector as shown in formula (5) The corresponding quantum gate matrix is ​​thus obtained to perform the matrix multiplication operation in the operation.

[0124] According to one embodiment of the present invention, each operation includes information of the action quantum bit. According to the quantum gate matrix corresponding to each operation of each queue, in the process of executing all operations of each queue to process the initialized quantum state vector, the process of executing each operation of all operations of each queue includes the following steps b1, b2 and b3:

[0125] Step b1: Obtain the quantum gate matrix and the latest quantum state vector of the quantum gate acted upon by the operation, wherein the first operation in the execution queue uses the initialized quantum state vector, and each operation after the first operation uses the updated quantum state vector obtained after the previous operation is executed.

[0126] According to one embodiment of the present invention, Figure 2For example, if the quantum gate acted by the first operation is the H gate, when executing the first operation, the initialized quantum state vector is used, and the matrix multiplication operation corresponding to the H gate is used to perform the multiplication operation between the quantum gate matrix of the H gate and the initialized quantum state vector to obtain the updated quantum state vector. If the quantum gate acted by the second operation is the Rz gate, when executing the second operation, the quantum state vector updated by the first operation is used, and the matrix multiplication operation corresponding to the Rz gate is used to perform the multiplication operation between the quantum gate matrix of the Rz gate and the initialized quantum state vector to obtain the updated quantum state vector after the second operation is executed.

[0127] Step b2: According to the quantum bit information of the operation, the latest quantum state vector is transformed into a quantum state matrix.

[0128] According to one embodiment of the present invention, the method of performing dimension-changing processing on the latest quantum state vector is as follows:

[0129]

[0130] Among them, [V0,…,V N ] represents the latest quantum state vector, V0 represents the 0th quantum state, V N Represents the Nth quantum state, N = 2 Q , Q represents the number of quantum bits in the quantum circuit, Represents the quantum state matrix after dimension change. Each column of the quantum state matrix includes quantum states, each row of the quantum state matrix includes quantum state, Q g represents the number of active qubits, represents the quantum state of row 0 and column 0 after dimension change, represents the quantum state of the 0th row and nth column after dimension change, represents the quantum state of the mth row and 0th column after dimension change, represents the quantum state of the mth row and nth column after dimension transformation, I represents the position information of the quantum state obtained by dimension transformation of the action quantum bit information, I=[I0,…,I j …,I n ], j∈[0,n], each I j The length is The technical solution of this embodiment can at least achieve the following beneficial technical effects: Compared with the existing method of expanding the quantum gate matrix tensor product to 2 Q ×2 Q The present invention reorders the quantum state vector and converts the quantum state vector into , and then perform multiplication operations on the quantum gate matrix and the quantum state vector, greatly improving computing efficiency and memory utilization.

[0131] In schematic form, an example of the process of transforming a quantum state vector into a quantum state matrix is ​​given. The number of quantum bits in the current quantum system is Q=3, the quantum gate acted on by the fourth operation in the quantum gate operation queue is the S gate, and the number of quantum bits acted on is Q g =1, and its active quantum bit is the first quantum bit. Suppose the dimension of the current quantum state vector is (1, 2 3 ), the current quantum state vector is [V 000 ,V 001 ,V 010 ,V 011 ,V 100 ,V 101 ,V 110 ,V 111 ], the subscript number corresponding to the quantum state is binary, and the quantum state vector is converted to Dimensional matrix, therefore, the current quantum state vector is transformed into 2×2 2 , and because the quantum bit of the quantum gate is the first quantum bit, the quantum state matrix after the quantum state vector is transformed into a dimension is: The active quantum bit is the first quantum bit, which means that in binary, only the first binary bit of each column changes, and the elements are reordered from small to large, which are 0 and 1 respectively. When the 0th and 2nd binary bits are both 0, the position subscripts of the first column elements are 000 and 010. When the 0th and 2nd binary bits are 0 and 1 respectively, the position subscripts of the first column elements are 001 and 011. Schematically, if the quantum gate acted by the third operation of the quantum gate operation queue is the Rz gate, the number of its active quantum bits Q g =2, and the active quantum bits are the 0th quantum bit and the 2nd quantum bit. The quantum state matrix after the quantum state vector is transformed into a dimension is: The action qubit is the first qubit, which means that in binary, only the elements of the 0th and 2nd binary bits of each column change, and the elements are reordered from small to large, which are 00, 01, 10 and 11. When the element of the first binary bit is 0, the position subscripts of the elements in the first column are 000, 001, 100 and 101. When the element of the first binary bit is 1, the position subscripts of the elements in the second column are 010, 011, 110 and 111. Therefore, after the quantum state vector is transformed into the quantum state matrix, the position of the quantum state in the quantum state matrix is ​​related to the action qubit.

[0132] Step b3: According to the quantum gate matrix type, a matrix multiplication algorithm corresponding to the type is used to perform a multiplication operation between the quantum gate matrix and the quantum state matrix to obtain an operation result, and the operation result is transformed into a one-dimensional vector according to the position to obtain an updated quantum state vector, wherein the quantum state vector updated for the last time is the final quantum state vector.

[0133] According to one embodiment of the present invention, Figure 2 For example, the quantum gate acted on by the first operation is the H gate. When executing the first operation, the initialized quantum state vector is used, and the matrix multiplication operation corresponding to the H gate is used to perform the multiplication operation between the quantum gate matrix of the H gate and the quantum state matrix corresponding to the initialized quantum state vector, and the operation result is obtained. The operation result is transformed into a one-dimensional vector to obtain an updated quantum state vector. Among them, the matrix type corresponding to the H gate is a conventional quantum gate matrix, and the matrix multiplication operation used is the conventional quantum gate matrix multiplication rule in the above embodiment. The quantum gate acted on by the second operation is the Rz gate, and the matrix type corresponding to the Rz gate is a diagonal quantum gate matrix. The diagonal quantum gate matrix multiplication rule is used to perform the multiplication operation between the quantum gate matrix of the Rz gate and the updated quantum state vector obtained after the first operation is executed, and it is transformed into a one-dimensional vector to obtain the updated quantum state vector after the second operation is executed.

[0134] According to one embodiment of the present invention, all operations of each queue in a plurality of queues are used to process the initialized quantum state vector to obtain a plurality of final quantum state vectors. The plurality of final quantum state vectors obtained by processing the plurality of noise-free quantum gate operation queues are the same. The plurality of final quantum state vectors obtained by processing the plurality of noise-containing quantum gate operation queues are different, and each final quantum state vector represents a final quantum state vector output by a quantum system through a quantum circuit under a specific noise condition.

[0135] In step S5, the quantum states in the multiple final quantum state vectors are randomly sampled to obtain sampling results, and the probability distribution of the quantum states is obtained according to the sampling results.

[0136] According to one embodiment of the present invention, step S5 includes performing a random sampling on each of the multiple final quantum state vectors to obtain multiple sampling results, wherein the method of performing a random sampling includes: calculating the probability value of the quantum state at each element position in the final quantum state vector according to the complex number of the quantum state corresponding to the position of the position being sampled; performing a random sampling according to the probability value corresponding to the quantum state at each element position to obtain a sampling result including the sampled quantum state and the quantum bit position where the quantum state is located; wherein the method of obtaining the probability distribution includes: counting the number of times the quantum state at each element position is sampled according to the multiple sampling results, and obtaining the probability distribution of the quantum state according to the ratio of the number of times the quantum state at each element position is sampled to the total number of sampling times.

[0137] According to one embodiment of the present invention, if the final quantum state vector includes quantum states corresponding to four element positions, the absolute values ​​of the complex numbers of the four quantum states are taken and the square root is obtained as the probability value of each quantum state being sampled. For example, the probability values ​​of the four quantum states being sampled are 0.25, 0.25, 0 and 0.5 respectively. A random sampling is performed according to the probability values ​​corresponding to the four quantum states. For example, if the sampling result is the quantum state corresponding to the 01st position, the number of times the quantum state at the 01st position is sampled plus 1 is recorded. In this way, if there are n queues, the final sampling is n times. The total number of times the quantum states at the four positions are sampled is counted. Schematically, n=1000, 00 position: 200 times, 01 position: 300 times, 10 position: 250 times, 11 position: 250 times, the calculated probability of the 00 position is 0.2, the probability of the 01 position is 0.3, the probability of the 10 position is 0.25, the probability of the 11 position is 0.25, and the probability distribution of the quantum state is 0.2, 0.3, 0.25, 0.25.

[0138] According to one embodiment of the present invention, a complete description of the noisy quantum circuit simulation process is provided, see Figure 3 , which is a complete flow diagram of quantum circuit simulation with noise, which includes the following steps:

[0139] Step 01: Input the data structure information of the quantum circuit and multiple quantum noise instances.

[0140] Step 02: Based on the quantum circuit and multiple quantum noise instances, construct multiple quantum gate operation queues with different noises for the quantum circuit. Traverse all quantum gate operation queues to execute all operations in each quantum gate operation queue. The process of executing all operations in each queue includes the following steps 03-08:

[0141] Step 03: Initialize the quantum state vector.

[0142] Step 04: Merge the quantum gate matrices of the quantum gates acted upon by all operations in each quantum gate operation queue, obtain the information vector corresponding to each queue, and generate the corresponding quantum gate matrix dictionary. Traverse all operations in a queue and execute all operations in the order in which they are arranged in the queue.

[0143] Step 05: When executing each operation, obtain the quantum gate matrix in the current operation and the information of the active quantum bits in the current operation according to the quantum gate type, corresponding quantum gate parameters, information vector and quantum gate matrix dictionary corresponding to the current operation.

[0144] Step 06: According to the information of the active quantum bit, the quantum state vector is transformed in dimension according to formula (15) given in the above embodiment to obtain a quantum state matrix.

[0145] Step 07: According to the type of quantum gate matrix in the current operation, select the corresponding matrix multiplication rule to perform the multiplication operation between the quantum gate matrix and the quantum state matrix to obtain the operation result.

[0146] Step 08: Transform the operation result into a one-dimensional vector to obtain an updated quantum state vector. When the current operation is completed, go to step 05 to continue execution according to the next operation in the traversal queue; if all operations in the queue are completed, take the updated quantum state vector obtained after the last operation is completed as a final quantum state vector and go to the next step.

[0147] Step 09: Sampling is performed according to the final quantum state vector corresponding to the current queue to obtain the sampling result. Go to step 02 to continue to execute the next operation queue; if all operations of all queues are completed, go to the next step.

[0148] Step 10: Based on the sampling results corresponding to all queues, output the probability distribution of the quantum state of the noisy quantum circuit.

[0149] The technical solution of this embodiment can at least achieve the following beneficial technical effects: according to the structure and environmental characteristics of the quantum system, a quantum noise model is used to generate random quantum noise instances, which represent the state of the quantum system under a certain noise condition. By repeatedly generating noise instances randomly and applying them to quantum circuits, a series of quantum circuits under a certain noise condition can be obtained. Each noisy quantum circuit is simulated to obtain the final quantum state of each quantum system under a specific noise condition. Finally, by randomly sampling all simulated quantum states, the probability distribution of noisy quantum states can be obtained. The utilization rate of storage space and computing resources is significantly improved.

[0150] According to one embodiment of the present invention, a quantum circuit simulation device implemented based on the method described in the above embodiment is provided, see Figure 4 , which is a schematic diagram of the architecture of a quantum circuit simulation device. The device includes: a quantum circuit construction module, which is used to generate data structure information of a quantum circuit, including multiple quantum bits and multiple quantum gates; a quantum operation construction module, which is used to construct multiple quantum gate operation queues for the quantum circuit, each queue including multiple operations and quantum gates acted on by each operation; a quantum gate storage module, which is used to store quantum gate information and call quantum gate information according to the quantum gate acted on by the operation, including a quantum gate matrix; a quantum circuit simulation module, which is used to initialize quantum state vectors according to multiple quantum bits, and use multiple queues to process the initialized quantum state vectors respectively to obtain multiple final quantum state vectors, including processing the initialized quantum state vectors by executing all operations of each queue. A final quantum state vector is obtained by measuring, and the quantum states in the multiple final quantum state vectors are randomly sampled to obtain sampling results, and the probability distribution of the quantum state is obtained according to the sampling results; a matrix multiplication operation module is used to pre-construct multiple types of matrix multiplication rules for quantum gate matrix types of multiple quantum gates, and the multiplication rule includes multiplying the elements corresponding to the non-zero element positions in the quantum gate matrix with the elements at the multiplication position of another matrix. When executing each operation of all operations in each queue, according to the quantum gate matrix type of the quantum gate corresponding to each operation, the multiplication operation between the quantum gate matrix and the latest quantum state vector is performed according to the matrix multiplication rule constructed for this type to obtain an updated quantum state vector. Among them, the quantum gate matrix merging module executes step 04 in the above embodiment, and the quantum state vector dimension changing module executes step 06 in the above embodiment.

[0151] According to one embodiment of the present invention, for a quantum circuit simulation device for simulating a noisy quantum circuit, a quantum noise model is added to a quantum operation building module to generate a quantum noise instance, and the multiple quantum gate operation queues constructed are multiple quantum gate operation queues containing different noises. For a quantum circuit simulation device for simulating a noise-free quantum circuit, the quantum operation building module does not add a quantum noise model, and the multiple quantum gate operation queues constructed are noise-free.

[0152] It should be noted that although the above describes the various steps in a specific order, it does not mean that the various steps must be executed in the above specific order. In fact, some of these steps can be executed concurrently or even in a different order as long as the required functions can be achieved.

[0153] The present invention may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present invention.

[0154] Computer readable storage medium can be a tangible device that holds and stores instructions used by an instruction execution device. Computer readable storage medium can include, for example, but is not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (non-exhaustive list) of computer readable storage medium include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, for example, a punch card or a protruding structure in a groove on which instructions are stored, and any suitable combination thereof.

[0155] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A method for simulating a quantum circuit, characterized in that the method include: S1. Obtaining data structure information of a quantum circuit, including multiple quantum bits and multiple quantum gates; S2. construct multiple quantum gate operation queues for the quantum circuit, each queue including multiple operations and the quantum gates acted on by each operation; S3, obtaining multiple types of matrix multiplication rules constructed for quantum gate matrix types of multiple quantum gates, wherein the multiplication rules include multiplying elements corresponding to non-zero element positions in the quantum gate matrix with elements at multiplication positions of another matrix; S4, initializing a quantum state vector according to a plurality of quantum bits, and using a plurality of queues to process the initialized quantum state vectors respectively to obtain a plurality of final quantum state vectors, including processing the initialized quantum state vector by executing all operations of each queue to obtain a final quantum state vector, wherein, when executing each of all the operations, according to the quantum gate matrix type of the quantum gate corresponding to each operation, a multiplication operation between the quantum gate matrix and the latest quantum state vector is performed according to a matrix multiplication rule constructed for the type to obtain an updated quantum state vector; S5. Sampling the quantum states in the multiple final quantum state vectors to obtain sampling results, and obtaining the probability distribution of the quantum states according to the sampling results.

2. The method according to claim 1, characterized in that In step S3, the multiple types of quantum gate matrix multiplication rules include: Diagonal quantum gate matrix multiplication rule, inverse diagonal quantum gate matrix multiplication rule, single-bit control quantum gate matrix multiplication rule, diagonal quantum gate matrix multiplication rule with control bit, inverse diagonal quantum gate matrix multiplication rule with control bit, single target bit quantum gate matrix multiplication rule, quantum exchange gate matrix multiplication rule, composite two-bit quantum gate matrix multiplication rule, diagonal composite two-bit quantum gate matrix multiplication rule and control composite two-bit quantum gate matrix multiplication rule or a combination thereof.

3. The method according to claim 1, characterized in that The multiple quantum gate operation queues in step S2 are multiple quantum gate operation queues without noise or multiple quantum gate operation queues containing different noises, wherein the data structure information includes multiple quantum noise instances, and multiple quantum gate operation queues containing different noises are constructed for the quantum circuit according to the multiple quantum noise instances; The step S2 further comprises: Merging the quantum gate matrices of the quantum gates acted upon by the multiple operations of each queue into an information vector, including taking the union of the quantum gate matrices of the quantum gates acted upon by the multiple operations, converting all quantum gate matrices in the union into one-dimensional vectors respectively and concatenating them to obtain the information vector; A corresponding quantum gate matrix dictionary is generated for each queue, which includes multiple rows of dictionary data, each row of dictionary data includes a quantum gate identification code corresponding to the quantum gate matrix, and a starting position and length of a one-dimensional vector corresponding to the matrix in the information vector, wherein the quantum gate identification code of each quantum gate matrix is ​​generated according to the quantum gate type and quantum gate parameters corresponding to the matrix.

4. The method according to claim 3, characterized in that Each operation includes a quantum gate type and quantum gate parameters, wherein in step S4, a method of obtaining a final quantum state vector includes: Obtain the information vector and quantum gate matrix dictionary corresponding to each queue, and generate a quantum gate identification code for each operation according to the quantum gate type and quantum gate parameters of each operation of all operations in each queue; According to the quantum gate identification code of each operation of all operations in each queue, the same quantum gate identification code is searched from the quantum gate matrix dictionary, and according to a row of dictionary data corresponding to the same quantum gate identification code, the quantum gate matrix corresponding to each operation is searched from the information vector; According to the quantum gate matrix corresponding to all operations of each queue, all operations of each queue are executed to process the initialized quantum state vector.

5. The method according to claim 2, characterized in that: Each operation includes the action quantum bit information. In step S4, the process of performing each operation of all the operations includes: Get the quantum gate matrix and the latest quantum state vector of the quantum gate acted on by the operation, where the first operation in the execution queue uses the initialized quantum state vector, and each operation after the first operation uses the updated quantum state vector obtained after the previous operation is executed; According to the quantum bit information of the operation, the latest quantum state vector is processed by dimension change to obtain the quantum state matrix; According to the quantum gate matrix type, a matrix multiplication algorithm corresponding to the type is used to perform a multiplication operation between the quantum gate matrix and the quantum state matrix to obtain an operation result, and the operation result is transformed into a one-dimensional vector according to the position to obtain an updated quantum state vector, wherein the quantum state vector updated for the last time is the final quantum state vector.

6. The method according to claim 5, characterized in that The action quantum bit information includes the number of action quantum bits and the action quantum bits. The method of performing dimension-changing processing on the latest quantum state vector is as follows: Among them, [V0,…,V N ] represents the latest quantum state vector, V0 represents the 0th quantum state, V N Represents the Nth quantum state, N = 2 Q , Q represents the number of quantum bits in the quantum circuit, Represents the quantum state matrix after dimension change. Each column of the quantum state matrix includes quantum states, each row of the quantum state matrix includes quantum state, Q g represents the number of active qubits, represents the quantum state of row 0 and column 0 after dimension change, represents the quantum state of the 0th row and nth column after dimension change, represents the quantum state of the mth row and 0th column after dimension change, represents the quantum state of the mth row and nth column after dimension transformation, I represents the position information of the quantum state obtained by dimension transformation of the action quantum bit information, I=[I0,…,I j …,I n ], Every I j The length is 7. The method according to claim 2, characterized in that Each operation includes the action quantum bit information, and the diagonal quantum gate matrix multiplication rule is as follows: in, represents the column vector consisting of all elements on the diagonal of the quantum gate matrix, U 00 represents the element at row 0 and column 0 of the quantum gate matrix, U mm represents the element in the mth row and mth column of the quantum gate matrix, It means that the quantum state matrix after dimension change is obtained by dimension change processing of the latest quantum state vector according to the quantum bit information of an operation. represents the quantum state of row 0 and column 0 after dimension change, represents the quantum state of the 0th row and nth column after dimension change, represents the quantum state of the mth row and 0th column after dimension change, represents the quantum state of the mth row and nth column after dimension transformation, and the subscript I represents the element position information of the quantum state obtained according to the dimension transformation of the action quantum bit information; The inverse diagonal quantum gate matrix multiplication rule is as follows: in, represents the column vector consisting of all elements on the inverse diagonal of the quantum gate matrix, U 0m represents the element in the 0th row and the mth column of the quantum gate matrix, U m0 Represents the element in the mth row and 0th column of the quantum gate matrix; The single-bit controlled quantum gate matrix multiplication rule is as follows: in, It means that the quantum state matrix after dimension change is obtained by dimension change processing of the latest quantum state vector according to the quantum bit information of an operation. represents the quantum state of the 1st row and 0th column after dimension change, represents the quantum state of the 1st row and 0th column after dimension change, Represents the quantum state of the 1st row and nth column after dimension change; The multiplication rule of the diagonal quantum gate matrix containing control bits is as follows: Among them, U cc represents the element in the cth row and cth column of the quantum gate matrix, with the subscript In To control the number of qubits, It means that the quantum state matrix after dimension change is obtained by dimension change processing of the latest quantum state vector according to the quantum bit information of an operation. It represents the quantum state of row 0 and column 0 corresponding to the action control quantum bit being 0. It represents the quantum state of the 0th row and the nth column corresponding to the action control quantum bit being 0, It represents the quantum state of the c-1th row and the 0th column corresponding to the action control quantum bit being 0. It represents the quantum state of the c-1th row and nth column corresponding to the action control quantum bit being 0. It represents the quantum state of the cth row and the 0th column corresponding to the action control quantum bit being 1. It represents the quantum state of the cth row and nth column corresponding to the action control quantum bit being 1. It represents the quantum state of the mth row and 0th column corresponding to the action control quantum bit being 1. It represents the quantum state of the mth row and nth column corresponding to the action control quantum bit being 1. Indicates that the quantum gate controls the quantum bit to 1. It means that the quantum gate controls the quantum bit to 0; The matrix multiplication rule of the inverse diagonal quantum gate containing control bits is as follows: Among them, U cm represents the element in the cth row and mth column of the quantum gate matrix, U mc Represents the element in the mth row and cth column of the quantum gate matrix; The single target bit quantum gate matrix multiplication rule is as follows: in, It means that the dimension-changed quantum state matrix is ​​obtained by performing dimension-changed processing on the latest quantum state vector according to the quantum bit information of an operation; The quantum exchange gate matrix multiplication rule is as follows: in, represents a quantum gate matrix of the quantum commutation gate matrix type, U 12 represents the element in the first row and second column of the quantum gate matrix, U 21 represents the element in the 2nd row and 1st column of the quantum gate matrix, It means that the quantum state matrix after dimension change is obtained by dimension change processing of the latest quantum state vector according to the quantum bit information of an operation. represents the quantum state of the 1st row and 0th column after dimension change, represents the quantum state of the 1st row and nth column after dimension change, represents the quantum state of the 2nd row and 0th column after dimension change, represents the quantum state of the 2nd row and nth column after dimension change, represents the quantum state of the 3rd row and 0th column after dimension change, Represents the quantum state of the 3rd row and nth column after dimension change; The composite two-bit quantum gate matrix multiplication rule is as follows: Among them, U 03 represents the element in row 0 and column 3 of the quantum gate matrix, U 11 represents the element in the first row and first column of the quantum gate matrix, U 12 represents the element in the first row and second column of the quantum gate matrix, U 21 represents the element in the second row and first column of the quantum gate matrix, U 22 represents the element in the second row and second column of the quantum gate matrix, U 30 represents the element in row 3 and column 0 of the quantum gate matrix, U 33 Represents the element in the 3rd row and 3rd column of the quantum gate matrix; The diagonal composite two-bit quantum gate matrix multiplication rule is as follows: Among them, U 01 represents the element in row 0 and column 1 of the quantum gate matrix, U 10 represents the element in row 1 and column 0 of the quantum gate matrix, U 23 represents the element in the second row and third column of the quantum gate matrix, U 32 Represents the element in the 3rd row and 2nd column of the quantum gate matrix; The controllable composite two-bit quantum gate matrix multiplication rule is as follows:

8. The method according to claim 1, characterized in that The step S5 includes randomly sampling each of the multiple final quantum state vectors to obtain multiple sampling results, wherein the random sampling method includes: According to the complex number of the quantum state corresponding to each element position in the final quantum state vector, the probability value of the quantum state at that position being sampled is calculated; Perform a random sampling according to the probability value corresponding to the quantum state of each element position, and obtain a sampling result including the sampled quantum state and the quantum bit position where the quantum state is located; The probability distribution is obtained in the following manner: The number of times the quantum state of each element position is sampled is counted according to multiple sampling results, and the probability distribution of the quantum state is obtained according to the ratio of the number of times the quantum state of each element position is sampled to the total number of sampling times.

9. A quantum circuit simulation device implemented based on the method according to any one of claims 1 to 8, characterized in that: The device comprises: A quantum circuit building module, used to generate data structure information of a quantum circuit, including multiple quantum bits and multiple quantum gates; A quantum operation building module, used to build multiple quantum gate operation queues for a quantum circuit, each queue including multiple operations and the quantum gates acted on by each operation; A quantum gate storage module, used to store quantum gate information and call quantum gate information according to the quantum gate acted on by the operation, including a quantum gate matrix; A quantum circuit simulation module, for initializing a quantum state vector according to a plurality of quantum bits, and using a plurality of queues to process the initialized quantum state vectors respectively to obtain a plurality of final quantum state vectors, including processing the initialized quantum state vector by executing all operations of each queue to obtain a final quantum state vector, and randomly sampling quantum states in the plurality of final quantum state vectors to obtain sampling results, and obtaining a probability distribution of the quantum state according to the sampling results; A matrix multiplication operation module is used to pre-build multiple types of matrix multiplication rules for quantum gate matrix types of multiple quantum gates, wherein the multiplication rule includes multiplying the elements corresponding to the non-zero element positions in the quantum gate matrix with the elements at the multiplication positions of another matrix, and when executing each operation of all operations in each queue, according to the quantum gate matrix type of the quantum gate corresponding to each operation, the multiplication operation between the quantum gate matrix and the latest quantum state vector is performed according to the matrix multiplication rule constructed for the type to obtain an updated quantum state vector.

10. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and the computer program can be executed by a processor to implement the steps of the method according to any one of claims 1 to 8.

11. An electronic device, characterized in that: include: one or more processors; as well as A memory, wherein the memory is used to store executable instructions; The one or more processors are configured to implement the steps of the method of any one of claims 1 to 8 by executing the executable instructions.

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