Semiconductor structure, method for preparing semiconductor structure and semiconductor device

Abstract

The present application provides a semiconductor structure, a method for preparing the semiconductor structure, and a semiconductor device, wherein the semiconductor structure comprises: a substrate; a first epitaxial layer, located on the surface of the substrate, the first epitaxial layer comprising an epitaxial layer body and a groove, the groove being located in the epitaxial layer body; a second epitaxial layer, located at least in a portion of the groove, the doping type of the second epitaxial layer being different from the doping type of the first epitaxial layer. The present application solves the problem in the prior art that the doping concentration distribution of the doping region formed by ion implantation in the SIC diode leads to a weak high voltage resistance capability of the device.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor structure, a method for preparing the semiconductor structure, and a semiconductor device. Background Art

[0002] Power diodes are key components of circuit systems. They are expanding in two important directions: (1) They are developing towards tens of millions or even tens of thousands of amperes, and can be used in high-temperature arc wind tunnels, resistance welding machines and other occasions; (2) The reverse recovery time is getting shorter and shorter, showing a trend towards ultra-fast, ultra-soft, and ultra-durable development, making them not only used in rectification occasions, but also playing different roles in various switching circuits. In order to meet the requirements of low power consumption, high frequency, high temperature, miniaturization and other applications, the withstand voltage, on-resistance, turn-on voltage drop, reverse recovery characteristics, high temperature characteristics, etc. are getting higher and higher.

[0003] Commonly used diodes include ordinary rectifier diodes, Schottky diodes, and PIN (Positive-Intrinsic-Negative) diodes. They have their own characteristics when compared with each other: Schottky rectifiers have lower on-state voltage drop, larger leakage current, and almost zero reverse recovery time. PIN diodes have faster reverse recovery time and smaller leakage current, but their on-state voltage drop is very high.

[0004] At present, with the development of microelectronic devices towards low power consumption, high voltage resistance and high reliability, the requirements for semiconductor materials are gradually increasing. Microelectronic devices are increasingly used in special environments such as high temperature, high radiation, high frequency and high power. In order to meet the application of microelectronic devices in the fields of high temperature resistance and radiation resistance, new semiconductor materials need to be developed to maximize the performance of microelectronic devices. Traditional silicon devices and gallium arsenide devices limit the improvement of device and system performance. The third-generation semiconductor materials represented by silicon carbide (SiC) and gallium nitride (GaN) have become ideal semiconductor materials for making high temperature resistant, high power and radiation resistant electronic devices due to the advantages of the wide bandgap and high critical breakdown electric field of the materials themselves. The SiC-based devices currently being studied include high temperature and power SiC devices, microwave and high frequency SiC devices, SiC optoelectronic devices, radiation resistant devices, etc. The critical breakdown field strength of SiC materials is 10 times that of Si materials, the bandgap and thermal conductivity of SiC are both 3 times that of Si materials, and the concentration of intrinsic carriers is only one-tenth of that of silicon materials. These excellent physical properties make semiconductor power devices made of SiC materials have great advantages in high frequency, high temperature, high power and high radiation environments. SiC can form different crystal structures under different environments. The three commonly used crystal structures are 3C-SiC, 4H-SiC and 6H-SiC. 4H-SiC material has become the mainstream material for manufacturing semiconductor devices due to its higher bandgap width and hole mobility and lower intrinsic carrier concentration.

[0005] At present, the SIC diode device structure has not been optimized according to the material characteristics of SIC, resulting in no obvious performance advantage over Si devices in some parameters. In terms of process flow, the SIC diode has adopted the traditional process of Si diode. Affected by the material characteristics of SIC, the process flow is complicated and requires the use of special equipment (for Al ion implantation, special implantation equipment is required). The production cost is high, and the doping concentration distribution of the doped area formed by the implantation is uneven, resulting in the device's weak high-voltage resistance.

[0006] The above information disclosed in the background technology section is only used to enhance the understanding of the background technology of the technology described in this article. Therefore, the background technology may contain certain information that does not form the prior art known in this country for those skilled in the art. Summary of the invention

[0007] The main purpose of the present application is to provide a semiconductor structure, a method for preparing the semiconductor structure and a semiconductor device, so as to solve the problem in the prior art that the doping concentration distribution of the doping region of the SIC diode formed by ion implantation is uneven, resulting in the device having a weak high-voltage resistance.

[0008] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a semiconductor structure is provided, including: a substrate; a first epitaxial layer, located on the surface of the substrate, the first epitaxial layer including an epitaxial layer body and a groove, the groove being located in the epitaxial layer body; a second epitaxial layer, located at least in part of the groove, the doping type of the second epitaxial layer being different from the doping type of the first epitaxial layer.

[0009] Optionally, the semiconductor structure further includes: a third epitaxial layer, located on a surface of the second epitaxial layer away from the substrate, the doping type of the third epitaxial layer being the same as the doping type of the second epitaxial layer, and the doping concentration of the third epitaxial layer being less than the doping concentration of the second epitaxial layer.

[0010] Optionally, the second epitaxial layer includes a first portion and a second portion, the first portion is located in part of the trench, the second portion is located on a partial surface of the epitaxial layer body away from the substrate, and the third epitaxial layer is located on a surface of the first portion away from the substrate.

[0011] Optionally, the second portion includes a first sub-portion and a second sub-portion, and the first sub-portion and the second sub-portion are respectively located on two sides of the groove.

[0012] Optionally, the semiconductor structure further includes: a first metal layer located on a surface of the third epitaxial layer away from the substrate and between the first sub-portion and the second sub-portion; and a second metal layer covering the epitaxial layer body, the first metal layer and the second portion.

[0013] Optionally, the semiconductor structure further includes: a back metal layer located on a surface of the substrate away from the first epitaxial layer.

[0014] Optionally, the sum of the thickness of the second epitaxial layer and the thickness of the third epitaxial layer is 1 μm-3 μm, and the thickness of the second epitaxial layer is less than the thickness of the third epitaxial layer.

[0015] Optionally, a material of the first metal layer is different from a material of the second metal layer.

[0016] Optionally, the doping concentration of the second epitaxial layer is 1E18cm -3 -1E21cm -3 The doping concentration of the third epitaxial layer is 1E18cm -3 -1E21cm -3 .

[0017] According to another aspect of the present application, a method for preparing any one of the semiconductor structures described is provided, comprising: providing a substrate; forming a first preliminary epitaxial layer on the surface of the substrate; removing part of the first preliminary epitaxial layer to obtain a groove, and the remaining first preliminary epitaxial layer forms an epitaxial layer body, and the epitaxial layer body and the groove constitute a first epitaxial layer; filling at least part of the trench to obtain a second epitaxial layer, and the doping type of the second epitaxial layer is different from the doping type of the first epitaxial layer.

[0018] Optionally, after obtaining the second epitaxial layer, the method further includes: forming a third epitaxial layer on a surface of the second epitaxial layer away from the substrate, the doping type of the third epitaxial layer being the same as the doping type of the second epitaxial layer, and the doping concentration of the third epitaxial layer being less than the doping concentration of the second epitaxial layer.

[0019] Optionally, at least part of the groove is filled to obtain a second epitaxial layer, including: forming a second preliminary epitaxial layer on the surface of the first epitaxial layer away from the substrate; removing part of the second preliminary epitaxial layer, and the remaining second preliminary epitaxial layer constitutes a second epitaxial layer, the second epitaxial layer includes a first part and a second part, the first part is located in part of the groove, and the second part is located on the surface of the epitaxial layer body away from the substrate, and a third epitaxial layer is formed on the surface of the second epitaxial layer away from the substrate, including: forming the third epitaxial layer on the surface of the first part away from the substrate.

[0020] According to another aspect of the present application, a semiconductor device is provided, comprising any one of the semiconductor structures described above, or a semiconductor structure prepared by any one of the methods for preparing the semiconductor structure described above.

[0021] According to the technical solution of the present application, the semiconductor structure includes a substrate, a first epitaxial layer including an epitaxial layer body and a groove, and a second epitaxial layer located at least in a part of the groove, wherein the first epitaxial layer is located on the surface of the substrate, the groove is located in the epitaxial layer body, and the doping type of the second epitaxial layer is different from the doping type of the first epitaxial layer. Compared with the problem that the doping concentration distribution of the doping region formed by ion implantation in the SIC diode in the prior art is uneven, resulting in a weak high-voltage resistance of the device, the semiconductor structure in the present application includes a substrate, a first epitaxial layer and a second epitaxial layer, a groove is provided in the first epitaxial layer, and a second epitaxial layer with a doping type different from that of the first epitaxial layer is directly filled in the groove, and a "groove + epitaxial" structure is adopted, which replaces the ion implantation region in the SIC diode in the prior art, thereby ensuring a low production cost, and directly filling the second epitaxial layer in the groove, ensuring a relatively uniform doping concentration distribution of the second epitaxial layer, thereby ensuring a strong high-voltage resistance of the device and ensuring a good performance of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0023] Figure 1 A schematic cross-sectional structure diagram of a semiconductor structure provided according to an embodiment of the present application is shown;

[0024] Figure 2 A schematic flow chart of a method for preparing a semiconductor structure provided according to an embodiment of the present application is shown;

[0025] Figures 3 to 8The schematic diagrams respectively show the structure of a method for preparing a semiconductor structure after each process step according to an embodiment of the present application.

[0026] The above drawings include the following reference numerals:

[0027] 10. Substrate; 11. First epitaxial layer; 111. Epitaxial layer body; 112. Groove; 12. Second epitaxial layer; 13. Third epitaxial layer; 121. First part; 122. Second part; 1221. First sub-part; 1222. Second sub-part; 14. First metal layer; 15. Second metal layer; 16. Back metal layer; 17. Second preliminary epitaxial layer. DETAILED DESCRIPTION

[0028] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0029] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0030] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be intermediate elements. Moreover, in the specification and claims, when it is described that an element is "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element through a third element.

[0031] As introduced in the background technology, in the prior art, the doping concentration distribution of the doping region of the SIC diode formed by ion implantation is uneven, resulting in a weak high-voltage resistance capability of the device. To solve the above problem, the embodiments of the present application provide a semiconductor structure, a method for preparing a semiconductor structure, and a semiconductor device.

[0032] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0033] The present application embodiment provides a semiconductor structure, such as Figure 1 As shown, including:

[0034] Substrate 10;

[0035] A first epitaxial layer 11 is located on the surface of the substrate 10. The first epitaxial layer 11 includes an epitaxial layer body 111 and a groove 112. The groove 112 is located in the epitaxial layer body 111.

[0036] The second epitaxial layer 12 is at least located in a portion of the trench 112 , and the doping type of the second epitaxial layer 12 is different from the doping type of the first epitaxial layer 11 .

[0037] Through the above embodiments, the semiconductor structure includes a substrate, a first epitaxial layer including an epitaxial layer body and a groove, and a second epitaxial layer located at least in a portion of the groove, wherein the first epitaxial layer is located on the surface of the substrate, the groove is located in the epitaxial layer body, and the doping type of the second epitaxial layer is different from the doping type of the first epitaxial layer. Compared with the problem that the doping concentration distribution of the doping region formed by ion implantation in the SIC diode in the prior art is uneven, resulting in a weak high-voltage resistance of the device, the semiconductor structure in the present application includes a substrate, a first epitaxial layer and a second epitaxial layer, a groove is provided in the first epitaxial layer, and a second epitaxial layer with a doping type different from that of the first epitaxial layer is directly filled in the groove, and a "groove + epitaxial" structure is adopted, which replaces the ion implantation region in the SIC diode in the prior art, ensures a low production cost, and directly fills the second epitaxial layer in the groove, ensures that the doping concentration distribution of the second epitaxial layer is relatively uniform, thereby ensuring that the high-voltage resistance of the device is strong and the performance of the device is good.

[0038] In addition, the ion implantation depth in the prior art is generally shallow, while the second epitaxial layer of the present application is directly filled in the groove, which can ensure that the groove is set deeper, thereby ensuring that the depth of the second epitaxial layer is deeper, ensuring that the width of the depletion layer is larger, and further ensuring that the device has better voltage resistance.

[0039] Specifically, the doping type of the substrate is the same as the doping type of the first epitaxial layer, and the doping concentration of the substrate is greater than the doping concentration of the first epitaxial layer.

[0040] In the embodiment of the present application, the doping type of the substrate is N-type, the doping type of the first epitaxial layer is N-type, and the doping type of the second epitaxial layer is P-type.

[0041] Specifically, there are a plurality of the grooves, and the plurality of grooves are spaced apart in a predetermined direction, and the predetermined direction is a direction perpendicular to the thickness of the substrate. Figure 2 As shown, there are two grooves 112, and the two grooves 112 are spaced apart in the predetermined direction.

[0042] In one alternative, Figure 1As shown, the semiconductor structure further includes: a third epitaxial layer 13, which is located on the surface of the second epitaxial layer 12 away from the substrate 10, the doping type of the third epitaxial layer 13 is the same as the doping type of the second epitaxial layer 12, and the doping concentration of the third epitaxial layer 13 is less than the doping concentration of the second epitaxial layer 12. In this embodiment, the third epitaxial layer is located on the surface of the second epitaxial layer away from the substrate, and the doping concentration of the third epitaxial layer is less than the doping concentration of the second epitaxial layer, which further ensures that the width of the depletion region is large, further ensures that the device has a strong high voltage resistance, and further ensures that the performance of the device is good.

[0043] In the embodiment of the present application, the doping type of the third epitaxial layer is P type.

[0044] In other embodiments, Figure 1 As shown, the second epitaxial layer 12 includes a first portion 121 and a second portion 122, the first portion 121 is located in part of the trench 112, the second portion 122 is located on a portion of the surface of the epitaxial layer body 111 away from the substrate 10, and the third epitaxial layer 13 is located on a surface of the first portion 121 away from the substrate. In this embodiment, the second epitaxial layer includes a first portion and a second portion, the first portion is located in the trench, the second portion is located on a portion of the surface of the epitaxial layer body, and the third epitaxial layer is located on the surface of the first portion, which further ensures that the width of the depletion layer is wider, thereby further ensuring that the high voltage resistance capability is stronger.

[0045] Specifically, the shallow P-type epitaxial region (the second portion) and the deep P-type epitaxial region (the first portion and the third epitaxial layer) are combined to significantly reduce the leakage current of the device.

[0046] According to some exemplary embodiments of the present application, Figure 1 As shown, the second portion 122 includes a first sub-portion 1221 and a second sub-portion 1222, and the first sub-portion 1221 and the second sub-portion 1222 are respectively located on both sides of the trench 112. In this embodiment, the second portion includes a first sub-portion and a second sub-portion, and the first sub-portion and the second sub-portion are respectively located on both sides of the trench, which ensures that the depletion region is distributed more evenly, and further ensures that the device has a strong high-voltage resistance capability.

[0047] According to other exemplary embodiments of the present application, Figure 1As shown, the semiconductor structure further includes: a first metal layer 14, which is located on the surface of the third epitaxial layer 13 away from the substrate 10, and is located between the first sub-portion 1221 and the second sub-portion 1222; and a second metal layer 15, which covers the epitaxial layer body 111, the first metal layer 14, and the second portion 122. In this embodiment, the first metal layer is located on the surface of the third epitaxial layer away from the substrate, so that the first metal layer forms an ohmic contact with the third epitaxial layer, and the second metal layer covers the epitaxial layer body, the first metal layer, and the second portion, so that the second metal layer forms a Schottky contact with the surface of the epitaxial layer body away from the substrate, thereby ensuring that the device has a strong surge resistance, a low forward voltage drop, and further ensuring good performance of the device.

[0048] Specifically, the material of the first metal layer includes nickel, and the material of the second metal layer includes but is not limited to titanium and aluminum.

[0049] Some optional solutions of this application, such as Figure 1 As shown, the semiconductor structure further includes: a back metal layer 16, which is located on the surface of the substrate 10 away from the first epitaxial layer 11. In this embodiment, the back metal layer is located on the surface of the substrate away from the first epitaxial layer, so that the back metal layer forms an ohmic contact with the substrate, ensuring that the on-resistance of the device is small, and further ensuring that the performance of the device is good.

[0050] Specifically, the material of the back metal layer includes but is not limited to titanium, nickel and silver.

[0051] In other embodiments, the sum of the thickness of the second epitaxial layer and the thickness of the third epitaxial layer is 1 μm-3 μm, and the thickness of the second epitaxial layer is less than the thickness of the third epitaxial layer. In this embodiment, the sum of the thickness of the first epitaxial layer and the second epitaxial layer is 1 μm-3 μm, and the thickness of the second epitaxial layer is less than the thickness of the third epitaxial layer, which further ensures that the device has a strong withstand voltage capability, further ensures that the leakage current of the device is small, and thus further ensures that the performance of the device is good.

[0052] In some other optional solutions of the present application, the material of the first metal layer is different from the material of the second metal layer. In this embodiment, the material of the first metal layer is different from the material of the second metal layer, which further ensures that the electrical performance of the device is good.

[0053] In some other optional solutions of the present application, the doping concentration of the second epitaxial layer is 1E18cm -3 -1E21cm -3 The doping concentration of the third epitaxial layer is 1E18cm -3 -1E21cm -3In this embodiment, the doping concentration range of the second epitaxial layer and the third epitaxial layer is 1E18cm -3 -1E21cm -3 , further ensuring that the device has strong high voltage resistance.

[0054] Figure 2 1 is a flow chart of a method for preparing a semiconductor structure according to an embodiment of the present application. Figure 2 As shown, the method comprises the following steps:

[0055] Step S101, as Figure 3 As shown, a substrate 10 is provided;

[0056] Step S102, as Figure 3 As shown, a first preliminary epitaxial layer (not shown) is formed on the surface of the substrate 10;

[0057] Step S103, as Figure 3 As shown, part of the first preliminary epitaxial layer is removed to obtain a groove 112, and the remaining first preliminary epitaxial layer forms an epitaxial layer body 111, and the epitaxial layer body 111 and the groove 112 constitute the first epitaxial layer 11;

[0058] Step S104, as Figure 5 As shown, at least a portion of the trench 112 is filled to obtain a second epitaxial layer 12 , and the doping type of the second epitaxial layer 12 is different from the doping type of the first epitaxial layer 11 .

[0059] Through this embodiment, a substrate is first provided, and then a first preliminary epitaxial layer is formed on the surface of the substrate, and then part of the first preliminary epitaxial layer is removed to obtain a groove, and the remaining first preliminary epitaxial layer forms an epitaxial layer body, and the epitaxial layer body and the groove constitute a first epitaxial layer, and finally at least part of the groove is filled to obtain a second epitaxial layer of a different doping type from the first epitaxial layer. Compared with the problem that the doping concentration distribution of the doping region formed by ion implantation in the SIC diode in the prior art is uneven, resulting in a weak high-voltage resistance of the device, the semiconductor structure in the present application includes a substrate, a first epitaxial layer and a second epitaxial layer, a groove is set in the first epitaxial layer, and the second epitaxial layer of a different doping type from the first epitaxial layer is directly filled in the groove, and the "groove + epitaxy" method is adopted to replace the ion implantation region in the SIC diode in the prior art, and no ion implantation is required, which ensures that the preparation process is simpler, the production cost is lower, and the second epitaxial layer is directly filled in the groove, which ensures that the doping concentration distribution of the second epitaxial layer is more uniform, thereby ensuring that the device has a strong high-voltage resistance and better performance.

[0060] In addition, the ion implantation depth in the prior art is generally shallow, while the second epitaxial layer of the present application is directly filled in the groove, which can ensure that the groove is set deeper, thereby ensuring that the depth of the second epitaxial layer is deeper, ensuring that the width of the depletion layer is larger, and further ensuring that the device has better voltage resistance.

[0061] Specifically, the doping type of the substrate is the same as the doping type of the first epitaxial layer, and the doping concentration of the substrate is greater than the doping concentration of the first epitaxial layer.

[0062] In the embodiment of the present application, the doping type of the substrate is N-type, the doping type of the first epitaxial layer is N-type, and the doping type of the second epitaxial layer is P-type.

[0063] Specifically, removing part of the first preliminary epitaxial layer includes: performing dry etching on the first preliminary epitaxial layer to remove part of the first preliminary epitaxial layer.

[0064] Specifically, there are a plurality of the grooves, and the plurality of grooves are spaced apart in a predetermined direction, and the predetermined direction is a direction perpendicular to the thickness of the substrate. Figure 3 As shown, there are two grooves 112, and the two grooves 112 are spaced apart in the predetermined direction.

[0065] In some optional solutions of the present application, after obtaining the second epitaxial layer, the above method further includes: Figure 6 As shown, a third epitaxial layer 13 is formed on the surface of the second epitaxial layer 12 away from the substrate 10, the doping type of the third epitaxial layer 13 is the same as the doping type of the second epitaxial layer 12, and the doping concentration of the third epitaxial layer 13 is less than the doping concentration of the second epitaxial layer 12. In this embodiment, the third epitaxial layer is formed on the surface of the second epitaxial layer away from the substrate, and the doping concentration of the third epitaxial layer is less than the doping concentration of the second epitaxial layer, which further ensures that the preparation process is relatively simple, further ensures that the production cost is low, further ensures that the width of the depletion region is large, further ensures that the device has a strong high voltage resistance, and further ensures that the performance of the device is good.

[0066] In the embodiment of the present application, the doping type of the third epitaxial layer is P type.

[0067] In some other optional schemes of this application, such as Figure 4 and Figure 5As shown, at least a portion of the trench 112 is filled to obtain a second epitaxial layer 12, including: forming a second preliminary epitaxial layer 17 on the surface of the first epitaxial layer 11 away from the substrate 10; removing a portion of the second preliminary epitaxial layer 17, and the remaining second preliminary epitaxial layer 17 constitutes the second epitaxial layer 12, the second epitaxial layer 12 includes a first portion 121 and a second portion 122, the first portion 121 is located in a portion of the trench 112, and the second portion 122 is located on a portion of the surface of the epitaxial layer body 111 away from the substrate 10, as shown in FIG. Figure 6 As shown, forming the third epitaxial layer 13 on the surface of the second epitaxial layer 12 away from the substrate 10 includes: forming the third epitaxial layer 13 on the surface of the first part 121 away from the substrate 10. In this embodiment, the second epitaxial layer includes a first part and a second part, the first part is located in the groove, the second part is located on a part of the surface of the epitaxial layer body, and the third epitaxial layer is located on the surface of the first part, which further ensures that the width of the depletion layer is wide, thereby further ensuring that the high voltage resistance capability is strong.

[0068] Specifically, removing part of the second preliminary epitaxial layer includes: removing the second preliminary epitaxial layer on a part of the surface of the epitaxial layer body away from the substrate and the second preliminary epitaxial layer on the sidewall of the trench.

[0069] Specifically, Figure 5 As shown, the second portion 122 includes a first sub-portion 1221 and a second sub-portion 1222, and the first sub-portion 1221 and the second sub-portion 1222 are respectively located on both sides of the trench 112. This ensures that the depletion region is distributed more evenly, and further ensures that the device has a stronger high-voltage resistance capability.

[0070] In other embodiments, after forming the third epitaxial layer on the surface of the first portion away from the substrate, the method further comprises: Figure 7 As shown, a first metal layer 14 is formed on the surface of the third epitaxial layer 13 away from the substrate 10, and the first metal layer 14 is located between the first sub-portion 1221 and the second sub-portion 1222; Figure 8 As shown, a second metal layer 15 is formed on the epitaxial layer body 111, the first metal layer 14 and the second portion 122. In this embodiment, the first metal layer is located on the surface of the third epitaxial layer away from the substrate, so that the first metal layer forms an ohmic contact with the third epitaxial layer, and the second metal layer covers the epitaxial layer body, the first metal layer and the second portion, so that the second metal layer forms a Schottky contact with the surface of the epitaxial layer body away from the substrate, which ensures that the device has a strong surge resistance, ensures that the forward voltage drop of the device is low, and further ensures that the performance of the device is good.

[0071] Specifically, a first preliminary metal layer is formed on a surface of the third epitaxial layer away from the substrate, and then the first preliminary metal layer is thermally annealed to obtain the first metal layer.

[0072] Specifically, a second preliminary metal layer is formed on the epitaxial layer body, the first metal layer and the second portion, and then the second preliminary metal layer is thermally annealed to obtain the second metal layer.

[0073] In other embodiments, after forming the second metal layer on the epitaxial layer body, the first metal layer and the second portion, the method further includes: Figure 1 As shown, a back metal layer 16 is formed on the surface of the substrate 10 away from the first epitaxial layer 11. In this embodiment, the back metal layer is located on the surface of the substrate away from the first epitaxial layer, so that the back metal layer forms an ohmic contact with the substrate, ensuring that the on-resistance of the device is small, and further ensuring that the performance of the device is good.

[0074] Specifically, the sum of the thickness of the second epitaxial layer and the thickness of the third epitaxial layer is 1 μm-3 μm, and the thickness of the second epitaxial layer is less than the thickness of the third epitaxial layer. The material of the first metal layer is different from the material of the second metal layer. The doping concentration of the second epitaxial layer is 1E18 cm -3 -1E21cm -3 The doping concentration of the third epitaxial layer is 1E18cm -3 -1E21cm -3 .

[0075] Specifically, the material of the first metal layer includes nickel, the material of the second metal layer includes but is not limited to titanium and aluminum, and the material of the back metal layer includes but is not limited to titanium, nickel and silver.

[0076] An embodiment of the present application further provides a semiconductor device, comprising any one of the above-mentioned semiconductor structures, or a semiconductor structure prepared by any one of the above-mentioned semiconductor structure preparation methods.

[0077] In the above embodiment, the semiconductor device includes a semiconductor structure, wherein the semiconductor structure includes a substrate, a first epitaxial layer including an epitaxial layer body and a groove, and a second epitaxial layer located at least in a portion of the groove, wherein the first epitaxial layer is located on the surface of the substrate, the groove is located in the epitaxial layer body, and the doping type of the second epitaxial layer is different from the doping type of the first epitaxial layer. Compared with the problem that the doping concentration distribution of the doping region formed by ion implantation in the SIC diode in the prior art is uneven, resulting in a weak high-voltage resistance of the device, the semiconductor structure in the present application includes a substrate, a first epitaxial layer and a second epitaxial layer, a groove is provided in the first epitaxial layer, and a second epitaxial layer with a doping type different from that of the first epitaxial layer is directly filled in the groove, and a "groove + epitaxial" structure is adopted, which replaces the ion implantation region in the SIC diode in the prior art, thereby ensuring a low production cost, and directly filling the second epitaxial layer in the groove ensures that the doping concentration distribution of the second epitaxial layer is relatively uniform, thereby ensuring a strong high-voltage resistance of the device and ensuring good performance of the device.

[0078] In the embodiment of the present application, the semiconductor device is a SIC diode.

[0079] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0080] 1) In the semiconductor structure of the present application, the semiconductor structure includes a substrate, a first epitaxial layer including an epitaxial layer body and a groove, and a second epitaxial layer located at least in a part of the groove, wherein the first epitaxial layer is located on the surface of the substrate, the groove is located in the epitaxial layer body, and the doping type of the second epitaxial layer is different from the doping type of the first epitaxial layer. Compared with the problem that the doping concentration distribution of the doping region formed by ion implantation in the SIC diode in the prior art is uneven, resulting in a weak high-voltage resistance of the device, the semiconductor structure in the present application includes a substrate, a first epitaxial layer and a second epitaxial layer, a groove is set in the first epitaxial layer, and a second epitaxial layer with a doping type different from that of the first epitaxial layer is directly filled in the groove, and a "groove + epitaxial" structure is adopted, which replaces the ion implantation region in the SIC diode in the prior art, ensuring a low production cost, and directly filling the second epitaxial layer in the groove, ensuring that the doping concentration distribution of the second epitaxial layer is relatively uniform, thereby ensuring that the device has a strong high-voltage resistance and good performance.

[0081] 2) In the preparation method of the semiconductor structure of the present application, a substrate is first provided, and then a first preliminary epitaxial layer is formed on the surface of the substrate, and then a portion of the first preliminary epitaxial layer is removed to obtain a groove, and the remaining first preliminary epitaxial layer forms an epitaxial layer body, and the epitaxial layer body and the groove constitute a first epitaxial layer. Finally, at least a portion of the trench is filled to obtain a second epitaxial layer with a doping type different from that of the first epitaxial layer. Compared with the problem in the prior art that the doping concentration distribution of the doped region of the SIC diode formed by ion implantation is uneven, resulting in a weak high-voltage resistance capability of the device, the semiconductor structure in the present application includes a substrate, a first epitaxial layer and a second epitaxial layer, a groove is provided in the first epitaxial layer, and a second epitaxial layer having a doping type different from that of the first epitaxial layer is directly filled in the groove, and a "trench + epitaxy" method is adopted to replace the ion implantation region in the SIC diode in the prior art, and ion implantation is no longer required, thereby ensuring a simpler preparation process and a lower production cost, and directly filling the second epitaxial layer in the groove ensures a more uniform doping concentration distribution of the second epitaxial layer, thereby ensuring a stronger high-voltage resistance capability of the device and better performance of the device.

[0082] 3) In the semiconductor device of the present application, the semiconductor device includes a semiconductor structure, wherein the semiconductor structure includes a substrate, a first epitaxial layer including an epitaxial layer body and a groove, and a second epitaxial layer located at least in a portion of the groove, wherein the first epitaxial layer is located on the surface of the substrate, the groove is located in the epitaxial layer body, and the doping type of the second epitaxial layer is different from the doping type of the first epitaxial layer. Compared with the problem that the doping concentration distribution of the doping region formed by ion implantation in the SIC diode in the prior art is uneven, resulting in a weak high-voltage resistance of the device, the semiconductor structure in the present application includes a substrate, a first epitaxial layer and a second epitaxial layer, a groove is provided in the first epitaxial layer, and a second epitaxial layer with a doping type different from that of the first epitaxial layer is directly filled in the groove, and a "groove + epitaxial" structure is adopted, which replaces the ion implantation region in the SIC diode in the prior art, ensures a low production cost, and directly fills the second epitaxial layer in the groove, ensures that the doping concentration distribution of the second epitaxial layer is relatively uniform, thereby ensuring that the device has a strong high-voltage resistance and good performance.

[0083] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A semiconductor structure, characterized in that: include: substrate; A first epitaxial layer, located on the surface of the substrate, the first epitaxial layer comprising an epitaxial layer body and a trench, wherein the trench is located in the epitaxial layer body; a second epitaxial layer, at least in a portion of the trench, wherein the doping type of the second epitaxial layer is different from the doping type of the first epitaxial layer, The semiconductor structure further includes: a third epitaxial layer located on a surface of the second epitaxial layer away from the substrate, the doping type of the third epitaxial layer being the same as the doping type of the second epitaxial layer, and the doping concentration of the third epitaxial layer being less than the doping concentration of the second epitaxial layer, The second epitaxial layer includes a first portion and a second portion, the first portion is located in a portion of the trench, the second portion is located on a portion of the surface of the epitaxial layer body away from the substrate, and the third epitaxial layer is located on a surface of the first portion away from the substrate. The second portion includes a first sub-portion and a second sub-portion, wherein the first sub-portion and the second sub-portion are respectively located on two sides of the groove. The semiconductor structure further comprises: A first metal layer, located on a surface of the third epitaxial layer away from the substrate and between the first sub-portion and the second sub-portion; a second metal layer covering the epitaxial layer body, the first metal layer and the second portion, The first metal layer forms an ohmic contact with the third epitaxial layer, and the second metal layer forms a Schottky contact with a surface of the epitaxial layer body away from the substrate.

2. The semiconductor structure according to claim 1, characterized in that: The semiconductor structure further comprises: A back metal layer is located on a surface of the substrate away from the first epitaxial layer.

3. The semiconductor structure according to claim 1, characterized in that: The sum of the thickness of the second epitaxial layer and the thickness of the third epitaxial layer is 1 μm-3 μm, and the thickness of the second epitaxial layer is less than the thickness of the third epitaxial layer.

4. The semiconductor structure according to claim 1, characterized in that: The material of the first metal layer is different from that of the second metal layer.

5. The semiconductor structure according to claim 1, characterized in that: The doping concentration of the second epitaxial layer is 1E18cm -3 -1E21cm -3 The doping concentration of the third epitaxial layer is 1E18cm -3 -1E21cm -3 .

6. A method for preparing a semiconductor structure according to any one of claims 1 to 5, characterized in that: include: providing a substrate; forming a first preliminary epitaxial layer on the surface of the substrate; Removing part of the first preliminary epitaxial layer to obtain a groove, and forming an epitaxial layer body with the remaining first preliminary epitaxial layer, wherein the epitaxial layer body and the groove constitute a first epitaxial layer; At least a portion of the trench is filled to obtain a second epitaxial layer, wherein the doping type of the second epitaxial layer is different from the doping type of the first epitaxial layer, After obtaining the second epitaxial layer, the method further includes: forming a third epitaxial layer on a surface of the second epitaxial layer away from the substrate, wherein the doping type of the third epitaxial layer is the same as the doping type of the second epitaxial layer, and the doping concentration of the third epitaxial layer is less than the doping concentration of the second epitaxial layer, Filling at least a portion of the trench to obtain a second epitaxial layer includes: forming a second preliminary epitaxial layer on a surface of the first epitaxial layer away from the substrate; removing a portion of the second preliminary epitaxial layer, and the remaining second preliminary epitaxial layer constitutes a second epitaxial layer, wherein the second epitaxial layer includes a first portion and a second portion, wherein the first portion is located in a portion of the trench, and the second portion is located on a portion of the surface of the epitaxial layer body away from the substrate, Forming a third epitaxial layer on a surface of the second epitaxial layer away from the substrate comprises: forming the third epitaxial layer on a surface of the first portion away from the substrate, The second portion includes a first sub-portion and a second sub-portion, wherein the first sub-portion and the second sub-portion are respectively located on two sides of the groove. After forming the third epitaxial layer on the surface of the first portion away from the substrate, the method further comprises: forming a first metal layer on the surface of the third epitaxial layer away from the substrate, the first metal layer being located between the first sub-portion and the second sub-portion; forming a second metal layer on the epitaxial layer body, the first metal layer and the second portion, The first metal layer forms an ohmic contact with the third epitaxial layer, and the second metal layer forms a Schottky contact with a surface of the epitaxial layer body away from the substrate.

7. A semiconductor device, characterized in that: A semiconductor structure comprising any one of claims 1 to 5, or a semiconductor structure prepared by the method for preparing a semiconductor structure according to claim 6.

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