Receiving device and communication interface
By introducing a comparison unit, a threshold switching unit and a failure protection unit into the receiving device, an effective signal output within the differential signal range is realized, which solves the problem of uncertain output state of the receiving device, reduces costs and improves driving capabilities.
Patent Information
- Application Number
- CN202411488061.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-24
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2044-10-24
AI Technical Summary
The failure protection function of the receiving device of the existing communication interface is limited, and it is impossible to effectively prevent abnormal open circuit or short circuit of the differential bus network, resulting in errors in receiving data.
A receiving device is designed, including a comparison unit, a threshold switching unit and a failure protection unit. When the comparison unit outputs an invalid signal, the failure protection unit controls the threshold switching unit to adjust the threshold value after a preset time, so that the differential signal is located at the first A valid signal is output between the threshold value and the second threshold value to avoid an uncertain output state of the receiving device.
The output uncertainty state of the receiving device is improved, the cost is reduced, the differential bus load is reduced, the potential offset caused by resistance is avoided, and the driving capability of the driving device is improved.
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Figure CN119011333B_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the technical field of communications, and in particular to a receiving device and a communication interface. Background Art
[0002] The communication interface includes a driving device and at least one receiving device, and the signal can be transmitted from the driving device to the receiving device through a differential bus. During the signal transmission process, the signal is easily interfered or damaged by various external factors on the transmission path. The output state of the receiving device is uncertain, and it is easy to receive data errors. At this time, the receiving device needs to have a failure protection function to characterize the abnormal open or short circuit state of the differential bus network. In the prior art, the failure protection function of the receiving device has certain limitations and cannot meet the needs of the receiving device. Summary of the invention
[0003] The present invention provides a receiving device and a communication interface to improve the failure protection function of the receiving device, enhance the performance of the receiving device and reduce the cost.
[0004] In a first aspect, an embodiment of the present invention provides a receiving device, which is applied to a communication interface; the receiving device includes a comparison unit, a threshold switching unit and a failure protection unit;
[0005] The input end of the threshold switching unit is used to input a differential signal, the output end of the threshold switching unit is connected to the input end of the comparison unit, the output end of the comparison unit serves as the output end of the receiving device, and the failure protection unit is connected between the output end of the comparison unit and the control end of the threshold switching unit; the threshold switching unit is used to provide an input signal to the comparison unit according to the differential signal; the comparison unit has a first threshold and a second threshold, and the failure protection unit is used to control the threshold switching unit to adjust the threshold of the comparison unit to the second threshold after a preset time when the comparison unit outputs an invalid comparison signal; wherein the first threshold is greater than the second threshold.
[0006] Optionally, the threshold switching unit includes a first voltage adjustment module, a second voltage adjustment module, a gating module and a current source;
[0007] The first end of the first voltage adjustment module is used to input the first voltage signal of the differential signal, the second end of the first voltage adjustment module is connected to the positive input end of the comparison unit and the first selection end of the selection module, the first end of the second voltage adjustment module is used to input the second voltage signal of the differential signal, the second end of the second voltage adjustment module is connected to the negative input end of the comparison unit and the second selection end of the selection module, the control end of the selection module is connected to the output end of the comparison unit through the failure protection unit, and the active end of the selection module is connected to the fixed potential end through the current source; the selection module is used to select the first selection end and the active end when the comparison signal is valid, and select the second selection end and the active end when the comparison signal is invalid; the first voltage adjustment module is used to adjust the input voltage of the positive input end of the comparison unit according to the first voltage signal when the first selection end and the active end are selected, and the second voltage adjustment module is used to adjust the input voltage of the negative input end of the comparison unit according to the second voltage signal when the second selection end and the active end are selected.
[0008] Optionally, the first voltage adjustment module includes a first resistor;
[0009] The first end of the first resistor is used to input the first voltage signal of the differential signal, and the second end of the first resistor is connected to the positive input end of the comparison unit and the first selection end of the selection module.
[0010] Optionally, the second voltage adjustment module includes a second resistor; the first end of the second resistor is used to input the second voltage signal of the differential signal, and the second end of the second resistor is connected to the negative input end of the comparison unit and the second enable end of the enable module.
[0011] Optionally, the equivalent impedance of the first voltage adjustment module is equal to the equivalent impedance of the second voltage adjustment module.
[0012] Optionally, the gating module includes a controllable single-pole double-throw switch; the first fixed end of the controllable single-pole double-throw switch serves as the first gating end of the gating module, the second fixed end of the controllable single-pole double-throw switch serves as the second gating end of the gating module, the active end of the controllable single-pole double-throw switch serves as the active end of the gating module, and the control end of the controllable single-pole double-throw switch serves as the control end of the gating module.
[0013] Optionally, the failure protection unit includes a delay module and a logic control module, the delay module is connected between the output end of the comparison unit and the second input end of the logic control module, and the delay module is used to output a valid delay signal after timing to a preset time when the comparison unit outputs an invalid comparison signal;
[0014] The first input end of the logic control module is connected to the output end of the comparison unit, and the output end of the logic control module is connected to the control end of the threshold switching unit. The logic control module is used to control the threshold switching unit to adjust the threshold of the comparison unit to a second threshold when at least one of the comparison signal and the delay signal output by the delay module is valid.
[0015] Optionally, the logic control module includes an OR gate, the first input end of the OR gate serves as the first input end of the logic control module, the second input end of the OR gate serves as the second input end of the logic control module, and the output end of the OR gate serves as the output end of the logic control module.
[0016] Optionally, the first threshold is greater than 0, and the second threshold is less than 0.
[0017] In a second aspect, an embodiment of the present invention further provides a communication interface, comprising a driving device and at least one receiving device as described in the first aspect; the driving device is connected to the receiving device via a differential bus.
[0018] The technical solution of the embodiment of the present invention is to control the threshold switching unit to adjust the threshold of the comparison unit from the first threshold to the second threshold after a preset time by setting the failure protection unit when the comparison unit outputs an invalid comparison signal, so that when the differential signal is between the first threshold and the second threshold, the comparison unit can output a valid comparison signal according to the differential signal and the second threshold, that is, the receiving device outputs a high-level receiving signal. Therefore, when the differential signal is greater than the second threshold and less than the first threshold, the output uncertainty state of the receiving device can be converted into a high-level receiving signal output by the receiving device, thereby improving the output uncertainty state of the receiving device. Moreover, the technical solution of this embodiment can improve the output uncertainty state of the receiving device through the threshold switching of a comparison unit, reduce the number of comparison units required by the receiving device, and thus reduce the cost of the receiving device. At the same time, it can avoid setting an additional resistor on the differential bus, reduce the load on the differential bus, avoid the potential offset phenomenon caused by the resistor, and improve the driving ability of the driving device connected to the receiving device. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 A schematic diagram of the structure of a communication interface provided for related technologies;
[0020] Figure 2 A schematic diagram of the structure of a receiving device provided by an embodiment of the present invention;
[0021] Figure 3 A logical schematic diagram of different signals of a receiving device provided by an embodiment of the present invention;
[0022] Figure 4 A schematic diagram of a threshold value of a differential signal defined by a communication protocol of an RS485 interface provided in an embodiment of the present invention;
[0023] Figure 5 A schematic diagram of the logic output level of a receiving device in an RS485 interface provided by an embodiment of the present invention;
[0024] Figure 6 A schematic diagram of the structure of another receiving device provided by an embodiment of the present invention;
[0025] Figure 7 A schematic diagram of the logic output level of a receiving device in an RS485 interface under interference provided by an embodiment of the present invention;
[0026] Figure 8 A schematic diagram of the structure of another receiving device provided by an embodiment of the present invention;
[0027] Fig. 9 A logical schematic diagram of different signals of another receiving device provided by an embodiment of the present invention;
[0028] Fig.10 A schematic diagram of the structure of a communication interface provided by an embodiment of the present invention;
[0029] Fig.11 A schematic diagram of the structure of another communication interface provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0030] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.
[0031] Figure 1 A schematic diagram of a communication interface structure provided for related technologies. Figure 1As shown, the driving device D1 and the receiving device R1 are connected via a differential bus. A pull-up resistor Rfs1 is provided on the input path A1 of the positive differential signal of the differential bus, a pull-down resistor Rfs2 is provided on the input path B1 of the negative differential signal of the differential bus, and a voltage-dividing resistor Rt is connected between the input path A1 of the positive differential signal and the input path B1 of the negative differential signal of the differential bus. When the driving device D1 is turned off, the voltage between the power supply terminal Vcc and the fixed potential terminal V1 is divided by the pull-up resistor Rfs1, the voltage-dividing resistor Rt and the pull-down resistor Rfs2, so that the voltage difference between the two ends of the voltage-dividing resistor Rt is greater than the differential bus voltage corresponding to the logic high defined by the communication protocol, so that the receiving device R1 outputs a logic high signal, avoiding the phenomenon that the output state of the receiving device R1 is uncertain when the driving device D1 is turned off. When an abnormal short circuit occurs in the differential bus, the voltage between the input path A1 of the positive differential signal and the input path B1 of the negative differential signal of the differential bus is still equal to 0, and the receiving device R1 cannot achieve failure protection at this time. Moreover, the additional pull-up resistor Rfs1 , the voltage-dividing resistor Rt, and the pull-down resistor Rfs2 increase the load of the differential bus and reduce the driving capability of the driving device D1 .
[0032] In view of the above technical problems, an embodiment of the present invention provides a receiving device, which is applied to a communication interface. When the communication interface performs signal transmission, the receiving device can output a high-level signal when the differential signal is greater than its positive threshold, output a low-level signal when the differential signal is less than its negative threshold, and output a high-level signal when the differential signal is greater than the negative threshold and less than the positive threshold, thereby avoiding the phenomenon of uncertain output state of the receiving device.
[0033] Figure 2 A schematic diagram of the structure of a receiving device provided by an embodiment of the present invention, Figure 3 A logic diagram of different signals of a receiving device provided by an embodiment of the present invention. Wherein, ab is a timing diagram of a differential signal, Comp is a timing diagram of a threshold value of a comparison unit, s is an output signal of a failure protection unit, r is a timing diagram of a signal output by the receiving device, and t' is a preset time. Figure 2 and Figure 3As shown, the receiving device includes a comparison unit 10, a threshold switching unit 20 and a failure protection unit 30; the input end of the threshold switching unit 20 is used to input a differential signal, the output end of the threshold switching unit 20 is connected to the input end of the comparison unit 10, the output end of the comparison unit 10 serves as the output end R of the receiving device, and the failure protection unit 30 is connected between the output end of the comparison unit 10 and the control end of the threshold switching unit 20; the threshold switching unit 20 is used to provide an input signal to the comparison unit 10 according to the differential signal; the comparison unit 10 has a first threshold value Vth1 and a second threshold value Vth2, and the failure protection unit 30 is used to control the threshold switching unit 20 to adjust the threshold of the comparison unit 10 to the second threshold value Vth2 after a preset time when the comparison unit 10 outputs an invalid comparison signal; wherein the first threshold value Vth1 is greater than the second threshold value Vth2.
[0034] Specifically, the differential signal may be transmitted by a differential bus. The input end of the threshold switching unit 20 may be an input end of a receiving device, for inputting the differential signal. Figure 2 exemplarily shows that the threshold switching unit 20 includes a first input terminal A and a second input terminal B. The first input terminal A of the threshold switching unit 20 can be connected to the positive output terminal of the driving device through a data transmission signal line of the differential bus, and is used to receive a first voltage signal of the differential signal, and the first voltage signal is a positive voltage signal. The second input terminal B of the threshold switching unit 20 can be connected to the negative output terminal of the driving device through another data transmission signal line of the differential bus, and is used to receive a second voltage signal of the differential signal, and the second voltage signal is a positive voltage signal. The threshold switching unit 20 can input a differential signal.
[0035] When the receiving device is applied to different communication interfaces, different communication interfaces have different communication protocols. Different communication protocols have different definitions of the threshold of the differential signal transmitted on the differential bus. The differential signal is the voltage difference between the two data transmission signal lines of the differential bus. For example, when the communication interface is an RS485 interface, Figure 4 A schematic diagram of a threshold value of a differential signal defined in a communication protocol of an RS485 interface provided in an embodiment of the present invention. Figure 5 The following is a schematic diagram of the logic output level of a receiving device in an RS485 interface provided by an embodiment of the present invention. Wherein, a is a voltage timing diagram of the first voltage signal in the differential signal, b is a voltage timing diagram of the second voltage signal in the differential signal, ab is a timing diagram of the differential signal input to the receiving device, and r is a signal timing diagram of the output of the receiving device. Figure 4 and Figure 5As shown, when the voltage of the differential signal of the differential bus is greater than the highest threshold 200mV defined by the communication protocol of the RS485 interface, the receiving device outputs a logic high signal 1. When the voltage of the differential signal of the differential bus is less than the lowest threshold -200mV defined by the communication protocol of the RS485 interface, the receiving device outputs a low signal 0. In other embodiments, the communication interface can also be an RS422 interface, a Low-Voltage Differential Signaling (LVDS) interface, and a Multipoint Low-Voltage Differential Signaling (MLVDS) interface, etc., which are not limited here.
[0036] The input terminal of the comparison unit 10 may include a positive input terminal + and a negative input terminal -. The first output terminal of the threshold switching unit 20 may be connected to the positive input terminal + of the comparison unit 10, and the second output terminal of the threshold switching unit 20 may be connected to the negative input terminal - of the comparison unit 10. The input signal formed by the threshold switching unit 20 according to the differential signal may also include a positive voltage signal and a negative voltage signal. The positive voltage signal of the input signal may be output to the positive input terminal + of the comparison unit 10 through the first output terminal of the threshold switching unit 20, and the negative voltage signal of the input signal may be output to the negative input terminal - of the comparison unit 10 through the second output terminal of the threshold switching unit 20. The threshold switching unit 20 may adjust the input signal output to the comparison unit 10 according to the differential signal and the threshold of the comparison unit 10.
[0037] The comparison unit 10 has a first threshold value Vth1 and a second threshold value Vth2, and the second threshold value Vth2 is less than the first threshold value Vth1. The first threshold value Vth1 may be a positive input threshold value of the receiving device, and the second threshold value Vth2 may be a negative input threshold value of the receiving device. The threshold switching unit 20 may adjust the positive voltage signal of the input signal to be the difference between the first voltage signal of the differential signal and the first threshold value Vth1, and the negative voltage signal of the input signal to be the second voltage signal of the differential signal, according to the comparison signal. When the comparison unit 10 outputs an invalid comparison signal, the threshold switching unit 20 may adjust the negative voltage signal of the input signal to be the sum of the second voltage signal of the differential signal and the second threshold value Vth2, according to the comparison signal, and the positive voltage signal of the input signal to be the first voltage signal of the differential signal.
[0038] The failure protection unit 30 can control the threshold switching unit 20 to adjust the threshold of the comparison unit 10 according to the state of the comparison signal. When the comparison unit 10 outputs a valid comparison signal, the failure protection unit 30 can control the threshold switching unit 20 to adjust the threshold of the comparison unit 10 to the second threshold Vth1 according to the valid comparison signal. When the comparison unit 10 outputs an invalid comparison signal, the failure protection unit 30 can start timing according to the invalid comparison signal, and control the threshold switching unit 20 to adjust the threshold of the comparison unit 10 to the second threshold Vth2 after a preset time.
[0039] The following takes low level as invalid and high level as valid as an example, and combines Figure 2 and Figure 3 Describe the working process of the receiving device.
[0040] In the first stage t11, the differential signal is less than the second threshold value Vth2, that is, the difference between the first voltage signal and the second voltage signal of the differential signal is less than the second threshold value Vth2. The potential of the positive input terminal of the comparison unit 10 is less than the potential of the negative input terminal of the comparison unit 10, and the comparison unit 10 outputs a low-level comparison signal, that is, an invalid comparison signal. That is, the receiving device outputs a low-level receiving signal. At this time, the failure protection unit 30 starts timing. Before the failure protection unit 30 times to the preset time, the failure protection unit 30 outputs an invalid failure protection signal to the threshold switching unit 20, and the threshold switching unit 20 maintains the threshold of the comparison unit 10 as the first threshold value Vth1 according to the invalid failure protection signal. The comparison unit 10 continuously outputs a low-level comparison signal. The duration of the first stage t1 is less than the preset time, so in the first stage t1, the threshold of the comparison unit 10 continues to be the first threshold value Vth1, and the failure protection signal output by the failure protection unit 30 continues to be low. The receiving signal output by the receiving device is low, so that the receiving device can receive the differential signal normally.
[0041] In the second stage t12, the differential signal is greater than the second threshold value Vth2 and less than the first threshold value Vth1, that is, the difference between the first voltage signal and the second voltage signal of the differential signal is greater than the second threshold value Vth2. The comparison unit 10 outputs a low-level comparison signal, that is, an invalid comparison signal. At this time, the receiving signal output by the receiving device is at a low level. The failure protection unit 30 starts timing. Before the failure protection unit 30 times to the preset time, the failure protection unit 30 outputs an invalid failure protection signal to the threshold switching unit 20, and the threshold switching unit 20 maintains the threshold of the comparison unit 10 at the first threshold value Vth1 according to the invalid failure protection signal. The comparison unit 10 continues to output a low-level comparison signal. The duration of the second stage t2 is less than the preset time, so in the second stage t2, the threshold of the comparison unit 10 continues to be the first threshold value Vth1, and the failure protection signal output by the failure protection unit 30 continues to be at a low level.
[0042] In the third stage t13, the differential signal is greater than the first threshold value Vth1, that is, the difference between the first voltage signal and the second voltage signal of the differential signal is greater than the first threshold value Vth1. The comparison unit 10 outputs a high-level comparison signal, that is, the receiving device outputs a high-level receiving signal. The failure protection unit 30 outputs a high-level failure protection signal according to the high-level comparison signal, and the threshold switching unit 20 adjusts the threshold of the comparison unit 10 to the second threshold value Vth2 according to the effective failure protection signal.
[0043] In the fourth stage t14, the differential signal is greater than the second threshold value Vth2 and less than the first threshold value Vth1, that is, the difference between the first voltage signal and the second voltage signal of the differential signal is greater than the second threshold value Vth2. The comparison unit 10 outputs a high-level comparison signal, that is, the receiving device outputs a high-level receiving signal. The failure protection unit 30 outputs a high-level failure protection signal according to the high-level comparison signal, and the threshold switching unit 20 maintains the threshold of the comparison unit 10 as the second threshold value Vth2 according to the effective failure protection signal. Therefore, when the differential signal is greater than the second threshold value Vth2 and less than the first threshold value Vth1, the output uncertainty state of the receiving device can be converted into a high-level receiving signal output by the receiving device, thereby improving the output uncertainty state of the receiving device. At the same time, it can avoid setting an additional resistor on the differential bus, reduce the load on the differential bus, avoid the potential offset phenomenon caused by the resistor, and improve the driving ability of the driving device connected to the receiving device.
[0044] In the fifth stage t15, when the differential signal is less than the second threshold value Vth2, the comparison unit 10 outputs a low-level comparison signal, that is, the receiving device outputs a low-level receiving signal. The failure protection unit 30 starts timing according to the low-level comparison signal. Before the failure protection unit 30 counts to the preset time t', the failure protection unit 30 outputs a low-level failure protection signal. The threshold switching unit 20 adjusts the threshold of the comparison unit 10 to the first threshold value Vth1 according to the invalid failure protection signal. When the differential signal changes to a value less than the first threshold value Vth1 and greater than the second threshold value Vth2, the comparison unit 10 continues to output a low-level comparison signal, and the failure protection unit 30 continues to count. When the failure protection unit 30 counts to the preset time t', the failure protection unit 30 outputs a high-level failure protection signal. The threshold switching unit 20 adjusts the threshold of the comparison unit 10 to the second threshold value Vth2 according to the valid failure protection signal, so that the comparison unit 10 outputs a high-level comparison signal according to the differential signal, that is, the receiving device outputs a high-level receiving signal. Therefore, when the differential signal is greater than the second threshold Vth2 and less than the first threshold Vth1, the uncertain output state of the receiving device can be converted into a receiving signal outputted by the receiving device at a high level, thereby improving the uncertain output state of the receiving device.
[0045] The technical solution of this embodiment is to control the threshold switching unit to adjust the threshold of the comparison unit from the first threshold to the second threshold after a preset time by setting the failure protection unit when the comparison unit outputs an invalid comparison signal, so that when the differential signal is between the first threshold and the second threshold, the comparison unit can output a valid comparison signal according to the differential signal and the second threshold, that is, the receiving device outputs a high-level receiving signal. Therefore, when the differential signal is greater than the second threshold and less than the first threshold, the output uncertainty state of the receiving device can be converted into a high-level receiving signal output by the receiving device, thereby improving the output uncertainty state of the receiving device. Moreover, the technical solution of this embodiment can improve the output uncertainty state of the receiving device through the threshold switching of a comparison unit, reduce the number of comparison units required by the receiving device, and thus reduce the cost of the receiving device. At the same time, it can avoid setting an additional resistor on the differential bus, reduce the load on the differential bus, avoid the potential shift phenomenon caused by the resistor, and improve the driving ability of the driving device connected to the receiving device.
[0046] Figure 6 A structural diagram of another receiving device provided by an embodiment of the present invention is shown in FIG. Figure 6 As shown, the threshold switching unit 20 includes a first voltage adjustment module 201, a second voltage adjustment module 202, a gating module 203 and a current source 204; the first end of the first voltage adjustment module 201 is used to input the first voltage signal of the differential signal, the second end of the first voltage adjustment module 201 is connected to the positive input terminal + of the comparison unit 10 and the first gating terminal K1 of the gating module 203, the first end of the second voltage adjustment module 202 is used to input the second voltage signal of the differential signal, the second end of the second voltage adjustment module 202 is connected to the negative input terminal - of the comparison unit 10 and the second gating terminal K2 of the gating module 203, and the control terminal T1 of the gating module 203 is connected to the negative input terminal - of the comparison unit 10 and the second gating terminal K2 of the gating module 203. The protection unit 30 is connected to the output end of the comparison unit 10, and the active end K3 of the selection module 203 is connected to the fixed potential end V0 through the current source 204; the selection module 203 is used to select the first selection end K1 and the active end K3 when the comparison signal is valid, and select the second selection end K2 and the active end K3 when the comparison signal is invalid; the first voltage adjustment module 201 is used to adjust the input voltage of the positive input end + of the comparison unit 10 according to the first voltage signal when the first selection end K1 and the active end K3 are selected, and the second voltage adjustment module 202 is used to adjust the input voltage of the negative input end - of the comparison unit 10 according to the second voltage signal when the second selection end K2 and the active end K3 are selected.
[0047] Specifically, the first end of the first voltage adjustment module 201 can be used as the first input terminal A of the threshold switching unit 20, for inputting the first voltage signal of the differential signal. The first end of the second voltage adjustment module 202 can be used as the second input terminal B of the threshold switching unit 20, for inputting the second voltage signal of the differential signal. The comparison unit 10 may include a comparator having a comparison function. When the comparison unit 10 performs signal comparison, the two input terminals of the comparison unit 10 may be set to have a "virtual short and virtual break" property. The current source 204 may provide a fixed current.
[0048] The control terminal T1 of the gating module 203 is connected to the output terminal of the comparison unit 10 through the fail-safe unit 30. Figure 3 and Figure 6 , when the failure protection unit 30 outputs a high-level failure protection signal, the gating module 203 controls the second gating terminal K2 to be connected to the active terminal K3 according to the high-level failure protection signal, and the first gating terminal K1 is disconnected from the active terminal K3. The second voltage adjustment module 202 has a current provided by the current source 204 passing through it, so that there is a voltage drop on the second voltage adjustment module 202. At the same time, no current passes through the first voltage adjustment module 201, so that there is no voltage drop on the first voltage adjustment module 201. At this time, the potential of the positive input terminal of the comparison unit 10 is the first voltage signal of the differential signal, and the potential of the negative input terminal of the comparison unit 10 is the difference between the second voltage signal of the differential signal and the voltage across the second voltage adjustment module 202. When the difference between the voltage at the positive input terminal + and the voltage at the negative input terminal - of the comparison unit 10 is greater than the negative value of the voltage across the second voltage adjustment module 202, the comparison signal output by the comparison unit 10 is flipped, that is, the second threshold value Vth2 of the comparison unit 10 is the negative value of the voltage across the second voltage adjustment module 202. At this time, the potential of the negative input terminal of the comparison unit 10 is the sum of the second voltage of the differential signal and the second threshold value Vth2, and the threshold of the comparison unit 10 is the second threshold value Vth2.
[0049] When the failure protection unit 30 outputs a low-level failure protection signal, the gating module 203 controls the first gating terminal K1 to be connected to the active terminal K3 and the second gating terminal K2 to be disconnected from the active terminal K3 according to the low-level failure protection signal. The first voltage adjustment module 201 has a current provided by the current source 204 passing through it, so that there is a voltage drop on the first voltage adjustment module 201. At the same time, no current passes through the second voltage adjustment module 202, so that there is no voltage drop on the second voltage adjustment module 202. At this time, the potential of the positive input terminal of the comparison unit 10 is the difference between the first voltage signal of the differential signal and the voltage at both ends of the first voltage adjustment module 201, and the potential of the negative input terminal of the comparison unit 10 is the second voltage signal of the differential signal. When the difference between the voltage at the positive input terminal + and the voltage at the negative input terminal - of the comparison unit 10 is greater than the voltage at both ends of the first voltage adjustment module 201, the comparison signal output by the comparison unit 10 is flipped, that is, the first threshold value Vth1 of the comparison unit 10 is the voltage at both ends of the first voltage adjustment module 201. At this time, the threshold value of the comparison unit 10 is the first threshold value Vth1.
[0050] In some embodiments, the first threshold Vth1 is greater than 0, and the second threshold Vth2 is less than 0.
[0051] Specifically, the first threshold Vth1 is greater than 0 and less than the highest threshold of the communication protocol, and the second threshold Vth2 is less than 0 and greater than the lowest threshold of the communication protocol, which can ensure that the hysteresis voltage of the receiving device is relatively large and improve the anti-interference ability of the receiving device. Among them, the hysteresis voltage is the difference between the first threshold Vth1 and the second threshold Vth2 of the receiving device. For example, the first threshold Vth1=120mV, the second threshold Vth2=-120mV, then the hysteresis voltage of the receiving device is Vhys=120–(-120)=240mV. When the communication interface is an RS485 interface, Figure 7 The following is a schematic diagram of the logic output level of a receiving device in an RS485 interface under interference provided by an embodiment of the present invention. Wherein, ab is a timing diagram of a differential signal input to the receiving device, and r is a timing diagram of a signal output from the receiving device. Figure 7 As shown, under the influence of interference, the jitter amplitude of the differential signal exceeds the range of the first threshold value Vth1 and the second threshold value Vth2 of the receiving device, and the receiving device will respond by outputting an erroneous receiving signal. Figure 7 In the interference stage t0, under the effect of interference, the voltage of the differential signal changes from a value less than the second threshold Vth2 to a value greater than the first threshold Vth1, and the received signal of the receiving device changes from a low level to an erroneous high level. Figure 1As shown, the threshold corresponding to the logic high of the receiving device R1 can also be set to be less than 0. At this time, when the driving device D1 is turned off or the differential bus is abnormally short-circuited, the voltage between the input path A1 of the positive differential signal and the input path B1 of the negative differential signal of the differential bus is equal to 0, which is greater than the threshold corresponding to the logic high of the receiving device R1, so that the receiving device R1 outputs a logic high signal, avoiding the output state uncertainty of the receiving device R1 when the driving device D1 is turned off or the differential bus is abnormally short-circuited. Since the threshold corresponding to the logic high of the receiving device R1 is less than 0, the threshold corresponding to the logic high of the receiving device R1 can only be limited between 0 and the voltage corresponding to the logic low defined by the communication protocol, which reduces the hysteresis voltage of the receiving device R1 and reduces the anti-interference ability of the receiving device R1. Exemplarily, when the communication interface is a serial communication standard (Recommended Standard 485, RS485) interface, the highest threshold defined by the communication protocol is 200mV and the lowest threshold is -200mV. At this time, the threshold corresponding to the logic high of the receiving device R1 can be set to -100mV, and the threshold corresponding to the logic low can be set to -120mV. When the driving device D1 is turned off or the differential bus is abnormally short-circuited, a high-level receiving signal can be output to avoid the uncertainty of the output state of the receiving device R1. At this time, the hysteresis voltage of the receiving device R1 is -100mV-(-120mV)=20mV, and the hysteresis voltage of the receiving device R1 is relatively small, which reduces the anti-interference ability of the receiving device R1. In this application, the first threshold Vth1 is greater than 0, and the second threshold Vth2 is less than 0. Compared with the hysteresis voltage range in the related art, it is increased by an order of magnitude, thereby improving the anti-interference ability of the receiving device.
[0052] Continue to refer Figure 6 , the first voltage adjustment module 201 includes a first resistor Rt1;
[0053] The first end of the first resistor Rt1 is used to input the first voltage signal of the differential signal, and the second end of the first resistor Rt1 is connected to the positive input terminal + of the comparison unit 10 and the first selection terminal K1 of the selection module 203 .
[0054] Continue to refer Figure 6 The second voltage adjustment module 202 includes a second resistor Rt2; the first end of the second resistor Rt2 is used to input the second voltage signal of the differential signal, and the second end of the second resistor Rt2 is connected to the negative input terminal - of the comparison unit 10 and the second selection terminal K2 of the selection module 203.
[0055] Specifically, when the first selection terminal K1 of the selection module 203 is connected to the active terminal K3, and the second selection terminal K2 is disconnected from the active terminal K3, the fixed current provided by the current source 204 passes through the first resistor Rt1, so that there is a fixed voltage drop on the first resistor Rt1. At the same time, no current passes through the second resistor Rt2, and there is no voltage drop on the second resistor Rt2. At this time, the voltage at the positive input terminal + of the comparison unit 10 is the difference between the first voltage signal of the trigger signal and the voltage across the first resistor Rt1, and the potential of the negative input terminal of the comparison unit 10 is the second voltage signal of the differential signal. Then the comparison signal output by the comparison unit 10 when a-Iref×rt1=b is level-flipped. Among them, a is the first voltage signal of the differential signal, b is the second voltage signal of the differential signal, Iref is the current provided by the current source 204, and rt1 is the resistance value of the first resistor Rt1. At this time, the first threshold Vth1 of the comparison unit 10 is the voltage across the first resistor Rt1, that is, Vth1=ab=Iref×rt1. When the second selection terminal K2 of the selection module 203 is connected to the active terminal K3, and the first selection terminal K1 is disconnected from the active terminal K3, the fixed current provided by the current source 204 passes through the second resistor Rt2, so that a fixed voltage drop is formed on the second resistor Rt2. At the same time, no current passes through the first resistor Rt1, and there is no voltage drop on the first resistor Rt1. At this time, the potential of the positive input terminal of the comparison unit 10 is the first voltage signal of the differential signal, and the potential of the negative input terminal of the comparison unit 10 is the difference between the second voltage signal of the differential signal and the voltage across the second resistor Rt2. Then the comparison signal output by the comparison unit 10 when a=b-Iref×rt2 is level-flipped. Among them, a is the first voltage signal of the differential signal, b is the second voltage signal of the differential signal, Iref is the current provided by the current source 204, and rt2 is the resistance value of the second resistor Rt2. At this time, the second threshold Vth2 of the comparison unit 10 is the negative value of the voltage across the second resistor Rt2, that is, Vth2=ab=-Iref×rt2.
[0056] In some embodiments, the equivalent impedance of the first voltage adjustment module 201 is equal to the equivalent impedance of the second voltage adjustment module 202 .
[0057] Specifically, in the above process, when the equivalent impedance of the first voltage adjustment module 201 is equal to the equivalent impedance of the second voltage adjustment module 202, the absolute values of the first threshold value Vth1 and the second threshold value Vth2 can be equal. The values of the first threshold value Vth1 and the second threshold value Vth2 are symmetrical about 0. During the operation of the receiving device, the first difference between the first voltage signal in the differential signal provided by the differential bus and the first threshold value Vth1 and the second difference between the second voltage signal in the differential signal provided by the differential bus and the second threshold value Vth2 are symmetrical about 0, so that the delay of the receiving signal output by the receiving device on the rising edge and the delay on the falling edge can be symmetrical about 0, which improves the consistency of the delay of the receiving signal when flipping, thereby improving the signal transmission rate of the receiving device.
[0058] Continue to refer Figure 6 The gating module 203 includes a controllable single-pole double-throw switch; the first fixed end of the controllable single-pole double-throw switch serves as the first gating end K1 of the gating module 203, the second fixed end of the controllable single-pole double-throw switch serves as the second gating end K2 of the gating module 203, the active end of the controllable single-pole double-throw switch serves as the active end K3 of the gating module 203, and the control end of the controllable single-pole double-throw switch serves as the control end T1 of the gating module 203.
[0059] Specifically, when the failure protection signal is valid, the failure protection signal controls the active end of the controllable single-pole double-throw switch to be connected to the first fixed end, that is, the active end K3 of the gating module 203 is connected to the first gating end K1. At this time, the current provided by the current source 204 passes through the first voltage adjustment module 201, so that there is a voltage drop on the first voltage adjustment module 201. At this time, the first threshold Vth1 of the comparison unit 10 can be the voltage across the first voltage adjustment module 201. When the failure protection signal is invalid, the failure protection signal controls the active end of the controllable single-pole double-throw switch to be connected to the second fixed end, that is, the active end K3 of the gating module 203 is connected to the second gating end K2. At this time, the current provided by the current source 204 passes through the second voltage adjustment module 202, so that there is a voltage drop on the second voltage adjustment module 202. At this time, the second threshold Vth2 of the comparison unit 10 can be the negative value of the voltage across the second voltage adjustment module 202. Therefore, the state of the controllable single-pole double-throw switch can be controlled by the failure protection signal to achieve the threshold adjustment of the comparison unit 10.
[0060] Figure 8 A structural diagram of another receiving device provided by an embodiment of the present invention is shown in FIG. Figure 8As shown, the failure protection unit 30 includes a delay module 31 and a logic control module 32. The delay module 31 is connected between the output end of the comparison unit 10 and the second input end of the logic control module 32. The delay module 31 is used to output a valid delay signal after timing to a preset time when the comparison unit 10 outputs an invalid comparison signal; the first input end of the logic control module 32 is connected to the output end of the comparison unit 10, and the output end of the logic control module 32 is connected to the control end T1 of the threshold switching unit 20. The logic control module 32 is used to control the threshold switching unit 20 to adjust the threshold of the comparison unit 10 to the second threshold Vth2 when at least one of the comparison signal and the delay signal output by the delay module 31 is valid.
[0061] Specifically, when the differential signal is less than the second threshold value Vth2, the comparison unit 10 may output an invalid comparison signal. At this time, the delay module 31 starts timing according to the invalid comparison signal. If the delay module 31 times out the preset time, the delay module 31 outputs a valid delay signal. The logic control module 32 controls the threshold switching unit 20 to adjust the threshold of the comparison unit 10 to the second threshold value Vth2 according to the effective delay signal. If the differential signal is continuously less than the second threshold value Vth2, the comparison unit 10 continuously outputs an invalid comparison signal according to the differential signal, so that the receiving device can work normally. When the differential signal is greater than the second threshold value Vth2, if the comparison unit outputs a valid comparison signal, the receiving device outputs a high-level receiving signal at this time, which can enable the receiving device to work normally. The logic control module 32 controls the threshold switching unit 20 to adjust the threshold of the comparison unit 10 to the second threshold value Vth2 according to the effective comparison signal. If the comparison unit outputs an invalid comparison signal, the delay module 31 starts timing according to the invalid comparison signal. If the delay module 31 times out the preset time, the delay module 31 outputs a valid delay signal. The logic control module 32 controls the threshold switching unit 20 to adjust the threshold of the comparison unit 10 to the second threshold Vth2 according to the effective delay signal, so that the comparison unit 10 outputs a valid comparison signal after the threshold is adjusted, that is, the receiving device outputs a high-level receiving signal, so that when the differential signal is greater than the second threshold Vth2 and less than the first threshold Vth1, the output uncertain state of the receiving device can be converted into the receiving device outputting a high-level receiving signal, thereby improving the output uncertain state of the receiving device.
[0062] In some embodiments, continue to refer to Figure 8 When the effective level of different signals in the receiving device is a high level and the invalid level is a low level, the logic control module 32 includes an OR gate OR, the first input end of the OR gate OR serves as the first input end of the logic control module 32, the second input end of the OR gate OR serves as the second input end of the logic control module 32, and the output end of the OR gate OR serves as the output end of the logic control module 32.
[0063] Specifically, when at least one of the comparison signal input to the first input terminal of the OR gate OR and the delay signal input to the second input terminal is a high-level signal, the OR gate OR can output a high-level signal, so that when the differential signal is greater than the second threshold value Vth2 and less than the first threshold value Vth1, the OR gate OR controls the threshold of the comparison unit 10 to be the second threshold value Vth2, so that the comparison unit 10 outputs a valid comparison signal, thereby improving the output uncertainty state of the receiving device.
[0064] Fig. 9 A logic diagram of different signals of another receiving device provided by an embodiment of the present invention. Wherein, ab is a timing diagram of a differential signal, Comp is a timing diagram of a threshold value of a comparison unit, timeout is an output signal of a delay module, s is an output signal of a failure protection unit, r is a timing diagram of a signal output by a receiving device, and t' is a preset time. Fig. 9 As shown:
[0065] In the first stage t21, the differential signal is less than the second threshold value Vth2, and the comparison unit 10 outputs a low-level comparison signal, that is, the receiving device outputs a low-level receiving signal. The delay module 31 starts timing according to the low-level comparison signal. Before the delay module 31 times to the preset time t', the delay module 31 outputs a low-level delay signal, and the logic control module 32 controls the threshold of the comparison unit 10 to be the first threshold value Vth1 according to the low-level comparison signal and the low-level delay signal.
[0066] In the second stage t22, the differential signal is greater than the second threshold value Vth2 and less than the first threshold value Vth1, and the comparison unit 10 outputs a low-level comparison signal, that is, the receiving device outputs a low-level receiving signal. The delay module 31 starts timing according to the low-level comparison signal. Before the delay module 31 times to the preset time t', the delay module 31 outputs a low-level delay signal, and the logic control module 32 controls the threshold of the comparison unit 10 to the first threshold value Vth1 according to the low-level comparison signal and the low-level delay signal.
[0067] In the third stage t23, the differential signal is greater than the first threshold value Vth1, and the comparison unit 10 outputs a high-level comparison signal, that is, the receiving device outputs a high-level receiving signal. The delay module 31 does not count according to the high-level comparison signal, and the delay module 31 outputs a low-level delay signal. The logic control module 32 controls the threshold of the comparison unit 10 to be the second threshold value Vth2 according to the high-level comparison signal.
[0068] In the fourth stage t24, the differential signal is greater than the second threshold value Vth2 and less than the first threshold value Vth1, and the comparison unit 10 outputs a high-level comparison signal, that is, the receiving device outputs a high-level receiving signal. The delay module 31 does not count according to the high-level comparison signal, and the delay module 31 outputs a low-level delay signal. The logic control module 32 controls the threshold of the comparison unit 10 to be the second threshold value Vth2 according to the high-level comparison signal.
[0069] In the fifth stage t25, the differential signal is less than the second threshold value Vth2, and the comparison unit 10 outputs a low-level comparison signal, that is, the receiving device outputs a low-level receiving signal. The delay module 31 starts timing according to the low-level comparison signal. Before the delay module 31 times to the preset time t', the delay module 31 outputs a low-level delay signal, and the logic control module 32 controls the threshold of the comparison unit 10 to be the first threshold value Vth1 according to the low-level comparison signal and the low-level delay signal. When the differential signal changes to a value less than the first threshold value Vth1, the comparison unit 10 continues to output a low-level comparison signal, and the delay module 31 continues to time. When the delay module 31 times to the preset time t', the delay module 31 outputs a high-level delay signal, and the logic control module 32 controls the threshold of the comparison unit 10 to be the second threshold value Vth2 according to the high-level delay signal, so that the comparison unit 10 outputs a high-level comparison signal according to the differential signal, that is, the receiving device outputs a high-level receiving signal. Therefore, when the differential signal is greater than the second threshold Vth2 and less than the first threshold Vth1, the uncertain output state of the receiving device can be converted into a receiving signal outputted by the receiving device at a high level, thereby improving the uncertain output state of the receiving device.
[0070] The embodiment of the present invention also provides a communication interface. Fig.10 A schematic diagram of the structure of a communication interface provided by an embodiment of the present invention. Fig.10 As shown, the communication interface includes a driving device Driver and a receiving device Receiver provided by any embodiment of the present invention; the driving device Driver is connected to the receiving device Receiver via a differential bus DTL.
[0071] Specifically, Fig.10It is exemplarily shown that the communication interface includes a receiving device Receiver. The positive output terminal OUT+ of the driving device Driver is connected to the positive input terminal IN+ of the receiving device Receiver through a transmission line of the differential bus DTL, and the negative output terminal OUT- of the driving device Driver is connected to the negative input terminal IN- of the receiving device Receiver through another transmission line of the differential bus DTL. The signal provided by the driving device Driver is output to the receiving device Receiver through the differential bus DTL to realize the communication of the communication interface. Since the receiving device Receiver is the receiving device provided by any embodiment of the present invention, it has the same beneficial effects as the receiving device provided by any embodiment of the present invention, which will not be repeated here.
[0072] Fig.11 A schematic diagram of another communication interface provided by an embodiment of the present invention. Fig.11 As shown, when the communication interface includes multiple receiving devices, the structures of different receiving devices are the same.
[0073] Specifically, Fig.11 The exemplary communication interface shown in FIG. 1 includes three receiving devices Receiver. Different receiving devices Receiver may be the receiving device provided by any embodiment of the present invention, so that each receiving device Receiver may realize failure protection on the basis of improving anti-interference capability.
[0074] Continue to refer Fig.10 and Fig.11 A terminal resistor Rc may be connected between the positive input terminal IN+ and the negative input terminal IN- of the receiving device Receiver. The terminal resistor Rc may perform impedance matching with the driver Driver, reduce reflection of the differential signal, and improve the transmission quality of the signal on the differential bus DTL.
[0075] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims
1. A receiving device, characterized in that: The receiving device is applied to a communication interface; the receiving device comprises a comparison unit, a threshold switching unit and a failure protection unit; The input end of the threshold switching unit is used to input a differential signal, the output end of the threshold switching unit is connected to the input end of the comparison unit, the output end of the comparison unit serves as the output end of the receiving device, and the failure protection unit is connected between the output end of the comparison unit and the control end of the threshold switching unit; the threshold switching unit is used to provide an input signal to the comparison unit according to the differential signal; the comparison unit has a first threshold and a second threshold, and the failure protection unit is used to control the threshold switching unit to adjust the threshold of the comparison unit to the second threshold after a preset time when the comparison unit outputs an invalid comparison signal; wherein the first threshold is greater than the second threshold; The threshold switching unit includes a first voltage adjustment module, a second voltage adjustment module, a gating module and a current source; The first end of the first voltage adjustment module is used to input the first voltage signal of the differential signal, the second end of the first voltage adjustment module is connected to the positive input end of the comparison unit and the first gate end of the gating module, the first end of the second voltage adjustment module is used to input the second voltage signal of the differential signal, the second end of the second voltage adjustment module is connected to the negative input end of the comparison unit and the second gate end of the gating module, the control end of the gating module is connected to the output end of the comparison unit through the failure protection unit, and the active end of the gating module is connected to the fixed potential end through the current source; the gating module is used to gate the first gating end and the active end when the comparison signal is valid, and to gate the second gating end and the active end when the comparison signal is invalid; the first voltage adjustment module is used to adjust the input voltage of the positive input end of the comparison unit according to the first voltage signal when the first gating end and the active end are gated, and the second voltage adjustment module is used to adjust the input voltage of the negative input end of the comparison unit according to the second voltage signal when the second gating end and the active end are gated; The failure protection unit includes a delay module and a logic control module, wherein the delay module is connected between the output end of the comparison unit and the second input end of the logic control module, and the delay module is used to output a valid delay signal after timing to a preset time when the comparison unit outputs an invalid comparison signal; The first input end of the logic control module is connected to the output end of the comparison unit, and the output end of the logic control module is connected to the control end of the threshold switching unit. The logic control module is used to control the threshold switching unit to adjust the threshold of the comparison unit to a second threshold when at least one of the comparison signal and the delay signal output by the delay module is valid.
2. The receiving device according to claim 1, characterized in that The first voltage adjustment module includes a first resistor; The first end of the first resistor is used to input the first voltage signal of the differential signal, and the second end of the first resistor is connected to the positive input end of the comparison unit and the first selection end of the selection module.
3. The receiving device according to claim 1, characterized in that The second voltage adjustment module includes a second resistor; the first end of the second resistor is used to input the second voltage signal of the differential signal, and the second end of the second resistor is connected to the negative input end of the comparison unit and the second selection end of the selection module.
4. The receiving device according to claim 1, characterized in that The equivalent impedance of the first voltage adjustment module is equal to the equivalent impedance of the second voltage adjustment module.
5. The receiving device according to claim 1, characterized in that The gating module includes a controllable single-pole double-throw switch; the first fixed end of the controllable single-pole double-throw switch serves as the first gating end of the gating module, the second fixed end of the controllable single-pole double-throw switch serves as the second gating end of the gating module, the active end of the controllable single-pole double-throw switch serves as the active end of the gating module, and the control end of the controllable single-pole double-throw switch serves as the control end of the gating module.
6. The receiving device according to claim 1, characterized in that The logic control module comprises an OR gate, wherein the first input end of the OR gate serves as the first input end of the logic control module, the second input end of the OR gate serves as the second input end of the logic control module, and the output end of the OR gate serves as the output end of the logic control module.
7. The receiving device according to claim 1, characterized in that The first threshold is greater than 0, and the second threshold is less than 0.
8. A communication interface, characterized in that: It comprises a driving device and at least one receiving device according to any one of claims 1 to 7; the driving device is connected to the receiving device via a differential bus.