Test structure and measurement method of copper dent

Abstract

The present invention provides a copper recess test structure located within a wafer saw path and comprising: an interlayer dielectric layer, at least four regularly shaped copper blocks, at least one test copper block, and at least four test terminals; the four test terminals extending from the four corners of the test copper block; each of the four regularly shaped copper blocks is positioned between two of the test terminals, surrounding the test copper block; the copper blocks, the test copper blocks, and the test terminals are all embedded in the interlayer dielectric layer; the ratio of the size of the copper block to the size of the test copper block is greater than 100:1; and the spacing between the test terminals and the copper block is greater than or equal to the minimum design rule for copper fabrication. This solution addresses the issues of low repeatability and high cost in measuring surface recess after CMP treatment of copper.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor devices, and in particular to a test structure and a measurement method for copper recesses. Background Art

[0002] With the advancement of technology nodes, the critical dimension (CD) of back-end metal connections has become smaller and smaller, while the resistance has become larger and larger, and the RC delay problem has become serious. To address this problem, IBM introduced the Cu interconnect in 1997. The Cu interconnect uses a dual damascene process, so after Cu electroplating, a CMP process is required to remove excess copper blocks. However, Cu is soft in texture and is prone to dipping after CMP, which is particularly serious on large copper blocks. Since Cu dipping affects the in-plane flatness of the wafer, if it is not controlled, it will have a serious impact on subsequent processes. Therefore, for the Cu CMP process, the Cu dipping depth is an important control parameter, especially for large copper blocks.

[0003] To address the above issues, the traditional method for measuring Cu concavity is AFM (Atomic Force Microscope). However, this method easily scratches the metal surface, and the wafer needs to be scrapped after testing. The test is costly and cannot be repeated.

[0004] Therefore, a repeatable and low-cost method is needed to measure the dishing after Cu CMP polishing. Summary of the Invention

[0005] The technical problem solved by the present invention is how to measure the concavity after Cu CMP by a method with high repeatability and low cost.

[0006] To solve the above technical problems, according to a first aspect of an embodiment of the present invention, a test structure for copper recesses is provided. The test structure is located within a dicing street of a wafer and includes:

[0007] interlayer dielectric layer;

[0008] At least four regularly shaped copper blocks, at least one test copper block, and at least four test terminals; the four test terminals extend from four corners of the test copper block; the four regularly shaped copper blocks are each disposed between two of the test terminals to surround the test copper block;

[0009] The copper block, the test copper block and the test terminal are all embedded in the interlayer dielectric layer;

[0010] The ratio of the size of the copper block to the size of the test copper block is greater than 100:1;

[0011] The distance between the test end and the copper block is greater than or equal to the minimum design rule of copper process manufacturing.

[0012] Optionally, the test structure includes n test copper blocks, which are spaced apart by a preset distance and arranged in a one-dimensional direction; correspondingly, the number of the test ends and the copper blocks is 2*(n+1).

[0013] Optionally, the test structure includes m*n test copper blocks, which are spaced at a preset distance and arranged in a two-dimensional direction. Correspondingly, the number of test ends is 2*(m+n), and the number of copper blocks is (m+1)*(n+1).

[0014] Optionally, the test copper block is located in the middle of the overall figure formed by the copper blocks.

[0015] Optionally, the copper block is a rectangular structure, and the overall shape of several copper blocks after being arranged is also rectangular; the test copper block arranged between the copper blocks is a rectangular shape rotated 45 degrees relative to the adjacent copper blocks.

[0016] According to a second aspect of an embodiment of the present invention, there is provided a method for measuring copper recess using the copper recess test structure according to the first aspect of the present invention, comprising the following steps:

[0017] Step S1: measuring the thickness of the interlayer dielectric layer adjacent to the test structure;

[0018] Step S2: Obtain the resistivity ρ of metallic copper;

[0019] Step S3: Using the Van der Pauw method, combined with the copper resistivity ρ obtained in step S2, the four test terminals of the test copper block at the test position are: first, two adjacent test terminals are selected to pass a first test current, and a test voltage is obtained through the remaining two test terminals; second, two opposing test terminals are selected to pass a second test current, and a test voltage is obtained through the remaining two test terminals; the two opposing test terminals in the second test are identical to the two adjacent test terminals in the first test, and the thickness of the test copper block is calculated using the Van der Pauw formula;

[0020] Step S4: Subtract the thickness of the test copper block obtained in step S3 from the thickness of the interlayer dielectric layer obtained in step S1 to obtain data on the recess of the position of the test copper block relative to the interlayer dielectric layer.

[0021] Optionally, in step S1 , an ellipsometer is used to measure the thickness of the interlayer dielectric layer.

[0022] Optionally, in step S2, the resistivity ρ of the metallic copper is tested using a four-probe method.

[0023] Optionally, the Vanderbilt formula in step S3 is: Wherein R1 = V1 / I1, R2 = V2 / I2; wherein I1 is the current applied for the first time, V1 is the voltage measured for the first time, I2 is the current applied for the second time, and V2 is the voltage measured for the second time; the value of λ is calculated according to the Van der Pauw formula, and then the thickness of the test copper block is calculated according to the thickness formula: d = ρ / πλ.

[0024] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0025] The copper depression test structure provided by the present invention includes at least four regularly shaped copper blocks located in an interlayer dielectric layer, at least one test copper block, and at least four test terminals. Using the at least four test terminals, the depth of the surface depression of the test copper block can be calculated through electrical measurement, avoiding the problem of traditional AFM methods for measuring surface depressions easily scratching the metal surface. By changing the position of the test copper block, the depth measurement of the copper depression at different locations is further improved, and the morphology of the copper defect is further obtained, thereby accurately simulating the depression condition after copper CMP. Because the test structure of the present invention is non-destructive, the wafer does not need to be scrapped after the test, thereby reducing testing costs. Furthermore, the test structure provided by the present invention allows for repeated measurements, improving repeatability. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a schematic diagram of the structure of a large piece of copper after CMP;

[0027] Figure 2 This is a schematic diagram of a copper recess test structure provided by an embodiment of the present invention. Figure 1 ;

[0028] Figure 3 This is a schematic diagram of a copper recess test structure provided by an embodiment of the present invention. Figure 2 ;

[0029] Figure 4 This is a schematic diagram of a copper recess test structure provided by an embodiment of the present invention. Figure 3 ;

[0030] Figure 5 This is a schematic diagram of a copper recess test structure provided by an embodiment of the present invention. Figure 4 ;

[0031] Figure 6 1 is a coordinate diagram of a copper recess test structure provided by an embodiment of the present invention;

[0032] Figure 7The figure is a flow chart of a method for measuring a copper recessed test structure provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0033] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. The terms "first", "second", "third", "fourth", etc. (if any) in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way are interchangeable where appropriate so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or inherent to these processes, methods, products or devices.

[0034] As mentioned in the background, the traditional method for measuring Cu concavity is AFM. However, this method easily scratches the metal surface, requiring wafers to be scrapped after testing. The test is costly and non-reproducible. The following will describe the existing AFM testing method in detail with reference to the accompanying figures.

[0035] Figure 1 This is a schematic diagram of the structure of a large piece of copper after CMP.

[0036] Please refer to Figure 1 , the bulk copper 1 is located in the interlayer dielectric layer, and the bulk copper 1 has been subjected to CMP polishing; specifically, the interlayer dielectric layer includes, for example, a first interlayer dielectric layer 100 and a second interlayer dielectric layer 101 located on the first interlayer dielectric layer 100, and the bulk copper 1 is specifically located in the second interlayer dielectric layer 101. Of course, the specific composition of the interlayer dielectric layer here is only an example, and it can also be other compositions, and this application does not make specific restrictions on this. It should be noted that the interlayer dielectric layers mentioned below all correspond to Figure 1 The second interlayer dielectric layer is the interlayer dielectric layer in which the bulk copper is embedded.

[0037] Depend on Figure 1As can be seen, after CMP, the large copper block 1 exhibited surface depressions. This is due to the soft nature of copper, and this condition is particularly severe on large copper blocks. Because copper surface depressions affect the in-plane flatness of the wafer, conventional methods typically require measuring copper surface depressions using AFM. However, this method can easily scratch the metal surface, requiring the wafer to be scrapped after testing. This results in high testing costs and is not repeatable.

[0038] In order to solve the above problems, an embodiment of the present invention provides a test structure for copper recesses, which is located in the cutting path of a wafer and includes: an interlayer dielectric layer, at least four regularly shaped copper blocks, at least one test copper block and at least four test ends; the four test ends extend from the four corners of the test copper block; the four regularly shaped copper blocks are each arranged between two of the test ends and surround the test copper block; the copper blocks, the test copper blocks and the test ends are all embedded in the interlayer dielectric layer; the ratio of the size of the copper block to the size of the test copper block is greater than 100:1; the spacing between the test end and the copper block is greater than or equal to the minimum design rule of copper process manufacturing.

[0039] The copper depression test structure provided by the embodiment of the present invention comprises at least four regularly shaped copper blocks, at least one test copper block, and at least four test terminals formed within an interlayer dielectric layer. The depth of the depression on the surface of the test copper block can be calculated by electrical measurement using the at least four test terminals, thereby avoiding the problem of traditional AFM methods for measuring surface depressions easily scratching the metal surface. By changing the position of the test copper block, the depth measurement of the copper depression at different locations is further improved, and the morphology of the copper defect is further obtained, thereby accurately simulating the depression condition after copper CMP. Because the test structure of the present invention is non-destructive, the wafers do not need to be scrapped after the test, thereby reducing testing costs. Furthermore, the test structure provided by the present invention allows for repeated measurements, improving repeatability.

[0040] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0041] Figure 2 A schematic diagram of a copper recess test structure provided by an embodiment of the present invention.

[0042] Please refer to Figure 2 An embodiment of the present invention provides a copper recessed test structure 10, the test structure being located within a scribe line of a wafer, and comprising:

[0043] An interlayer dielectric layer 101, at least four regularly shaped copper blocks 102, at least one test copper block 103, and at least four test terminals a, b, c, and d; the four test terminals a, b, c, and d extend from the four corners of the test copper block 103; the four regularly shaped copper blocks 102 are each disposed between two test terminals and surround the test copper block 103.

[0044] In a specific example, the copper block 102 is a rectangular structure, and the overall shape of several copper blocks 102 after being arranged is also rectangular; the test copper block 103 arranged between the copper blocks 102 is a rectangular shape rotated 45 degrees relative to the adjacent copper block 102.

[0045] In an optional embodiment, the test copper block 103 is located in the middle of the overall figure formed by the copper blocks 102, so as to measure the depth of the depression near the center point.

[0046] The copper block 102, the test copper block 103 and the test terminals a, b, c and d are all embedded in the interlayer dielectric layer 101. The size ratio of the copper block 102 to the test copper block 103 is greater than 100:1. The spacing between the test terminals and the copper block 102 is greater than or equal to the minimum design rule for copper process manufacturing. This allows, on the one hand, to control the distance between the copper blocks to be minimal, just enough to pass the design rule check (DRC). On the other hand, since there is only a small oxide space between the copper blocks, there is not enough resistance to polishing, so it can be approximately considered that Figure 2 The structure is similar to the depression of bulk copper after CMP, making Figure 2 The test structure can accurately simulate the recessing of bulk copper after CMP.

[0047] The test structure may include n test copper blocks 103 , which are spaced apart by a preset distance and arranged in a one-dimensional direction; correspondingly, the number of the test ends and the copper blocks 102 is 2*(n+1).

[0048] Figure 3 and Figure 4 They are schematic diagrams of a copper recessed test structure 10 provided by an embodiment of the present invention. Figure 3 or Figure 4 In a specific example, when n=2, the number of the test terminals and the number of the copper blocks 102 are both 6. If it is necessary to measure the data of the left and right sides of the copper recess relative to the interlayer dielectric layer, the test structure can be as follows: Figure 3 As shown, the copper recess center is provided with Figure 3The left and right test copper blocks are connected in series horizontally and connected to the two test terminals a and c. The upper and lower sides of the two test copper blocks are connected to two test terminals d1 and b1, d2 and b2 respectively. If it is necessary to measure the data of the upper and lower sides of the copper depression relative to the interlayer dielectric layer, the test structure can be as follows: Figure 4 As shown, the copper recess center is provided with Figure 4 The upper and lower test copper blocks are connected in series vertically and connected to the two test terminals a and c. The left and right sides of the two test copper blocks are connected to two test terminals d1 and b1, and d2 and b2 respectively. Figure 3 and Figure 4 The difference between the structures is that the arrangement direction of the test copper blocks 103 is different. Figure 3 The test copper blocks 103 are arranged in one dimension along the X direction, and Figure 4 The test copper blocks 103 are arranged one-dimensionally along the Y direction. By measuring the left, right, and top and bottom data of copper recesses relative to the interlayer dielectric layer, the positions of the test copper blocks are changed to further refine the depth of copper recesses at different locations, and the morphology of copper defects is further obtained, thereby accurately simulating the recess conditions after copper CMP.

[0049] In addition, in a further technical solution of the present invention, several test copper blocks can also be arranged in a two-dimensional direction, so as to realize the surface depression depth measurement of the test copper blocks in the two-dimensional direction, wherein the test structure includes m*n test copper blocks, and the m*n test copper blocks are spaced at a preset distance. Correspondingly, the number of the test ends is 2*(m+n), and the number of the copper blocks is (m+1)*(n+1).

[0050] Where m and n are the number of test copper blocks along the x and y directions, respectively. Figure 5 This is a schematic diagram of a copper recess test structure provided by an embodiment of the present invention, please refer to 5, Figure 5 In the test structure 10 shown, the test copper blocks are arranged in two dimensions along the X and Y directions. In one example, when n=2 and m=2, the number of the test terminals is 8 and the number of the copper blocks 102 is 9. The test structure 10 can be used to measure the data of the left and right sides and the upper and lower sides of the copper depression relative to the interlayer dielectric layer. Specifically, as Figure 5As shown, four test copper blocks (1035, 1036, 1037, and 1038) are arranged around the center of the copper recess; the test copper blocks 1035 and 1036, as well as the test copper blocks 1037 and 1038, can be understood as being arranged along the X direction, and the test copper blocks 1035 and 1037, as well as the test copper blocks 1036 and 1038 can be understood as being arranged along the Y direction; the left and right test copper blocks 1035 and 1036 are connected in series in the horizontal direction and connected to the two endpoints d1 and b1, and the left and right test copper blocks 1037 and 1038 are connected in series in the horizontal direction and connected to the two endpoints d2 and b2; the upper and lower test copper blocks 1035 and 1037 are connected in series in the vertical direction and connected to the two endpoints a1 and c1, and the upper and lower test copper blocks 1036 and 1038 are connected in series in the vertical direction and connected to the two endpoints a2 and c2. Therefore, if it is necessary to measure the data of the left and right sides of the copper depression relative to the interlayer dielectric layer, the left and right test copper blocks 1035, 1036 and 1037, 1038 can be used for testing; if it is necessary to measure the data of the upper and lower sides of the copper depression relative to the interlayer dielectric layer, the upper and lower test copper blocks 1035, 1037 and 1036, 1038 can be used for testing. Figure 5 The test structure shown can realize data on the recess of the copper recess in two-dimensional directions relative to the interlayer dielectric layer on the left and right sides and the top and bottom sides.

[0051] In summary, the present invention provides a copper recess test structure located in a scribe line. Electrical parameters can be measured using a test terminal, thereby calculating the depth of the surface recess in the copper structure corresponding to the test terminal. This enables non-destructive large-scale copper surface recess testing, reducing testing costs and improving test repeatability.

[0052] Figure 7 A schematic flow chart of a method for measuring a copper recessed test structure provided in one embodiment of the present invention.

[0053] like Figure 7 As shown, the method for measuring copper recess using the copper recess test structure as described in the above embodiment of the present invention includes the following steps:

[0054] Step S1: measuring the thickness of the interlayer dielectric layer adjacent to the test structure; specifically, in step S1, an ellipsometer is used to measure the thickness of the interlayer dielectric layer.

[0055] Step S2: Obtain the resistivity ρ of the metallic copper; specifically, in step S2, the resistivity ρ of the metallic copper is measured using a four-probe method.

[0056] Step S3: Using the Van der Pauw method, combined with the copper resistivity ρ obtained in step S2, for the four test terminals of the test copper block at the test position, select two adjacent test terminals for the first time to pass a first test current, and obtain a test voltage through the remaining two test terminals; select two opposite test terminals for the second time to pass a second test current, and obtain a test voltage through the remaining two test terminals; the two opposite test terminals in the second time have one test terminal that is the same as the two adjacent test terminals in the first time, and the thickness of the test copper block is calculated using the Van der Pauw formula.

[0057] Specifically, the Vanderbilt formula in step S3 is: Wherein R1 = V1 / I1, R2 = V2 / I2; wherein I1 is the current applied for the first time, V1 is the voltage measured for the first time, I2 is the current applied for the second time, and V2 is the voltage measured for the second time; the value of λ is calculated according to the Van der Pauw formula, and then the thickness of the test copper block is calculated according to the thickness formula: d = ρ / πλ.

[0058] Step S4: Subtract the thickness of the test copper block obtained in step S3 from the thickness of the interlayer dielectric layer obtained in step S1 to obtain data on the recess of the test copper block relative to the interlayer dielectric layer.

[0059] The technical solution provided by the present invention utilizes the Van der Pauw method to measure the surface depression depth of the copper block in the copper depression test structure provided in the aforementioned embodiment. This electrical testing replaces the traditional AFM method, avoiding the damage to the copper surface caused by the existing AFM method, achieving the technical benefits of reduced costs and improved test repeatability. Furthermore, the method is simple to operate.

[0060] As an example, see Figure 2 , if you need to measure Figure 2 When testing the data of the copper block's depression relative to the interlayer dielectric layer in the copper depression test structure, the thickness of the interlayer dielectric layer adjacent to the test structure is first measured using an ellipsometer, and the resistivity ρ of the metal copper is measured using a four-probe method.

[0061] Secondly, place a 2*2μm piece in the center 2 (or 1*1μm 2 The four corners of the test copper block 103 are connected to the test terminals with a width of 0.4 μm (or 0.2 μm). The four test terminals are marked as a, b, c, and d in sequence and connected to the pads. Four large rectangular copper blocks (Cu Dummy) 102 are placed around the test copper block 103 to form a 50*50 μm 2In this pattern, the distance between the rectangular copper blocks 102 is minimized, which just passes the design rule check (DRC). In this way, there is only a small oxide space between the rectangular copper blocks 102, which does not have enough resistance to polishing, so it can be approximately considered that Figure 2 The structure is similar to the depression of bulk copper after CMP, making Figure 2 The test structure can accurately simulate the concavity of large copper blocks after CMP. During measurement, a current I is passed between the test terminals a and b. ab , measure the voltage V at the test terminals c and d cd ; Current I flows between test terminals a and d ad , measure the voltage V at the test terminals b and c bc The corresponding resistance is obtained by the voltage and current obtained by the test, and the resistance is substituted into the Van der Pauw formula. Then, the thickness of the test copper block 103 at the center position is calculated. Then, the depth of the depression at the center position = the thickness of the interlayer dielectric layer - the thickness of the test copper block.

[0062] If it is necessary to measure the data of the left and right sides of the center of the copper depression relative to the interlayer dielectric layer, the test structure is as follows: Figure 3 First, the thickness of the interlayer dielectric layer and the resistivity ρ of the metal copper are obtained in the same way (it is assumed that these two data have been obtained in the subsequent description of this application). Secondly, when measuring the left side of the test copper block at the center position, a current I is passed through the test terminals a and b1. ab1 , measure the voltage V at the test terminals c and d1 cd1 ; Current I flows through the test terminals a and d1 ad1 , measure the voltage V at the test terminals c and b1 cb1 The measured voltage and current are used to determine the corresponding resistance. Substituting this resistance into the Vanderbilt equation, the thickness of the copper block to the left of the center is calculated. The depth of the concave portion to the left of the center is calculated as follows: the thickness of the interlayer dielectric layer minus the thickness of the copper block. Note that the depth of the concave portion to the right of the center is similar to that to the left and will not be further detailed here.

[0063] If it is necessary to measure the data of the depression above and below the center of the copper depression relative to the interlayer dielectric layer, the test structure is as follows: Figure 4 As shown, when measuring the upper side of the center point, current I flows through the test terminals a and b1. ab1 , measure the voltage V at the test terminals c and d1 cd1 ; Current I flows through the test terminals a and d1 ad1 , measure the voltage V at the test terminals c and b1 cb1The measured voltage and current are used to determine the corresponding resistance. Substituting this resistance into the Van der Pauw equation, the thickness of the copper block above the center is calculated. The depression depth above the center is calculated as: the thickness of the interlayer dielectric layer minus the thickness of the copper block. Note that the depression depth below the center is similar to that above and will not be further detailed here.

[0064] Figure 6 This is a rectangular coordinate system established with the center of the large copper block as the origin in a specific example of the present invention. Figure 6 The specific test process of the copper concave test structure measurement method provided by the present invention is as follows:

[0065] By using this method and changing the position of the test copper block, the depth of surface defects caused by copper CPM polishing at different locations can be calculated. A rectangular coordinate system can be established with the center of the large copper block as the origin. A set of coordinates for the locations to be tested can be specified. Then, the test copper blocks can be placed sequentially at the corresponding locations in the scribe lane. Finally, the data can be summarized to represent the morphology of the depression. The depth of the depression at the boundary of the large copper block is zero.

[0066] The following is a specific example for explanation. In which the metal layer to be measured can be the Mn layer (n=1-8). The specific test process is as follows:

[0067] (1) The thickness of the dielectric layer on the same layer as the metal layer is measured using an ellipsometer, and the test result is Tox.

[0068] (2) The resistivity of metallic copper is tested using the four-probe method. The test result is ρ, completing the preliminary preparations.

[0069] (3) 48*48μm 2 The center of the large copper block is used as the origin to establish a rectangular coordinate system. The coordinates of all the positions to be tested are as follows: Figure 6 As shown, the coordinates of C1 are (-16, 0), C2 are (-8, 0), C3 are (0, 0), C4 are (8, 0), and C5 are (16, 0); the coordinates of E3 are (0, -16), the coordinates of D3 are (0, -8), the coordinates of B3 are (0, 8), and the coordinates of A3 are (0, 16). The coordinates of the remaining points are as follows: Figure 6 shown.

[0070] (4) When testing A1 and E1 positions, Figure 4 Put the test copper block shown in the figure into the corresponding position, first measure point A1, specifically, pass current I1 through test terminals a1 and b1, and measure voltage V1 at test terminals c1 and d1; pass current I2 through test terminals a1 and d1, and measure voltage V2 at test terminals c1 and b1, according to

[0071] R1=V1 / I1;R2=V2 / I2

[0072] Calculate R1 and R2 and then substitute them into the formula

[0073]

[0074] The λ value is λ1, and then

[0075] d=ρ / πλ

[0076] The thickness d is the thickness T of the copper block at point A1. A1 , then the depth of the surface depression at point A1 is T1=T ox -T A1 ;

[0077] When measuring point E1, current I3 flows through test terminals a1 and b2, and voltage V3 is measured at test terminals c1 and d2; current I4 flows through test terminals a1 and d2, and voltage V4 is measured at test terminals c1 and b2.

[0078] R3=V3 / I3;R4=V4 / I4

[0079] Calculate R3 and R4 and then substitute them into the formula

[0080]

[0081] The λ value is λ2, and then

[0082] d=ρ / πλ

[0083] The value of thickness d is obtained, which is the thickness T of the test copper block at point E1. E1 , then the depth of the depression at point E1 is T2=T ox -T E1

[0084] (5) When testing A2 and E2 positions, Figure 4 The test copper block shown is placed in the corresponding position. When testing point A2, current I1 is passed through test terminals a2 and b1, and voltage V1 is measured at test terminals c2 and d1. Current I2 is passed through test terminals a2 and d1, and voltage V2 is measured at test terminals c2 and b1. Data processing is performed in the same manner as above to calculate the concavity at point A2. When measuring point E2, current I3 is passed through test terminals a2 and b2, and voltage V3 is measured at test terminals c2 and d2. Current I4 is passed through test terminals a2 and d2, and voltage V4 is measured at test terminals c2 and b2. Data processing is performed in the same manner as above to calculate the concavity at point E2. Following this test process, the depths of the copper concavities at points An (n=3-5), En (n=3-5), Bn (n=1-5), and Dn (n=1-5) are sequentially measured.

[0085] (6) When testing C1 and C5 positions, use Figure 3 As shown in the structure, put the rectangle Cu in the corresponding position, first measure point C1, pass current I5 through the test terminals a1 and b5, and measure voltage V5 at the test terminals c1 and d5; pass current I6 through the test terminals a1 and d5, and measure voltage V6 at the test terminals c1 and b5.

[0086] R5=V5 / I5;R6=V6 / I6

[0087] Calculate R5 and R6 and then substitute them into the formula

[0088]

[0089] The λ value is λ3, and then

[0090] d=ρ / πλ

[0091] The thickness d is the thickness T of the test copper block at point C1. C1 , then the depth of the depression at point C1 is T3=T ox -T C1 ;

[0092] When measuring point C5, current I7 flows through test terminals a5 and b5, and voltage V7 is measured at test terminals c5 and d5; current I8 flows through test points a5 and d5, and voltage V8 is measured at test terminals c5 and b5.

[0093] R7=V7 / I7;R8=V8 / I8

[0094] Calculate R7 and R8 and then substitute them into the formula

[0095]

[0096] The λ value is λ4, and then

[0097] d=ρ / πλ

[0098] The thickness d is the thickness T of the test copper block at point C5. C5 , then the depth of the depression at point C5 is T4=T ox -T C5 The measurement methods at points C2 and C4 are the same and will not be repeated here.

[0099] (7) When testing the O point position, use Figure 2 In the structure shown, current I flows through the test terminals a3 and b5. 01 , measure the voltage V at the test terminals c3 and d5 01 ; Current I flows through the test terminals a3 and d5 02 , measure the voltage V at the test terminals c3 and b5 02The data processing process is as shown above, and the depression depth T at point O is calculated. o .

[0100] Based on the above, a three-dimensional rectangular coordinate system is established, where the X-axis and Y-axis represent the coordinates of the data points, and the Z-axis represents the depth of the depression. All data are substituted into a plot to obtain the approximate morphology of the Cu depression. It should be noted that the denser the measured data points, the better the simulated morphology. This method can accurately simulate the depression after copper CMP. Because the test structure of the present invention is non-destructive, the wafers do not need to be scrapped after testing, thereby reducing testing costs. In addition, the test structure provided by the present invention can be repeated multiple times, improving repeatability.

[0101] In summary, the copper depression test structure provided by the present invention includes at least four regularly shaped copper blocks located in an interlayer dielectric layer, at least one test copper block, and at least four test terminals. Utilizing the at least four test terminals, the depth of the depression on the surface of the test copper block can be calculated by means of electrical measurement, thereby avoiding the problem of the traditional AFM method of measuring surface depressions easily scratching the metal surface. By changing the position of the test copper block, the depth measurement of the copper depression at different positions is further improved, and the morphology of the copper defect is further obtained, thereby accurately simulating the depression condition after copper CMP. Because the test performed using the test structure of the present invention is a non-destructive test, the wafer does not need to be scrapped after the test, thereby reducing the test cost. Furthermore, the test structure provided by the present invention can be repeatedly measured multiple times, thereby improving repeatability.

[0102] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A copper recessed test structure, wherein the test structure is located within a dicing path of a wafer, characterized in that: include: interlayer dielectric layer; at least four regularly shaped copper blocks, at least one test copper block, and at least four test terminals; The four test ends extend from the four corners of the test copper block; the four regularly shaped copper blocks are each disposed between two of the test ends to surround the test copper block; The copper block, the test copper block and the test terminal are all embedded in the interlayer dielectric layer; The ratio of the size of the copper block to the size of the test copper block is greater than 100:1; The distance between the test end and the copper block is greater than or equal to the minimum design rule of copper process manufacturing; The test structure is similar to the bulk copper depression after CMP, and is used to simulate the bulk copper depression after CMP; The depth of the depression on the surface of the test copper block is calculated by means of electrical measurement using at least four test terminals.

2. The test structure according to claim 1, characterized in that The test structure includes n test copper blocks, which are spaced apart by a preset distance and arranged in a one-dimensional direction; correspondingly, the number of the test ends and the copper blocks is 2*(n+1).

3. The test structure according to claim 1, wherein: The test structure includes m*n test copper blocks, which are spaced at a preset distance and arranged in a two-dimensional direction. Correspondingly, the number of the test ends is 2*(m+n), and the number of the copper blocks is (m+1)*(n+1).

4. The test structure according to any one of claims 1 to 3, characterized in that: The test copper block is located in the middle of the overall figure formed by the copper blocks.

5. The test structure according to claim 4, characterized in that The copper blocks are rectangular in structure, and the overall shape of several copper blocks arranged together is also rectangular; the test copper blocks arranged between the copper blocks are rectangular in shape rotated 45 degrees relative to the adjacent copper blocks.

6. A method for measuring copper concavity using the copper concavity test structure according to claim 1, characterized in that: The following steps are involved: Step S1: measuring the thickness of the interlayer dielectric layer adjacent to the test structure; Step S2: Obtain the resistivity ρ of metallic copper; Step S3: Using the Van der Pauw method, combined with the copper resistivity ρ obtained in step S2, the four test terminals of the test copper block at the test position are: first, two adjacent test terminals are selected to pass a first test current, and a test voltage is obtained through the remaining two test terminals; second, two opposing test terminals are selected to pass a second test current, and a test voltage is obtained through the remaining two test terminals; the two opposing test terminals in the second test are identical to the two adjacent test terminals in the first test, and the thickness of the test copper block is calculated using the Van der Pauw formula; Step S4: Subtract the thickness of the test copper block obtained in step S3 from the thickness of the interlayer dielectric layer obtained in step S1 to obtain data on the recess of the test copper block relative to the interlayer dielectric layer.

7. The measuring method according to claim 6, characterized in that In step S1, an ellipsometer is used to measure the thickness of the interlayer dielectric layer.

8. The measuring method according to claim 6, characterized in that In step S2, the resistivity ρ of the metal copper is tested using a four-probe method.

9. The measuring method according to claim 6, characterized in that: The Vanderbilt formula in step S3 is: , where R1=V1 / I1, R2=V2 / I2; where I1 is the first current applied, V1 is the first voltage measured, I2 is the second current applied, and V2 is the second voltage measured; calculate the value of λ according to the Van der Pauw formula, and then use the thickness formula: Calculate the thickness of the test copper block.

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