Hot plug control circuit, power supply control circuit and hot plug control method

Abstract

The present invention provides a hot-swap control circuit, a power supply control circuit, and a hot-swap control method. The circuit comprises: a first switch module and a first voltage divider module respectively connected to a DC power supply, the first switch module and the first voltage divider module being arranged in parallel; a first connection node between the output end of the first switch module and the output end of the first voltage divider module being respectively connected to a first delay module, an energy storage module, and a load module; and the output end of the first delay module being respectively connected to the load module and the first switch module. The circuit structure of the present invention does not require the use of a specific dedicated chip to achieve hot-swap protection, greatly reducing costs; the overall circuit structure is cleverly and reasonably designed, and through the arrangement of the delay module and the energy storage module, and the closed control of the switch module, the instantaneous current of the board insertion is buffered and delayed, thereby reducing damage to corresponding components and reducing the impact on the external power supply system, thereby ensuring the stability and reliability of the motherboard during use.

Description

Technical Field

[0001] The present invention relates to control circuit technology, and in particular to a hot-swap control circuit, a power supply control circuit and a hot-swap control method. Background Art

[0002] With the increasing integration of devices, traditional equipment such as switches, routers, servers, and computers have gradually evolved from standalone devices to card-based chassis to accommodate the increasing functional integration and configuration flexibility. Accordingly, card-based distribution devices must provide high reliability throughout their entire lifecycle. If a card in the system fails or needs to be replaced, it must be replaced without interrupting the normal operation of the rest of the system.

[0003] During the plug-in and unplug process, when a new board is inserted into a running system, the input capacitor of the board is equivalent to a short-circuit state at the moment of insertion, which will bring a large instantaneous current to the entire system. This current can reach hundreds of amperes, which may damage the power connector of the inserted board, PCB copper foil, power connector of the system backplane, etc., causing power supply system instability.

[0004] Therefore, how to handle the instantaneous current when the board is inserted to improve the stability, reliability and system availability of the motherboard during use. Summary of the Invention

[0005] The embodiments of the present invention provide a hot-swap control circuit, a power supply control circuit and a hot-swap control method, which can improve the stability, reliability and system availability of a mainboard during use.

[0006] A first aspect of an embodiment of the present invention provides a hot-swap control circuit, which is configured in a board and connected to a load, and includes: a first switch module and a first voltage divider module respectively connected to a DC power supply, the first switch module and the first voltage divider module are arranged in parallel, the output end of the first switch module and the first connection node of the output end of the first voltage divider module are respectively connected to a first delay module, an energy storage module and a load module, and the output end of the first delay module is respectively connected to the load module and the first switch module.

[0007] Optionally, the first switch module includes a first MOS transistor, and the drain of the first MOS transistor is connected to the energy storage module and the load module.

[0008] Optionally, the first voltage divider module includes a first voltage divider resistor, the input end of the first voltage divider resistor is connected to the DC power supply and the source of the first MOS tube, and the output end of the first voltage divider resistor is connected to the first delay module, the energy storage module and the load module.

[0009] Optionally, the energy storage module includes a plurality of capacitors connected in parallel.

[0010] Optionally, the energy storage module includes multiple capacitors arranged in parallel, including: the energy storage module includes a first energy storage capacitor, a second energy storage capacitor, a third energy storage capacitor, a first electrolytic capacitor and a second electrolytic capacitor arranged in parallel, the first energy storage capacitor, the second energy storage capacitor, the third energy storage capacitor, the first electrolytic capacitor and the second electrolytic capacitor are respectively connected to the drain of the first MOS tube and the output end of the first voltage divider resistor, and the first energy storage capacitor, the second energy storage capacitor, the third energy storage capacitor, the first electrolytic capacitor and the second electrolytic capacitor are respectively connected to the load module.

[0011] Optionally, the first delay module includes a first delay unit, a first switch subunit and a second switch subunit, the input end of the first delay unit is connected to the first connection node, and the second delay switch subunit is connected to the first connection node.

[0012] Optionally, the first delay unit includes a first delay chip and a first delay circuit.

[0013] Optionally, the first delay circuit includes a first delay resistor, a second delay resistor and a first delay capacitor, the first delay resistor and the second delay resistor are arranged in series and grounded, the node of the first delay resistor and the second delay resistor is connected to the input end of the first delay chip, the first delay resistor is connected to the first connection node, and the first delay capacitor is respectively connected to the input end of the first delay chip, the first delay resistor and the second delay resistor.

[0014] Optionally, the first switch sub-unit includes a first switch sub-circuit and a second MOS transistor.

[0015] Optionally, the first switch subunit includes a first switch resistor, a second switch resistor, and a first switch capacitor; the output end of the first delay chip, the first switch resistor, and the gate of the second MOS tube are arranged in series; the connection node between the first switch resistor and the gate of the second MOS tube is connected in series with the first switch capacitor and is grounded; the source of the second MOS tube, the second switch resistor, and a DC power supply are arranged in series; and the connection node between the source of the second MOS tube and the second switch resistor is connected to the gate of the first MOS tube.

[0016] Optionally, the second switch sub-unit includes a second switch sub-circuit and a third MOS transistor.

[0017] Optionally, the second switch subunit includes a third switch resistor, a fourth switch resistor, and a second switch capacitor. The output end of the first delay chip, the third switch resistor, and the gate of the third MOS tube are arranged in series. The connection node between the third switch resistor and the gate of the third MOS tube is connected to the second switch capacitor in series and grounded. The source of the third MOS tube is connected to the source of the first MOS tube through the fourth switch resistor.

[0018] Optionally, the second switch sub-unit further includes a sixth switch resistor and a fourth MOS transistor, the gate of the fourth MOS transistor is connected to the node of the third MOS transistor and the sixth switch resistor, the source of the fourth MOS transistor is arranged in series with a seventh switch resistor and a second preset power supply, and the node of the seventh switch resistor and the second preset power supply is connected to the load for outputting a start indication signal.

[0019] A second aspect of an embodiment of the present invention provides a power supply control circuit adapted to the hot-swap control circuit described above, configured within a board for providing a DC power supply to the hot-swap control circuit, comprising:

[0020] A second delay module and a second switch module are respectively connected to the first preset power supply, the second switch module is connected to the first switch module, the second switch module includes a third switch sub-unit, a fourth switch sub-unit and a fifth switch sub-unit, the third switch sub-unit and the fourth switch sub-unit are turned on corresponding to the second delay module, and the fifth switch sub-unit is turned on in response to the second delay module or the active start module. After the third switch sub-unit, the fourth switch sub-unit and the fifth switch sub-unit are turned on at the same time, the power supply control circuit supplies power to the hot plug control circuit.

[0021] Optionally, the second delay module includes a second delay circuit and a second delay chip.

[0022] Optionally, the second delay circuit includes a third delay resistor, a fourth delay resistor and a second delay capacitor, the first preset power supply, the third delay resistor and the fourth delay resistor are connected in series and grounded, the node of the third delay resistor and the fourth delay resistor is connected to the input end of the second delay chip, and the second delay capacitor is connected to the input end of the second delay chip.

[0023] Optionally, the third switch subunit includes a fifth MOS tube and an eighth switch resistor, the source of the fifth MOS tube is connected to the first preset power supply, the drain of the fifth MOS tube is connected to the hot plug control circuit, and the eighth switch resistor is respectively connected to the drain of the fifth MOS tube and the gate of the fifth MOS tube.

[0024] Optionally, the fourth switch sub-unit includes a sixth MOS tube, a ninth switch resistor, and a third switch capacitor; the gate of the sixth MOS tube, the ninth switch resistor, and the output end of the second delay chip are connected in series; a node between the gate of the sixth MOS tube and the ninth switch resistor is connected in series with the third switch capacitor and is grounded; and a node between the eighth switch resistor and the gate of the fifth MOS tube is connected to the source of the sixth MOS tube.

[0025] Optionally, the fifth switch sub-unit includes a seventh MOS transistor and a tenth switch resistor, the gate of the seventh MOS transistor is connected in series with the tenth switch resistor and the output end of the second delay chip, the source of the seventh MOS transistor is connected to the drain of the sixth MOS transistor, and the drain of the seventh MOS transistor is grounded.

[0026] Optionally, the fifth switch sub-unit includes a seventh MOS transistor and an eleventh switch resistor. The active startup power supply, the eleventh switch resistor and the gate of the seventh MOS transistor are connected in series. The source of the seventh MOS transistor is connected to the drain of the sixth MOS transistor, and the drain of the seventh MOS transistor is grounded.

[0027] A third aspect of an embodiment of the present invention provides a hot-swap control method, comprising: after the board determines that there is a DC power input, based on the first voltage divider module, controlling the energy storage module to store energy, and inputting a high-level signal to the first delay module; after determining that a first preset time has been reached, the first delay module outputs a high-level signal to control the first switch module to form a path so that the DC power supply supplies power to the board; the first delay module outputs a normal power supply signal to the load of the board so that the load receives the DC power input.

[0028] Optionally, after the board determines that the system into which it is inserted has a DC power input, it controls the energy storage module to store energy based on the first voltage divider module, and before the step of inputting a high-level signal to the first delay module, it also includes the following steps: after the board determines that the system into which it is inserted has a first preset power input, the second delay module controls the third switch sub-unit and the fourth switch sub-unit of the second switch module to form a path when it determines that the second preset time has been reached, and controls the fifth switch sub-unit of the second switch module to form a path so that the third switch sub-unit outputs DC power; or, the fifth switch sub-unit forms a path in response to actively starting the power supply so that the third switch sub-unit outputs DC power.

[0029] Optionally, the first delay module and the second delay module are respectively provided with a first delay algorithm and a second delay algorithm. The first delay module calculates according to the first delay algorithm based on the input voltage value to obtain a first preset time. The second delay module calculates according to the second delay algorithm based on the input voltage value and the first preset time to obtain a second preset time.

[0030] Optionally, the first delay module calculates according to the first delay algorithm based on the input voltage value to obtain the first preset time, including: the first delay module obtains the first moment of receiving the voltage value, judges that the voltage value reaches a relatively stable state after judging that the voltage value is the same at multiple moments, obtains the second voltage value at the second moment when it first reaches the stable state, counts the voltage values at the first moment and the second moment to obtain the corresponding first voltage function, calculates the first slope from the first moment to the second moment, the horizontal axis of the first voltage function is time, and the vertical axis is voltage value, and the first preset time is calculated based on the first delay algorithm according to the first voltage value and the first slope at the first moment.

[0031] Optionally, the counting of voltage values from the first moment to the second moment to obtain a corresponding first voltage function and calculating a first slope from the first moment to the second moment, where the abscissa of the first voltage function is time and the ordinate is voltage value, includes: using a first coordinate point corresponding to the first moment and the first voltage value as a starting point of the first voltage function, using a second coordinate point based on the second moment and the second voltage value as an end point of the first voltage function, counting the voltage values at all moments between the first moment and the second moment to obtain the first voltage function, and the first delay algorithm calculating the first preset time using the following formula:

[0032] in, is the first preset time, is the first reference time, is the first slope weight value, is the first constant value, For the second moment, For the first moment, is the first voltage value, is the second voltage value, is the first peak power weight, is the first normalized value.

[0033] Optionally, the second delay module calculates the second preset time according to a second delay algorithm based on the input voltage value and the second preset time, including: the second delay module obtains a third moment of receiving the voltage value, determines that the voltage value reaches a relatively stable state after determining that the voltage value is the same at multiple moments, obtains a fourth voltage value at a fourth moment when the stable state is first reached, calculates the voltage values at the third moment and the fourth moment to obtain a corresponding second voltage function, calculates a second slope from the third moment to the fourth moment, the abscissa of the second voltage function is time, and the ordinate is voltage value, and calculates the second preset time according to the third voltage value at the third moment, the second slope, and the first preset time based on the second delay algorithm;

[0034] The second delay algorithm calculates the second preset time by the following formula:

[0035] in, is the second preset time, is the second reference time, is the second slope weight value, is the second constant value, For the fourth moment, For the third moment, is the third voltage value, is the fourth voltage value, is the second peak power weight, is the second normalized value, is the third reference time, is the third normalized value.

[0036] The present invention provides a hot-swap control circuit, a power supply control circuit, and a hot-swap control method. The circuit structure does not require the use of a specific dedicated chip to achieve hot-swap protection, greatly reducing costs. The overall circuit structure is cleverly and reasonably designed. Through the provision of a delay module and an energy storage module, as well as the closing control of a switch module, the instantaneous current of the board insertion is buffered and delayed, reducing damage to corresponding components and ensuring the stability, reliability, and system availability of the mainboard during use. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 This is a connection diagram of a hot-swap control circuit and a power supply control circuit provided by the present invention;

[0038] Figure 2 1 is a schematic diagram of a hot-swap control circuit provided by an embodiment of the present invention;

[0039] Figure 3 is another schematic diagram of a hot-swap control circuit provided by an embodiment of the present invention;

[0040] Figure 4 is a schematic diagram of a fifth switch sub-unit provided by an embodiment of the present invention;

[0041] Figure 5 is a schematic diagram of another fifth switch sub-unit provided by an embodiment of the present invention;

[0042] Figure 6 1 is a schematic diagram of the connection between the first delay module and the second delay module provided in an embodiment of the present invention;

[0043] Figure 7 This is a schematic diagram of a first voltage function provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0044] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0045] The terms "first," "second," "third," "fourth," and so forth (if any) in the description and claims of the present invention and in the accompanying drawings are used to distinguish similar items and are not necessarily used to describe a particular order or sequential sequence. It should be understood that the terms used in this manner are interchangeable where appropriate, such that the embodiments of the present invention described herein can be practiced in sequences other than those illustrated or described herein.

[0046] It should be understood that in various embodiments of the present invention, the size of the sequence number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0047] It should be understood that in the present invention, "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products or apparatuses.

[0048] It should be understood that in the present invention, "multiple" refers to two or more. "And / or" is only a description of the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "Contains A, B and C", "Contains A, B, C" means that A, B, and C are all included, "Contains A, B or C" means that one of A, B, and C is included, and "Contains A, B and / or C" means that any one, any two, or any three of A, B, and C are included.

[0049] It should be understood that, in the present invention, "B corresponding to A," "B corresponding to A," "A corresponds to B," or "B corresponds to A" means that B is associated with A and B can be determined based on A. Determining B based on A does not mean determining B based solely on A; B can also be determined based on A and / or other information. A and B match when the similarity between A and B is greater than or equal to a preset threshold.

[0050] Depending on the context, "if" as used herein may be interpreted as "when" or "when" or "in response to determining" or "in response to detecting."

[0051] The following specific embodiments are used to describe the technical solution of the present invention in detail. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0052] See also Figure 1 , is a schematic diagram illustrating the connection between the hot-swap control circuit and the power supply control circuit provided by an embodiment of the present invention. The output of the power supply control circuit is connected to the input of the hot-swap control circuit to provide DC power to the hot-swap control circuit. It is worth noting that the hot-swap control circuit and the power supply control circuit form an integrated control circuit configured within the board for coordinated control, thereby buffering transient currents and minimizing damage to components such as the power connector, PCB copper foil, and the system backplane's power connector caused by board insertion.

[0053] See also Figure 2 , is a schematic diagram of a hot-swap control circuit provided by an embodiment of the present invention. The hot-swap control circuit is configured in a board and connected to a load to achieve current buffering.

[0054] See also Figure 3 , is another schematic diagram of a hot-swap control circuit provided by an embodiment of the present invention. The hot-swap control circuit includes a first switch module and a first voltage divider module respectively connected to a DC power supply, and the first switch module and the first voltage divider module are arranged in parallel.

[0055] Depend on Figure 2 It can be seen that the first connection node between the output end of the first switch module and the output end of the first voltage divider module is connected to the first delay module, the energy storage module and the load module respectively.

[0056] The first switch module includes a first MOS transistor Q4, the drain of which is connected to the energy storage module and the load module. In an initial state, the first MOS transistor Q4 is closed, that is, not conducting. The initial state refers to a state in which the DC power supply has not yet provided voltage to the hot-swap control circuit.

[0057] The energy storage module is used for charging and energy storage. Since hot plugging will generate a spike voltage, which is enough to cause the components to break down, the energy storage module can absorb the spike voltage and protect the components.

[0058] The output end of the first delay module is connected to the load module and the first switch module respectively. The first delay module is used to delay the voltage to ensure the charging efficiency of the energy storage module.

[0059] In some embodiments, the first voltage divider module includes a first voltage divider resistor R1034, the input end of which is connected to the DC power supply and the source of the first MOS transistor Q4. The output end of the first voltage divider resistor R1034 is connected to the first delay module, the energy storage module, and the load module. It is understood that the first voltage divider module can divide the voltage input by the DC power supply through the first voltage divider resistor R1034.

[0060] In the above embodiment, the energy storage module includes multiple capacitors arranged in parallel, and the energy storage module includes multiple capacitors arranged in parallel, including: the energy storage module includes a first energy storage capacitor C2369, a second energy storage capacitor C2370, a third energy storage capacitor C2371, a first electrolytic capacitor EC37 and a second electrolytic capacitor EC21 arranged in parallel.

[0061] Among them, the first energy storage capacitor C2369, the second energy storage capacitor C2370, the third energy storage capacitor C2371, the first electrolytic capacitor EC37 and the second electrolytic capacitor EC21 are respectively connected to the drain of the first MOS tube Q4 and the output end of the first voltage divider resistor R1034; the first energy storage capacitor C2369, the second energy storage capacitor C2370, the third energy storage capacitor C2371, the first electrolytic capacitor EC37 and the second electrolytic capacitor EC21 are respectively connected to the load module.

[0062] The energy storage module includes multiple energy storage capacitors and electrolytic capacitors arranged in parallel. Since hot plugging will generate a spike voltage, which is enough to cause the components to break down, the energy storage capacitors and electrolytic capacitors connected in parallel can absorb the spike voltage and protect the components.

[0063] In some embodiments, the first delay module includes a first delay unit, a first switch subunit, and a second switch subunit, wherein the input end of the first delay unit is connected to the first connection node, and the second delay switch subunit is connected to the first connection node.

[0064] It is worth mentioning that the function of the first delay module is to delay the voltage to ensure the charging efficiency of the energy storage module, thereby achieving voltage buffering.

[0065] For details, see Figure 2 The first delay unit includes a first delay chip and a first delay circuit. The first delay circuit includes a first delay resistor R1038, a second delay resistor R1043, and a first delay capacitor C2375. The first delay chip can be a VSS chip, and the delay is achieved through the cooperation of the second delay resistor R1043 and the first delay capacitor C2375.

[0066] The first delay resistor R1038 and the second delay resistor R1043 are connected in series and grounded. The node between the first delay resistor R1038 and the second delay resistor R1043 is connected to the input terminal of the first delay chip. The first delay resistor R1038 is connected to the first connection node. The first delay capacitor C2375 is connected to the input terminal of the first delay chip, the first delay resistor R1038, and the second delay resistor R1043, respectively.

[0067] Working Principle: The voltage from the DC power supply flows through the first voltage divider module into the first delay unit. The energy storage properties of the first delay capacitor C2375 in the first delay unit cause a certain delay in the voltage passing through, thus achieving a delay. After the delay, the voltage flows into the first switch sub-unit.

[0068] In some embodiments, the first switch sub-unit includes a first switch sub-circuit and a second MOS transistor Q6. The first switch sub-circuit includes a first switch resistor R1040, a second switch resistor R1036, and a first switch capacitor C2373. The output end of the first delay chip, the first switch resistor R1040, and the gate of the second MOS transistor Q6 are arranged in series. The connection node between the first switch resistor R1040 and the gate of the second MOS transistor Q6 is connected in series with the first switch capacitor C2373 and is grounded. The source of the second MOS transistor Q6, the second switch resistor R1036, and the DC power supply are arranged in series. The connection node between the source of the second MOS transistor Q6 and the second switch resistor R1036 is connected to the gate of the first MOS transistor Q4.

[0069] Working principle: The voltage output by the first delay unit will flow into the first switch sub-unit, and the gate of the second MOS tube Q6 in the first switch sub-unit will receive the voltage, thereby turning on the second MOS tube Q6 and energizing the gate of the first MOS tube Q4.

[0070] In some embodiments, the second switch sub-unit includes a second switch sub-circuit and a third MOS transistor Q9. The second switch sub-circuit includes a third switch resistor R1046, a fourth switch resistor R1041, and a second switch capacitor C2376. The output end of the first delay chip, the third switch resistor R1046, and the gate of the third MOS transistor Q9 are arranged in series. The connection node between the third switch resistor R1046 and the gate of the third MOS transistor Q9 is connected to the second switch capacitor C2376 in series with each other and is grounded. The source of the third MOS transistor Q9 is connected to the source of the first MOS transistor Q4 through a fifth switch resistor.

[0071] Working Principle: The voltage output by the first delay unit flows into the second switch sub-unit through the third switch resistor R1046. The gate of the third MOS transistor Q9 in the second switch sub-unit receives the voltage, turning on the third MOS transistor Q9. The voltage is then transferred through the source of the third MOS transistor Q9 to the fifth switch resistor, which then energizes the source of the first MOS transistor Q4. At this point, the first MOS transistor Q4 is turned on.

[0072] In other embodiments, the second switch sub-unit further includes a sixth switch resistor R664 and a fourth MOS transistor Q7; the gate of the fourth MOS transistor Q7 is connected to the node between the third MOS transistor Q9 and the fifth switch resistor, the source of the fourth MOS transistor Q7 is connected in series with the seventh switch resistor and the second preset power supply, and the node between the seventh switch resistor and the second preset power supply is connected to the load for outputting a start indication signal.

[0073] The second preset power supply includes a 3.3V power supply. After the source of the third MOS transistor Q9 is energized, the gate of the fourth MOS transistor Q7 is energized, and the fourth MOS transistor Q7 is turned on. The voltage output from the source of the fourth MOS transistor Q7 converges with the voltage output from the second preset power supply and is connected to the load to output a start indication signal.

[0074] In the above embodiment, the capacity of the second switch capacitor C2376 needs to be greater than that of the first switch capacitor C2373, so that the second switch sub-unit can store energy longer and delay longer.

[0075] See also Figure 4 , is a power supply control circuit provided in an embodiment of the present invention. This power supply control circuit is adapted for the hot-swap control circuit of the above embodiment. Similar to the hot-swap control circuit, the power supply control circuit is also configured within the board to provide a DC power supply to the hot-swap control circuit. The DC power supply is a 12V DC power supply.

[0076] In some embodiments, the power supply control circuit includes a second delay module and a second switch module respectively connected to the first preset power supply, and the second switch module is connected to the first switch module. Wherein, the first preset power supply includes a 12V power supply, and at the same time, see Figure 4 , the first preset power supply may further include a fuse device and a voltage regulator diode.

[0077] Among them, the second switch module includes a third switch sub-unit, a fourth switch sub-unit and a fifth switch sub-unit. The third switch sub-unit and the fourth switch sub-unit are turned on in response to the second delay module; the fifth switch sub-unit is turned on in response to the second delay module or the active turning-on module; after the third switch sub-unit, the fourth switch sub-unit and the fifth switch sub-unit are turned on at the same time, the power supply control circuit supplies power to the hot plug control circuit.

[0078] See also Figure 4 The second delay module includes a second delay circuit and a second delay chip.

[0079] The second delay circuit includes a third delay resistor R1037, a fourth delay resistor R1042 and a second delay capacitor C2374. The first preset power supply, the third delay resistor R1037 and the fourth delay resistor R1042 are connected in series and grounded. The node between the third delay resistor R1037 and the fourth delay resistor R1042 is connected to the input end of the second delay chip, and the second delay capacitor C2374 is connected to the input end of the second delay chip.

[0080] Working Principle: The voltage from the first preset power supply is fed through the third delay resistor R1037 to the second delay capacitor C2374 and the second delay chip of the second delay module. The energy storage characteristics of the second delay capacitor C2374 cause a certain delay in the voltage passing through the second delay module, thus achieving a delay. After the delay, the voltage flows into the third switch sub-unit.

[0081] In some embodiments, the third switch sub-unit includes a fifth MOS transistor Q3 and an eighth switch resistor R1035, the source of the fifth MOS transistor Q3 is connected to the first preset power supply, the drain of the fifth MOS transistor Q3 is connected to the hot plug control circuit, and the eighth switch resistor R1035 is respectively connected to the drain of the fifth MOS transistor Q3 and the gate of the fifth MOS transistor Q3.

[0082] The fourth switch sub-unit includes a sixth MOS transistor Q5, a ninth switch resistor R1039 and a third switch capacitor;

[0083] The gate of the sixth MOS transistor Q5, the ninth switch resistor R1039, and the output end of the second delay chip are connected in series. The node between the gate of the sixth MOS transistor Q5 and the ninth switch resistor R1039 is connected in series with the third switch capacitor and is grounded. The node between the eighth switch resistor R1035 and the gate of the fifth MOS transistor Q3 is connected to the source of the sixth MOS transistor Q5.

[0084] It is worth mentioning that the present invention provides two implementation methods for the fifth sub-switch, one is automatic control and the other is manual active control, as follows:

[0085] The first implementation method:

[0086] See also Figure 4The fifth switch sub-unit includes a seventh MOS transistor Q8 and a tenth switch resistor R1044. The gate of the seventh MOS transistor Q8 is connected in series with the tenth switch resistor R1044 and the output terminal of the second delay chip. The source of the seventh MOS transistor Q8 is connected to the drain of the sixth MOS transistor Q5, and the drain of the seventh MOS transistor Q8 is grounded. It can be understood that in this manner, the gate of the seventh MOS transistor Q8 of the fifth switch sub-unit is energized by the output of the second delay chip. After the second delay chip delays the voltage, the gate of the seventh MOS transistor Q8 is energized through the tenth switch resistor R1044.

[0087] Second implementation method:

[0088] See also Figure 5 The fifth switch sub-unit includes a seventh MOS transistor Q8 and an eleventh switch resistor R1045. The active startup power supply, the eleventh switch resistor R1045, and the gate of the seventh MOS transistor Q8 are connected in series. The source of the seventh MOS transistor Q8 is connected to the drain of the sixth MOS transistor Q5, and the drain of the seventh MOS transistor Q8 is grounded. It is understood that in this manner, the gate of the seventh MOS transistor Q8 of the fifth switch sub-unit is powered by the active startup power supply, which can be controlled by a staff member.

[0089] An embodiment of the present invention further provides a hot plug control method, comprising the following steps:

[0090] After the board determines that there is a DC power input, it controls the energy storage module to store energy based on the first voltage divider module and inputs a high-level signal to the first delay module. It can be understood that the energy storage module stores energy through the capacitor and the first delay module receives the voltage.

[0091] After determining that a first preset time has elapsed, the first delay module outputs a high-level signal to control the first switch module to establish a path for the DC power supply to supply power to the board. It is understood that after a predetermined delay, the first delay module inputs a voltage to the first switch module, controlling the first switch module to conduct.

[0092] The first delay module outputs a power normal signal to the load of the board, so that the load receives a DC power input.

[0093] In some embodiments, after the board determines that the system being inserted into the running system has a DC power input, the board controls the energy storage module to store energy based on the first voltage divider module, and before the step of inputting a high-level signal to the first delay module, further includes the following steps:

[0094] After the board determines that the system being inserted into has the first preset power input, the second delay module controls the third switch subunit and the fourth switch subunit of the second switch module to form a path when it determines that the second preset time has arrived.

[0095] Controlling the fifth switch sub-unit of the second switch module to form a path so that the third switch sub-unit outputs a DC power supply; or,

[0096] The fifth switch sub-unit forms a path in response to the active start-up power supply, so that the third switch sub-unit outputs a DC power supply.

[0097] It is understandable that, since this solution provides two implementations of the fifth switch subunit, the above provides different control logics corresponding to different methods. Figure 4 The implementation method is automatic control; the second corresponding Figure 5 The implementation method is an active control implementation method.

[0098] Based on the above embodiment, this solution also provides a delay algorithm, which is as follows:

[0099] See also Figure 6 , is a connection diagram of the first delay module and the second delay module provided in an embodiment of the present invention, the first delay module and the second delay module are respectively provided with a first delay algorithm and a second delay algorithm.

[0100] The first delay module calculates according to a first delay algorithm based on the input voltage value to obtain a first preset time, and the second delay module calculates according to a second delay algorithm based on the input voltage value and the first preset time to obtain a second preset time.

[0101] It is understandable that this solution calculates the corresponding delay duration through a delay algorithm to achieve delay control.

[0102] In some embodiments, the first delay module calculates the first preset time based on the input voltage value according to the first delay algorithm, including:

[0103] The first delay module obtains a first moment of receiving a voltage value, determines that the voltage value reaches a relatively stable state after determining that the voltage value is the same at multiple moments, and obtains a second voltage value at a second moment when the voltage value reaches the stable state for the first time.

[0104] It can be understood that the first moment of receiving the voltage value refers to the initial moment of receiving the voltage of the DC power supply; when the voltage is stable, this solution will collect the second moment. It can be understood that the time from the first moment to the second moment is the time required for the voltage to stabilize.

[0105] See also Figure 7 , the voltage values at the first moment and the second moment are counted to obtain a corresponding first voltage function, and a first slope from the first moment to the second moment is calculated, where the abscissa of the first voltage function is time and the ordinate is voltage value.

[0106] This solution will obtain a first voltage function through the above data. The first voltage function can be a linear function. It is understandable that, knowing the first moment, the second moment, and the voltage values at the first moment and the second moment, the first slope can be calculated to obtain the first voltage function.

[0107] The first preset time is calculated based on the first voltage value and the first slope at the first moment and the first delay algorithm.

[0108] It is worth mentioning that the first voltage value at the first moment may not be fixed. Therefore, when detecting the first voltage value at the first moment, this solution can calculate the required dynamic delay time, that is, the above-mentioned first preset time, through the above-mentioned first voltage function.

[0109] In some embodiments, calculating a first slope from the first moment to the second moment by obtaining a corresponding first voltage function by counting voltage values from the first moment to the second moment, where the abscissa of the first voltage function is time and the ordinate is voltage value, includes:

[0110] A first coordinate point corresponding to the first voltage value at the first moment is used as the starting point of the first voltage function, and a second coordinate point corresponding to the second voltage value at the second moment is used as the end point of the first voltage function.

[0111] It is understandable that this solution first determines the data at the collection start point and the data at the collection end point, and then calculates the voltage values at all times between the first moment and the second moment to obtain the first voltage function.

[0112] The first delay algorithm calculates the first preset time by the following formula:

[0113]

[0114] Among them, among them, is the first preset time, is the first reference time, is the first slope weight value, is the first constant value, For the second moment, For the first moment, is the first voltage value, is the second voltage value, is the first peak power weight, is the first normalized value.

[0115] In the above algorithm, It can be preset by the staff, for example, 0.5S, Represents the first slope, due to Greater than ,therefore, is a negative value, that is, the first slope is a negative value, The smaller it is, the faster the voltage drops. The larger the value, the larger the first slope weight value is, so that the first preset time is longer. Represents the data of the first voltage value dimension. The larger the first voltage value is, the greater the weight of the first peak power is. The larger the offset, the greater the first preset time The first slope weight value, the first constant value, the first peak power weight and the first normalized value may be preset by a staff.

[0116] In some embodiments, the second delay module calculates the second preset time based on the input voltage value and the second preset time according to the second delay algorithm, including:

[0117] The second delay module obtains a third time instant at which the voltage value is received, determines that the voltage value has reached a relatively stable state after determining that the voltage value is the same at multiple time instants, and obtains a fourth voltage value at a fourth time instant at which the voltage value first reaches a stable state. It is understood that the third time instant is the time when the voltage value is initially detected, and the fourth time instant is the time when the voltage stabilizes.

[0118] The voltage values at the third and fourth moments are counted to obtain a corresponding second voltage function, and a second slope is calculated from the third to fourth moments, with the abscissa of the second voltage function representing time and the ordinate representing voltage. Similar to the calculation of the first slope, this solution calculates the second slope. The second preset time is then calculated using a second delay algorithm based on the third voltage value at the third moment, the second slope, and the first preset time.

[0119] The second delay algorithm calculates the second preset time by the following formula:

[0120]

[0121] in, is the second preset time, is the second reference time, is the second slope weight value, is the second constant value, For the fourth moment, For the third moment, is the third voltage value, is the fourth voltage value, is the second peak power weight, is the second normalized value, is the third reference time, is the third normalized value.

[0122] In the above formula, the difference from calculating the first preset time is that the longer the first preset time is, the longer the first delay module needs, and the longer the second delay module needs, so the second preset time also needs to be longer. The larger the value is, the longer the second preset time calculated by the above formula is. The second slope weight value, the second constant value, the second peak power weight, the second normalized value, the third reference time and the third normalized value can be preset by the staff.

[0123] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A hot-swap control circuit, characterized in that: Configured in the board and connected to the load, including: A first switch module and a first voltage divider module are respectively connected to the DC power supply, and the first switch module and the first voltage divider module are arranged in parallel; a first connection node of an output end of the first switch module and an output end of the first voltage divider module is respectively connected to a first delay module, an energy storage module, and a load module; The first switch module includes a first MOS transistor, the drain of the first MOS transistor is connected to the energy storage module and the load module; The output end of the first delay module is connected to the load module and the first switch module respectively; The first delay module includes a first delay unit, a first switch subunit and a second switch subunit; The input end of the first delay unit is connected to the first connection node, and the second switch sub-unit is connected to the first connection node; The first delay unit includes a first delay chip and a first delay circuit; The first switch sub-unit includes a first switch sub-circuit and a second MOS transistor; The first switch subcircuit includes a first switch resistor, a second switch resistor and a first switch capacitor; The output end of the first delay chip, the first switch resistor, and the gate of the second MOS transistor are arranged in series, and the connection node between the first switch resistor and the gate of the second MOS transistor and the first switch capacitor are connected to the ground in series; The source of the second MOS transistor, the second switch resistor and the DC power supply are connected in series, and the connection node between the source of the second MOS transistor and the second switch resistor is connected to the gate of the first MOS transistor.

2. The hot-swap control circuit according to claim 1, wherein: The first voltage divider module includes a first voltage divider resistor, the input end of the first voltage divider resistor is connected to the DC power supply and the source of the first MOS tube, and the output end of the first voltage divider resistor is connected to the first delay module, the energy storage module and the load module.

3. The hot-swap control circuit according to claim 2, wherein: The energy storage module includes a plurality of capacitors connected in parallel.

4. The hot-swap control circuit according to claim 3, wherein: The energy storage module includes a plurality of capacitors connected in parallel, including: The energy storage module includes a first energy storage capacitor, a second energy storage capacitor, a third energy storage capacitor, a first electrolytic capacitor and a second electrolytic capacitor arranged in parallel; The first energy storage capacitor, the second energy storage capacitor, the third energy storage capacitor, the first electrolytic capacitor and the second electrolytic capacitor are respectively connected to the drain of the first MOS tube and the output end of the first voltage divider resistor; The first energy storage capacitor, the second energy storage capacitor, the third energy storage capacitor, the first electrolytic capacitor and the second electrolytic capacitor are respectively connected to the load module.

5. The hot-swap control circuit according to claim 4, wherein: The first delay circuit includes a first delay resistor, a second delay resistor and a first delay capacitor; The first delay resistor and the second delay resistor are connected to the ground in series, the node between the first delay resistor and the second delay resistor is connected to the input end of the first delay chip, and the first delay resistor is connected to the first connection node; The first delay capacitor is connected to the input end of the first delay chip, the first delay resistor, and the second delay resistor respectively.

6. The hot-swap control circuit according to claim 1, wherein: The second switch sub-unit includes a second switch sub-circuit and a third MOS transistor.

7. The hot-swap control circuit according to claim 6, wherein: The second switch subcircuit includes a third switch resistor, a fourth switch resistor and a second switch capacitor; The output end of the first delay chip, the third switch resistor, and the gate of the third MOS transistor are arranged in series, and the connection node between the third switch resistor and the gate of the third MOS transistor and the second switch capacitor are connected in series to ground; The source of the third MOS transistor is connected to the source of the first MOS transistor through a fourth switch resistor.

8. The hot-swap control circuit according to claim 7, wherein: The second switch subunit further includes a sixth switch resistor and a fourth MOS tube; The gate of the fourth MOS transistor is connected to the node of the third MOS transistor and the sixth switch resistor, the source of the fourth MOS transistor is connected in series with the seventh switch resistor and the second preset power supply, and the node of the seventh switch resistor and the second preset power supply is connected to the load for outputting a start indication signal.

9. A power supply control circuit adapted to the hot-swap control circuit according to claim 8, characterized in that: Configured in the board to provide DC power to the hot-swap control circuit, including: a second delay module and a second switch module respectively connected to the first preset power supply, wherein the second switch module is connected to the first switch module; The second switch module includes a third switch sub-unit, a fourth switch sub-unit and a fifth switch sub-unit, and the third switch sub-unit and the fourth switch sub-unit are turned on corresponding to the second delay module; The fifth switch subunit is turned on in response to the second delay module or the active turning-on module; After the third switch subunit, the fourth switch subunit, and the fifth switch subunit are turned on at the same time, the power supply control circuit supplies power to the hot-swap control circuit.

10. The power supply control circuit according to claim 9, characterized in that: The second delay module includes a second delay circuit and a second delay chip.

11. The power supply control circuit according to claim 10, characterized in that: The second delay circuit includes a third delay resistor, a fourth delay resistor and a second delay capacitor; The first preset power supply, the third delay resistor, and the fourth delay resistor are connected to the ground in series, the node between the third delay resistor and the fourth delay resistor is connected to the input end of the second delay chip, and the second delay capacitor is connected to the input end of the second delay chip.

12. The power supply control circuit according to claim 11, characterized in that: The third switch subunit includes a fifth MOS transistor and an eighth switch resistor, the source of the fifth MOS transistor is connected to the first preset power supply, the drain of the fifth MOS transistor is connected to the hot plug control circuit, and the eighth switch resistor is respectively connected to the drain of the fifth MOS transistor and the gate of the fifth MOS transistor.

13. The power supply control circuit according to claim 12, characterized in that: The fourth switch sub-unit includes a sixth MOS tube, a ninth switch resistor and a third switch capacitor; The gate of the sixth MOS transistor, the ninth switch resistor, and the output end of the second delay chip are connected in series, and the node between the gate of the sixth MOS transistor and the ninth switch resistor and the third switch capacitor are connected in series and grounded; A node between the eighth switch resistor and the gate of the fifth MOS transistor is connected to the source of the sixth MOS transistor.

14. The power supply control circuit according to claim 13, characterized in that: The fifth switch sub-unit includes a seventh MOS tube and a tenth switch resistor; The gate of the seventh MOS tube is connected in series with the tenth switch resistor and the output end of the second delay chip, the source of the seventh MOS tube is connected to the drain of the sixth MOS tube, and the drain of the seventh MOS tube is grounded.

15. The power supply control circuit according to claim 13, wherein: The fifth switch sub-unit includes a seventh MOS tube and an eleventh switch resistor; An active startup power supply, an eleventh switch resistor, and a gate of a seventh MOS transistor are connected in series. The source of the seventh MOS transistor is connected to the drain of the sixth MOS transistor, and the drain of the seventh MOS transistor is grounded.

16. The hot-swap control method according to any one of claims 1 to 8, characterized in that: include: After determining that there is a DC power input, the board controls the energy storage module to store energy based on the first voltage divider module, and inputs a high-level signal to the first delay module; After determining that the first preset time has elapsed, the first delay module outputs a high-level signal to control the first switch module to form a path so that the DC power supply can supply power to the board; The first delay module outputs a power supply normal signal to the load of the board, so that the load receives a DC power input.

17. The hot-swap control method according to claim 16, wherein: include: After the board determines that the system being inserted into the running system has a DC power input, the board controls the energy storage module to store energy based on the first voltage divider module, and before the step of inputting a high-level signal to the first delay module, the board further includes the following steps: After the board determines that the system being inserted into the running system has the first preset power input, the second delay module controls the third switch subunit and the fourth switch subunit of the second switch module to form a path when it determines that the second preset time has arrived; Controlling the fifth switch sub-unit of the second switch module to form a path so that the third switch sub-unit outputs a DC power supply; or, The fifth switch sub-unit forms a path in response to the active start-up power supply, so that the third switch sub-unit outputs a DC power supply.

18. The hot-swap control method according to claim 17, wherein: The first delay module and the second delay module are respectively provided with a first delay algorithm and a second delay algorithm; The first delay module calculates according to a first delay algorithm based on the input voltage value to obtain a first preset time, and the second delay module calculates according to a second delay algorithm based on the input voltage value and the first preset time to obtain a second preset time.

19. The hot-swap control method according to claim 18, wherein: The first delay module calculates the first preset time based on the input voltage value according to the first delay algorithm, including: The first delay module obtains a first moment of receiving a voltage value, determines that the voltage value reaches a relatively stable state after determining that the voltage value is the same at multiple moments, and obtains a second voltage value at a second moment when the voltage value reaches the stable state for the first time; Counting voltage values at a first moment and a second moment to obtain a corresponding first voltage function, and calculating a first slope from the first moment to the second moment, where the abscissa of the first voltage function is time and the ordinate is voltage value; The first preset time is calculated based on the first voltage value and the first slope at the first moment and the first delay algorithm.

Images