Trimming circuit, trimming system and switching power supply

Abstract

The present application is applicable to the technical field of switching power supplies, and provides a trimming circuit, a trimming system and a switching power supply. The trimming circuit includes a first resistor module, a first switch module, b second resistor modules and b second switch modules. When the first first switch module is in an on state and the cth second switch module is in an on state, the difference between the voltage of the first output terminal and the first input terminal is the sum of the first voltage and the second voltage, and the difference between the voltage of the second output terminal and the second input terminal is the sum of the third voltage, the fourth voltage and the fifth voltage. When the first second switch module is in an on state and the fth first switch module is in an on state, the difference between the voltage of the first output terminal and the first input terminal is the sum of the sixth voltage, the seventh voltage and the eighth voltage, and the difference between the voltage of the second output terminal and the second input terminal is the sum of the ninth voltage and the tenth voltage. The trimming circuit provided in the embodiment of the present application can reduce the layout area of ​​the trimming circuit.

Description

Technical Field

[0001] The present application belongs to the technical field of switching power supplies, and in particular relates to a trimming circuit, a trimming system and a switching power supply. Background Art

[0002] With the rapid development of science and technology, DC-DC switching power supplies are widely used in various electronic devices due to their high efficiency and flexibility, including consumer electronic products AMOLED (Active-Matrix Organic Light-Emitting Diode). AMOLED has high requirements for the output accuracy of DC-DC switching power supplies. As an important part of the entire system, the accuracy of the error amplifier circuit directly affects the performance of the chip. Usually, when the input stage of the error amplifier uses MOS tube input, there will be a large offset voltage, which has a great impact on the accuracy of the system. In order to solve this problem, the traditional trimming circuit usually uses a transmission gate and a resistor to connect accordingly. By controlling the conduction and shutdown of the transmission gate, the number of resistors in series between the input and output terminals can be selected to determine the voltage difference between the output and input terminals. However, this design will also include the resistance of the transmission gate in the size of the voltage difference. In order to reduce the influence of the resistance of the transmission gate on the accuracy, it is necessary to reduce the electrical impedance of the transmission gate as much as possible, which requires that the size of the transmission gate must be large, resulting in a large layout area of ​​the trimming circuit. Summary of the invention

[0003] The embodiments of the present application provide a trimming circuit, a trimming system and a switching power supply, which can solve the problem of large layout area of ​​existing trimming circuits.

[0004] In a first aspect, an embodiment of the present application provides a trimming circuit, comprising a first resistor module, a first switch module, b second resistor modules and b second switch modules; a first resistor modules are connected in series in sequence, the first resistor modules and the first switch modules correspond one to one, the first end of each first resistor module is electrically connected to the first end of the corresponding first switch module, the second ends of all the first switch modules are electrically connected to each other, the first end of the first first resistor module serves as the first output end of the trimming circuit, the second end of the ath first resistor module serves as the first input end of the trimming circuit, for receiving a first voltage signal; b second resistor modules are connected in series in sequence, the second resistor modules and the second switch modules correspond one to one, the first end of each second resistor module is electrically connected to the first end of the corresponding second switch module, the second ends of all the second switch modules are electrically connected to each other, the first end of the first second resistor module serves as the second output end of the trimming circuit, the second end of the bth second resistor module serves as the second input end of the trimming circuit, for receiving a second voltage signal; wherein a and b are both integers, a≥2, b≥2;

[0005] When the first first switch module is in the on state and the cth second switch module is in the on state, the voltage difference between the first output terminal and the first input terminal is the sum of the first voltage and the second voltage, the first voltage is the product of the sum of the impedances of all the first resistor modules and the first current, and the second voltage is the product of the impedance of the first first switch module and the bias current; the voltage difference between the second output terminal and the second input terminal is the sum of the third voltage, the fourth voltage and the fifth voltage, the third voltage is the product of the sum of the impedances of d second resistor modules and the first current, the fourth voltage is the product of the sum of the impedances of e second resistor modules and the second current, and the fifth voltage is the product of the impedance of the cth second switch module and the bias current, wherein c, d, and e are all integers, 1<c≤b, d=b-c+1, and e=c-1;

[0006] When the first second switch module is in the on state and the fth first switch module is in the on state, the voltage difference between the first output terminal and the first input terminal is the sum of a sixth voltage, a seventh voltage and an eighth voltage, the sixth voltage is the product of the sum of the impedances of g first resistor modules and the first current, the seventh voltage is the product of the sum of the impedances of h first resistor modules and the second current, and the eighth voltage is the product of the impedance of the fth first switch module and the bias current; the voltage difference between the second output terminal and the second input terminal is the sum of a ninth voltage and a tenth voltage, the ninth voltage is the product of the sum of the impedances of all the second resistor modules and the first current, the tenth voltage is the product of the impedance of the first second switch module and the bias current, the impedances of all the first switch modules are equal to the impedances of all the second switch modules, and the bias current is the vector sum of the first current and the second current; wherein f, g, and h are all integers, 1<f≤a, g=a-f+1, and h=f-1.

[0007] In a possible implementation manner of the first aspect, an impedance of each of the first resistance modules is equal, an impedance of each of the second resistance modules is equal, and an impedance of the first resistance module is equal to an impedance of the second resistance module.

[0008] In a possible implementation of the first aspect, the first resistor module includes a first resistor, a first resistors are connected in series in sequence, the first ends of all the first resistors are electrically connected to the first ends of the corresponding first switch modules, the first end of the first first resistor serves as the first output end of the adjustment circuit, and the second end of the ath first resistor serves as the first input end of the adjustment circuit, for receiving the first voltage signal.

[0009] In a possible implementation of the first aspect, the first switch module includes a first switch tube, the gates of all the first switch tubes are used to receive a first control signal, the sources of all the first switch tubes are electrically connected, and the drain of each of the first switch tubes is electrically connected to the first end of the corresponding first resistance module.

[0010] In a possible implementation of the first aspect, the second resistor module includes a second resistor, b second resistors are connected in series in sequence, the first ends of all the second resistors are electrically connected to the first ends of the corresponding second switch modules, the first end of the first second resistor serves as the second output end of the adjustment circuit, and the second end of the bth second resistor serves as the second input end of the adjustment circuit, for receiving the second voltage signal.

[0011] In a possible implementation of the first aspect, the second switch module includes a second switch tube, the gates of all the second switch tubes are used to receive a second control signal, the sources of all the second switch tubes are electrically connected, and the drain of each second switch tube is electrically connected to the first end of the corresponding second resistance module.

[0012] In a possible implementation manner of the first aspect, both the first switch tube and the second switch tube are PMOS tubes.

[0013] In a possible implementation of the first aspect, the adjustment circuit also includes a driving module, which is electrically connected to all the first switch modules and all the second switch modules respectively; the driving module is used to output a first control signal to the first switch module, and is also used to output a second control signal to the second switch module.

[0014] In a second aspect, an embodiment of the present application provides a trimming system, comprising an error amplifier and the trimming circuit described in any one of the first aspects, wherein a first input terminal of the error amplifier is electrically connected to a first output terminal of the trimming circuit, a second input terminal of the error amplifier is electrically connected to a second output terminal of the trimming circuit, and an output terminal of the error amplifier is used to output a target voltage.

[0015] In a third aspect, an embodiment of the present application provides a switching power supply, comprising the adjustment system described in the second aspect.

[0016] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0017] The trimming circuit provided in the embodiment of the present application comprises a first resistor module, a first switch module, b second resistor modules and b second switch modules. When in use, the first output terminal of the trimming circuit is electrically connected to the first input terminal of the error amplifier, and the second output terminal of the trimming circuit is electrically connected to the second input terminal of the error amplifier. When the first first switch module is in the on state and the cth second switch module is in the on state, since the voltage difference between the first output terminal and the first input terminal is the sum of the first voltage and the second voltage, the voltage difference between the second output terminal and the second input terminal is the sum of the third voltage, the fourth voltage and the fifth voltage. Therefore, if there is no voltage signal input to the first input terminal and the second input terminal, the voltage difference between the first output terminal and the second output terminal is the sum of the first voltage and the second voltage minus the sum of the third voltage, the fourth voltage and the fifth voltage. Since the impedance of all the first switch modules is equal to the impedance of all the second switch modules, the second voltage is equal to the fifth voltage. Finally, it is obtained that the voltage difference between the first output terminal and the second output terminal only has a corresponding relationship with the impedance of the first resistor module, the impedance of the second resistor module, and the first current and the second current, and has nothing to do with the impedance of the first switch module and the impedance of the second switch module. Similarly, when the first second switch module is in the on state and the fth first switch module is in the on state, the eighth voltage is equal to the tenth voltage. Finally, it is obtained that the voltage difference between the first output terminal and the second output terminal only has a corresponding relationship with the impedance of the first resistor module, the impedance of the second resistor module, and the first current and the second current, and has nothing to do with the impedance of the first switch module and the impedance of the second switch module. It can be seen that the adjustment circuit provided in the embodiment of the present application can make the product of the impedance and bias current of the first switch module offset the product of the impedance and bias current of the second switch module. Therefore, when adjusting the offset voltage of the error amplifier, it is not necessary to consider the impedance size of the first switch module and the second switch module. That is, by increasing the impedance of the first switch module and the impedance of the second switch module, the size of the first switch module and the second switch module can be reduced, thereby reducing the layout area of ​​the adjustment circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0019] Figure 1 is a circuit connection diagram of an existing error amplifier input terminal;

[0020] Figure 2 It is a circuit connection diagram of an existing trimming circuit;

[0021] Figure 3 is a principle block diagram of a trimming circuit provided in an embodiment of the present application;

[0022] Figure 4 is a circuit connection diagram of a trimming circuit provided in an embodiment of the present application;

[0023] Figure 5 It is a principle block diagram of a trimming system provided in one embodiment of the present application.

[0024] In the figure, 10, adjustment circuit; 101, first resistance module; 102, first switch module; 103, second resistance module; 104, second switch module; 20, error amplifier. DETAILED DESCRIPTION

[0025] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0026] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0027] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0028] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0029] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0030] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0031] like Figure 1 As shown in Figure 1, when the input stage of the error amplifier uses MOS tube input, there will be a large offset voltage, which has a great impact on the accuracy of the system. In order to solve this problem, traditional trimming circuits, such as Figure 2 As shown, taking 3bit as an example, transmission gates (S1B~S6) and resistors (R1~R8) are connected accordingly. By controlling the on and off of the transmission gate, the number of resistors in series between the input and output ends can be selected to determine the voltage difference between the output and input ends. For example, if the transmission gate S4 is turned on, the voltage difference between OUTP and INP is Ib*(R2+R3+R4), and the voltage difference between OUTN and INN is Ib*(R5+R6+R7+R8). If the impedance of all resistors is R, the voltage difference between INN and INP is Ib*R, that is, 1LSB=Ib*R. Thus, the offset voltage is trimmed by changing the size of the voltage difference between INN and INP. However, this design will also include the resistance of the transmission gate in the size of the voltage difference. Therefore, the actual voltage size that can be trimmed for 1bit is 1.6mV+Ib*RTG, where RTG is the on-resistance of the transmission gate. In order to reduce the influence of the resistance of the transmission gate on the accuracy, the electrical impedance of the transmission gate needs to be reduced as much as possible, which requires that the size of the transmission gate must be larger, resulting in a larger layout area of ​​the trimming circuit. In addition, setting a large number of transmission gates will also affect the trimming accuracy to a certain extent.

[0032] It should be noted that the offset voltage of the error amplifier is the deviation between the voltage output at the output of the error amplifier and the voltage output under ideal conditions when there is no input signal. Ideally, the voltages at the two input terminals of the error amplifier are equal and the output voltage should be zero. However, due to the errors in the internal circuit design of the error amplifier, a differential voltage, namely the offset voltage, is often required to be applied to the input terminal in actual work.

[0033] It should be noted that the transmission gate is composed of a PMOS tube and an NMOS tube, and the on-resistance of the transmission gate is inversely proportional to the size of the transmission gate. The size of the transmission gate is the channel length and width of the transmission gate. The shorter the channel length and the wider the width, the smaller the on-resistance of the transmission gate.

[0034] Based on the above problems, the trimming circuit provided by the embodiment of the present application includes a first resistor module, a first switch module, b second resistor modules and b second switch modules. When in use, the first output terminal of the trimming circuit is electrically connected to the first input terminal of the error amplifier, and the second output terminal of the trimming circuit is electrically connected to the second input terminal of the error amplifier. When the first first switch module is in the on state and the cth second switch module is in the on state, since the voltage difference between the first output terminal and the first input terminal is the sum of the first voltage and the second voltage, the voltage difference between the second output terminal and the second input terminal is the sum of the third voltage, the fourth voltage and the fifth voltage. Therefore, if there is no voltage signal input to the first input terminal and the second input terminal, the voltage difference between the first output terminal and the second output terminal is the sum of the first voltage and the second voltage minus the sum of the third voltage, the fourth voltage and the fifth voltage. Since the impedance of all the first switch modules is equal to the impedance of all the second switch modules, the second voltage is equal to the fifth voltage. Finally, it is obtained that the voltage difference between the first output terminal and the second output terminal only has a corresponding relationship with the impedance of the first resistor module, the impedance of the second resistor module, and the first current and the second current, and has nothing to do with the impedance of the first switch module and the impedance of the second switch module. Similarly, when the first second switch module is in the on state and the fth first switch module is in the on state, the eighth voltage is equal to the tenth voltage. Finally, it is obtained that the voltage difference between the first output terminal and the second output terminal only has a corresponding relationship with the impedance of the first resistor module, the impedance of the second resistor module, and the first current and the second current, and has nothing to do with the impedance of the first switch module and the impedance of the second switch module. It can be seen that the adjustment circuit provided in the embodiment of the present application can make the product of the impedance and bias current of the first switch module offset the product of the impedance and bias current of the second switch module. Therefore, when adjusting the offset voltage of the error amplifier, it is not necessary to consider the impedance size of the first switch module and the second switch module. That is, by increasing the impedance of the first switch module and the impedance of the second switch module, the size of the first switch module and the second switch module can be reduced, thereby reducing the layout area of ​​the adjustment circuit.

[0035] In order to illustrate the technical solution described in this application, a specific embodiment is provided below for illustration.

[0036] Figure 3 FIG. 1 shows a principle block diagram of a trimming circuit 10 provided in an embodiment of the present application. Figure 3As shown, the trimming circuit 10 includes a first resistor module 101, a first switch module 102, b second resistor modules 103 and b second switch modules 104; the a first resistor modules 101 are connected in series in sequence, the first resistor modules 101 and the first switch modules 102 correspond to each other, the first end of each first resistor module 101 is electrically connected to the first end of the corresponding first switch module 102, the second ends of all the first switch modules 102 are electrically connected to each other, the first end of the first first resistor module 101 serves as the first output end OUTP of the trimming circuit 10, and the second end of the ath first resistor module 101 serves as the output end OUTP of the trimming circuit 10 The first input terminal INP is used to receive a first voltage signal; b second resistance modules 103 are connected in series in sequence, and the second resistance modules 103 correspond to the second switch modules 104 one by one. The first end of each second resistance module 103 is electrically connected to the first end of the corresponding second switch module 104, and the second ends of all second switch modules 104 are electrically connected to each other. The first end of the first second resistance module 103 serves as the second output terminal OUTN of the adjustment circuit 10, and the second end of the b-th second resistance module 103 serves as the second input terminal INN of the adjustment circuit 10, for receiving the second voltage signal; wherein a and b are both integers, a≥2, b≥2.

[0037] Specifically, when in use, the first output terminal OUTP of the trimming circuit 10 is electrically connected to the first input terminal of the error amplifier, and the second output terminal OUTN of the trimming circuit 10 is electrically connected to the second input terminal of the error amplifier. When the first first switch module 102 is in the on state and the cth second switch module 104 is in the on state, the difference between the voltage of the first output terminal OUTP and the first input terminal INP is the sum of the first voltage and the second voltage, the first voltage is the product of the sum of the impedances of all the first resistor modules 101 and the first current I1, and the second voltage is the product of the impedance of the first first switch module 102 and the bias current IB. The difference between the voltages of the second output terminal OUTN and the second input terminal INN is the sum of the third voltage, the fourth voltage and the fifth voltage, the third voltage being the product of the sum of the impedances of d second resistance modules 103 and the first current I1, the fourth voltage being the product of the sum of the impedances of e second resistance modules 103 and the second current I2, and the fifth voltage being the product of the impedance of the cth second switch module 104 and the bias current IB, wherein c, d and e are all integers, 1<c≤b, d=b-c+1, and e=c-1.

[0038] When the first second switch module 104 is in the on state and the fth first switch module 102 is in the on state, the voltage difference between the first output terminal OUTP and the first input terminal INP is the sum of the sixth voltage, the seventh voltage and the eighth voltage, the sixth voltage is the product of the sum of the impedances of the g first resistor modules 101 and the first current I1, the seventh voltage is the product of the sum of the impedances of the h first resistor modules 101 and the second current I2, and the eighth voltage is the product of the impedance of the fth first switch module 102 and the bias current IB. The voltage difference between the second output terminal OUTN and the second input terminal INN is the sum of the ninth voltage and the tenth voltage, the ninth voltage is the product of the sum of the impedances of all the second resistor modules 103 and the first current I1, the tenth voltage is the product of the impedance of the first second switch module 104 and the bias current IB, and the impedances of all the first switch modules 102 are equal to the impedances of all the second switch modules 104; wherein f, g, and h are all integers, 1<f≤a, g=a-f+1, and h=f-1.

[0039] In summary, when the first first switch module 102 is in the on state and the c-th second switch module 104 is in the on state, since the difference between the voltage of the first output terminal OUTP and the first input terminal INP is the sum of the first voltage and the second voltage, the difference between the voltage of the second output terminal OUTN and the second input terminal INN is the sum of the third voltage, the fourth voltage and the fifth voltage. Therefore, if there is no voltage signal input to the first input terminal INP and the second input terminal INN, the difference between the voltage of the first output terminal OUTP and the second output terminal OUTN is the sum of the first voltage and the second voltage minus the sum of the third voltage, the fourth voltage and the fifth voltage. Since the impedance of all first switch modules 102 is equal to the impedance of all second switch modules 104, therefore, the second voltage is equal to the fifth voltage. Finally, it is obtained that the difference between the voltage of the first output terminal OUTP and the second output terminal OUTN only has a corresponding relationship with the impedance of the first resistor module 101, the impedance of the second resistor module 103, the first current I1 and the second current I2, and has nothing to do with the impedance of the first switch module 102 and the impedance of the second switch module 104. Similarly, when the first second switch module 104 is in the on state and the fth first switch module 102 is in the on state, the eighth voltage is equal to the tenth voltage. Finally, it is obtained that the voltage difference between the first output terminal OUTP and the second output terminal OUTN only has a corresponding relationship with the impedance of the first resistor module 101, the impedance of the second resistor module 103, the first current I1 and the second current I2, and has nothing to do with the impedance of the first switch module 102 and the impedance of the second switch module 104. It can be seen that the adjustment circuit 10 provided in the embodiment of the present application can make the product of the impedance of the first switch module 102 and the bias current IB offset the product of the impedance of the second switch module 104 and the bias current IB. Therefore, when adjusting the offset voltage of the error amplifier, it is not necessary to consider the impedance size of the first switch module 102 and the second switch module 104. That is, the size of the first switch module 102 and the second switch module 104 can be reduced by increasing the impedance of the first switch module 102 and the impedance of the second switch module 104, thereby reducing the layout area of ​​the adjustment circuit 10.

[0040] It should be noted that the first first switch module 102 and the first second switch module 104 are both used as default switch modules, and the remaining first switch modules 102 and the remaining second switch modules 104 are both used as working switch modules. If any working switch module in the first switch module 102 is turned on, the default switch module in the second switch module 104 is turned on. If any working switch module in the second switch module 104 is turned on, the default switch module in the first switch module 102 is turned on. That is, it is necessary to ensure that at least one first switch module 102 is turned on and at least one second switch module 104 is turned on to ensure the normal operation of the trimming circuit 10.

[0041] It should be noted that the bias current IB is the vector sum of the first current I1 and the second current I2, wherein the first current I1 and the second current I2 are in opposite directions. The first current I1 may be a current flowing from the first output terminal OUTP (or the second output terminal OUTN) to the first input terminal INP (or the second input terminal INN), and the second current I2 may be a current flowing from the first input terminal INP (or the second input terminal INN) to the first output terminal OUTP (or the second output terminal OUTN).

[0042] It should be noted that, in order to achieve a more balanced adjustment of the offset voltage, the number of the first resistor modules 101 connected in series with the first input terminal INP and the first output terminal OUTP and the number of the second resistor modules 103 connected in series with the second input terminal INN and the second output terminal OUTN can be set to be the same. Correspondingly, the number of the first switch modules 102 and the number of the second switch modules 104 are also set to be the same.

[0043] Exemplarily, the value of a can be set to 4, and the value of b can be set to 4. The value of c can be set to 2, the value of d can be set to 3, and the value of e can be set to 1. When the first first switch module 102 is in the on state and the second second switch module 104 is in the on state, the difference between the voltage of the first output terminal OUTP and the first input terminal INP is the sum of the first voltage and the second voltage, the first voltage is the product of the sum of the impedances of the four first resistor modules 101 and the first current I1, and the second voltage is the product of the impedance of the first first switch module 102 and the bias current IB. The difference between the voltage of the second output terminal OUTN and the second input terminal INN is the sum of the third voltage, the fourth voltage, and the fifth voltage, the third voltage is the product of the sum of the impedances of the three second resistor modules 103 and the first current I1, the fourth voltage is the product of the impedance of one second resistor module 103 and the second current I2, and the fifth voltage is the product of the impedance of the second second switch module 104 and the bias current IB. Among them, the impedance of the first first switch module 102 is equal to the impedance of the second second switch module 104. Therefore, it is finally obtained that the voltage difference between the first output terminal OUTP and the second output terminal OUTN only has a corresponding relationship with the impedance of the first resistor module 101, the impedance of the second resistor module 103, the first current I1 and the second current I2, and has nothing to do with the impedance of the first switch module 102 and the impedance of the second switch module 104. Similarly, the value of f can be set to 2, the value of g can be set to 3, and the value of h can be set to 1. Among them, the impedance of the second first switch module 102 is equal to the impedance of the first second switch module 104. Finally, it is obtained that the voltage difference between the first output terminal OUTP and the second output terminal OUTN only has a corresponding relationship with the impedance of the first resistor module 101, the impedance of the second resistor module 103, the first current I1 and the second current I2, and has nothing to do with the impedance of the first switch module 102 and the impedance of the second switch module 104.

[0044] In one embodiment of the present application, the impedance of each first resistance module 101 is equal, the impedance of each second resistance module 103 is equal, and the impedance of the first resistance module 101 is equal to the impedance of the second resistance module 103 .

[0045] Specifically, in order to achieve a more balanced adjustment of the offset voltage, the number of the first resistor modules 101 and the second resistor modules 103 can be designed to be equal, and the impedance of each first resistor module 101 is equal, the impedance of each second resistor module 103 is equal, and the impedance of the first resistor module 101 is equal to the impedance of the second resistor module 103. That is, the impedance of all resistor modules (the first resistor module 101 and the second resistor module 103) is equal. Such a design can not only achieve a balanced adjustment of the offset voltage, but also reduce the voltage deviation caused by the impedance mismatch between the resistor modules. At the same time, this balanced resistor module configuration helps to reduce electromagnetic interference caused by current imbalance.

[0046] In one embodiment of the present application, taking a and b as 4 as an example, Figure 4 As shown, the first resistor module 101 includes a first resistor, a first resistors are connected in series in sequence, the first ends of all the first resistors are electrically connected to the first ends of the corresponding first switch modules 102, the first end of the first first resistor serves as the first output end of the adjustment circuit 10, and is used to be electrically connected to the first input end of the error amplifier, and the second end of the ath first resistor serves as the first input end of the adjustment circuit 10, and is used to receive the first voltage signal.

[0047] Specifically, Figure 4 R1-1, R1-2, R1-3, and R1-4 in the figure are all first resistors, and the first resistor is used to determine the voltage difference between the first output terminal OUTP and the first input terminal INP. If the first first switch module 102 is in the on state, the voltage difference between the first output terminal OUTP and the first input terminal INP is the sum of the first voltage and the second voltage, the first voltage is the product of the sum of the impedances of R1-1, R1-2, R1-3, and R1-4 and the first current I1, and the second voltage is the product of the impedance of the first first switch module 102 and the bias current IB. If the second first switch module 102 is in the on state, the voltage difference between the first output terminal OUTP and the first input terminal INP is the sum of the sixth voltage, the seventh voltage and the eighth voltage, the sixth voltage is the product of the sum of the impedances of R1-2, R1-3, and R1-4 and the first current I1, the seventh voltage is the product of the impedance of R1-1 and the second current I2, and the eighth voltage is the product of the impedance of the second first switch module 102 and the bias current IB.

[0048] Exemplarily, if the impedances of R1-1, R1-2, R1-3, and R1-4 are all equal, that is, if the impedances of R1-1, R1-2, R1-3, and R1-4 are all R. When the first first switch module 102 is in the on state, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1*4R+IB*Rp1, where Rp1 is the impedance of the first first switch module 102. When the second first switch module 102 is in the on state, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1*3R+I2*R+IB*Rp2. Since I1 and I2 are equal in magnitude and opposite in direction, if I1 is set as the positive direction of the current and I2 is set as the negative direction of the current, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1*2R +IB*Rp2, where Rp2 is the impedance of the second first switch module 102.

[0049] In one embodiment of the present application, taking a and b as 4 as an example, Figure 4 As shown, the first switch module 102 includes a first switch tube, the gates of all the first switch tubes are used to receive the first control signal, the sources of all the first switch tubes are electrically connected, and the drain of each first switch tube is electrically connected to the first end of the corresponding first resistor module 101.

[0050] Specifically, Figure 4 Q1-1, Q1-2, Q1-3, and Q1-4 are all first switch tubes. As a switch device, the first switch tube can be turned on or off according to the first control signal, so that the bias current IB is transmitted to the first end of the first resistor through the first switch tube. When the first switch tube is turned on according to the first control signal, the source and drain of the first switch tube are connected, and the bias current IB can be transmitted to the first end of the first resistor through the source and drain of the first switch tube. After the first end of the first resistor receives the bias current IB, a voltage drop can be generated on the first resistor, thereby determining the voltage difference between the first output terminal OUTP and the first input terminal INP.

[0051] Exemplarily, if the impedances of R1-1, R1-2, R1-3, and R1-4 are all R. When the first first switch tube is turned on according to the first control signal, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1*4R+IB*Rp1, where Rp1 is the on-resistance of the first first switch tube.

[0052] For example, the designer can select the type of the first switch tube according to the actual situation, that is, a fully controlled power device such as a metal oxide field effect transistor or an insulated gate bipolar transistor can be used. For example, the first switch tube can be selected as a PMOS tube, and the PMOS tube is used to replace the transmission gate in the prior art. When calculating the voltage difference between the first output terminal OUTP and the second output terminal OUTN, the influence of the PMOS tube can be eliminated, which has no effect on the adjustment accuracy, and the structure is simpler and does not increase the layout area.

[0053] In one embodiment of the present application, taking a and b as 4 as an example, Figure 4 As shown, the second resistor module 103 includes a second resistor, b second resistors are connected in series in sequence, the first ends of all the second resistors are electrically connected to the first ends of the corresponding second switch modules 104, the first end of the first second resistor serves as the second output end of the adjustment circuit 10, and is used to be electrically connected to the second input end of the error amplifier, and the second end of the bth second resistor serves as the second input end of the adjustment circuit 10, and is used to receive the second voltage signal.

[0054] Specifically, Figure 4 R2-1, R2-2, R2-3, and R2-4 in the figure are all second resistors, and the second resistor is used to determine the voltage difference between the second output terminal OUTN and the second input terminal INN. If the first second switch module 104 is in the on state, the voltage difference between the second output terminal OUTN and the second input terminal INN is the sum of the ninth voltage and the tenth voltage, the ninth voltage is the product of the sum of the impedances of R2-1, R2-2, R2-3, and R2-4 and the first current I1, and the tenth voltage is the product of the impedance of the first second switch module 104 and the bias current IB. If the second first switch module 102 is in the on state, the voltage difference between the second output terminal OUTN and the second input terminal INN is the sum of the third voltage, the fourth voltage, and the fifth voltage, the third voltage is the product of the sum of the impedances of R2-2, R2-3, and R2-4 and the first current I1, the fourth voltage is the product of the impedance of R2-1 and the second current I2, and the fifth voltage is the product of the impedance of the second second switch module 104 and the bias current IB.

[0055] Exemplarily, if the impedances of R2-1, R2-2, R2-3, and R2-4 are all equal, that is, if the impedances of R2-1, R2-2, R2-3, and R2-4 are all R. When the first second switch module 104 is in the on state, the voltage difference between the second output terminal OUTN and the second input terminal INN is I1*4R+IB*Rn1, where Rn1 is the impedance of the first second switch module 104. When the second second switch module 104 is in the on state, the voltage difference between the second output terminal OUTN and the second input terminal INN is I1*3R+I2*R+IB*Rn2. Since I1 and I2 are equal in magnitude and opposite in direction, if I1 is set as the positive direction of the current and I2 is set as the negative direction of the current, the voltage difference between the second output terminal OUTN and the second input terminal INN is I1*2R +IB*Rn2, where Rn2 is the impedance of the second second switch module 104.

[0056] In one embodiment of the present application, taking a and b as 4 as an example, Figure 4 As shown, the second switch module 104 includes a second switch tube, the gates of all the second switch tubes are used to receive the second control signal, the sources of all the second switch tubes are electrically connected, and the drain of each second switch tube is electrically connected to the first end of the corresponding second resistor module 103.

[0057] Specifically, Figure 4 Q2-1, Q2-2, Q2-3, and Q2-4 are all second switch tubes. As a switch device, the second switch tube can be turned on or off according to the second control signal, so that the bias current IB is transmitted to the first end of the second resistor through the second switch tube. When the second switch tube is turned on according to the second control signal, the source and drain of the second switch tube are connected, and the bias current IB can be transmitted to the first end of the second resistor through the source and drain of the second switch tube. After the first end of the second resistor receives the bias current IB, a voltage drop can be generated on the second resistor, thereby determining the voltage difference between the second output terminal OUTN and the second input terminal INN.

[0058] For example, if the impedances of R2-1, R2-2, R2-3, and R2-4 are all R. When the first second switch tube is turned on according to the second control signal, the voltage difference between the second output terminal OUTN and the second input terminal INN is I1*4R+IB*Rn1, where Rn1 is the on-resistance of the first second switch tube.

[0059] For example, the designer can select the type of the second switch tube according to the actual situation, that is, a fully controlled power device such as a metal oxide field effect transistor or an insulated gate bipolar transistor can be used. For example, the second switch tube can be selected as a PMOS tube, and the PMOS tube is used to replace the transmission gate in the prior art. When calculating the voltage difference between the first output terminal OUTP and the second output terminal OUTN, the influence of the PMOS tube can be eliminated, and the adjustment accuracy is not affected. The structure is simpler and the layout area will not be increased.

[0060] Combination Figure 4 The working principle of the present application is explained in detail by taking examples.

[0061] Exemplarily, if the impedances of R1-1, R1-2, R1-3, R1-4, R2-1, R2-2, R2-3, and R2-4 are all set to R, the impedances of Q1-1, Q1-2, Q1-3, Q1-4, Q2-1, Q2-2, Q2-3, and Q2-4 are all set to Ro. Set the bias current IB to 4uA, the first current I1 to 1 uA, the second current I2 to 3 uA, and the first current I1 and the second current I2 are in opposite directions. At this time, if Q2-2 and Q1-1 are both in the on state, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1*4R+IB*Ro, and the voltage difference between the second output terminal OUTN and the second input terminal INN is I1*3R+I2*R+IB*Ro. Since I1 and I2 are in opposite directions, the voltage difference between the second output terminal OUTN and the second input terminal INN is IB*Ro. Finally, the voltage difference between the first output terminal OUTP and the second output terminal OUTN is I1*3R+I2*R, that is, I1*4R. Among them, R is 400ohm, that is, 1LSB is about 1.6mV. Therefore, the adjustment circuit 10 provided in the embodiment of the present application can make the product of the impedance of the first switch module 102 and the bias current IB offset the product of the impedance of the second switch module 104 and the bias current IB. Therefore, when adjusting the offset voltage of the error amplifier, there is no need to consider the impedance size of the first switch module 102 and the second switch module 104. That is, by increasing the impedance of the first switch module 102 and the impedance of the second switch module 104, the size of the first switch module 102 and the second switch module 104 can be reduced, thereby reducing the layout area of ​​the adjustment circuit 10.

[0062] In one embodiment of the present application, the adjustment circuit 10 also includes a driving module, which is electrically connected to all the first switch modules 102 and all the second switch modules 104 respectively; the driving module is used to output a first control signal to the first switch module 102, and is also used to output a second control signal to the second switch module 104.

[0063] Specifically, the driving module can output a first control signal to the first switch module 102 to turn the first switch module 102 on or off. The driving module can also output a second control signal to the second switch module 104 to turn the second switch module 104 on or off. Wherein, when the driving module outputs the second control signal to the cth second switch module 104 to turn the cth second switch module 104 on, it also outputs the first control signal to the first first switch module 102 to turn the first first switch module 102 on. When the driving module outputs the first control signal to the fth first switch module 102 to turn the fth first switch module 102 on, it also outputs the second control signal to the first second switch module 104 to turn the first second switch module 104 on. It can be seen from this that the driving module can ensure the normal operation of the trimming circuit 10 by outputting corresponding control signals to ensure that at least one first switch module 102 is turned on and at least one second switch module 104 is turned on.

[0064] It should be noted that the driving module may include a driver, a power supply circuit, a protection circuit, etc., which are used to output accurate and reliable first control signals and second control signals to drive the first switch module 102 and the second switch module 104. The driving module may be a timing control circuit, which is used to generate a correct timing signal to control the first switch module 102 and the second switch module 104 to turn on and off.

[0065] The present application also discloses a modification system, such as Figure 5 As shown, the trimming system includes an error amplifier 20 and the above-mentioned trimming circuit 10, a first input terminal of the error amplifier 20 is electrically connected to a first output terminal of the trimming circuit 10, a second input terminal of the error amplifier 20 is electrically connected to a second output terminal of the trimming circuit 10, and an output terminal of the error amplifier 20 is used to output a target voltage V1.

[0066] Specifically, the trimming system can use the trimming circuit 10 to trim the offset voltage of the error amplifier 20, which can improve the output accuracy of the error amplifier 20, thereby improving the measurement and control accuracy of the entire trimming system. At the same time, by using the trimming circuit 10 to compensate for the offset voltage in real time and flexibly adjusting the working parameters of the trimming circuit 10, the fluctuation of the system caused by the offset voltage can be reduced, thereby improving the long-term stability of the system.

[0067] The present application also discloses a switching power supply, including the above-mentioned adjustment system. The switching power supply adopts the above-mentioned adjustment system to improve the output accuracy of the switching power supply, thereby improving the working efficiency of the switching power supply and enhancing the reliability and applicability of the switching power supply.

[0068] Since the processing and functions implemented by the trimming system and the switching power supply in this embodiment basically correspond to the embodiments, principles and examples of the aforementioned trimming circuit, for the details not fully described in this embodiment, please refer to the relevant descriptions in the aforementioned embodiments, and no further elaboration will be made here.

[0069] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A trimming circuit, characterized in that: The invention comprises a first resistor modules, a first switch modules, b second resistor modules and b second switch modules; a first resistor modules are connected in series in sequence, the first resistor modules correspond to the first switch modules one by one, the first end of each first resistor module is electrically connected to the first end of the corresponding first switch module, the second ends of all the first switch modules are electrically connected to each other, the first end of the first first resistor module serves as the first output end of the trimming circuit, the second end of the ath first resistor module serves as the first input end of the trimming circuit, and is used to receive a first voltage signal; b second resistor modules are connected in series in sequence, the second resistor modules correspond to the second switch modules one by one, the first end of each second resistor module is electrically connected to the first end of the corresponding second switch module, the second ends of all the second switch modules are electrically connected to each other, the first end of the first second resistor module serves as the second output end of the trimming circuit, the second end of the bth second resistor module serves as the second input end of the trimming circuit, and is used to receive a second voltage signal; wherein a and b are both integers, a≥2, b≥2; When the first first switch module is in the on state and the cth second switch module is in the on state, the voltage difference between the first output terminal and the first input terminal is the sum of the first voltage and the second voltage, the first voltage is the product of the sum of the impedances of all the first resistor modules and the first current, and the second voltage is the product of the impedance of the first first switch module and the bias current; the voltage difference between the second output terminal and the second input terminal is the sum of the third voltage, the fourth voltage and the fifth voltage, the third voltage is the product of the sum of the impedances of d second resistor modules and the first current, the fourth voltage is the product of the sum of the impedances of e second resistor modules and the second current, and the fifth voltage is the product of the impedance of the cth second switch module and the bias current, wherein c, d, and e are all integers, 1<c≤b, d=b-c+1, and e=c-1; When the first second switch module is in the on state and the fth first switch module is in the on state, the voltage difference between the first output terminal and the first input terminal is the sum of a sixth voltage, a seventh voltage and an eighth voltage, the sixth voltage is the product of the sum of the impedances of g first resistor modules and the first current, the seventh voltage is the product of the sum of the impedances of h first resistor modules and the second current, and the eighth voltage is the product of the impedance of the fth first switch module and the bias current; the voltage difference between the second output terminal and the second input terminal is the sum of a ninth voltage and a tenth voltage, the ninth voltage is the product of the sum of the impedances of all the second resistor modules and the first current, the tenth voltage is the product of the impedance of the first second switch module and the bias current, the impedances of all the first switch modules are equal to the impedances of all the second switch modules, and the bias current is the vector sum of the first current and the second current; wherein f, g, and h are all integers, 1<f≤a, g=a-f+1, and h=f-1.

2. The trimming circuit according to claim 1, characterized in that: The impedance of each of the first resistance modules is equal, the impedance of each of the second resistance modules is equal, and the impedance of the first resistance module is equal to the impedance of the second resistance module.

3. The trimming circuit according to claim 1, characterized in that: The first resistor module includes a first resistor, a first resistors are connected in series in sequence, the first ends of all the first resistors are electrically connected to the first ends of the corresponding first switch modules, the first end of the first first resistor serves as the first output end of the adjustment circuit, and the second end of the ath first resistor serves as the first input end of the adjustment circuit, for receiving the first voltage signal.

4. The trimming circuit according to claim 1, characterized in that: The first switch module includes a first switch tube, the gates of all the first switch tubes are used to receive a first control signal, the sources of all the first switch tubes are electrically connected, and the drain of each first switch tube is electrically connected to the first end of the corresponding first resistor module.

5. The trimming circuit according to claim 1, characterized in that: The second resistor module includes a second resistor, b second resistors are connected in series in sequence, the first ends of all the second resistors are electrically connected to the first ends of the corresponding second switch modules, the first end of the first second resistor serves as the second output end of the adjustment circuit, and the second end of the bth second resistor serves as the second input end of the adjustment circuit, for receiving the second voltage signal.

6. The trimming circuit according to claim 4, characterized in that: The second switch module includes a second switch tube, the gates of all the second switch tubes are used to receive a second control signal, the sources of all the second switch tubes are electrically connected, and the drain of each second switch tube is electrically connected to the first end of the corresponding second resistor module.

7. The trimming circuit according to claim 6, characterized in that: The first switch tube and the second switch tube are both PMOS tubes.

8. The trimming circuit according to any one of claims 1 to 7, characterized in that: The trimming circuit further includes a driving module, which is electrically connected to all the first switch modules and all the second switch modules respectively; the driving module is used to output a first control signal to the first switch module and also to output a second control signal to the second switch module.

9. A trimming system, characterized in that: It comprises an error amplifier and the trimming circuit according to any one of claims 1 to 8, wherein the first input terminal of the error amplifier is electrically connected to the first output terminal of the trimming circuit, the second input terminal of the error amplifier is electrically connected to the second output terminal of the trimming circuit, and the output terminal of the error amplifier is used to output a target voltage.

10. A switching power supply, characterized in that: Includes the adjustment system as described in claim 9.

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