Analog content addressable memory cells and arrays for soft decision boundaries and soft decision tree computing systems using same

Abstract

An SDT computing system is provided herein. The SDT computing system comprises an SDT module, an ACAM array and a mapping module. The SDT module is for outputting a final probability and is configured to provide an SDT structure having a root node and deeper internal nodes for calculating probabilities, where the final probability for each leaf node of the SDT structure is a product of all node probabilities along a path from the root node to each leaf node, and wherein the final output of the SDT module is from the leaf with the highest probability. The mapping module is configured to map the SDT structure into the ACAM array such that each of the ACAM cells in the ACAM array has a threshold programmed as a parameter of a node in a path to the leaf node of the SDT structure.

Description

Technical Field

[0001] The present invention relates generally to tree-based machine learning. More particularly, the present invention relates to methods and apparatus for trusted tree-based machine learning in simulated content addressable memory (CAM) with soft decision boundaries. Background Art

[0002] Artificial intelligence (AI) is transforming society, and concerns about the trustworthiness of AI are growing, especially in high-stakes fields such as healthcare, transportation, and law. Building trustworthy AI models requires two key technical elements: explainability and robustness. Understanding why a model makes a specific prediction, or how even small changes in the input can significantly affect the model's performance, is essential to building trust. Unfortunately, popular AI models such as deep neural networks are often considered "black boxes," making them difficult to explain. Furthermore, they are often unstable to inputs with small differences that are imperceptible to humans. This lack of explainability and robustness undermines the trustworthiness of AI models.

[0003] Tree-based models, such as random forests and gradient boosting trees, have become popular machine learning methods due to their interpretability and high accuracy for tabular data. However, the inference latency of tree-based models can become a bottleneck, especially for models with more trees and greater depth. Although efforts have been made to accelerate tree-based models on GPUs, recent advances in non-volatile memory (NVM) devices have opened up new possibilities for novel computing methods outside the traditional von Neumann architecture, especially for computationally intensive AI models. Analog content addressable memory (CAM) designs have demonstrated great potential for parallel acceleration of inference of tree-based models in memory. In these designs, each decision path is mapped to a corresponding row in the analog CAM array. Most designs are based on memristors and ferroelectric field effect transistors (FeFETs), which have demonstrated orders of magnitude improvements over conventional digital methods. In addition, due to advances in fast and high-precision tuning of memory storage and improvements in energy costs and durability during analog operations, the potential of flash-based memory in analog CAM implementations is being explored.

[0004] Tree-based models can also be binarized and implemented in binary CAM and ternary CAM (TCAM). However, emerging NVM devices often suffer from some undesirable properties, such as device variation and drift noise. Unfortunately, tree-based models are highly sensitive to noise around decision boundaries. Even minor distortions, such as adversarial attacks on the input or drifting weights in NVM devices, can lead to significantly different results. To address these issues, analog CAM designs with soft boundaries have been proposed. These designs can significantly mitigate the sensitivity of tree-based models to noise, making them more robust and reliable.

[0005] The matching boundaries in analog CAMs are not ideal, unlike the orthogonal boundaries in decision trees, but are similar to the curves of S-type functions. Additional design, such as sensor amplifier circuits, is usually required to make the boundaries steep enough for matching. Interestingly, the S-type function can be used as a gating function or activation function in a soft decision tree (SDT). Unlike most decision trees with orthogonal decision boundaries, each node of the SDT has an S-shaped boundary, and each path node represents a partial probability of the final result, which is also expressed as a probability. This allows human users to understand how much confidence the model has in its predictions. Therefore, the SDT can fit more smoothly around the split point, with lower deviation, stronger robustness, and better interpretability. However, the improvement of the SDT inevitably leads to extremely expensive computational overhead for conventional digital hardware based on the von Neumann architecture. This is because it needs to go through each path to calculate the probability through multiple multiplications and S-type activations during inference.

[0006] Therefore, there is a need to improve analog CAM solutions to develop simple mapping configurations with high robustness and better interpretability. Summary of the invention

[0007] It is an object of the present invention to provide methods and apparatus that address the aforementioned shortcomings and unmet needs in the prior art.

[0008] In this regard, tree-based machine learning models are more trustworthy because they maintain reasonable interpretability and inspectability. However, these models are highly sensitive to adversarial attacks around decision boundaries. Soft decision boundaries can potentially mitigate the problem, but are extremely inefficient in conventional digital hardware.

[0009] When observing this and the similarity between decision boundaries in SDT and matching boundaries in analog CAM (ACAM), the solution proposed in this invention is an algorithm-hardware co-design of hardware-aware SDT, which can soften the decision tree into analog CAM with improved accuracy, robustness and interpretability, thereby enhancing confidence. The proposed design of this invention can exploit non-idealities in emerging NVM devices and further explore the potential of analog CAM.

[0010] The present disclosure relates to the soft connection of decision / matching boundaries between tree-based models and analog CAM. By exploiting the non-idealities in emerging devices, analog CAM can naturally implement SDT models and accelerate inference. In this case, the previous design of sensor amplifiers for sharp boundaries can be removed, saving area and energy.

[0011] To further improve accuracy and trustworthiness, the proposed algorithm-hardware co-design of hardware-aware SDT can soften the decision tree into an analog CAM through knowledge distillation. This approach does not require any additional hardware overhead as it exploits the potential of the hardware. The softened decision tree can achieve better performance with improved robustness against the threat of adversarial attacks in the input data, even at the root node (e.g., only 1.7% drop in accuracy compared to 14.4% drop for traditional decision trees).

[0012] The proposed design also exhibits impressive robustness against drift noise in hardware. In the handwritten digit recognition task, the average accuracy of the standard decision tree suddenly drops from 88.8% to 43.5% when the standard decision tree is affected by hardware-induced threshold drift. In contrast, the proposed SDT model can still maintain an accuracy of over 90% with only a minor decrease of 0.6%. This highlights the potential of the proposed hardware-aware SDT design to improve the robustness and reliability of tree-based models in the presence of hardware non-idealities.

[0013] In short, the solution proposed and demonstrated in this invention is that the simulated CAM can naturally implement a tree-based model with soft margins and achieve better MNIST accuracy than the model with hard margins (91.3% vs. 88.3%). More importantly, it shows significantly improved robustness against adversarial attacks (1.7% vs. 14.4% accuracy drop) and device non-idealities (0.6% vs. 45.3% accuracy drop).

[0014] According to a first aspect of the present invention, there is provided an ACAM cell for mapping a well-trained SDT into an analog CAM configuration. The ACAM cell comprises a first floating gate transistor (FG-FET) and a second FG-FET, a match line, a source coupling line, a first search line and a second search line. The match line is electrically coupled to the drain of the first FG-FET and the second FG-FET. The source coupling line is electrically coupled to the source of the first FG-FET and the second FG-FET. The first search line is electrically coupled to the gate of the first FG-FET. The second search line is electrically coupled to the gate of the second FG-FET. The first and second FG-FETs are configured together for a dynamic process, which starts with precharging the match line to a high level voltage, and then applying a voltage to the first search line or the second search line to increase the potential of the corresponding gate of the first FG-FET or the second FG-FET, so that the match line is discharged to the source coupling line, thereby causing the match line voltage to decrease, allowing the match line voltage to decrease to near zero within a matching range of the search line voltage.

[0015] According to a second aspect of the present invention, there is provided an ACAM array for mapping a well-trained SDT into an analog CAM configuration. The ACAM array comprises an input controller, an output receiver, and a plurality of ACAM cells electrically coupled between the input controller and the output receiver. The ACAM cells are arranged into a plurality of rows and a plurality of columns. The ACAM cells in the same row share a voltage from the same match line. The first search line and the second search line are electrically connected to the input controller, and the match line is electrically connected to the output receiver, so that the ACAM cells are configured to map a signal from the input controller and an output match line voltage to the output receiver in response to a mapping result during a dynamic process.

[0016] According to a third aspect of the present invention, there is provided an SDT computing system. The SDT computing system comprises an SDT module, an ACAM array and a mapping module. The SDT module is configured to output a final probability and to provide an SDT structure having a root node and a deeper internal node for calculating the probability, wherein the final probability of each leaf node of the SDT structure is the product of all node probabilities along the path from the root node to each leaf node, and wherein the final output of the SDT module is from the leaf with the highest probability. The mapping module is configured to map the SDT structure into the ACAM array so that each of the ACAM cells in the ACAM array has a threshold value, which is programmed as a parameter of a node in the path leading to the leaf node of the SDT structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Embodiments of the present invention are described in more detail below with reference to the accompanying drawings, in which:

[0018] Figure 1A A simple example of a binary criteria hard decision tree is shown;

[0019] Figure 1B A soft decision tree of the present disclosure having only one node and two leaves is shown;

[0020] Figure 2A Depicted is a schematic diagram of an analog content addressable memory (ACAM) cell based on a floating gate field effect transistor (FG-FET) flash memory according to one embodiment of the present invention;

[0021] Figure 2B depicts a schematic diagram of a 2×2 ACAM array using ACAM cells according to one embodiment of the present invention;

[0022] Figure 2C depicts a graph showing a matching range of an ACAM unit with experimental and simulation results according to one embodiment of the present invention;

[0023] Figure 3A depicts an exemplary graph of a modified sigmoid function;

[0024] Figure 3B depicts an exemplary graph of soft matching boundaries for use in an ACAM configuration according to one embodiment of the present invention;

[0025] Figure 4 Depicts a flow chart of softening a decision tree into an ACAM configuration through knowledge distillation according to one embodiment of the present invention;

[0026] Figure 5A A soft decision tree (SDT) with a depth of 4 is depicted;

[0027] Figure 5B Describes an embodiment of the present invention Figure 5A The mapping result from SDT to ACAM array;

[0028] Fig. 6A depicts matching line voltages for a 1×8 row configuration in an ACAM array where cells have the same degree of matching according to one embodiment of the present invention;

[0029] Figure 6B depicts matching line voltages for a 1×8 row configuration in an ACAM array where cells have random matching levels according to one embodiment of the present invention;

[0030] Figure 7 Depicting the accuracy curves of a standard decision tree (DT) and SDT on MNIST under a random adversarial attack on the root according to an embodiment of the present invention;

[0031] Figure 8 Depicts a graph of the accuracy of standard DT and SDT on MNIST with random drift noise on internal node threshold roots according to one embodiment of the present invention;

[0032] Fig. 9 Depicting a graph of accuracy of standard DT and SDT on MNIST with two attacks on the root node and drift noise on the internal node thresholds according to one embodiment of the present invention;

[0033] Fig.10 Depicting a latency benchmark graph of a standard DT and SDT implemented in different hardware for each sample according to an embodiment of the present invention;

[0034] Fig.11 depicts energy benchmark graphs for standard DT and SDT implemented in different hardware for each sample according to one embodiment of the present invention; and

[0035] Fig.12 Depicted is a schematic diagram of an SDT computing system using a mapping configuration according to one embodiment of the present invention. DETAILED DESCRIPTION

[0036] In the following description, an apparatus, system and / or method for trusted tree-based machine learning in a content addressable memory (ACAM) with soft decision boundaries, etc. is described as a preferred example. It will be apparent to those skilled in the art that modifications, including additions and / or substitutions, may be made without departing from the scope and spirit of the invention. Certain details may be omitted so as not to obscure the invention; however, this disclosure is written to enable those skilled in the art to practice the teachings herein without undue experimentation.

[0037] Softness in Tree and ACAM Arrays:

[0038] Some related works propose soft decision trees (SDT) as a new fuzzy decision tree method. The unique feature of SDT is to include an extra parameter called "width" with each threshold in the tree node, which allows the decision boundary to be transformed from an axis-orthogonal segmentation to an oblique segmentation. This results in a much lower variance than the standard tree, and therefore performs better with high accuracy. One of the related works further develops SDT by giving probabilities to the two child nodes of the internal node using an S-type gating function. This allows soft decisions to be made, and the final decision is a weighted average of all leaves of all possible paths with different probabilities. The S-type function at each node is g(x):

[0039] The parameter w in the nodeT Is a vector that transfers the input vector x to another vector space. The model is trained using a gradient descent method, which can improve accuracy with fewer nodes. However, the model adds a fully connected layer before the decision tree, which inevitably weakens interpretability. Some related work proposes a knowledge distillation method to use a trained neural network to create a soft decision tree with better generalization performance. The result depends on which leaf has a higher probability. Knowledge distillation can help improve the accuracy of soft decision trees by training soft decision trees with soft labels and true labels, and the soft labels are weighted averages of the predictions of the neural network. It is important to note that the inference latency of the SDT model can be significantly higher than that of the standard decision tree counterpart. On the CPU, the latency can be hundreds of times higher, and on the GPU, the latency can be tens of times higher. Therefore, when choosing to use the SDT model, it is important to consider application and hardware constraints.

[0040] In the SDT configuration of this disclosure, the goal is to maintain the interpretability of the decision tree without adding a fully connected layer before the tree. To achieve this, knowledge distillation with soft labels is used in one of the related works, which has no additional hardware overhead during inference. The sigmoid function is modified to change from close to 0 to 1 in a small range. The sigmoid function is defined as f(x):

[0041] where the scalar k is the gain that controls the softness of the sigmoid function, and c is the threshold at which f(x) exceeds 0.5. For comparison, Figure 1A shows a simple example of a binary standard hard decision tree, and Figure 1B The SDT of the present disclosure is shown with only one node and two leaves.

[0042] Figure 2A A schematic diagram of an ACAM cell 100 based on a floating gate field effect transistor (FG-FET) flash memory according to one embodiment of the present invention is depicted. The ACAM cell 100 can act as a cell for mapping a well-trained SDT into an analog CAM configuration. The ACAM cell 100 includes a FG-FET 110 and a second FG-FET 120, a match line ML, a source coupling line SCL, a first search line SL1, and a second search line SL2.

[0043] The match line ML is electrically coupled to drains D1, D2 of the first FG-FET 110 and the second FG-FET 120. The source coupling line SCL is electrically coupled to sources S1, S2 of the first FG-FET 110 and the second FG-FET 120. The first search line SL1 is electrically coupled to the gate G1 of the first FG-FET 110, and the second search line SL2 is electrically coupled to the gate G2 of the second FG-FET 120.

[0044] In order to map the well-trained SDT, the first FG-FET 110 and the second FG-FET 120 are configured together for a dynamic process (i.e., a matching operation) that starts with precharging the match line ML to a high level voltage. In one embodiment, the first FG-FET 110 and the second FG-FET 120 can adjust the high match limit and the low match limit with their threshold voltages to act as internal nodes in a decision tree. Next, a voltage is applied to the first search line SL1 and / or the second search line SL2 to increase the potential of the corresponding gate G1 or G2 of the first FG-FET 110 or the second FG-FET 120, so that the match line ML is discharged to the source coupling line SCL, thereby causing the match line voltage to decrease, allowing the match line voltage to decrease to near zero within the matching range of the search line voltage. In this regard, when the voltage of the corresponding search line SL1 or SL2 is within the matching range, the match line ML voltage can remain high, otherwise it drops to zero.

[0045] Sense amplifiers are often used to effectively sense the matching line voltage drop and achieve sharp matching boundaries. However, in the design of the present disclosure, Figure 2A As shown in , the sense amplifier can be eliminated because a clear final matching boundary is not required.

[0046] Figure 2B A schematic diagram of a 2x2 ACAM array 200 using ACAM cells is depicted in accordance with one embodiment of the present invention. Figure 2B 1 is an example of a corresponding ACAM array consisting of four ACAM cells 210A, 210B, 210C, 210D having the same or similar configuration as the ACAM cell 100. The ACAM cells 210A, 210B, 210C, 210D in the same column or row share the same search line or match line. For example, the ACAM cells 210A, 210B share the same match line ML1 and / or the same source coupling line SCL1; the ACAM cells 210C, 210D share the same match line ML2 and / or the same source coupling line SCL2. The ACAM cells 210A, 210C share the same search lines SL1, SL2; the ACAM cells 210B, 210D share the same search lines SL3, SL4. In one embodiment, the spice model is experimentally calibrated by cells having two floating gate transistors.

[0047] Based on SPICE simulation, Figure 2C A graph showing the matching range of an ACAM cell with matching SL voltage ranges according to one embodiment of the present invention is depicted. The matching range of the search line voltage is Figure 2CAs shown in the figure, the IV curves of the ACAM cells with different thresholds fit well with very little difference.

[0048] In various embodiments, in the ACAM array, the FG-FET of the ACAM cell has a threshold voltage in the range of 0.56V to 1.59V. In this regard, Figure 3A depicts an exemplary graph of a modified sigmoid function; and Figure 3B An exemplary graph depicting a soft match boundary in an ACAM configuration according to one embodiment of the present invention.

[0049] Specifically, Figure 3A The graph of shows a modified sigmoid function of f(x) where k equals -10 and c varies from 0.55 to 1.55 in Equation 2. The sign of k determines whether f(x) increases or decreases along the positive x-axis. Figure 3B The diagram shows Figure 2A The spice simulation results for the left transistor in a floating gate flash memory cell are shown in Figure 1, where the threshold is changed from 0.56V to 1.59V. In this case, the match boundary is the change from high to low of the match line relative to the search line voltage. The soft boundary is almost the same as Figure 3A The curve of the modified S-shaped function is the same as that of

[0050] To further analyze the properties of the soft match boundary in the ACAM array, a set of equations are developed to describe the dynamics of the transistors in the ACAM cell during the match process. At the beginning of the process, the match line voltage (ML voltage) is precharged to a high level voltage. Next, by applying the search line voltage (SL voltage) to the gate of the transistor, the match line may be discharged with a different current, causing the ML voltage to decrease. Since the ML voltage is the drain voltage V of the transistor in the cell, d , so the reduced ML voltage can make the discharge current lower and suppress the discharge process in a negative feedback manner. For the transistor in the cell (for example, the FG-FET in the cell), there are two cases of its current change. If the gate voltage V g The SL voltage is less than the threshold voltage, which means that V g <V th , the transistor operates in the subthreshold region, as shown in the following equation:

[0051] Where I0, q, n, K and T are all constants, and (V g -V th ) does not change for a particular matching process. As V d Reduce to 0, I dwill decrease to 0. When the SL voltage is higher than the threshold voltage, it means that V g >V th , the transistor initially operates in the saturation region, and then as V d The equations for the current in these regions are:

[0052] Among them, KP, λ, is a constant associated with the process of the transistor. Since the ML voltage is shared by cells in a row with possibly different thresholds and gate voltages (SL voltages), the actual process of match line drop can be much more complicated depending on the sum of the charging currents of each cell. However, the sum of the currents should be I d A mixture of the above equations. An approximate fit of the matching boundary is performed based on a reference to the matching boundary. The fitting and comparison parts are further described in detail in the next section. Therefore, the inherent soft matching boundary can be used in ACAM to naturally implement the modified S-type function as the gating function in SDT.

[0053] Soften the decision tree into an ACAM array:

[0054] Figure 4 A flowchart for softening a decision tree to an ACAM configuration by knowledge distillation according to one embodiment of the present invention is depicted. Since there are widely used tools and libraries to build standard decision trees and forests, there is no need to train soft decision trees and forests from scratch unless the approach is completely different. Instead, modifications can be made based on widely accepted methods and improve performance, which can make the proposed design more relevant in applications. This approach is also fairer when comparing robustness. Figure 4 The upper branch in is to simply build the standard tree first, and then distill the tree structure of the SDT. Three parts are transferred to the SDT: feature selection at each node, each decision path of the tree, and the distribution in the leaf nodes. Since the standard tree has been pruned, the pruned structure is also transferred to the SDT. Figure 4 The lower branch in is to provide soft labels for SDT. The soft labels used here are a combination of the predictions from the teacher model and the true labels. It can make it easier to distinguish data samples as strong, medium, or weak, and provide more information for the student model. This method can also help with model regularization. If the teacher model gives a prediction of an input with probability P, and the ground truth value of the input is G, which is 0 or 1 (for example, in a one-hot label), then the soft label S should be as follows:

[0055] Where β is the tuning coefficient. The teacher model is usually a much larger and more complex model with high accuracy for the dataset. It can be a deep model or an ensemble model. A random forest with 300 trees is selected as the teacher model here for ease of training and use. The tuning coefficient β is set to 1 to make it the arithmetic mean.

[0056] For conventional designs, a greedy algorithm that calculates Gini impurity or Shannon information gain is usually used to build decision trees. This method may lead to local minimum traps or severe overfitting. Most conventional SDT models are trained after fully connected layers to automatically find feature combinations using gradient descent methods. This method may also lead to local minimum problems and affect the interpretability of SDT.

[0057] In the method of the present disclosure, we combine the propagation of tree structures through knowledge distillation and then training the tree using gradient descent with soft labels. The trainable parameters in the proposed SDT belong to three categories: gain k i and i th The threshold c in the internal node i , and j th Distribution Q in leaf nodes j For an SDT with m internal nodes and n leaf nodes, it follows that n = m + 1. For a classification task with T categories, k i 、c i and Q j The number of parameters of should be n, m and nT. Considering the next step of mapping a well-trained SDT into ACAM, the threshold c in the internal node is found i are repeatedly mapped in different rows. Therefore, these thresholds in nodes shared by many decision paths can have different thresholds with the same initial value to further release the potential of ACAM. This method is equivalent to changing the binary SDT to a multi-way SDT with more powerful modeling capabilities and no hardware overhead in ACAM.

[0058] Figure 5A and Figure 5B An example of mapping a depth-4 SDT into an analog CAM is presented. Specifically, Figure 5A depicts an SDT of depth 4, and Figure 5B Describes an embodiment of the present invention Figure 5A The mapping result of the SDT in to the ACAM array 300.

[0059] Figure 5AThe diagram shows an SDT structure with a root node and deeper internal nodes for calculating the probability p or (1-p). The final probability of each leaf node is the product of all node probabilities along the path from the root node to each leaf node. The final output comes from the leaf with the highest probability.

[0060] Figure 5B The diagram of FIG. 3 shows the mapping of SDT in analog CAM. The ACAM array 300 for mapping a well-trained SDT into an analog CAM configuration includes an input controller 310, an output receiver 320, and a plurality of ACAM cells 330 as mentioned above. The ACAM cells 330 are electrically coupled between the input controller 310 and the output receiver 320, and are arranged to form a plurality of rows and a plurality of columns of an array.

[0061] According to the configuration as described above, the ACAM cells 330 in the same row share a voltage (e.g., ML voltage) from the same match line. In addition, the first search line and the second search line in the array for the ACAM cells 330 are electrically connected to the input controller 310. In one embodiment, the input controller 310 is configured to feed an input signal (e.g., SL voltage) to each of the ACAM cells 330 in the same column via a voltage interval such as a 0 to 1 voltage. The match lines in the array for the ACAM cells 330 are electrically connected to the output receiver 320. Therefore, the ACAM cells 330 are configured to map the signal from the input controller 310 during a dynamic process and output the match line voltage to the output receiver 320 in response to the mapping result. In one embodiment, the output receiver 320 includes a Winner-Takes-All (WTA) circuit to compare the match line voltages (ML voltages) of different rows according to the match lines so as to find the largest match line voltage therein to determine the final output. The output receiver 320 is further configured to process the final output into a probability signal to be output from the ACAM array 300.

[0062] More specifically, first, the input controller 310 is used to transform the input into a voltage interval, for example, from 0 to 1V. Next, the gain k i The ratio of the initial k0 (which is very close to 1) is multiplied by the corresponding input of the different columns as an additional tuning parameter. Then, the threshold of each ACAM cell 330 in the ACAM array 300 is programmed to lead to j th The leaf node j th i in the path th Node parameter c ij .

[0063] In one embodiment, the ACAM array 330 further includes at least one blank cell 340 disposed adjacent to at least one of the ACAM cells 330 for responding with a probability of 1. Therefore, it should be noted that not every path contains i th Node, and there are many blank cells without thresholds mapped for them, and these cells always respond with a probability of 1. Blank cells behave like sparse regularization during training and can be reorganized to save memory storage for inference. In some embodiments, a blank cell 340 is adjacent to at least one of the ACAM cells 330 in the same row. In some embodiments, a blank cell 340 is adjacent to at least one of the ACAM cells 330 in the same column.

[0064] However, although the ACAM array 300 is a 4*4 array, the embodiments of the present invention are not limited to the illustration. In various embodiments, the ACAM array is an N*N array, where N is a positive integer greater than 1.

[0065] Conventional methods reorder nodes within more paths because some features are more important and occur more frequently than others. Some conditions in different nodes of decision paths using the same feature can also be merged into the matching range and mapped to fewer ACAM cells. However, the solution provided by the present invention does not use these methods for mapping to make a more rigorous comparison with standard trees and other hardware methods.

[0066] After mapping the SDT into the ACAM array, the inference can be implemented by adding the input voltages on the corresponding columns of the array. Therefore, the precharge voltage on the match line of each row drops at a different rate. The output of the SDT should be the product of the probabilities represented by the ML voltages in the row in the algorithm. However, there may be differences in the hardware.

[0067] Fig. 6A Depicted is the match line voltage for a 1×8 row configuration in an ACAM array where cells have the same degree of match according to one embodiment of the present invention. The cells have the same degree of match, which means their output probabilities are the same. The different lines represent different degrees of match, which vary from 0 to 1. The solid line represents the simulation results, and the dashed line represents the fitting results. As the number of cells with the same degree of match increases (other cells always output 1 and can be omitted), the ML voltage decreases roughly in proportion to the probability product. The curve is fitted by the following equation: V fil =min(max(ap n +(1-a)(1-n(1-p))+b(n-1),0),1)…(Equation 7)

[0068] Where a and b are the parameters used for fitting. The equation contains three parts: In equation 3, p + The product part of Refer to Equations 4 and 5 (V g -V th ) 2 and (V g -V th ) and a compensation part with n as the increasing number of units. The maximum and minimum functions are added to ensure that the upper and lower limits of the fitted values ​​are 1 and 0 respectively. They all fit well, especially for higher values, which are more likely to be the maximum value as output. Since the fitting equation is based on the assumption that all units are at the same degree of fit, Figure 6B The matching line voltages for a 1×8 row configuration in an ACAM array with random matching degrees of cells according to an embodiment of the present invention are depicted, showing a comparison between the spice model simulation (left bar) and the equation fitting results (right bar). All comparison results of the ML voltages in the three cases are very close. Therefore, the fitting results can be used to represent the ML voltages in the ACAM array. Finally, the circuit of the WTA is used to compare the ML voltages of different rows, and the largest voltage is the final output. Another way is to use a crossbar to accumulate the probability of each category, which is much faster and can also be more accurate. It is also an implementation method of random forests.

[0069] Robustness against attacks and noise:

[0070] The robustness of the proposed SDT and standard decision tree (DT) is evaluated on the MNIST dataset, which is a handwritten digit recognition task. This is not a task that tree-based models are usually good at, but it can still demonstrate the robustness of the proposed SDT in a more general way. Taking into account the randomness, each result of the robustness evaluation is the average of 10 repetitions. Figure 7 The accuracy of DT and SDT is compared as the tree depth increases.

[0071] Figure 7Depicted is the accuracy curve of the standard decision tree (DT) and SDT on MNIST under the random adversarial attack on the root according to one embodiment of the present invention. Obviously, the SDT represented by the upper solid line always performs better than the DT, which is the lower solid line with the same depth. The best accuracy of DT is 88.25% when the depth is 16, and the best accuracy of SDT is 91.28% when the depth is 18. Considering that the root node is the weakest point in the tree model, the adversarial attack is applied to the root node of DT and SDT, which is a uniform distribution from 0 to 1V. This means that one pixel of the input image is replaced by random noise of the same order of magnitude. Then, it is found that the DT model is very weak in resistance to the attack and is seriously affected. The accuracy of the lower dotted line may hardly exceed 75%. On the contrary, due to the soft boundary, the SDT model performs with a much more stable accuracy (which is the upper dotted line). Under the root node adversarial attack, when the depth exceeds 16, the SDT model can even run with higher accuracy than the unattacked DT model. It is also found that the robustness of the SDT model against adversarial attacks gradually increases with the depth of the tree. The SDT model with a depth of 20 performs best under the attack, and the accuracy reduction due to the attack is only 1.7%. Since emerging devices often suffer from drift noise on their storage parameters, a study is conducted to compare the robustness of DT and SDT against random drift noise on internal nodes, which may affect the decision threshold to some extent. The noise is an even smaller variation, which is a uniform distribution from -0.1V to 0.1V.

[0072] Figure 8 Depicts a graph of the accuracy of standard DT and SDT on MNIST with random drift noise on the internal node threshold root according to one embodiment of the present invention. Figure 8 As shown in , the results show that the DT model is extremely sensitive to small drift noise. All models with different depths crash and have an accuracy of less than 50%. On the other hand, the SDT model shows unexpected stability against drift threshold noise due to its soft margin, and the accuracy is almost unaffected (only 0.6%).

[0073] Fig. 9 Depicted are graphs of the accuracy of standard DT and SDT on MNIST with two attacks on the root node and drift noise on the internal node thresholds according to one embodiment of the present invention. Fig. 9 The plot of shows similar trends for DT and SDT under the combination of adversarial attack and drift noise. The SDT model exhibits high robustness, while the DT model performs even worse with an accuracy of about 40%.

[0074] In addition to evaluating the model robustness, latency and energy consumption benchmarks are also performed for SDT implemented on different hardware. The latency, power, and energy consumption data are mainly obtained from some related work, because the design of this disclosure does not have any additional hardware overhead except for the possible circuit of WTA. The depth of DT and SDT models is 20, and the input batch for inference is 10,000. For latency, the average inference time repeated 10 times is calculated for each sample of DT and SDT implemented on CPU and GPU.

[0075] Fig.10 Depicted is a latency benchmark graph of a standard DT and SDT implemented in different hardware for each sample according to an embodiment of the present invention. As known from previous analysis, SDT requires a huge computational overhead in conventional von Neumann hardware (such as a CPU). The benchmark presents quantitative results: the latency of SDT is 500 times greater than the latency of DT with the same tree structure. Therefore, the inference efficiency of large SDT models is very low compared to DT. Even with the use of a GPU, the latency of SDT is tens of times greater than that of DT. However, the SDT implemented in ACAM can be almost 1000 times faster than in a CPU, because the WTA circuit may take hundreds of nanoseconds to output the result (voltage) with the highest probability. It can be further accelerated to about 26,000 times faster than in a CPU, where an additional crossbar switch is combined with ACAM to accumulate the probability of the output category.

[0076] Fig.11 Energy benchmark graphs of standard DT and SDT implemented in different hardware for each sample are depicted according to one embodiment of the present invention. Fig.11 The energy consumption shown can be inference latency multiplied by hardware power. The CPU and GPU used are AMD EPYC 7413 and RTX 3090 24G with power of 180W and 350W respectively. The power of WTA or crossbar switch is extremely low. Therefore, the energy benchmark shows an even greater ratio: the energy consumption per sample of SDT implemented in ACAM is 7 and 6 orders of magnitude lower than that in CPU and GPU respectively.

[0077] As discussed above, in the present disclosure, an algorithm-hardware co-design method is provided to soften decision trees into ACAMs through knowledge distillation. By leveraging the inherent soft matching boundaries in ACAMs, SDT models can be implemented naturally in an efficient manner. Benefiting from the implementation in ACAMs, SDTs with heavy computational overhead can be accelerated from 1000x to over 26000x, and energy consumption is reduced by 7 orders of magnitude. Compared with standard decision tree models, SDT models of different depths exhibit better interpretability, higher accuracy, and more importantly, better robustness than standard decision trees against adversarial attacks on root nodes and / or drift noise on thresholds. Therefore, due to the soft boundaries, the proposed SDT design is hardware-friendly and credible for emerging analog CAM devices because it can mitigate the instability and sensitivity of standard tree-based models.

[0078] Fig.12 A schematic diagram of an SDT computing system 400 using the above mapping configuration according to an embodiment of the present invention is depicted. According to the above description, in one embodiment, an SDT computing system using the mapping configuration is provided. The SDT computing system 400 includes an SDT module 410, an ACAM array 420, and a mapping module 430.

[0079] The SDT module 410 is used to output the final probability and is configured to provide an SDT structure having a root node and deeper internal nodes for calculating the probability, such as Figure 5A Thus, through the SDT module 410, the final probability of each leaf node of the SDT structure is the product of all node probabilities along the path from the root node to each leaf node, where the final output of the SDT module comes from the leaf with the highest probability. For example, if Figure 5A If the leaf node L4 in the SDT structure of FIG. 4 is the highest probability, the event associated with the leaf node L4 is determined to be output by the SDT computing system 400. In some embodiments, the SDT module 410 is stored in a memory and processed by a processor.

[0080] The output of the SDT module 410 is associated with real-world events / applications (e.g., applications in machine learning) for classifying features. The SDT module 410 provides decision trees for various applications, including but not limited to: (1) medical diagnosis: classifying patient data based on symptoms and medical history to diagnose diseases; (2) customer segmentation: grouping customers based on purchasing behavior, demographics, and other factors for targeted marketing strategies; (3) spam detection: filtering out spam by classifying emails based on content, sender information, and other attributes; and (4) credit scoring: assessing an individual's creditworthiness by evaluating financial history, income, and other relevant factors; (5) sentiment analysis: analyzing text data from social media, reviews, or surveys to determine the sentiment expressed (positive, negative, neutral); and (6) autonomous driving: making decisions based on sensor data and environmental factors in an autonomous driving system to determine the appropriate action (stop, turn, or accelerate).

[0081] The ACAM array 420 refers to the configuration as previously described and is electrically coupled to the SDT module 410. The mapping module 430 is electrically coupled to the SDT module 410 and the ACAM array 420. The mapping module 430 is configured to map the SDT structure provided by the SDT module 410 into the ACAM array 420 such that each ACAM cell in the ACAM array 420 has a threshold value programmed as a parameter of a node in a path leading to a leaf node of the SDT structure. In one embodiment, during a dynamic process, the IV characteristics of the ACAM cells in the ACAM array 420 within an interval of searching for line voltages are captured for mapping a well-trained SDT by the mapping module 430, thereby causing the SDT structure to be smoothly and efficiently transferred into the ACAM array 420 and facilitating robust and explainable decision-making capabilities.

[0082] For example, the SDT structure of the SDT module 410 is configured to be applied to the decision-making process in autonomous driving. In this case, in the SDT structure, the root node and each internal node may correspond to the initial processing of sensor data and environmental factors, while the leaf nodes represent potential actions including stopping, turning, and accelerating. The decision-making process of autonomous driving in the SDT structure can be mapped to the ACAM array 420 through the mapping module 430, so as to accurately and reliably determine the appropriate actions for autonomous driving. In one embodiment, the output final signal of the ACAM array 420 represents the most potential action for autonomous driving, such as stopping, turning, and accelerating. This final signal can be interpreted or parsed, and then input into the programming module, and then the action is physically executed, resulting in the vehicle stopping, turning, or accelerating.

[0083] The functional units and modules of the apparatus and methods according to the embodiments disclosed herein can be implemented using a computing device, a computer processor or an electronic circuit system, including but not limited to an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a microcontroller and other programmable logic devices configured or programmed according to the teachings of the present disclosure. The computer instructions or software codes running in the computing device, computer processor or programmable logic device can be easily made by practitioners in the field of software or electronic technology based on the teachings of the present disclosure.

[0084] All or part of the method according to the embodiments may be executed in one or more computing devices including a server computer, a personal computer, a laptop computer, a mobile computing device (eg, a smartphone), and a tablet computer.

[0085] Embodiments may include computer storage media, transient and non-transitory memory devices having stored therein computer instructions or software codes that may be used to program or configure a computing device, a computer processor, or an electronic circuit system to perform any of the procedures of the present invention. Storage media, transient and non-transitory memory devices may include, but are not limited to, floppy disks, optical disks, Blu-ray disks, DVDs, CD-ROMs and magneto-optical disks, ROMs, RAMs, flash memory devices, or any type of media or device suitable for storing instructions, codes, and / or data.

[0086] Each of the functional units and modules according to various embodiments may also be implemented in a distributed computing environment and / or a cloud computing environment, where all or part of the machine instructions are executed in a distributed manner by one or more processing devices interconnected by a communication network, such as an intranet, a wide area network (WAN), a local area network (LAN), the Internet, and other forms of data transmission media.

[0087] The foregoing description of the invention has been provided for the purpose of illustration and description. The invention is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations will be apparent to practitioners in the art.

[0088] The embodiment was chosen and described in order to best explain the principles of the invention and its practical application, thereby enabling others skilled in the art to understand the invention for various embodiments and with various modifications as are suited to the particular use contemplated.

Claims

1. An analog content addressable memory (ACAM) unit for mapping a well-trained SDT (soft decision tree) into an analog CAM configuration, It is characterized in that include: a first floating gate transistor (FG-FET) and a second FG-FET; a matching line electrically coupled to drains of the first FG-FET and the second FG-FET; a source coupling line electrically coupled to sources of the first FG-FET and the second FG-FET; a first search line electrically coupled to the gate of the first FG-FET; as well as a second search line electrically coupled to the gate of the second FG-FET, the first FG-FET and the second FG-FET being collectively configured for a dynamic process that begins with precharging the match line to a high level voltage, and then applying a voltage to the first search line or the second search line to increase the potential of the corresponding gate of the first FG-FET or the second FG-FET so that the match line is discharged to the source coupling line, thereby causing the match line voltage to decrease, allowing the match line voltage to decrease to near zero within a matching range of the search line voltage.

2. The ACAM unit according to claim 1, It is characterized in that When the voltage applied to the first search line is less than the threshold voltage of the first FG-FET, the first FG-FET operates at a subthreshold region, and the drain current of the first FG-FET is described as: Where Vg is the gate voltage of the first FG-FET, V d is the drain voltage of the first FG-FET, V th is the threshold voltage of the first FG-FET, and I 0 , q, n, K and T are all constants.

3. The ACAM unit according to claim 2, It is characterized in that When the voltage applied to the first search line is higher than the threshold voltage of the first FG-FET, the first FG-FET initially operates in a saturation region, and the drain current of the first FG-FET is described as: Among them, KP, λ, is a constant associated with the processing dynamics of the first FG-FET.

4. The ACAM unit according to claim 3, It is characterized in that As the drain voltage V of the first FG-FET d decreases, the first FG-FET then switches to the linear region, and the drain current of the first FG-FET is described as:

5. The ACAM unit according to claim 1, It is characterized in that Each of the first FG-FET and the second FG-FET has a threshold voltage in a range of 0.56V to 1.59V.

6. An analog content addressable memory (ACAM) array for mapping a well-trained SDT into an analog CAM configuration, It is characterized in that include: Input controller; Output receiver; as well as A plurality of ACAM cells according to claim 1, electrically coupled between the input controller and the output receiver, and arranged into a plurality of rows and a plurality of columns, wherein the ACAM cells in the same row share a voltage from a same match line, and wherein the first search line and the second search line are electrically connected to the input controller, and the match line is electrically connected to the output receiver, so that the ACAM cells are configured to map the signal from the input controller during the dynamic process and output the match line voltage to the output receiver in response to the mapping result.

7. The ACAM array according to claim 6, It is characterized in that The input controller is configured to feed an input signal to each of the ACAM cells in the same column via a voltage interval.

8. The ACAM array according to claim 7, It is characterized in that The output receiver includes a winner-takes-all (WTA) circuit to compare match line voltages of different rows according to the match lines so as to find a maximum match line voltage therein to determine a final output.

9. The ACAM array according to claim 8, It is characterized in that The output receiver is further configured to process the final output into a probability signal to be output from the ACAM array, and the ACAM array further includes at least one blank cell arranged adjacent to at least one of the ACAM cells, wherein the blank cell has no mapping threshold and is configured to respond with a probability of 1.

10. The ACAM array according to claim 9, It is characterized in that The blank cell is adjacent to at least one of the ACAM cells in the same row.

11. The ACAM array according to claim 9, It is characterized in that The blank cell is adjacent to at least one of the ACAM cells in the same column.

12. The ACAM array according to claim 6, It is characterized in that The ACAM array is an N*N array, wherein N is a positive integer greater than 1.

13. A soft decision tree (SDT) computing system, It is characterized in that include: an SDT module for outputting a final probability and configured to provide an SDT structure having a root node and deeper internal nodes for calculating probabilities, wherein the final probability of each leaf node of the SDT structure is the product of all node probabilities along a path from the root node to each leaf node, and wherein the final output of the SDT module is from a leaf with the highest probability; The analog content addressable memory (ACAM) array of claim 6; A mapping module is configured to map the SDT structure into the ACAM array so that each of the ACAM cells in the ACAM array has a threshold programmed as a parameter of a node in a path leading to the leaf node of the SDT structure.

14. The SDT computing system according to claim 13, It is characterized in that During the dynamic process, the IV characteristics of the ACAM cells in the ACAM array within the interval of the search line voltage are captured for mapping a well-trained SDT by the mapping module.

15. The SDT computing system according to claim 13, It is characterized in that The threshold voltages of the two FG-FETs in each of the ACAM cells in the ACAM array are adjusted between a high matching limit and a low matching limit so as to serve as internal nodes in the SDT structure.

16. The SDT computing system according to claim 13, It is characterized in that The ACAM array further includes at least one blank cell disposed adjacent to at least one of the ACAM cells, the at least one blank cell having no mapping threshold and configured to respond with a probability of one.

17. The SDT computing system according to claim 13, It is characterized in that The SDT structure is applied to the decision-making process in autonomous driving, the root node and the internal nodes correspond to the initial processing of sensor data and environmental factors, and the leaf nodes represent potential actions, including parking, turning, and acceleration, wherein the decision-making process in the autonomous driving is mapped to the ACAM array through the mapping module, thereby accurately and reliably determining the appropriate actions of the autonomous driving.

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