Image enhancement method and device, LED display screen and storage medium
By converting the image of the LED display screen YUV format and enhancing the grayscale value, the problem of low brightness of the LED display screen when the ambient light is strong is solved, brightness improvement and power consumption control are achieved, equipment life is extended and display is guaranteed. Fluency.
Patent Information
- Application Number
- CN202310609451.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-26
- Publication Date
- 2024-12-10
AI Technical Summary
The LED display has a low brightness when the ambient light is strong, which affects the user's viewing experience.
By converting the image in RGB format YUV format, splitting it into Y channel, U channel and V channel data, and enhancing the grayscale value of the Y channel data when needed, combining it and converting it back to RGB format for display on the LED display screen , to improve display brightness.
It realizes the brightness of the LED display when the ambient light is strong, avoids increasing power consumption, extends the service life of the LED display, and ensures the smoothness and low latency of the video display.
Smart Images

Figure CN119107266A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of LED display technology, and in particular to an image enhancement method, device, LED display screen and storage medium. Background Art
[0002] LED display is an electronic display composed of LED dot matrix, which is often used in indoor and outdoor display scenes. If the LED display is located in an environment with strong light, if the brightness of the content displayed on the LED display is low, the LED display will appear very dark, which is not conducive to user viewing. Summary of the invention
[0003] The embodiments of the present application provide an image enhancement method, device, LED display screen and storage medium to enhance the display content of the LED display screen, thereby avoiding the LED display screen presenting a very dark display effect when the ambient light in the LED display screen is strong.
[0004] In a first aspect, an embodiment of the present application provides an image enhancement method, which is applied to an LED display screen, comprising:
[0005] Receive a first image, where the first image is a frame of image in RGB format in a color video;
[0006] Converting the first image into a second image in a YUV format;
[0007] Splitting the second image into Y channel data, U channel data and V channel data;
[0008] When the first image needs to be enhanced, each first grayscale value under the Y channel data is enhanced to a corresponding second grayscale value to obtain enhanced Y channel data;
[0009] Merging the enhanced Y channel data, the U channel data and the V channel data to obtain an enhanced second image;
[0010] The enhanced second image is converted into a third image in RGB format, and the third image is used for display on the LED display screen.
[0011] In a second aspect, an embodiment of the present application further provides an image enhancement device, applied to an LED display screen, comprising: a first format conversion module, an enhancement algorithm module, and a second format conversion module;
[0012] The first format conversion module is used to receive a first image, convert the first image into a second image in a YUV format, and split the second image into Y channel data, U channel data, and V channel data, wherein the first image is a frame image in an RGB format in a color video;
[0013] The enhancement algorithm module is used for enhancing each first grayscale value under the Y channel data to a corresponding second grayscale value to obtain enhanced Y channel data when the first image needs to be enhanced;
[0014] The second format conversion module is used to merge the enhanced Y channel data, the U channel data and the V channel data to obtain an enhanced second image, and to convert the enhanced second image into a third image in RGB format, wherein the third image is used for display on the LED display screen.
[0015] In a third aspect, an embodiment of the present application further provides an LED display screen, comprising: an LED light board and a receiving card, wherein at least one processor is installed on the receiving card, and when the at least one processor is running, the image enhancement method as described in the first aspect is executed.
[0016] In a fourth aspect, an embodiment of the present application further provides a readable and writable storage medium on which a program is stored, and when the program is executed by a processor, the image enhancement method as described in the first aspect is implemented.
[0017] In one embodiment of the present application, by receiving a first image in RGB format in a color video, converting the first image in RGB format into a second image in YUV format, splitting the second image into Y channel data, U channel data and V channel data, when the first image needs to be enhanced, each first grayscale value in the Y channel data is enhanced to a corresponding second grayscale value to obtain enhanced Y channel data, then merging the U channel data, the V channel data and the enhanced Y channel data to obtain an enhanced second image, and converting the enhanced second image into a third image in RGB format for display on an LED display screen, the technical means solves the technical problem of low brightness when the ambient light intensity is strong in the related art, and, compared with the method of adjusting the current gain, the image enhancement method is implemented by a programmable program, that is, the image enhancement method is implemented by software, which can avoid additional increase in the power consumption of the LED display screen and extend the service life of the LED display screen. In addition, by using the FPGA in the LED display screen to execute the image enhancement method, that is, by using the data processing capability of the FPGA, the image in the color video can be enhanced frame by frame, that is, pipeline processing is completed, and the delay is very small (the delay effect can be ignored), which can ensure the smoothness of the video display. Moreover, during the enhancement process, the first image in RGB format is converted into a second image in YUV format, and the data bits of the second image are separated. After that, only the Y channel data is enhanced, which also reduces the amount of data processing during enhancement and further reduces the delay during video playback. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 A display data flow diagram provided for one embodiment of the present application;
[0019] Figure 2 A flowchart of an image enhancement method provided in one embodiment of the present application;
[0020] Figure 3 A flowchart of an image enhancement method provided in one embodiment of the present application;
[0021] Figure 4 A first schematic diagram of data simulation provided for an embodiment of the present application;
[0022] Figure 5 A first schematic diagram of data simulation provided for an embodiment of the present application;
[0023] Figure 6 A third schematic diagram of data simulation provided for an embodiment of the present application;
[0024] Figure 7 A fourth schematic diagram of data simulation provided for one embodiment of the present application;
[0025] Figure 8 A fifth schematic diagram of data simulation provided for one embodiment of the present application;
[0026] Fig. 9 A schematic diagram of the structure of an image enhancement device provided in one embodiment of the present application;
[0027] Fig.10 A schematic diagram of a package of an IP module provided in one embodiment of the present application;
[0028] Fig.11 A schematic diagram of the structure of an enhanced algorithm module provided in one embodiment of the present application;
[0029] Fig.12 A schematic diagram of the internal connection structure of an IP module provided for one embodiment of the present application. DETAILED DESCRIPTION
[0030] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only the parts related to the present application, rather than all structures, are shown in the accompanying drawings.
[0031] LED display is a display screen that uses light-emitting diodes (LED) for imaging. LED display consists of a receiving card and an LED light board.
[0032] The receiving card can also be called a board card, a control board, etc. The receiving card can control the imaging of the LED light board. The receiving card is equipped with at least one chip for realizing the imaging control of the LED light board, at least one memory for realizing data storage or caching, and at least one data transmission port for communicating with an external device.
[0033] The LED light board is equipped with LED lamp beads for imaging. Among them, one LED lamp bead corresponds to one pixel of the LED display screen. The red, green and blue light-emitting diodes of each LED lamp bead are encapsulated in a lamp holder. The three optical primary colors of each lamp bead are mixed to form the colors that the LED lamp bead can display, that is, the colors displayed as pixels. A driver chip can also be installed in the LED light board, and the driver chip is used to drive the LED lamp beads for display. After the LED light board is connected to the receiving card, the driver chip can drive the LED lamp beads for imaging based on the control of the receiving card.
[0034] During the application of the LED display screen, the receiving card and the sending card can be connected through a data transmission line. At this time, the receiving card and the sending card are also provided with corresponding data transmission ports, wherein the data transmission port can be a network port or an optical fiber interface, etc., and the number of data transmission ports can be set according to actual conditions.
[0035] The sending card can also be recorded as a sending function card, which can receive external display data and send the display data to the receiving card so that the receiving card controls the LED light board to display the display data. Generally speaking, the sending card and the LED display are independent devices. In some cases, the sending card can also be integrated into the LED display.
[0036] For example, Figure 1 A display data flow diagram is provided for an embodiment of the present application. Figure 1 , the receiving card 10 and the sending card 20 are connected via an Ethernet port (i.e., a data transmission port), Figure 1 In the description, the receiving card 10 is provided with two Ethernet ports 11 as an example. The receiving card 10 and the sending card 20 can perform bidirectional data transmission based on the Ethernet ports.
[0037] The chip installed in the receiving card 10 includes at least a field programmable gate array (FPGA) 12, which can also be considered as a processor installed in the receiving card 10. The FPGA 12 realizes the imaging control of the LED display screen. The FPGA 12 is connected to each Ethernet port 11 to realize two-way communication with the sending card 20 through the Ethernet port 11. It can be understood that the FPGA in the receiving card 10 can also be replaced by other types of processors, and chips that perform other functions can also be installed, which is not limited in the embodiment.
[0038] The receiving card 10 is also equipped with a light board interface 13, which is connected to the FPGA 12 and the LED light board 30 respectively, so that the FPGA 12 controls the display of the LED light board 30 through the light board interface 13. The specific type of the light board interface is not limited at present. At present, the FPGA 12 and the light board interface 13 are unidirectionally communicated (that is, the receiving card and the LED light board are unidirectionally communicated) as an example. In actual applications, the FPGA 12 and the light board interface 13 can also be bidirectionally communicated.
[0039] The memory installed in the receiving card 10 includes a synchronous dynamic random access memory (SDRAM) 14 and a flash memory (FLASH) 15, wherein the SDRAM 14 stores the data to be displayed by the LED display. The FLASH stores some parameters during the operation of the LED display, for example, the bit width of the display data when the LED display is displayed, the pixel position corresponding to the part of the content displayed when the LED display is spliced, etc. are stored in the FLASH 15. Both the SDRAM 14 and the FLASH 15 are connected to the FPGA 12 and perform two-way communication.
[0040] Taking the display of video data as an example, the sending card 20 receives external video source data, wherein the video source data is encoded data. Then, the sending card 20 uses its own chip to decode the video source data and other operations to obtain display data. Then, the sending card 20 sends the display data to the FPGA 12 through the Ethernet port 11, and the FPGA 12 stores the display data in the SDRAM 14. Then, the FPGA 12 reads the display data stored in the SDRAM 14 and determines the display parameters (such as RGB values, etc.) corresponding to each LED lamp bead in the LED light board based on the parameters and display data stored in the FLASH 15. Then, the FPGA 12 sends the display parameters corresponding to each LED lamp bead to the LED light board through the light board interface 13, so that the driving chip of the LED light board controls the LED lamp bead to display based on the display parameters, thereby realizing the LED display screen to display video data.
[0041] LED screens are often used for outdoor display. However, the outdoor display environment is relatively complex, and the display effect of LED screens is easily affected by the outdoor display environment, especially in the outdoor display scene during the day. When the intensity of sunlight is strong, it will affect the display effect of LED screens, that is, when the human eye views the LED screen, there will be a perception of low display brightness. If the content displayed on the LED screen itself has a low brightness, it will aggravate the perception of low display brightness and reduce the user's viewing experience.
[0042] In the related art, in order to avoid the LED display screen showing a very dark display effect (i.e., low display brightness), the display effect can be improved by increasing the brightness of the LED lamp beads in the LED display screen. Specifically, the FPGA of the receiving card adjusts the current gain received by the driver chip of the LED light board to increase the brightness of the LED lamp beads themselves when displaying (i.e., brightness), thereby increasing the display brightness of the LED display screen.
[0043] However, the brightness of the LED lamp beads is limited, which makes the display brightness adjustment effect limited. In addition, the use of increasing the current gain increases the overall power consumption of the LED display and increases the heat generated by the LED display, which is not conducive to the display of the LED display and will also reduce the life of the LED display.
[0044] Based on this, the embodiments of the present application provide an image enhancement method, device, LED display screen and storage medium, which enhance the display data with lower brightness first, and then send the enhanced display data to the LED light board for display, thereby achieving the effect of increasing the display brightness.
[0045] An embodiment of the present application provides an image enhancement method, which can be executed by an image enhancement device. The image enhancement device can be implemented by software and / or hardware. The image enhancement device can be composed of two or more physical entities or one physical entity.
[0046] At present, the image enhancement device is described as an LED display screen. In this case, the image enhancement method can be executed by a processor (such as FPGA) installed on a receiving card in the LED display screen. It is understandable that when the LED display screen is also equipped with a processor such as a microcontroller unit (MCU) or a central processing unit (CPU), the image enhancement method can also be executed by these processors.
[0047] In the embodiment, since the FPGA of the LED display screen controls the LED display screen to display based on the display data, the FPGA is directly used to enhance the display data currently required to be displayed, that is, the image enhancement method is executed to improve the display smoothness and reduce the delay.
[0048] In practical applications, the image enhancement device may also be other devices with data processing functions. In this case, the image enhancement device may send the enhanced display data to the LED display screen for display.
[0049] Figure 2 A flowchart of an image enhancement method provided in one embodiment of the present application, refer to Figure 2 , the image enhancement method comprises:
[0050] Step 110: Receive a first image, where the first image is a frame of image in RGB format in a color video.
[0051] At present, the LED display screen displays color video data (currently recorded as color video) as an example for description. Among them, the color video is composed of multiple frames of images, and each frame of the image is in RGB format. Among them, red (R), green (G), and blue (B) are the three primary colors of optics. Various color images can be obtained by changing the three color channels of red (R), green (G), and blue (B) and superimposing them on each other. Usually, the image in RGB format is composed of the image data in the R channel, the image data in the G channel, and the image data in the B channel.
[0052] For example, the color video is received from the outside by the sending card and sent to the FPGA of the LED display receiving card. The color video is composed of multiple frames of images, and each frame of the image is received by the FPGA in sequence. It should be noted that the image currently mentioned can also be considered as image data. After displaying based on the image data, the corresponding image can be displayed.
[0053] After receiving the image, the FPGA can enhance the image to improve the brightness of the image. Currently, the FPGA contains a custom IP module, which encapsulates a program (i.e., a programmable program) for implementing the image enhancement algorithm. After receiving the image, the FPGA sends it frame by frame to the IP module, so that the IP module can enhance the image data. If the LED display is used for splicing display, the FPGA can send only the part of the image data that needs to be displayed by its own LED display to the IP module.
[0054] In one embodiment, when the FPGA receives each frame of the color video frame by frame, the currently received image is sent to the IP module. At present, the image currently received by the IP module is recorded as the first image. It should be noted that the "receiving the first image" mentioned in this step specifically refers to the IP module receiving the first image.
[0055] Step 120: Convert the first image into a second image in YUV format.
[0056] YUV is a color encoding method, commonly used in video processing scenarios. In YUV, Y represents brightness, that is, grayscale value. U and V represent chroma, which is used to describe the color and saturation of the image and is used to specify the color of the pixel.
[0057] The brightness can be expressed in grayscale. That is, the grayscale can reflect the different color levels between the darkest and the brightest. The grayscale value indicates the current value of the displayed brightness. The higher the grayscale, the closer it is to white, and the lower the grayscale, the closer it is to black. In the embodiment, white and black are divided into 256 levels according to a logarithmic relationship. At this time, the grayscale value range is 0 to 255, white is 255, and black is 0.
[0058] In the embodiment, when the first image is enhanced, it is mainly reflected by enhancing the grayscale value. Therefore, after the IP module receives the first image, it first converts the first image in RGB format into an image in YUV format to obtain the grayscale value corresponding to each pixel in the first image. Currently, the image in YUV format obtained by converting the first image is recorded as the second image. Among them, the technical means for converting RGB to YUV can adopt the realized technical means, which is not limited at present.
[0059] Step 130: Split the second image into Y channel data, U channel data, and V channel data.
[0060] Exemplarily, after the IP module obtains the second image, it first splits the second image into three single-channel data. Currently, the second image in YUV format is a combination of data in the Y channel, U channel, and V channel. Therefore, this step can split the second image to obtain Y channel data, U channel data, and V channel data, respectively. Among them, the Y channel data represents the grayscale of the image, and the U channel data and the V channel data represent the chrominance of the image.
[0061] For example, the value range of the data in the Y channel, U channel and V channel of the second image is 0-255. At this time, the bit width (i.e., data width) of the second image is 24, where [7:0] corresponds to the image data of the Y channel, [15:8] corresponds to the image data of the U channel, and [23:16] corresponds to the image data of the V channel. After the second image (bit width 24 bits) is converted, the first 8 bits of image data are obtained as the Y channel data, the middle 8 bits of image data are obtained as the U channel data, and the last 8 bits of image data are obtained as the V channel data.
[0062] Step 140: When the first image needs to be enhanced, each first grayscale value under the Y channel data is enhanced to a corresponding second grayscale value to obtain enhanced Y channel data.
[0063] In one embodiment, after receiving the first image from the sending card, the FPGA not only sends the first image to the IP module so that the IP module can obtain Y channel data, U channel data and V channel data, but also determines whether the first image needs to be enhanced. The means for determining whether enhanced processing is needed is not currently limited. For example, when it is determined that the brightness of the first image is lower than a preset brightness threshold, it is determined that enhanced processing is needed. For another example, when it is determined that the number of pixels with grayscale values lower than the preset grayscale in the first image accounts for more than the percentage threshold, it is determined that enhanced processing is needed. For another example, when it is determined that the brightness value of the current environment of the LED display screen is higher than the brightness threshold, it is determined that enhanced processing is needed. It can be understood that the first two methods are implemented by computer programs in the FPGA, and the latter method also requires the use of a brightness sensor. In this case, the brightness sensor can be installed in the LED display screen and connected to the FPGA. Optionally, after obtaining the second image, it can be determined whether additional processing is needed. In this case, the IP module determines that enhanced processing is needed when the number of pixels with grayscale values lower than the preset grayscale accounts for more than the percentage threshold based on the Y channel data in the second image, otherwise no enhanced processing is required.
[0064] When it is determined that enhancement processing is required, the FPGA notifies the IP module to perform enhancement processing. When the IP module receives the notification from the FPGA, it determines that the first image needs to be enhanced. Otherwise, the IP module does not receive the notification from the FPGA, that is, the IP module determines that enhancement processing is not required. At this time, the IP module merges the Y channel data, the U channel data, and the V channel data to obtain the second image, converts the second image into the first image in RGB format, and sends it to the FPGA, which controls the LED light board to display the first image.
[0065] Another optional method is that when the FPGA determines that the first image needs to be enhanced, the first image is sent to the IP module, otherwise, the IP module is not sent, and the FPGA directly controls the LED light board to display the image data.
[0066] Considering that there is content continuity between images of adjacent frames in video data, in addition to judging whether images need to be enhanced frame by frame, FPGA can also directly determine whether images of subsequent frames also need to be enhanced when it determines that one frame needs to be enhanced, without further judgment.
[0067] In the embodiment, the enhancement process is mainly used to achieve grayscale enhancement. Therefore, in the embodiment, only the Y channel data is enhanced. Specifically, the grayscale value corresponding to each pixel in the second image is recorded in the Y channel data. Currently, the grayscale value recorded in the Y channel data is recorded as the first grayscale value, and each pixel has a corresponding first grayscale value. The first grayscale value can be understood as the grayscale value before the enhancement process. Afterwards, the first grayscale value corresponding to each pixel is enhanced to the second grayscale value, that is, the enhanced Y channel data is obtained, and the second grayscale value corresponding to each pixel is recorded in the enhanced Y channel data. The second grayscale value is the grayscale value after the enhancement process, and each first grayscale value has a corresponding second grayscale value, and the second grayscale value corresponding to the first grayscale value is greater than or equal to the first grayscale value. Compared with using the first grayscale value, the brightness of the pixel using the second grayscale value is higher when displayed. It can be understood that pixel points can be understood as points representing pixels in an image. Currently, the second image and the first image are only different in format. Therefore, the pixel points in the second image and the first image correspond one to one. In an embodiment, the pixel points of the second image can also be understood as the pixel points of the first image, and the two have the same meaning.
[0068] The method for determining the second grayscale value is not currently limited.
[0069] Example 1: A grayscale increase value (which may reflect the grayscale increase amplitude) is preset, and then the first grayscale value is added to the grayscale increase value to obtain a second grayscale value.
[0070] Example 2, after obtaining the first grayscale value, according to the corresponding first grayscale value recorded in the Y channel data of each pixel point, the number of pixels corresponding to each first grayscale value in the second image is counted, and the number of pixels can also be understood as the total number of pixels corresponding to the first grayscale value in the second image, wherein the corresponding pixel point refers to the pixel point with the first grayscale value in the image. After statistics, each first grayscale value has a corresponding number of pixels under the Y channel data. Currently, the number of pixels obtained based on the first grayscale value recorded in the Y channel data is recorded as the first number. For example, the first number corresponding to the first grayscale value 16 is 480, indicating that there are 480 pixels with a grayscale value of 16 in the second image.
[0071] After the statistics are completed, the first quantity of each first gray value is accumulated with each first quantity corresponding to each first gray value less than the first gray value to obtain a cumulative quantity. At this time, each first gray value has a corresponding cumulative quantity. For example, when the first gray value is 16, the first quantities of the first gray values from 0 to 16 are accumulated to obtain a cumulative quantity corresponding to 16.
[0072] After the cumulative numbers corresponding to the first grayscale values are calculated, the second grayscale value corresponding to the first grayscale value is determined based on the cumulative numbers. The determination method may be to multiply the cumulative number of the first grayscale values by the maximum grayscale value, and divide the multiplication result by the total number of pixels of the first image (which can also be understood as the total number of pixels of the second image, both of which are equal), and the division result is the second grayscale value. Afterwards, the first grayscale value is remapped to the second grayscale value to achieve enhancement processing.
[0073] Example three, the enhancement processing method of the above-mentioned example two is improved. After the improvement, accumulation and remapping can be achieved. Specifically, each time a cumulative number is obtained, the corresponding second grayscale value can be calculated, and the first grayscale value can be enhanced to the second grayscale value. For example, when the first grayscale value is 16, the first numbers corresponding to the first grayscale value 0 to the first grayscale value 16 are obtained, and added to obtain the cumulative number corresponding to the first grayscale value 16. Afterwards, the cumulative number of the first grayscale value is multiplied by the maximum grayscale value, and the multiplication result is divided by the total number of pixels of the first image, and the division result is the second grayscale value. Afterwards, the first grayscale value in the Y channel data is remapped to the second grayscale value to achieve enhancement processing. Afterwards, the cumulative number corresponding to another first grayscale value (such as another first grayscale value is 17) is calculated, and the second grayscale value corresponding to the other first grayscale value is determined, and then the other first grayscale value in the Y channel data is remapped to the corresponding second grayscale value. This process is repeated until all first grayscale values in the Y channel data are enhanced to second grayscale values.
[0074] After remapping the first grayscale value to the second grayscale value, the first grayscale value of each pixel in the Y channel data is changed to the second grayscale value, thereby obtaining enhanced Y channel data (ie, the enhanced Y channel data records the second grayscale value).
[0075] Optionally, when calculating the cumulative number, the cumulative number corresponding to each first grayscale value may be determined in order from small to large first grayscale values, and when the cumulative number of the current first grayscale value is obtained, the second grayscale value is determined based on the cumulative number, and the first grayscale value is remapped to the second grayscale value. After that, the cumulative number corresponding to the next first grayscale value is calculated. At this time, the first number corresponding to the next first grayscale value may be added to the cumulative number of the current first grayscale value, thereby obtaining the cumulative number corresponding to the next first grayscale value. This process is repeated until all first grayscale values are remapped to second grayscale values, i.e., the accumulation process and the remapping process are performed simultaneously.
[0076] Step 150: Merge the enhanced Y channel data, U channel data and V channel data to obtain an enhanced second image.
[0077] The U channel data, the V channel data and the enhanced Y channel data are combined to obtain a new second image, which can be considered as enhanced image data. Currently, the new second image is recorded as the enhanced second image.
[0078] Among them, the implementation method of merging the three channel data is not currently limited. For example, the data bit width (i.e., data width) of the second image is 24, and the data bit widths of the three channel data are 8 respectively. At this time, the enhanced Y channel data is filled in the data bits [7:0] of the second image, the U channel data is filled in the data bits [15:8], and the V channel data is filled in the data bits [23:16], so that the enhanced second image of [23,0] can be obtained.
[0079] Step 160: Convert the enhanced second image into a third image in RGB format, and the third image is used for display on the LED display screen.
[0080] Exemplarily, the enhanced second image is an image in YUV format. At this time, the YUV format image needs to be modified into an RGB format image. Currently, the image obtained by converting the enhanced second image into RGB format is recorded as the third image. The third image can be understood as the image after enhancing the first image.
[0081] It can be understood that, since the IP module implements image enhancement, after the first image is input into the IP module, the third image is output by the IP module.
[0082] Exemplarily, after the IP module outputs the third image, the FPGA controls the LED light board for display based on the third image. This process is the same as the process in which the FPGA controls the LED light board for display based on display data in the related art, and is not described further at present.
[0083] According to the above method, each frame image in the color video can be enhanced and displayed at the same time.
[0084] Optionally, if the brightness of the LED display screen when displaying enhanced image data still cannot meet the user's expectations, the FPGA of the LED display screen can adjust the current gain received by the driver chip of the LED light board to increase the brightness of the LED lamp beads themselves, thereby increasing the display brightness of the LED display screen.
[0085] In the above, by receiving a frame of the first image in RGB format in the color video, converting the first image in RGB format into the second image in YUV format, splitting the second image into Y channel data, U channel data and V channel data, when the first image needs to be enhanced, each first gray value in the Y channel data is enhanced to the corresponding second gray value to obtain the enhanced Y channel data, then merging the U channel data, the V channel data and the enhanced Y channel data to obtain the enhanced second image, and converting the enhanced second image into the third image in RGB format for display on the LED display screen, the technical means solves the technical problem of low brightness when the ambient light intensity is strong in the related art, and compared with the method of adjusting the current gain, the image enhancement method is implemented by a programmable program, that is, the image enhancement method is implemented by software, which can avoid additional increase in the power consumption of the LED display screen and extend the service life of the LED display screen. In addition, by using the FPGA in the LED display screen to execute the image enhancement method, that is, by using the data processing capability of the FPGA, the image in the color video can be enhanced frame by frame, that is, pipeline processing is completed, and the delay is very small (the delay effect can be ignored), which can ensure the smoothness when displaying the video. Moreover, during the enhancement process, the first image in RGB format is converted into a second image in YUV format, and the data bits of the second image are separated. After that, only the Y channel data is enhanced, which also reduces the amount of data processing during enhancement and further reduces the delay during video playback.
[0086] Figure 3A flowchart of an image enhancement method provided for an embodiment of the present application. The image enhancement method is concretized on the basis of the above-mentioned image enhancement method. In this image enhancement method, the color video is data that meets the Avalon_ST interface specification. That is, the virtual interface for data input and the virtual interface for data output in the IP module are both Avalon_ST interfaces. Among them, the Avalon_ST interface is a unidirectional point-to-point high-speed interface, which is mainly aimed at the transmission of high-speed data streams and can reduce bottlenecks in data stream processing. Specifically, after the FPGA receives the image of the color video frame by frame from the sending card, it converts the data into data that meets the Avalon_ST interface specification and inputs it into the IP module, so that the IP module receives image data that meets the Avalon_ST interface specification.
[0087] refer to Figure 3 , the image enhancement method comprises:
[0088] Step 210: Receive a first image, where the first image is a frame of image in RGB format in a color video.
[0089] Step 220: Convert the first image that meets the Avalon_ST interface specification into Avalon_ST raw stream data.
[0090] Exemplarily, the first image sent to the IP module is data that meets the Avalon_ST interface specification. When the IP module processes, the first image that meets the Avalon_ST interface specification is converted into Avalon_ST raw stream data. The raw stream data does not contain a header or a trailer, but only has 24-bit data representing RGB values, and the R value corresponds to 0-7 bits, the G value corresponds to 8-15 bits, and the B value corresponds to 16-23 bits. After conversion into Avalon_ST raw stream data, subsequent enhancement processing is convenient.
[0091] Step 230: Convert the first image into a second image in YUV format.
[0092] Exemplarily, the 24-bit RGB value in the first image is converted into 24-bit YUV format data to obtain the second image in YUV format. Optionally, after the IP module obtains the 24-bit RGB value of a pixel (which is Avalon_ST raw stream data), it can convert it to obtain the 24-bit YUV format data corresponding to the pixel, where 0 to 7 bits correspond to the data of the pixel in the Y channel, 8 to 15 bits correspond to the data of the pixel in the U channel, and 16 to 24 bits correspond to the data of the pixel in the V channel.
[0093] Step 240: split the second image into Y channel data, U channel data, and V channel data.
[0094] Currently, the Y channel data, U channel data, and V channel data are all Avalon_ST raw stream data.
[0095] Step 250: When the first image needs to be enhanced, determine the first grayscale value of each pixel in the second image under the Y channel data.
[0096] Exemplarily, the first grayscale value of each pixel is recorded in the Y channel data. Therefore, based on the Y channel data, the current first grayscale value of each pixel in the second image can be determined.
[0097] Step 260: Count the first number of pixels corresponding to each first grayscale value.
[0098] After obtaining the first grayscale value corresponding to each pixel in the second image, the first quantity corresponding to each first grayscale value is counted. When counting, a first grayscale value may be first taken, and then the total number of pixels having the first grayscale value in the second image is determined, and then the total number is used as the first quantity corresponding to the first grayscale value. Then, another first grayscale value is taken, and then the first quantity corresponding to the first grayscale value is determined, and so on, until the first quantities corresponding to all first grayscale values are determined.
[0099] When counting, it is also possible to count pixel by pixel, that is, when converting to obtain the second image, the first grayscale value corresponding to each pixel is obtained one by one, and then based on the currently read first grayscale value, the currently obtained first quantity is updated. When all pixel counts are completed, the first quantity corresponding to each first grayscale value is obtained.
[0100] In one embodiment, taking pixel-by-pixel statistics as an example, this step may include steps 261 to 264:
[0101] Step 261: According to the first grayscale value of the current pixel point in the second image under the Y channel data, the real-time pixel quantity is obtained based on the corresponding first storage address, and each first grayscale value has a corresponding storage address.
[0102] Exemplarily, the first quantity corresponding to each first gray value is stored in a random access memory (RAM) for the IP module to read and write at any time. The RAM is also installed in the receiving card and connected to the FPGA, such as Figure 1The SDRAM in can be used as the RAM currently in use. The first quantities corresponding to different first grayscale values have different storage addresses in the RAM. It can be understood that the data bit width of the Y channel data is 8, and the maximum value it can express is 256. Among them, the bit width can be understood as the amount of data that can be transmitted at one time. When the first grayscale value in the Y channel is represented by binary, the 8-bit data bit width can express a grayscale value (i.e., grayscale level) of 0-255. Based on this, address bits are used in the RAM to represent grayscale values of 0-255. At this time, the address bit width is 8. That is, each address bit corresponds to a grayscale value, and each address bit corresponds to a storage address, which is used to store the first quantity corresponding to the corresponding grayscale value. The data bit width of the storage space corresponding to each address bit is related to the total number of pixels (or resolution) of each frame image. For example, the resolution of each image in a color video is 640×480, and the corresponding total number of pixels is 307200. If the first grayscale value of all pixels in the Y channel is the same, then the number corresponding to the first grayscale value recorded in the RAM should be 307200. When the number is expressed in binary, the required data bit width is 19, that is, the data bit width of the storage space corresponding to each address bit is 19, to ensure that the storage space is sufficient to record the number. It can be understood that the data bit width and address bit width can be set before receiving the color video and used by the IP module.
[0103] In one embodiment, the first grayscale value of each pixel in the second image in the Y channel data is read one by one according to a certain pixel arrangement order. The pixel arrangement order is not currently limited. For example, starting from the pixel in the upper left corner of the second image, the first grayscale value of each pixel in the Y channel data is read in sequence from left to right and from top to bottom.
[0104] In order to facilitate understanding of the technical solution, the pixel currently being read in the second image is recorded as the current pixel. After determining the first grayscale value of the current pixel in the Y channel data, find the address bit representing the first grayscale value in each address bit, and then obtain the corresponding storage address. Currently, the storage address corresponding to the current pixel is recorded as the first storage address. Afterwards, read the real-time first quantity recorded in the first storage address. Currently, the real-time first quantity is recorded as the real-time pixel quantity, and the real-time pixel quantity can represent the number of pixel points distributed in the first grayscale value counted at the current moment.
[0105] Step 262: Add 1 to the real-time pixel number to obtain a new real-time pixel number.
[0106] Exemplarily, after reading the real-time pixel number from the first storage address, the real-time pixel number is increased by 1 to indicate that the number of pixels distributed within the first grayscale value increases by one (i.e., the current pixel is increased). After that, a new real-time pixel number can be obtained, i.e., the real-time pixel number is updated.
[0107] In one embodiment, the actions of reading the real-time pixel number and writing the real-time pixel number into the RAM are performed based on the clock signal. The clock signal is a commonly used signal in LED display screens, which is used to determine when each state in a logic unit (such as FPGA) is updated. The embodiment does not limit the generation method of the clock signal.
[0108] Currently, the IP module performs operations of reading the real-time number of pixels and writing the real-time number of pixels based on the clock signal. However, there is at least a clock signal delay between the corresponding reading operation and writing operation when counting a pixel point, that is, for a pixel point, reading the real-time number of pixels and writing the real-time number of pixels are not completed within the same clock signal. At this time, the real-time number of pixels recorded in the storage address may not be updated in time after the statistics. If two adjacent pixels have the same first grayscale value during the statistical process, then when the latter pixel point is used as the current pixel point, the real-time number of pixels read from the storage address may not have increased the statistical result of the previous pixel point. Then, the result obtained after adding 1 to the real-time number of pixels read will not be an accurate statistical result. At this time, in order to avoid statistical errors, step 262 can be specifically steps 2621-2623:
[0109] Step 2621: determine whether the first storage address and the second storage address are consistent, the second storage address is the storage address corresponding to the new real-time pixel quantity calculated last time. If the first storage address and the second storage address are inconsistent, execute step 2622; if the first storage address and the second storage address are consistent, execute step 2623.
[0110] The storage address of the new real-time number of pixels obtained by the previous calculation can also be understood as the storage address of the real-time number of pixels read under the previous clock signal, that is, the storage address corresponding to the first grayscale value of the previous current pixel point. Currently, the storage address of the new real-time number of pixels obtained by the previous calculation is recorded as the second storage address.
[0111] Exemplarily, after reading the real-time pixel quantity of the first storage address, it is determined whether the first storage address and the second storage address are consistent (i.e., the same). If the first storage address and the second storage address are not the same, it means that the first grayscale value corresponding to the new real-time pixel quantity obtained last time is different from the first grayscale value corresponding to the current pixel point, that is, the two adjacent processed pixels have different first grayscale values. At this time, step 2622 can be executed. If the first storage address and the second storage address are the same, it means that the first grayscale value corresponding to the new real-time pixel quantity obtained last time is the same as the first grayscale value corresponding to the current pixel point. At this time, step 2623 can be executed.
[0112] Step 2622: If the first storage address and the second storage address are inconsistent, the real-time pixel number recorded at the first storage address is increased by 1 to obtain a new real-time pixel number.
[0113] Exemplarily, the number of real-time pixels currently read from the first storage address is added by 1 to obtain a new number of real-time pixels. At this time, it is determined that the current pixel point has been counted, and step 263 is executed.
[0114] Step 2623: If the first storage address and the second storage address are consistent, then the new real-time pixel number obtained by the previous calculation is increased by 1 to obtain a new real-time pixel number.
[0115] Exemplarily, when the current pixel and the previous pixel have the same first grayscale value, the real-time pixel number read from the first storage address may not include the statistical result of the previous pixel, that is, the new real-time pixel number obtained based on the previous pixel may not have been written into the first storage address. Therefore, the new real-time pixel number obtained when processing the previous pixel is obtained, that is, the new real-time pixel number obtained by the previous calculation (which has been increased by the statistical result of the previous pixel), and the new real-time pixel number obtained by the previous calculation is added by 1 to obtain the new real-time pixel number corresponding to the current pixel. It is determined that the current pixel has been counted, and step 2130 is executed.
[0116] Step 263: Write the new real-time pixel quantity into the first storage address to update the real-time pixel quantity recorded in the first storage address.
[0117] After the new real-time pixel number is obtained, it is written into the first storage address, that is, the real-time pixel number recorded in the first storage address is updated. It can be understood that this process can be implemented based on the clock signal received subsequently.
[0118] Step 264, update the next pixel in the second image as the current pixel, and return to execute the operation of obtaining the real-time pixel quantity based on the first grayscale value of the current pixel in the second image under the Y channel data based on the corresponding first storage address, until all the pixels in the second image are counted, and the real-time pixel quantity recorded at each storage address is used as the first quantity of the corresponding first grayscale value under the Y channel data.
[0119] Exemplarily, after counting the current pixel, determine whether there are any uncounted pixels in the second image. If there are any uncounted pixels, select the next uncounted pixel according to the pixel arrangement order and update it as the current pixel. Then, return to step 261 to count the current pixel. If there are no uncounted pixels, it means that all pixels have been counted. At this time, the counting is terminated, and the real-time pixel number recorded in the storage address corresponding to each first gray value is used as the first number of the first gray value. Then, execute step 270.
[0120] In one embodiment, both the reading and writing of the first quantity are scheduled by memory arbitration, wherein memory arbitration can be understood as when the RAM is idle, only the first quantity is allowed to be read or written externally at the same time, which is a technical means that has been implemented and will not be described in detail at present.
[0121] Step 270 , reading the first quantity corresponding to each first grayscale value in order from small to large grayscale values.
[0122] Exemplarily, the first grayscale value currently in use is determined in ascending order of the first grayscale value. Then, the corresponding storage address is determined based on the address bit corresponding to the first grayscale value, and the first number of records is read from the storage address.
[0123] In one embodiment, this step may be specifically as follows: when a statistics completion signal is received, the first quantity corresponding to each first grayscale value is read in sequence according to the grayscale value from small to large.
[0124] The statistical completion signal is a signal generated after the first grayscale values of all pixels in the second image are counted to obtain the first quantities. For each frame of the image, after the first quantities corresponding to the first grayscale values are counted, the statistical completion signal is generated, and the IP module determines that the first quantities can be accumulated based on the statistical completion signal. At this time, the IP module reads the first quantities in the order of the first grayscale values from small to large.
[0125] Since the first grayscale value corresponding to each frame of image is between 0-255, this step may not consider a specific frame of image, but instead read the first quantities corresponding to each first grayscale value in sequence starting from 0 based on the grayscale value range.
[0126] Each time a first quantity is read, steps 280 - 2100 are executed until all first quantities determined under the current second image are read, that is, all first grayscale values are enhanced to second grayscale values.
[0127] Step 280: After each reading of the first quantity, the first quantity read this time is added to the cumulative quantity obtained in the previous reading to obtain the cumulative quantity in the current reading.
[0128] Each time the first quantity is read from the RAM, all the first quantities currently read are accumulated. When accumulating, in order to save data processing, the accumulated quantity obtained last time can be added to the first quantity read this time to obtain the accumulated quantity corresponding to this reading (i.e., the corresponding first gray value). Among them, the accumulated quantity represents the accumulated result of all the first quantities currently read. For example, the first quantity currently read is 480, and the corresponding first gray value is 1, and the first quantity read last time is 480, and the corresponding first gray value is 0, then the accumulated quantity when the first gray value is 1 is 480+480=960. When the first quantity corresponding to the first gray value read next time is 480, the corresponding accumulated quantity is 960+480=1440, and so on. At this time, each first gray value has a corresponding accumulated quantity.
[0129] In one embodiment, after this step, it further includes: clearing the first quantity recorded in the corresponding storage address, each first gray value has a corresponding storage address, and the storage address is used to store the first quantity corresponding to the corresponding first gray value. Exemplarily, since the first quantities corresponding to the first gray values are currently read in order from small to large and accumulated, the first quantity recorded in the storage address can be cleared after the first quantity is read from the corresponding storage address according to the first gray value, so that when the next frame of image is enhanced, the first quantity corresponding to the first gray value in the next frame of image is stored using the storage address. Wherein, when recording the first quantity of the next frame of image, the corresponding relationship between the storage address and the gray value remains unchanged.
[0130] Step 290: Obtain the second grayscale value corresponding to the first grayscale value used in the current reading according to the cumulative number obtained in the current reading, the maximum grayscale value and the total number of pixels of the second image.
[0131] During the accumulation process, the second grayscale value corresponding to the first grayscale value is also determined. Specifically, after reading the corresponding first quantity according to the currently used first grayscale value and obtaining the accumulated quantity based on the first quantity, the second grayscale value corresponding to the first grayscale value is determined.
[0132] The second grayscale value is obtained by the cumulative number of the first grayscale values, the maximum grayscale value and the total number of pixels of the second image. The maximum grayscale value can be the largest first grayscale value in the second image, or the maximum value of the value range (i.e., 0-255) of the first grayscale value. Currently, the maximum grayscale value is 255 as an example for description. At this time, the maximum grayscale value corresponding to each frame image is 255. The total number of pixels of the second image can also be understood as the total number of pixels of the first image.
[0133] In one embodiment, the second grayscale value may be determined using the following formula:
[0134]
[0135] Among them, D A represents the first grayscale value currently used, H(i) represents the first quantity corresponding to the first grayscale value i, and the value range of i is 0 to D A , 0≤D A ≤255, D max represents the maximum grayscale value, A0 represents the total number of pixels in the second image, and each frame image in the color video has the same total number of pixels. A ) represents the function used to calculate the second gray value, D B Indicates D A Based on the above formula, it can be seen that this step may include step 291-step 292:
[0136] Step 291: Use a multiplier to multiply the accumulated number obtained by this reading by the maximum grayscale value.
[0137] The multiplier is a computer program used to implement multiplication in the IP module. In practical applications, the multiplier can also be implemented by corresponding circuits.
[0138] Exemplarily, the accumulated number corresponding to the first gray value and the maximum gray value are input to the multiplier together, and the multiplier multiplies the two and outputs the corresponding multiplication result.
[0139] Step 292: Use a divider to divide the multiplication result of the multiplier by the total number of pixels of the second image, and the result of the division is the second grayscale value corresponding to the first grayscale value used in this reading.
[0140] The divider is a computer program used to implement division in the IP module. In practical applications, the divider can also be implemented by corresponding circuits.
[0141] Exemplarily, the multiplication result output by the multiplier and the total number of pixels of the second image are input to the divider together, and the divider divides the two and outputs the corresponding division result. When dividing, the multiplication result is divided by the total number of pixels.
[0142] The currently obtained division result can be regarded as the second grayscale value corresponding to the first grayscale value. Optionally, if the division result is a decimal, a rounding operation or a rounding operation can be performed to obtain an integer second grayscale value.
[0143] Step 2100: Enhance the first grayscale value used in this reading to the corresponding second grayscale value, and obtain enhanced Y channel data after all the first grayscale values are enhanced to the corresponding second grayscale values.
[0144] Each time the second grayscale value corresponding to the currently used first grayscale value is obtained, the grayscale value of the pixel point using the first grayscale value can be changed to the second grayscale value to achieve grayscale value remapping.
[0145] It can be understood that after the currently used first grayscale value is enhanced to the second grayscale value, the first quantity corresponding to the next first grayscale value continues to be read in order from small to large, and the second grayscale value continues to be determined, and the first grayscale value is enhanced to the second grayscale value until all the first grayscale values are enhanced to the second grayscale value, that is, after each first grayscale value in the second image is changed to the corresponding second grayscale value, it is determined that the image enhancement of the Y channel data is completed, and the enhanced Y channel data is obtained.
[0146] Step 2110: Buffer the enhanced Y channel data using a synchronous FIFO method.
[0147] Since the virtual interface used to output data in the IP module is the Avalon_ST interface, after obtaining the enhanced Y channel data, it needs to be converted into Avalon_ST raw stream data before it can be encapsulated into data that meets the Avalon_ST interface specification and then output by the IP module, thereby meeting the design requirements for transmitting Avalon_ST interface specification data in the FPGA. During the conversion, the enhanced Y channel data is first cached using a synchronous FIFO, where FIFO (First Input First Output) means first in, first out, and synchronous FIFO means that the read clock (currently the clock for reading the enhanced single channel data from the cache) and the write clock (currently the clock for writing the enhanced single channel data in the cache) are the same clock, and the read and write operations occur simultaneously when the clock edge arrives.
[0148] Step 2120: read the cached enhanced Y channel data and convert it into Avalon_ST raw stream data.
[0149] It can be understood that after the enhanced Y channel data is cached, the enhanced Y channel data can also be read from the cache based on the synchronous FIFO, and then the enhanced Y channel data is converted into Avalon_ST raw stream data to facilitate the subsequent merging of the Avalon_ST raw stream data of the three channels. Among them, the conversion process is a technical means that has been implemented and will not be described in detail at present.
[0150] Step 2130: Merge the enhanced Y channel data, U channel data, and V channel data to obtain an enhanced second image.
[0151] It can be understood that the U channel data and the V channel data are not processed at present. That is, the U channel data and the V channel data are both Avalon_ST bare stream data. In addition, the enhanced Y channel data is also converted into Avalon_ST bare stream data in the aforementioned step. Therefore, in this step, the Avalon_ST bare stream data of the three channels can be merged to obtain the enhanced second image. At this time, the enhanced second image is also Avalon_ST bare stream data.
[0152] Step 2140: Convert the enhanced second image into a third image in RGB format.
[0153] The third image is also Avalon_ST raw stream data.
[0154] Step 2150: Convert the third image into data that meets the Avalon_ST interface specification.
[0155] Exemplarily, a header and a footer are added to the Avalon_ST raw stream data representing the third image to obtain image data that meets the Avalon_ST interface specification. Afterwards, the FPGA receives the image data that meets the Avalon_ST interface specification from the IP module, converts it into the format when the FPGA receives the image data from the sending card, and then processes it to control the LED display.
[0156] As described above, by using a virtual interface in the Avalon_ST format for the IP module (i.e., the image data received by the IP module and the image data outputted by the IP module both meet the Avalon_ST interface specification), high-bandwidth, low-latency, and unidirectional data transmission can be achieved when the IP module executes the image enhancement method. When counting the first quantity, by determining whether the first storage address and the second storage address are consistent, and then selecting different writing methods, it is possible to avoid the situation where there is at least one clock signal delay between the corresponding reading operation and writing operation during the counting process of a pixel point, resulting in inaccurate statistical results. By reading the first quantity, and accumulating while reading, and then obtaining the second grayscale value based on the accumulated quantity, it is possible to achieve a simple and rapid determination of the second grayscale value, thereby ensuring the speed of the enhancement process.
[0157] In one embodiment of the present application, the image enhancement method also includes: determining a second number of pixels in the first image that satisfy a preset low grayscale value range; if the ratio of the second number to the total number of pixels in the first image reaches a preset ratio, determining that the first image needs to be enhanced.
[0158] At present, the description is made by taking the case where each frame of a color video is judged whether enhancement is required. For example, when the FPGA receives a first image from a receiving card, in addition to converting the first image into image data that meets the Avalon_ST interface specification and inputting it into the IP module, it also judges whether the first image needs to be enhanced.
[0159] When determining whether enhancement is needed, the RGB value of each pixel in the first image may be grayed to obtain a gray value corresponding to each pixel. Currently, the gray value is recorded as the third gray value. It can be understood that the third gray value is a gray value obtained based on data of the three color channels of red (R), green (G), and blue (B).
[0160] After determining the third grayscale value of each pixel, a third quantity corresponding to the third grayscale value is counted, each third grayscale value has a corresponding third quantity, and the third quantity represents the number of pixels having the third grayscale value in the first image.
[0161] Afterwards, a second number of pixels within a preset low gray value range is determined based on each third number. The preset low gray value range is a preset gray value range, and each gray value within the gray value range is considered to be low gray. Each third gray value included in the preset low gray value range is determined, and the third numbers corresponding to each third gray value included are added to obtain a second number. The second number can be understood as the total number of pixels in the first image whose gray values are within the preset low gray value range.
[0162] Exemplarily, after determining the second number, the ratio of the second number to the total number of pixels in the first image is calculated. The ratio can reflect the proportion of pixels that need to be enhanced in the first image. Afterwards, determine whether the ratio reaches a preset ratio (i.e., whether it is greater than or equal to a preset ratio). The preset ratio can be understood as the minimum ratio when starting image enhancement. If the currently calculated ratio reaches the preset ratio, it means that most of the pixels in the first image need to be enhanced, that is, the first image needs to be enhanced. If the currently calculated ratio does not reach the preset ratio, it means that the first image does not need to be enhanced.
[0163] When it is determined that enhancement is required, the FPGA notifies the IP module. At this time, the IP module enhances the first grayscale value in the Y channel data. That is, when it is determined that enhancement is required, the FPGA generates an enhancement start signal and sends it to the IP module. The enhancement start signal is a signal for starting image enhancement. The IP module receives the enhancement start signal, starts to count the first quantities corresponding to each first grayscale value, accumulates the first quantities, and then remaps the first grayscale value to the second grayscale value.
[0164] When enhancement is not required, the IP module only splits the Y channel data, the U channel data and the V channel data, but does not process the Y channel data. Afterwards, the Y channel data, the U channel data and the V channel data are merged to obtain a second image, the second image is converted into a first image in RGB format, and the first image is input for display on the LED display screen.
[0165] As described above, by judging whether image enhancement is required through the grayscale value of each pixel in the first image, it can be ensured that only the image that needs to be enhanced is processed, thereby improving the accuracy of image enhancement.
[0166] Optionally, the IP module can also determine whether enhancement processing is required, that is, after the IP module obtains the Y channel data, it determines whether enhancement processing is required based on the first grayscale value in the Y channel data, and if enhancement processing is required, the first grayscale value is enhanced to the second grayscale value.
[0167] The following is an exemplary description of the image enhancement method provided in the embodiment of the present application. In the example, each frame of the color video is the same and requires image enhancement. Currently, the resolution of each frame of the image is 640×480, that is, the first image has a total of 480 rows, and the row numbers are recorded from 0 to 479 respectively. Among them, after the IP module receives the first image, it converts it into Avalon_ST raw stream data, and the bit width of the data is 24. After converting the first image to the second image, 24-bit data is also obtained, of which 0-7 bits correspond to Y channel data, 8-15 bits correspond to U channel data, and 16-23 bits correspond to V channel data. At this time, the second image can be split according to the number of bits corresponding to different channels.
[0168] In the first image, the pixels in the same row have the same row number, and the row number of the pixel can also be the row number of the first grayscale value corresponding to the pixel in the Y channel data. Currently, from top to bottom, the row number of the pixels in the first row is 0, the row number of the pixels in the second row is 1, and the row number of the pixels in the 480th row is 479, and each pixel in the first row (row number 0) corresponds to a value of 0, and each pixel in the second row (row number 1) corresponds to a value of 1, and so on, the pixel in the 480th row (row number 479) corresponds to a value of 479. At this time, when the first image is converted into the second image, the first grayscale value corresponding to the value 0 is 0, the first grayscale value corresponding to the value 1 is 1, and so on, the first grayscale value corresponding to the value 255 is 255, and the first grayscale value starts to be recounted when the value is 256. At this time, the first grayscale value corresponding to the value 256 is 0, and the first grayscale value corresponding to the value 257 is 1, and so on, the first grayscale value corresponding to the value 479 is 223.
[0169] Figure 4 A first schematic diagram of data simulation provided by an embodiment of the present application, referring to Figure 4 , taking the counting of the pixels in the third row as an example, at this time, sink_data is 2, that is, the first grayscale value of the pixel currently read is 2. The address bit of the storage address read is 2, and the number of real-time pixels currently counted (i.e. static_ram_q) is read from the storage address based on the address bit, and then after adding 1 to it, it is written to the storage address with the address bit of 2, and so on, until all the pixels in the third row are counted, a total of 640 pixels. And, based on Figure 4 It can be seen that since there is at least one time delay between reading and writing from the storage address, when reading the real-time pixel number from the storage address, it is determined whether the storage address written in the previous clock is the same as the storage address read. If they are not the same, the real-time pixel clock currently read is increased by 1 to obtain the current real-time pixel number. Otherwise, the real-time pixel number that needs to be written to the storage address in the previous clock plus 1 is used as the current real-time pixel number.
[0170] Figure 5 A second schematic diagram of data simulation provided by an embodiment of the present application, referring to Figure 5, when sink_sop is high, it indicates that the Y channel data starts to be received. When sink_vali is high, it indicates that the received data is valid. static_done_w indicates the statistical completion signal, that is, after the statistics of the first quantity corresponding to each first gray value are completed, a pulse signal is generated in static_done_w to indicate the statistical completion signal, and then the first quantity is read and accumulated and remapped. When source_eop is high, it indicates that a frame of data starts to be output externally. static_ram_q_w indicates the first quantity currently read. When cumulate_done_w is high, it indicates that the accumulation of each first quantity is completed, that is, the accumulated quantity corresponding to each first gray value is obtained.
[0171] Currently, in the Y channel data, each first grayscale value from grayscale values 0 to 223 corresponds to two rows of pixels, so the first number corresponding to it is 640×2=1280, and each first grayscale value from grayscale values 224 to 255 corresponds to one row of pixels, so the first number corresponding to it is 640. This is consistent with Figure 5 The first quantity represented by static_ram_q_w is consistent with that in Figure 5 The front of static_ram_q_w is 1280 and the back is 640. And, after static_done_w is a pulse signal, it is determined that the statistics of each first quantity are completed, and static_done_w is a pulse signal, indicating that accumulation can be started, that is, the first quantity can be read. It can be understood that the accumulation process and remapping are carried out at the same time, and after remapping, the data can be directly output to the outside for subsequent merging. Therefore, when accumulation and remapping start, source_eop is a pulse signal to indicate the start of output of enhanced Y channel data. It can be understood that after the remapping is completed, sink_sop is a pulse signal, indicating the start of receiving the Y channel data of the next frame. At the same time, cumulate_done_w is a pulse signal, indicating the end of accumulation of the first quantity. During the accumulation and remapping process, the Y channel data corresponding to the new frame image is no longer received, so sink_vali is low. This is different from Figure 5 The simulation results are consistent with .
[0172] During the accumulation process, the first quantity is read from the RAM according to the address bit corresponding to the first gray value and accumulated. After the accumulation is completed, the first quantity recorded in the RAM is cleared. For example, Figure 6 A third schematic diagram of data simulation provided for an embodiment of the present application, Figure 7 A fourth schematic diagram of data simulation provided for an embodiment of the present application, Figure 6 and Figure 7 The schematic diagrams of partial cumulative quantities in the cumulative process are shown respectively. Figure 6 and Figure 7In , cumulate_ram_data indicates the corresponding cumulative quantity. Currently, the first quantities corresponding to the first grayscale values are accumulated in the order of 0-255. At this time, when the first grayscale value is 0, the first quantity is 1280, and the corresponding cumulative quantity is 0+1280=1280. When the first grayscale value is 1, the first quantity is 1280, and the corresponding cumulative quantity is 1280+1280=2560, and so on. When the first grayscale value is 0 to 223, the corresponding cumulative quantities differ by 1280, which is different from Figure 6 The simulation results in are consistent. When the first gray value is 224 to 255, the corresponding cumulative number differs by 640. At this time, when the first gray value is 245, the corresponding cumulative number is 300800 (which is obtained by 224×1280+(245-223)×640), when the first gray value is 246, the corresponding cumulative number is 300800+640=301440, and so on, until the first gray value is 255, the corresponding cumulative number is 307200, which is equal to the total number of pixels in the first image, which is consistent with Figure 7 The simulation results are consistent with .
[0173] During accumulation, a second grayscale value is also calculated, and grayscale remapping is performed based on the second grayscale value. Figure 8 The fifth schematic diagram of data simulation provided by one embodiment of the present application. Figure 8 A local simulation schematic diagram is shown when each first gray value in a frame of image is remapped to a second gray value. Figure 8 In the above example, remap_ram_data_w represents the second grayscale value, and remap_ram_wraddress_w represents the first grayscale value. It can be understood that the accumulation process and the remapping process are carried out in parallel, and after a pulse signal appears in static_down_w, the accumulation process and the remapping process are started, wherein a multiplier is used to multiply the accumulated number corresponding to the current first grayscale value by the maximum grayscale value 255, and a divider is used to divide the multiplication result by the total number of pixel values 640×480 to obtain the corresponding second grayscale value. This process uses a multiplier and a divider, so the remapping process lags behind the accumulation process by several clocks. During remapping, the value range of the second grayscale value is 0-255. Among them, taking the first gray value of 248 as an example, the corresponding cumulative number is 302720. At this time, (302720×255)÷307200≈251.28, after rounding it, we get 251, that is, the second gray value corresponding to the first gray value of 249 is 251, which is the same as Figure 8The simulation results in are consistent. Taking the first gray value of 249 as an example, the corresponding cumulative number is 303360. At this time, (303360×255)÷307200≈251.81, after rounding it, we get 251, that is, the second gray value corresponding to the first gray value of 249 is 251, which is consistent with Figure 8 The simulation results are consistent with .
[0174] Need to explain, Figures 4 to 8 These are all schematic diagrams obtained after simulation using modelsim.
[0175] An embodiment of the present application further provides an image enhancement device, Fig. 9 A schematic diagram of the structure of an image enhancement device provided in one embodiment of the present application, referring to Fig. 9 When the image enhancement device executes the image enhancement method, it includes: a first format conversion module 31, an enhancement algorithm module 32 and a second format conversion module 33.
[0176] The first format conversion module 31, the enhancement algorithm module 32 and the second format conversion module 33 are modular expressions of the computer programs corresponding to the execution of the image enhancement method according to functional logic, and can be understood as IP modules in FPGA. Fig.10A schematic diagram of the packaging of an IP module provided for an embodiment of the present application shows various virtual interfaces for communicating with an external FPGA after the image enhancement device is packaged, wherein the virtual interface can be considered to implement the interface function through a software program. The virtual interfaces in the image enhancement device include: a clk virtual interface for receiving a clock signal; a rst_n virtual interface for receiving a reset signal; a proc_en virtual interface for receiving an enhancement start signal; a sink_data virtual interface for receiving a first image; a sink_eop virtual interface for indicating the end of receiving a frame of the first image when at a high level, which can also be understood as a pulse signal for indicating the end of transmitting a frame of the first image; a sink_sop virtual interface for indicating the start of receiving a frame of the first image when at a high level, which can also be understood as a pulse signal for indicating the start of transmitting a frame of the first image; a sink_vali virtual interface for indicating that a frame of the first image is valid when at a high level, which can also be understood as a high-level signal for continuously indicating that the received first image is valid during the process of receiving a frame of the first image; a source_ready virtual interface; The source_data virtual interface is used to output the third image (the first image when no enhancement is performed); the source_sop virtual interface is used to indicate that the transmission of a third image starts when the level is high, and can also be understood as a pulse signal indicating that the transmission of a third image starts; the source_eop virtual interface is used to indicate that the transmission of a third image ends when the level is high, and can also be understood as a pulse signal indicating that the transmission of a third image ends; the source_vali virtual interface is used to indicate that the third image is valid when the level is high, and can also be understood as a high-level signal indicating that the output of the third image is valid during the output of the third image.
[0177] Among them, the sink_data virtual interface and the source_data virtual interface are both Avalon_ST interfaces.
[0178] It can be understood that the connection relationship between the above-mentioned virtual interfaces is not currently limited. For example, the virtual interfaces related to receiving data can be connected to the relevant computer program (which can be expressed in modular form) in the FPGA for receiving color video from the sending card, and the virtual interfaces related to sending data can be connected to the relevant computer program (which can be expressed in modular form) in the FPGA for controlling the display of the LED light board.
[0179] The first format conversion module 31 is used to receive a first image, convert the first image into a second image in YUV format, and split the second image into Y channel data, U channel data and V channel data, wherein the first image is a frame of image in RGB format in a color video. The enhancement algorithm module 32 is used to enhance the corresponding second gray value of each first gray value under the Y channel data to obtain enhanced Y channel data when the first image needs to be enhanced. The second format conversion module 33 is used to merge the enhanced Y channel data, U channel data and V channel data to obtain an enhanced second image, and convert the enhanced second image into a third image in RGB format, wherein the third image is used for display on the LED display screen.
[0180] In one embodiment of the present application, Fig.11 A schematic diagram of the structure of an enhanced algorithm module provided for one embodiment of the present application. Fig.11 Shows Fig. 9 The internal structure of the enhanced algorithm module. Fig.11 The enhancement algorithm module 32 includes: a statistical submodule 321, an accumulation submodule 322 and a remapping submodule 323.
[0181] The statistics submodule 321 is used to determine the first grayscale value of each pixel in the second image under the Y channel data, and to count the first number of pixels corresponding to each first grayscale value; the accumulation submodule 321 is used to read the first number corresponding to each first grayscale value in order from small to large grayscale values; after each reading of the first number, the first number read this time is accumulated with the cumulative number obtained in the previous reading to obtain the cumulative number of this reading; the remapping submodule 323 is used to obtain the second grayscale value corresponding to the first grayscale value used in this reading according to the cumulative number obtained in this reading, the maximum grayscale value and the total number of pixels of the second image, and enhance the first grayscale value used in this reading to the corresponding second grayscale value. It can be understood that the enhanced Y channel data is obtained after all the first grayscale values are enhanced to the second grayscale value.
[0182] Among them, the statistical submodule 321 is specifically used to: obtain the real-time pixel number based on the first storage address according to the first grayscale value of the current pixel point in the second image under the Y channel data, and each first grayscale value has a corresponding storage address; add 1 to the real-time pixel number to obtain a new real-time pixel number; write the new real-time pixel number to the first storage address to update the real-time pixel number recorded in the first storage address; update the next pixel point in the second image to the current pixel point, and return to execute the operation of obtaining the real-time pixel number based on the first storage address according to the first grayscale value of the current pixel point in the second image under the Y channel data, until all the pixels in the second image are counted, and the real-time pixel number recorded at each storage address is used as the first number of the corresponding first grayscale value under the Y channel data.
[0183] Exemplary, reference Fig.11 The statistical submodule 321 is used to count each first quantity. Taking the bit width of the Y channel data as 8 as an example, Fig.11 In the embodiment, the statistics submodule 321 receives 8-bit Y channel data. The accumulation submodule 322 is used to determine the cumulative number corresponding to each first gray value. At this time, the accumulation submodule 322 can read the first number counted by the statistics submodule 321 and accumulate it. The remapping submodule 323 is used to determine the second gray value corresponding to the first gray value.
[0184] In one embodiment of the present application, reference Fig.11 The enhancement algorithm module further includes: a cache submodule 324, the cache submodule 324 is used to store the corresponding first quantity in the storage address corresponding to the first gray value.
[0185] Exemplary, reference Fig.11 The cache submodule 324 can be considered as a RAM for storing the first quantity. It is understandable that after the first quantity is read by the accumulation submodule 322, the first quantity in the corresponding storage address in the cache submodule 324 can be cleared.
[0186] In one embodiment, the remapping submodule 323 is used to obtain the second grayscale value corresponding to the first grayscale value used in the current reading based on the cumulative number obtained in the current reading, the maximum grayscale value and the total number of pixels of the second image, specifically including: using a multiplier to multiply the cumulative number obtained in the current reading and the maximum grayscale value; using a divider to divide the multiplication result of the multiplier by the total number of pixels of the second image, and the result of the division is the second grayscale value corresponding to the first grayscale value used in the current reading.
[0187] In one embodiment, the accumulation submodule 322 is used to read the first quantity corresponding to each first grayscale value in sequence according to the grayscale value from small to large, specifically including: when receiving the statistical completion signal, reading the first quantity corresponding to each first grayscale value in sequence according to the grayscale value from small to large, and the statistical completion signal is generated after the statistics of each first quantity are completed.
[0188] In one embodiment, the accumulation submodule 322 is also used to accumulate the first quantity read this time with the cumulative quantity obtained in the previous reading to obtain the cumulative quantity in this reading, and then clear the first quantity recorded in the corresponding storage address. Each first grayscale value has a corresponding storage address, and the storage address is used to store the first quantity corresponding to the first grayscale value.
[0189] In one embodiment, the statistical submodule 321 is used to add 1 to the number of real-time pixels to obtain a new number of real-time pixels. Specifically, it can be determined whether the first storage address and the second storage address are consistent, and the second storage address is the storage address corresponding to the new number of real-time pixels calculated last time; if the first storage address and the second storage address are inconsistent, then the number of real-time pixels recorded in the first storage address is added by 1 to obtain a new number of real-time pixels; if the first storage address and the second storage address are consistent, then the new number of real-time pixels calculated last time is added by 1 to obtain a new number of real-time pixels.
[0190] In one embodiment, Fig.12 A schematic diagram of the internal connection structure of an IP module provided for an embodiment of the present application, wherein the IP module further includes a U channel module and a V channel module. The difference between the U channel module and the V channel module and the enhanced algorithm module 32 is that the U channel module and the V channel module only receive the corresponding channel data and output the received channel data, and do not perform data processing. The enhanced algorithm module 32 is provided with a data input (sink_data) virtual interface, a data output (source_data) virtual interface, an input indication (sink_ready) virtual interface, an output indication (source_ready) virtual interface, an input valid (sink_vali) virtual interface, an output valid (source_vali) virtual interface, an input start (sink_sop) virtual interface, an output start (source_sop) virtual interface, an input end (sink_eop) virtual interface, and an output end (source_eop) virtual interface;
[0191] Among them, the data input virtual interface, the input indication virtual interface, the input valid virtual interface, the input start virtual interface and the input end virtual interface are all connected to the first format conversion module. The data input virtual interface is used to receive Y channel data, the input instruction virtual interface is used to receive an indication of receivable data sent by the first format conversion module, the input valid virtual interface is used to receive an indication that the Y channel data is valid sent by the first format conversion module; the input start virtual interface is used to receive an indication sent by the first format conversion module to start receiving Y channel data; the input end virtual interface is used to receive an indication sent by the first format conversion module to end receiving Y channel data. The data output virtual interface, the output indication virtual interface, the output valid virtual interface, the output start virtual interface and the output end virtual interface are all connected to the second format conversion module. The data output virtual interface is used to send the corresponding enhanced Y channel data to the second format conversion module. The output instruction virtual interface is used to send an indication of output data to the second format conversion module. The output valid virtual interface is used to send an indication that the enhanced Y channel data is valid to the second format conversion module; the output start virtual interface is used to send an indication to the second format conversion module to start outputting the enhanced Y channel data; and the output end virtual interface is used to send an indication to the second format conversion module to end outputting the enhanced Y channel data.
[0192] In addition, the enhanced algorithm module 32 is also provided with a clk virtual interface and a rst_n virtual interface. It can be explained that the meaning of the virtual interfaces connected to the enhanced algorithm module 32 by other modules corresponds to the meaning of the corresponding virtual interfaces in the enhanced algorithm module 32.
[0193] Fig.12 In the description, the data bit width of the second image is 24 as an example. At this time, the enhancement algorithm module 32 corresponding to the Y channel receives the data of 0-7 bits in the second image of the current frame, the U channel module 35 receives the data of 8-15 bits in the second image of the current frame, and the V channel module 36 receives the data of 16-23 bits in the second image of the current frame.
[0194] In one embodiment, the color video is data that meets the Avalon_ST interface specification. The first format conversion module 31 is also used to convert the first image that meets the Avalon_ST interface specification into Avalon_ST raw stream data after receiving the first image. At this time, the first format conversion module 31 includes an interface specification to raw stream submodule and an RGB to YUV submodule. The interface specification to raw stream submodule is used to receive the first image and convert the first image that meets the Avalon_ST interface specification into Avalon_ST raw stream data. The RGB to YUV submodule is used to convert the first image into a second image in YUV format, and split the second image into Y channel data, U channel data, and V channel data.
[0195] refer to Fig.11 The enhancement algorithm module 32 also includes: a synchronous FIFO cache submodule 325, which is used to enhance each first grayscale value corresponding to the Y channel data to a second grayscale value to obtain the enhanced Y channel data, and then cache the enhanced Y channel data in a synchronous FIFO manner; a data conversion submodule 326, which is used to read the cached enhanced Y channel data and convert it into Avalon_ST raw stream data.
[0196] The second format conversion module 33 is also used to convert the enhanced second image into a third image in RGB format, and then convert the third image into data that meets the Avalon_ST interface specification. At this time, the second format conversion module 33 can include a YUV to RGB submodule and a bare stream to interface specification submodule, wherein the YUV to RGB submodule is used to merge the enhanced Y channel data, U channel data and V channel data to obtain the enhanced second image, and convert the enhanced second image into a third image in RGB format, and the third image is used for display on the LED display. The bare stream to interface specification submodule is used to convert the third image into data that meets the Avalon_ST interface specification.
[0197] In one embodiment, the enhancement algorithm module 32 is further provided with an enhancement start (proc_cn) virtual interface, which is used as the proc_cn virtual interface used in the image enhancement device. Accordingly, the enhancement algorithm module 32 is used to receive an enhancement start signal, which is a signal for starting image enhancement.
[0198] In one embodiment, the image enhancement device further includes: an enhancement start determination module, which is used to determine the second number of pixels in the first image that meet the preset low gray value range before receiving the enhancement start signal; if the ratio of the second number to the total number of pixels in the first image reaches a preset ratio, it is determined that the first image needs to be enhanced, and the enhancement start signal is generated. It can be understood that the enhancement start determination module is independent of the IP module.
[0199] In one embodiment, the enhanced algorithm module 32 further includes: a memory arbitration submodule 327, which is used to schedule the first number of reads and writes in the cache submodule 324, that is, the first number of reads and writes are all scheduled by memory arbitration.
[0200] An image enhancement device provided in one embodiment of the present application is included in the FPGA of the LED display screen, and can be used to execute the image enhancement method provided in any of the above embodiments, and has corresponding functions and beneficial effects.
[0201] It is worth noting that in the embodiment of the above-mentioned image enhancement device, the various units and modules included are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be achieved; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention.
[0202] An embodiment of the present application also provides an image enhancement device, which is an LED display screen. The image enhancement device includes a receiving card and an LED light board. The structure of the receiving card can be referred to as Figure 1 The receiving card includes at least one processor. Currently, the processor installed in the receiving card is described as an FPGA. The at least one processor can execute any of the above-mentioned image enhancement methods.
[0203] In one embodiment, the image enhancement device further includes a memory, which is connected to the processor and is used to store data specified during the operation of the processor, for example, to store the first quantity.
[0204] The LED display screen can be used to execute the image enhancement method provided in any of the above embodiments, and has corresponding functions and beneficial effects.
[0205] One embodiment of the present application further provides a storage medium containing executable instructions, which, when executed by a processor (currently an FPGA in a receiving card), are used to perform the relevant operations in the image enhancement method provided in any embodiment of the present application, and have corresponding functions and beneficial effects. For example, Figure 1 The FLASH in the memory can be used as a storage medium to store a program corresponding to the currently executable image enhancement method, so that the FPGA can implement the aforementioned image enhancement method based on the program.
[0206] Those skilled in the art should understand that the embodiments of the present application may be provided as methods, systems, or computer program products.
[0207] Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the functions in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including an instruction device, which implements the functions specified in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0208] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.
[0209] Note that the above are only preferred embodiments of the present application and the technical principles used. Those skilled in the art will understand that the present application is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present application. Therefore, although the present application is described in more detail through the above embodiments, the present application is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present application, and the scope of the present application is determined by the scope of the appended claims.
Claims
1. An image enhancement method, applied to LED display screen, It is characterized in that include: Receive a first image, where the first image is a frame of image in RGB format in a color video; Converting the first image into a second image in a YUV format; Splitting the second image into Y channel data, U channel data and V channel data; When the first image needs to be enhanced, each first grayscale value under the Y channel data is enhanced to a corresponding second grayscale value to obtain enhanced Y channel data; Merging the enhanced Y channel data, the U channel data and the V channel data to obtain an enhanced second image; The enhanced second image is converted into a third image in RGB format, and the third image is used for display on the LED display screen.
2. The image enhancement method according to claim 1, It is characterized in that The step of enhancing each first grayscale value of the Y channel data to a corresponding second grayscale value to obtain enhanced Y channel data includes: Determine a first grayscale value of each pixel in the second image under the Y channel data; Counting a first number of pixel points corresponding to each of the first grayscale values; Reading the first quantity corresponding to each of the first grayscale values in order from small to large grayscale values; After each reading of the first quantity, the first quantity read this time is added to the cumulative quantity obtained in the previous reading to obtain the cumulative quantity in the current reading; Obtaining a second grayscale value corresponding to the first grayscale value used in the current reading according to the cumulative number obtained in the current reading, the maximum grayscale value, and the total number of pixels of the second image; The first grayscale value used in this reading is enhanced to a corresponding second grayscale value, and enhanced Y channel data is obtained after all first grayscale values are enhanced to the corresponding second grayscale values.
3. The image enhancement method according to claim 2, It is characterized in that The obtaining, according to the accumulated number obtained in the current reading, the maximum grayscale value and the total number of pixels of the second image, the second grayscale value corresponding to the first grayscale value used in the current reading comprises: Use a multiplier to multiply the accumulated number and the maximum grayscale value obtained this time; A divider is used to divide the multiplication result of the multiplier by the total number of pixels of the second image, and the result of the division is a second grayscale value corresponding to the first grayscale value used in this reading.
4. The image enhancement method according to claim 2, It is characterized in that After the first number read this time is added to the cumulative number obtained in the previous reading to obtain the cumulative number read this time, the method further includes: Clear the first quantity recorded in the corresponding storage address, each first grayscale value has a corresponding storage address, and the storage address is used to store the first quantity corresponding to the corresponding first grayscale value.
5. The image enhancement method according to claim 2, It is characterized in that The counting a first number of pixels corresponding to each of the first grayscale values includes: According to the first grayscale value of the current pixel point in the second image under the Y channel data, the real-time pixel quantity is obtained based on the corresponding first storage address, and each first grayscale value has a corresponding storage address; Add 1 to the real-time pixel number to obtain a new real-time pixel number; Writing the new real-time pixel quantity into the first storage address to update the real-time pixel quantity recorded in the first storage address; Update the next pixel in the second image as the current pixel, and return to execute the operation of obtaining the real-time pixel quantity based on the first storage address corresponding to the first grayscale value of the current pixel in the second image under the Y channel data, until all the pixels in the second image are counted, and use the real-time pixel quantity recorded at each storage address as the first quantity of the corresponding first grayscale value under the Y channel data.
6. The image enhancement method according to claim 5, It is characterized in that The step of adding 1 to the real-time pixel number to obtain a new real-time pixel number includes: Determine whether the first storage address and the second storage address are consistent, the second storage address being the storage address corresponding to the new real-time pixel quantity obtained by the previous calculation; If the first storage address and the second storage address are inconsistent, the number of real-time pixels recorded in the first storage address is increased by 1 to obtain a new number of real-time pixels; If the first storage address is consistent with the second storage address, the new real-time pixel number obtained by the previous calculation is increased by 1 to obtain a new real-time pixel number.
7. The image enhancement method according to claim 1, It is characterized in that The color video is data that meets the Avalon_ST interface specification; After receiving the first image, the method further includes: The first image that meets the Avalon_ST interface specification is converted into Avalon_ST raw stream data.
8. The image enhancement method according to claim 7, It is characterized in that After each first grayscale value of the Y channel data is enhanced to a corresponding second grayscale value to obtain enhanced Y channel data, the method further comprises: Use synchronous FIFO to cache enhanced Y channel data; Read the enhanced Y channel data in the cache and convert it into Avalon_ST raw stream data; After converting the enhanced second image into a third image in RGB format, the method further comprises: The third image is converted into data satisfying the AvalonST interface specification.
9. The image enhancement method according to claim 1, It is characterized in that Also includes: Determining a second number of pixels in the first image that satisfy a preset low gray value range; If the ratio of the second number to the total number of pixels of the first image reaches a preset ratio, it is determined that the first image needs to be enhanced.
10. An image enhancement device, applied to LED display screen, It is characterized in that include: A first format conversion module, an enhancement algorithm module, and a second format conversion module; The first format conversion module is used to receive a first image, convert the first image into a second image in a YUV format, and split the second image into Y channel data, U channel data, and V channel data, wherein the first image is a frame image in an RGB format in a color video; The enhancement algorithm module is used for enhancing each first grayscale value under the Y channel data to a corresponding second grayscale value to obtain enhanced Y channel data when the first image needs to be enhanced; The second format conversion module is used to merge the enhanced Y channel data, the U channel data and the V channel data to obtain an enhanced second image, and to convert the enhanced second image into a third image in RGB format, wherein the third image is used for display on the LED display screen.
11. The image enhancement device according to claim 10, It is characterized in that The enhancement algorithm module includes: a statistical submodule, an accumulation submodule and a remapping submodule. The statistical submodule is used to determine the first grayscale value of each pixel in the second image under the Y channel data, and to count the first number of pixels corresponding to each first grayscale value; The accumulation submodule is used to read the first quantity corresponding to each of the first grayscale values in order from small to large grayscale values; after each reading of the first quantity, the first quantity read this time is accumulated with the accumulated quantity obtained in the previous reading to obtain the accumulated quantity in the current reading; The remapping submodule is used to obtain the second grayscale value corresponding to the first grayscale value used in this reading according to the cumulative number obtained in this reading, the maximum grayscale value and the total number of pixels of the second image, and enhance the first grayscale value used in this reading to the corresponding second grayscale value.
12. The image enhancement device according to claim 10, It is characterized in that The enhanced algorithm module is provided with a data input virtual interface, a data output virtual interface, an input indication virtual interface, an output indication virtual interface, an input valid virtual interface, an output valid virtual interface, an input start virtual interface, an output start virtual interface, an input end virtual interface and an output end virtual interface; The data input virtual interface, the input instruction virtual interface, the input valid virtual interface, the input start virtual interface and the input end virtual interface are all connected to the first format conversion module, the data input virtual interface is used to receive Y channel data, the input instruction virtual interface is used to receive an indication of receivable data sent by the first format conversion module, the input valid virtual interface is used to receive an indication that the Y channel data sent by the first format conversion module is valid, the input start virtual interface is used to receive an indication of starting to receive Y channel data sent by the first format conversion module, and the input end virtual interface is used to receive an indication of ending to receive Y channel data sent by the first format conversion module; The data output virtual interface, the output indication virtual interface, the output valid virtual interface, the output start virtual interface and the output end virtual interface are all connected to the second format conversion module. The data output virtual interface is used to send the enhanced Y channel data to the second format conversion module, the output instruction virtual interface is used to send an indication of output data to the second format conversion module, the output valid virtual interface is used to send an indication that the enhanced Y channel data is valid to the second format conversion module, the output start virtual interface is used to send an indication to the second format conversion module to start outputting the enhanced Y channel data, and the output end virtual interface is used to send an indication to the second format conversion module to end outputting the enhanced Y channel data.
13. An LED display screen, It is characterized in that include: An LED light board and a receiving card, wherein at least one processor is installed on the receiving card, and when the at least one processor is running, the image enhancement method as described in any one of claims 1 to 9 is executed.
14. A readable and writable storage medium having a program stored thereon, It is characterized in that When the program is executed by a processor, the image enhancement method as described in any one of claims 1 to 9 is implemented.
