Power device driving circuit, control method and power device driving unit

Abstract

According to the power device driving circuit, the control method and the power device driving unit provided by the embodiment of the invention, the requirements of the power device driving circuit for low conduction loss and low switching loss can be considered, the switching quality of the power device driving circuit is improved, and the practicability of the power device driving circuit can be further improved. The power device driving circuit comprises a first half-bridge circuit which comprises two first switching circuits which are connected in series, and each first switching circuit comprises a first transistor; the second half-bridge circuit comprises two second switch circuits which are connected in series, each second switch circuit comprises a second transistor, the first half-bridge circuit and the second half-bridge circuit are connected to the same direct-current bus, and the parasitic capacitance of the second transistor is smaller than that of the first transistor; and one end of the first inductor is connected between the two first transistors of the first half-bridge circuit, and the other end of the first inductor is connected between the two second transistors of the second half-bridge circuit.

Description

Technical Field

[0001] The present application relates to the technical field of power semiconductor devices, and in particular to a power device driving circuit, a control method and a power device driving unit. Background Art

[0002] Power semiconductor devices are semiconductor devices that can process power and have the ability to handle high voltage and high current. With the widespread application of power semiconductor devices, the requirements for the conduction performance of power semiconductor devices, such as switching speed and switching loss, are gradually increasing.

[0003] Due to the minority carrier modulation effect, silicon-based semiconductor devices, especially IGBT devices (Insulate-Gate Bipolar Transistor), can conduct higher currents with lower conduction losses, but the switching losses of silicon-based semiconductor devices are higher. Therefore, in the power device drive circuit formed by silicon-based semiconductor devices, it is difficult to meet the requirements of low conduction loss and low switching loss, which will affect the switching quality of the power device drive circuit and further affect the practicality of the power device drive circuit. Summary of the invention

[0004] A power device driving circuit, a control method and a power device driving unit provided in the embodiments of the present application can take into account the requirements of the power device driving circuit for low conduction loss and low switching loss, improve the switching quality of the power device driving circuit, and further improve the practicality of the power device driving circuit.

[0005] According to a first aspect of an embodiment of the present application, a power device driving circuit is provided, comprising:

[0006] A first half-bridge circuit, comprising two first switch circuits connected in series, wherein the first switch circuit comprises a first transistor;

[0007] A second half-bridge circuit, comprising two second switch circuits connected in series, the second switch circuit does not include a second transistor, the first half-bridge circuit and the second half-bridge circuit are connected to the same DC bus, wherein a parasitic capacitance of the second transistor is smaller than a parasitic capacitance of the first transistor;

[0008] A first inductor, wherein one end of the first inductor is connected between the two first transistors of the first half-bridge circuit, and the other end of the first inductor is connected between the two second transistors of the second half-bridge circuit.

[0009] In some embodiments, the first transistor comprises a silicon transistor; and / or,

[0010] The second transistor includes a wide bandgap semiconductor transistor.

[0011] In some embodiments, the first switch circuit further includes a first unidirectional conduction unit, the first unidirectional conduction unit is connected in parallel with the first transistor, and a conduction direction of the first unidirectional conduction unit is opposite to a conduction direction of the first transistor;

[0012] The second switch circuit further includes a second unidirectional conducting unit, which is connected in parallel to the second transistor, and a conducting direction of the second unidirectional conducting unit is opposite to a conducting direction of the second transistor.

[0013] In some implementations, the power device driving circuit further includes:

[0014] A second inductor, one end of the second inductor is connected between the two first transistors of the first half-bridge circuit.

[0015] A second aspect of an embodiment of the present application provides a control method for a power device driving circuit, for controlling the power device driving circuit as described in any one of the first aspects above, the control method comprising:

[0016] Acquire a turn-on signal of a target transistor, and detect a first drain-source voltage of the target transistor, wherein the turn-on signal is used to control the turn-on of the target transistor, and the target transistor is a first transistor;

[0017] When the first drain-source voltage is greater than a preset reference voltage, controlling a second transistor on the same side as the target transistor to be turned on;

[0018] The second drain-source voltage of the target transistor is dynamically detected until the second drain-source voltage is less than or equal to the preset reference voltage, and the target transistor is controlled to be turned on.

[0019] In some implementations, the control method of the power device driving circuit further includes:

[0020] When the first drain-source voltage is equal to the preset reference voltage, the target transistor is controlled to be turned on, and the second transistor on the same side as the target transistor is controlled to be turned off.

[0021] In some implementations, the control method of the power device driving circuit further includes:

[0022] Within a preset time after the target transistor is turned on, a second transistor on the same side as the target transistor is controlled to be turned off.

[0023] According to a third aspect of the embodiments of the present application, a power device driving unit is provided, which is used to implement the control method of the power device driving circuit according to any one of the second aspects above, and the power device driving unit includes:

[0024] A clamping unit, wherein an input end of the clamping unit is electrically connected to a source and a drain of a first transistor of the power device driving circuit, and the clamping unit is used to obtain a drain-source voltage of the first transistor;

[0025] A control unit, wherein a clamp signal input terminal of the control unit is electrically connected to an output terminal of the clamp unit, a conduction signal input terminal of the control unit is used to obtain a conduction signal of the first transistor, an output terminal of the control unit is electrically connected to a gate of the first transistor and a gate of the second transistor of the power device driving circuit, and the control unit is used to control the on and off of the first transistor and the second transistor according to a magnitude relationship between a drain-source voltage of the first transistor and a preset reference voltage and the conduction signal.

[0026] In some embodiments, the control unit includes a comparison circuit, a first AND gate circuit, and a second AND gate circuit;

[0027] Wherein, the comparison circuit includes a first input terminal, a second input terminal, a positive phase output terminal and a negative phase output terminal, the first input terminal is electrically connected to the output terminal of the clamp unit, the second input terminal is used to access the preset reference voltage, the comparison circuit is used to generate a first control signal and a second control signal according to the magnitude relationship between the drain-source voltage of the first transistor and the preset reference voltage, the negative phase output terminal is electrically connected to the first input terminal of the first AND gate circuit to output the first control signal, the positive phase output terminal is electrically connected to the first input terminal of the second AND gate circuit to output the second control signal, and the first control signal and the second control signal are mutually negative phase level signals;

[0028] The second input terminal of the first AND gate circuit is electrically connected to the conduction signal input terminal of the control unit, the output terminal of the first AND gate circuit is electrically connected to the gate of the first transistor, and the first AND gate circuit is used to generate a first gate drive signal according to the first control signal and the conduction signal to drive the first transistor to be turned on or off;

[0029] The second input terminal of the second AND gate circuit is electrically connected to the conduction signal input terminal of the control unit, the output terminal of the second AND gate circuit is electrically connected to the gate of the second transistor, and the second AND gate circuit is used to generate a second gate drive signal according to the second control signal and the conduction signal to drive the second transistor to be turned on or off.

[0030] In some embodiments, the control unit also includes a delay circuit, which is used to control the transistor connected in parallel with the target transistor to turn off within a preset time after the target transistor is turned on, and the delay circuit is electrically connected between the positive phase output port and the first input terminal of the second AND gate circuit. The delay circuit includes a resistor and a capacitor, one end of the capacitor is used for grounding, and the other end of the capacitor is connected between the resistor and the first input terminal of the second AND gate circuit, one end of the resistor is electrically connected to the positive phase output port, and the other end of the resistor is electrically connected to the capacitor.

[0031] The embodiments of the present application provide a power device driving circuit, a control method and a power device driving unit. A first transistor with a larger parasitic capacitance forms a first half-bridge circuit, a second transistor with a smaller parasitic capacitance forms a second half-bridge circuit, and the first half-bridge circuit and the second half-bridge circuit are connected through a first inductor. The conduction of the first transistor can be assisted by the second transistor, so that the first transistor with a larger parasitic capacitance can achieve zero-voltage conduction, thereby reducing the switching loss of the first transistor. At the same time, the conduction performance of the first transistor can be retained, thereby taking into account the requirements of the power device driving circuit for low conduction loss and low switching loss, improving the switching quality of the power device driving circuit, and improving the practicality of the power device driving circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0033] Figure 1 A schematic diagram of a power device driving circuit provided in an embodiment of the present application;

[0034] Figure 2 A schematic flow chart of a control method for a power device driving circuit provided in an embodiment of the present application;

[0035] Figure 3 A schematic timing diagram of a control method for a power device driving circuit provided in an embodiment of the present application;

[0036] Figure 4 A schematic diagram of a curve of target transistor conduction efficiency and input power of a control method for a power device driving circuit provided in an embodiment of the present application;

[0037] Figure 5A schematic structural diagram of a power device driving unit provided in an embodiment of the present application;

[0038] Figure 6 A schematic circuit diagram of a control unit of a power device driving unit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0041] When used herein, the singular forms "a", "an" and " / the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the relevant listed items.

[0042] It should be noted that the current power device certification experiments are all concentrated on environmental tests and single electrical stress experimental conditions. The relevant tests can only test the reliability of power devices under a single stress, and a test usually only corresponds to one stress. Therefore, when performing other types of electrical stress tests, the test equipment needs to be replaced, which increases the difficulty of the test, the test steps are cumbersome, and the test efficiency is low. Therefore, it is very important to invent a power device test circuit that can be used for multiple types of power device tests.

[0043] It should be noted that due to the minority carrier modulation effect, silicon-based semiconductor devices, especially IGBT devices, can conduct higher currents with lower conduction losses. However, on the other hand, silicon-based semiconductor devices have poor performance in terms of switching speed and switching loss. Wide bandgap power semiconductor devices represented by silicon carbide devices and gallium nitride devices are superior to silicon-based semiconductor devices in terms of low switching losses and high switching speeds.

[0044] Therefore, proposing a power device driving circuit with high-quality switching performance and conduction performance is an urgent problem to be solved.

[0045] like Figure 1 As shown, in the first aspect of the embodiment of the present application, a power device driving circuit is provided, including: a first terminal V1, a second terminal V2, a first half-bridge circuit, a second half-bridge circuit and a first inductor L, wherein the first half-bridge circuit includes two first switch circuits connected in series, the first switch circuit includes a first transistor; the second half-bridge circuit includes two second switch circuits connected in series, the second switch circuit includes a second transistor, the first half-bridge circuit and the second half-bridge circuit are connected to the same DC bus, wherein the parasitic capacitance of the second transistor is less than the parasitic capacitance of the first transistor; one end of the first inductor L is connected between the two first transistors of the first half-bridge circuit, and the other end of the first inductor Lr is connected between the two second transistors of the second half-bridge circuit. The first transistor includes a first transistor Sm1 located in the upper half bridge and a first transistor Sm2 located in the lower half bridge, and the second transistor includes a second transistor Sa2 located in the upper half bridge and a second transistor Sa1 located in the lower half bridge.

[0046] It should be noted that the first transistor with higher parasitic capacitance has a larger resistance during the switching process, which will cause the first transistor to generate a larger loss during the switching process. Similarly, the second transistor with lower parasitic capacitance generates a smaller loss during the switching process. The switching loss of the first transistor can be reduced by assisting the first transistor to turn on with the second transistor. For the first transistor, since the first transistor has a larger output parasitic capacitance and a tail current generated during the shutdown process, the switch of the first transistor usually has a higher switching loss. The larger parasitic capacitance causes more charge to flow through the transistor during hard conduction, which greatly increases the conduction loss. However, in the case of zero voltage conduction of the first transistor, the larger parasitic capacitance will not generate higher through loss, but can reduce the voltage rise rate during the shutdown process and reduce the shutdown loss. Therefore, when the switching loss of the first transistor is large, the shutdown loss can be reduced by connecting a parallel capacitor.

[0047] Exemplarily, the first transistor and the second transistor may include the same material, and the parasitic capacitance of the first transistor may be greater than the parasitic capacitance of the second transistor by using the first transistor and the second transistor of different shapes, for example, different areas, etc. The first transistor and the second transistor may also include different materials, and the first transistor and the second transistor may be formed using materials with different parasitic capacitances, so that the parasitic capacitance of the first transistor is greater than the parasitic capacitance of the second transistor.

[0048] It should be noted that the inductance value of the first inductor Lr will directly affect the working time and loss of the second transistor. For the low operating frequency of the IGBT, the slower rise time of Ir caused by the larger inductance value obviously has little effect on the main working state of the circuit. On the contrary, the lower current change rate is conducive to the zero current conduction of the second transistor. When the second transistor Sa1 located in the lower half bridge is turned off and the Ir flowing through the second transistor Sa2 located in the upper half bridge drops to zero, it is necessary to generate an inverted Ir to charge the capacitor to complete the voltage balance between the two switch nodes. When the first transistor Sm2 located in the lower half bridge is turned off, additional Ir needs to be generated to charge Crau. And the residual current can keep flowing in the circuit and cause conduction losses.

[0049] The power device driving circuit provided in the embodiment of the present application forms a first half-bridge circuit with a first transistor having a larger parasitic capacitance, forms a second half-bridge circuit with a second transistor having a smaller parasitic capacitance, and connects the first half-bridge circuit and the second half-bridge circuit through a first inductor Lr. The conduction of the first transistor can be assisted by the second transistor, so that the first transistor having a larger parasitic capacitance can achieve zero-voltage conduction, thereby reducing the switching loss of the first transistor and retaining the conduction performance of the first transistor. This can take into account the requirements of the power device driving circuit for low conduction loss and low switching loss, improve the switching quality of the power device driving circuit, and improve the practicality of the power device driving circuit.

[0050] In some feasible implementations, the first transistor includes a silicon transistor; and the second transistor includes a wide bandgap semiconductor transistor.

[0051] Exemplarily, wide bandgap semiconductor transistors include silicon carbide transistors and gallium nitride transistors, etc.

[0052] In some feasible embodiments, the first switching circuit also includes a first unidirectional conduction unit, which is connected in parallel with the first transistor, and the conduction direction of the first unidirectional conduction unit is opposite to the conduction direction of the first transistor; the second switching circuit also includes a second unidirectional conduction unit, which is connected in parallel with the second transistor, and the conduction direction of the second unidirectional conduction unit is opposite to the conduction direction of the second transistor.

[0053] Exemplarily, the first one-way conducting unit and the second one-way conducting unit may include diodes.

[0054] The power device driving circuit provided in the embodiment of the present application can protect other components in the power device driving circuit when the load current on the first inductor Lr changes by setting a first unidirectional conduction unit and a second unidirectional conduction unit, thereby preventing the components from being broken down or burned by the induced voltage, thereby further improving the safety and reliability of the power device driving circuit.

[0055] In some feasible implementations, the power device driving circuit further includes: a second inductor L F , where the second inductor L F One end of is connected between the two first transistors of the first half-bridge circuit.

[0056] For example, the second inductor L F is the boost inductor.

[0057] It should be noted that in the existing power device driving circuit, when the boost converter operates in the continuous conduction mode, the first transistor Sm2 located in the lower half bridge is the main switch that causes the turn-on and turn-off losses. In the power device driving circuit provided in the embodiment of the present application, before the first transistor Sm2 located in the lower half bridge is turned on, the second transistor Sa1 located in the lower half bridge is turned on first as an auxiliary switch, so that the load current on the first transistor Sm1 located in the upper half bridge can be slowly commutated to flow to the second transistor Sa1 located in the lower half bridge, thereby achieving zero current turn-off of the first transistor Sm1 of the upper half bridge and zero current turn-on of the second transistor Sa1 located in the lower half bridge.

[0058] The current Ir on the first inductor Lr is greater than the current Ir on the second inductor L F The load current I F In the case of , the parasitic output capacitance of the first transistor Sm2 located in the lower half bridge resonates with the first inductor Lr, which can reduce the first transistor Sm2 located in the lower half bridge to zero, thereby facilitating the zero voltage conduction of the first transistor Sm2 located in the lower half bridge. The current Ir on the first inductor Lr is increased to be equal to the current Ir on the second inductor Lr. F The load current I F The sum of the resonant current Imax generated by the output parasitic capacitance of the first transistor Sm2 located in the lower half bridge can be obtained by:

[0059] (1)

[0060] Determine the sum of the above resonant currents Imax. It can be seen that the larger inductance of the first inductor Lr can effectively reduce the peak value of the resonant current and reduce the additional loss caused by the resonant current. Therefore, the factors that restrict the inductance value of the first inductor Lr include inductor loss, inductor saturation current and integration required volume. The current rise time of the first inductor Lr is divided into two parts, namely, the connection of the second inductor L F The load current I F The linear rise time T1 and one quarter resonant period can be obtained by:

[0061] (2)

[0062] The linear rise time T1 can be determined by:

[0063] (3)

[0064] A quarter of the resonant period T2 is determined. Therefore, the inductance value of the first inductor Lr can be accurately designed according to actual needs to reduce loss and device size and improve the integration effect of the device.

[0065] Therefore, the power device driving circuit provided in the embodiment of the present application can realize the zero voltage conduction of the first transistor Sm2 located in the lower half bridge, and the zero current conduction of the second transistor Sa1 located in the lower half bridge. Similarly, the power device driving circuit provided in the embodiment of the present application can also realize the zero voltage conduction of the first transistor Sm1 located in the upper half bridge, and the zero current conduction of the second transistor Sa2 located in the upper half bridge.

[0066] like Figure 2 As shown, in a second aspect of an embodiment of the present application, a control method for a power device driving circuit is provided, which is used to control the power device driving circuit as described in any one of the first aspects above, and the control method includes:

[0067] Step S110, obtaining a turn-on signal of a target transistor, and detecting a first drain-source voltage of the target transistor, wherein the turn-on signal is used to control the turn-on of the target transistor, and the target transistor is a first transistor.

[0068] Combination Figure 1 The target transistor and the second transistor on the same side as the target transistor are both located in the upper half bridge or the lower half bridge of the power device driving circuit. Taking the target transistor as the first transistor Sm2 located in the lower half bridge as an example, the second transistor on the same side as the target transistor is the second transistor Sa1 located in the lower half bridge.

[0069] Step S120 : When the first drain-source voltage is greater than a preset reference voltage, control the second transistor on the same side as the target transistor to be turned on.

[0070] As shown in FIG1 , it can be understood that the first half-bridge circuit and the second half-bridge circuit are connected to the same DC bus, therefore, the first transistor and the second transistor must not be located on the same side of the DC bus in the transmission direction, so it can be clearly stated that the second transistor on the same side as the target transistor refers to the second transistor located together with the target transistor in the upper half bridge or the lower half bridge, and the target transistor and the corresponding second transistor are located on the same side of the DC bus in the direction pointing to the ground line.

[0071] Exemplarily, the preset reference voltage may be 0. The smaller the preset reference voltage is, the lower the conduction loss of the target transistor is.

[0072] Step S130, dynamically detecting the second drain-source voltage of the target transistor until the second drain-source voltage is less than or equal to a preset reference voltage, and controlling the target transistor to be turned on.

[0073] Exemplarily, the second drain-source voltage of the target transistor may be dynamically detected, and the target transistor may be controlled to be turned on at the moment when the second drain-source voltage of the target transistor is less than or equal to a preset reference voltage.

[0074] like Figure 3 As shown, t1 is the acquisition time of the first drain-source voltage of the target transistor, and t2 is the turn-on time of the target transistor. It can be understood that the first drain-source voltage of the target transistor is obtained at time t1, and the first drain-source voltage of the target transistor at this time is higher than the preset reference voltage, so the target transistor is not turned on at this time, and only the second transistor on the same side as the target transistor is turned on. The second drain-source voltage of the target transistor is continuously monitored, and at time t2, the second drain-source voltage is monitored to be equal to the preset reference voltage, and the target transistor is controlled to be turned on at this time.

[0075] like Figure 4 A1 is a curve obtained by driving the target transistor in the power device driving circuit provided in the embodiment of the present application by the control method of the power device driving circuit provided in the embodiment of the present application, and A2 is a curve obtained by driving the target transistor in the existing power device driving circuit. It can be seen that the conduction efficiency of the target transistor driven by the power device driving circuit provided in the embodiment of the present application and the control method of the power device driving circuit provided in the embodiment of the present application is significantly higher than the existing driving circuit and driving method. Therefore, the power device driving circuit provided in the embodiment of the present application and the control method of the power device driving circuit provided in the embodiment of the present application can effectively reduce the switching loss generated in the driving process of the target transistor and improve the driving effect of the target transistor.

[0076] The control method of the power device driving circuit provided in the embodiment of the present application can determine the current switching mode of the target transistor by detecting the first drain-source voltage of the target transistor when receiving the turn-on signal of the target transistor. When the first drain-source voltage is greater than the preset reference voltage, it can be determined that the target transistor is currently in the hard switching mode. At this time, turning on the target transistor will increase the conduction loss of the target transistor. Therefore, by controlling the second transistor on the same side as the target transistor to turn on, the current Ir on the first inductor Lr can be made greater than the load current I F, so that the output parasitic capacitance of the target transistor resonates with the first inductor Lr, thereby reducing the voltage of the target transistor. When the voltage of the target transistor drops to the preset reference voltage, the target transistor is controlled to be turned on, which can reduce the conduction loss of the target transistor, while retaining the conduction performance of the first transistor, thereby taking into account the requirements of the power device driving circuit for low conduction loss and low switching loss, improving the switching quality of the power device driving circuit, and improving the practicality of the power device driving circuit.

[0077] In some feasible implementations, the control method of the power device driving circuit further includes: when the first drain-source voltage is equal to a preset reference voltage, controlling the target transistor to be turned on, and controlling the second transistor on the same side as the target transistor to be turned off.

[0078] It should be noted that when the first drain-source voltage is equal to the preset reference voltage, it can be determined that the current target transistor is already in a soft switching state with zero voltage. Therefore, there is no need to turn on the second transistor on the same side as the target transistor, thereby improving the driving efficiency of the power device driving circuit and further enhancing the practicality of the power device driving circuit.

[0079] In some feasible implementations, the control method of the power device driving circuit further includes: controlling a second transistor on the same side as the target transistor to be turned off within a preset time after the target transistor is turned on.

[0080] It should be noted that, while the target transistor is turned on, the second transistor on the same side as the target transistor can be controlled to be turned off.

[0081] The control method of the power device driving circuit provided in the embodiment of the present application can avoid the second transistor from affecting the subsequent conduction of the power device driving circuit by controlling the second transistor on the same side as the target transistor to turn off, thereby further improving the reliability and stability of the power device driving circuit.

[0082] like Figure 5As shown, in a third aspect of an embodiment of the present application, a power device driving unit is provided, which is used to implement a control method for a power device driving circuit as described in any one of the second aspects above, and the power device driving unit includes: a clamping unit 100 and a control unit 200, wherein an input end of the clamping unit 100 is electrically connected to a source and a drain of a first transistor of the power device driving circuit, and the clamping unit 100 is used to obtain a drain-source voltage of the first transistor; a clamping signal input end of the control unit 200 is electrically connected to an output end of the clamping unit 100, a turn-on signal input end of the control unit 200 is used to obtain a turn-on signal of the first transistor, and an output end of the control unit 200 is electrically connected to a gate of the first transistor and a gate of a second transistor of the power device driving circuit, and the control unit 200 is used to control the on and off of the first transistor and the second transistor according to a magnitude relationship between the drain-source voltage of the first transistor and a preset reference voltage and a turn-on signal.

[0083] The clamping unit (H) and the clamping unit (L) both belong to the clamping unit 100, the control unit (H) and the control unit (L) both belong to the control unit 200, and the first transistor and the second transistor are divided into the first transistor (H), the first transistor (L), the second transistor (H) and the second transistor (L) according to the conduction logic. Figure 5 The devices in the circuit are divided into two groups, namely, high-level conduction and low-level conduction. The conduction logics of the two groups of devices are consistent with the conduction logic of the power device driving unit.

[0084] The power device driving unit provided in the embodiment of the present application can obtain the drain-source voltage of the target transistor through the clamping unit 100, and then the magnitude relationship between the drain-source voltage of the first transistor and the preset reference voltage can be compared through the control unit 200, so as to realize the control method of the power device driving circuit as described in the second aspect above. When the voltage of the first transistor drops to the preset reference voltage, the first transistor is controlled to be turned on, which can reduce the conduction loss of the first transistor, and at the same time, the conduction performance of the first transistor can be retained, so as to take into account the requirements of the power device driving circuit for low conduction loss and low switching loss, improve the switching quality of the power device driving circuit, and improve the practicality of the power device driving circuit.

[0085] like Figure 6As shown, in some feasible implementations, the control unit 200 includes a comparison circuit, a first AND gate circuit and a second AND gate circuit; wherein the comparison circuit includes a first input terminal, a second input terminal, a positive phase output terminal and an inverting output terminal, the first input terminal is electrically connected to the output terminal of the clamp unit 100, the second input terminal is used to access a preset reference voltage, the comparison circuit is used to generate a first control signal and a second control signal according to a magnitude relationship between a drain-source voltage of the first transistor and the preset reference voltage, the inverting output terminal is electrically connected to the first input terminal of the first AND gate circuit to output the first control signal, the positive phase output terminal is electrically connected to the first input terminal of the second AND gate circuit to output the second control signal, the first The control signal and the second control signal are inverted level signals to each other; the second input terminal of the first AND gate circuit is electrically connected to the on-signal input terminal of the control unit 200, and the output terminal of the first AND gate circuit is electrically connected to the gate of the first transistor. The first AND gate circuit is used to generate a first gate drive signal according to the first control signal and the on-signal to drive the first transistor to be turned on or off; the second input terminal of the second AND gate circuit is electrically connected to the on-signal input terminal of the control unit 200, and the output terminal of the second AND gate circuit is electrically connected to the gate of the second transistor. The second AND gate circuit is used to generate a second gate drive signal according to the second control signal and the on-signal to drive the second transistor to be turned on or off.

[0086] It should be noted that, taking the gates of the first transistor and the second transistor being turned on under a high-level signal as an example, when the drain-source voltage of the first transistor is greater than the preset reference voltage, the positive-phase output terminal of the comparison circuit outputs a second control signal in the same direction as the turn-on signal, so that the second control signal and the turn-on signal together output a high-level signal through the second NOT gate circuit, and the second transistor is controlled to be turned on. At this time, the negative-phase output terminal of the comparison circuit and the first control signal inversely related to the turn-on signal, so that the first control signal and the turn-on signal together output a low-level signal through the first NOT gate circuit, and the first transistor is controlled to be turned off.

[0087] When the drain-source voltage of the first transistor is equal to the preset reference voltage, the positive phase output terminal of the comparison circuit outputs the second control signal which is inverse to the conduction signal, so that the second control signal and the conduction signal together output a low level signal through the second NOT gate circuit, and the second transistor is controlled to be turned off. At this time, the negative phase output terminal of the comparison circuit is the first control signal in the same direction as the conduction signal, so that the first control signal and the conduction signal together output a high level signal through the first NOT gate circuit, and the first transistor is controlled to be turned on.

[0088] The power device driving unit provided in the embodiment of the present application can compare the size relationship between the drain-source voltage of the first transistor and the preset reference voltage through a comparison circuit, determine whether the drain-source voltage of the first transistor meets the soft switching condition, and control the automatic turning on and off of the first transistor and the second transistor through the first AND gate circuit and the second AND gate circuit, so that the second transistor can assist the first transistor in achieving zero-voltage turn-on, reduce the conduction loss of the first transistor, and retain the conduction performance of the first transistor, thereby taking into account the requirements of the power device driving circuit for low conduction loss and low switching loss, improve the switching quality of the power device driving circuit, and improve the practicality of the power device driving circuit.

[0089] like Figure 6 As shown, in some feasible embodiments, the control unit 200 also includes a delay circuit, which is used to control the transistor connected in parallel with the target transistor to be turned off within a preset time after the target transistor is turned on. The delay circuit is electrically connected between the positive phase output port and the first input terminal of the second AND gate circuit. The delay circuit includes a resistor R and a capacitor C, one end of the capacitor C is used for grounding, and the other end of the capacitor C is connected between the resistor R and the first input terminal of the second AND gate circuit. One end of the resistor R is electrically connected to the positive phase output port, and the other end of the resistor R is electrically connected to the capacitor C.

[0090] It should be noted that, when a delay circuit is not set, the turn-on of the target transistor and the turn-off of the second parallel transistor will occur simultaneously. In actual applications, since the turn-on and turn-off of the target transistor and the second transistor both require time, the timing of the turn-on of the target transistor and the turn-off of the second parallel transistor may be disrupted, thereby causing the voltage of the target transistor to rise, the second parallel transistor to turn on again, the voltage of the target transistor to drop, the target transistor to turn on, and the second parallel transistor to turn off. The inharmonious mode may also occur in a cycle, destroying the stable operation of the power device drive circuit.

[0091] The power device driving unit provided in the embodiment of the present application can ensure that the target transistor is turned on after the second parallel transistor is turned off by setting a delay circuit between the positive phase output port and the first input terminal of the second AND gate circuit, which can include timing stability. At the same time, the state in which the target transistor voltage recovers corresponds to the state in which the target transistor is turned off. There is no on-state signal, so there is no impact on the output, which can further improve the stability and reliability of the power device driving circuit.

[0092] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0093] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0094] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A power device driving circuit, characterized in that: include: A first half-bridge circuit, comprising two first switch circuits connected in series, wherein the first switch circuit comprises a first transistor; A second half-bridge circuit, comprising two second switch circuits connected in series, wherein the second switch circuit comprises a second transistor, the first half-bridge circuit and the second half-bridge circuit are connected to the same DC bus, wherein a parasitic capacitance of the second transistor is smaller than a parasitic capacitance of the first transistor; A first inductor, wherein one end of the first inductor is connected between the two first transistors of the first half-bridge circuit, and the other end of the first inductor is connected between the two second transistors of the second half-bridge circuit.

2. The power device driving circuit according to claim 1, characterized in that: The first transistor comprises a silicon transistor; and / or, The second transistor includes a wide bandgap semiconductor transistor.

3. The power device driving circuit according to claim 1, characterized in that: The first switch circuit further includes a first unidirectional conduction unit, the first unidirectional conduction unit is connected in parallel with the first transistor, and a conduction direction of the first unidirectional conduction unit is opposite to a conduction direction of the first transistor; The second switch circuit further includes a second unidirectional conducting unit, which is connected in parallel to the second transistor, and a conducting direction of the second unidirectional conducting unit is opposite to a conducting direction of the second transistor.

4. The power device driving circuit according to claim 1, characterized in that: Also includes: A second inductor, one end of the second inductor is connected between the two first transistors of the first half-bridge circuit.

5. A control method for a power device driving circuit, characterized in that: Used to control the power device driving circuit according to any one of claims 1 to 4, the control method comprising: Acquire a turn-on signal of a target transistor, and detect a first drain-source voltage of the target transistor, wherein the turn-on signal is used to control the turn-on of the target transistor, and the target transistor is a first transistor; When the first drain-source voltage is greater than a preset reference voltage, controlling a second transistor on the same side as the target transistor to be turned on; The second drain-source voltage of the target transistor is dynamically detected until the second drain-source voltage is less than or equal to the preset reference voltage, and the target transistor is controlled to be turned on.

6. The control method of the power device driving circuit according to claim 5, characterized in that: Also includes: When the first drain-source voltage is equal to the preset reference voltage, the target transistor is controlled to be turned on, and the second transistor on the same side as the target transistor is controlled to be turned off.

7. The control method of the power device driving circuit according to claim 5, characterized in that: Also includes: Within a preset time after the target transistor is turned on, a second transistor on the same side as the target transistor is controlled to be turned off.

8. A power device driving unit, characterized in that: For implementing the control method of the power device driving circuit according to any one of claims 5 to 7, the power device driving unit comprises: A clamping unit, wherein an input end of the clamping unit is electrically connected to a source and a drain of a first transistor of the power device driving circuit, and the clamping unit is used to obtain a drain-source voltage of the first transistor; A control unit, wherein a clamp signal input terminal of the control unit is electrically connected to an output terminal of the clamp unit, a conduction signal input terminal of the control unit is used to obtain a conduction signal of the first transistor, an output terminal of the control unit is electrically connected to a gate of the first transistor and a gate of the second transistor of the power device driving circuit, and the control unit is used to control the on and off of the first transistor and the second transistor according to a magnitude relationship between a drain-source voltage of the first transistor and a preset reference voltage and the conduction signal.

9. The power device driving unit according to claim 8, characterized in that: The control unit includes a comparison circuit, a first AND gate circuit and a second AND gate circuit; Wherein, the comparison circuit includes a first input terminal, a second input terminal, a positive phase output terminal and a negative phase output terminal, the first input terminal is electrically connected to the output terminal of the clamp unit, the second input terminal is used to access the preset reference voltage, the comparison circuit is used to generate a first control signal and a second control signal according to the magnitude relationship between the drain-source voltage of the first transistor and the preset reference voltage, the negative phase output terminal is electrically connected to the first input terminal of the first AND gate circuit to output the first control signal, the positive phase output terminal is electrically connected to the first input terminal of the second AND gate circuit to output the second control signal, and the first control signal and the second control signal are mutually negative phase level signals; The second input terminal of the first AND gate circuit is electrically connected to the conduction signal input terminal of the control unit, the output terminal of the first AND gate circuit is electrically connected to the gate of the first transistor, and the first AND gate circuit is used to generate a first gate drive signal according to the first control signal and the conduction signal to drive the first transistor to be turned on or off; The second input terminal of the second AND gate circuit is electrically connected to the conduction signal input terminal of the control unit, the output terminal of the second AND gate circuit is electrically connected to the gate of the second transistor, and the second AND gate circuit is used to generate a second gate drive signal according to the second control signal and the conduction signal to drive the second transistor to be turned on or off.

10. The power device driving unit according to claim 9, characterized in that: The control unit also includes a delay circuit, which is used to control the transistor connected in parallel with the target transistor to turn off within a preset time after the target transistor is turned on. The delay circuit is electrically connected between the positive phase output port and the first input terminal of the second AND gate circuit. The delay circuit includes a resistor and a capacitor, one end of the capacitor is used for grounding, and the other end of the capacitor is connected between the resistor and the first input terminal of the second AND gate circuit. One end of the resistor is electrically connected to the positive phase output port, and the other end of the resistor is electrically connected to the capacitor.

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