Control method and device based on common reference source interference, equipment and medium
A control method for SAR ADCs using a common reference source determines a synchronous or asynchronous strategy to avoid interference, ensuring accurate and efficient conversion by controlling enable signals, thus preventing charging conflicts among multiple ADC modules.
Patent Information
- Application Number
- CN202411206727.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-30
- Publication Date
- 2024-12-10
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
Interference occurs during the charging process of multiple SAR ADCs using a common reference source, which affects the conversion process.
A control method is implemented to determine a synchronous and asynchronous control strategy based on the reference source driving capability information and configuration rules, allowing simultaneous or gradual enable signal sending to control multiple ADC modules, thereby avoiding interference.
The method effectively prevents interference among multiple ADC modules during capacitor charging, ensuring accurate and efficient conversion processes.
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Figure CN119109458A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of chip technology, and in particular to a control method, device, equipment and medium based on common reference source interference. Background Art
[0002] The working principle of SAR ADC (successive approximation ADC) is that during the conversion process of the sampling result, the conversion capacitor is charged by the reference source after a fixed time after the rising edge of the clock, and the sampling source is converted after the charging is completed. When multiple SAR ADCs charge the conversion capacitors simultaneously by the reference source, each SAR ADC will interfere with each other. How to avoid interference during the charging process is an urgent problem to be solved. Summary of the invention
[0003] The purpose of some embodiments of the present application is to provide a control method, device, electronic device and storage medium based on common reference source interference. Through the technical solution of the embodiments of the present application, it is applied to a successive approximation analog-to-digital converter, and the successive approximation analog-to-digital converter includes at least a reference source and multiple ADC modules. The method includes: determining a synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule; wherein the synchronous and asynchronous control strategy at least includes simultaneously issuing an enable signal or gradually issuing an enable signal; according to the synchronous and asynchronous control strategy, controlling the multiple ADC modules so that when the multiple ADC modules use the reference source to charge the conversion capacitor, no interference is generated. Through the embodiments of the present application, a synchronous and asynchronous configuration rule is provided, and the synchronous and asynchronous control strategy can be determined according to the reference source driving capability information of the successive approximation analog-to-digital converter, for example, the enable signal is issued simultaneously or the enable signal is issued gradually, and the ADC module is controlled according to the synchronous and asynchronous control strategy to avoid interference when the multiple ADC modules use the reference source to charge the conversion capacitor.
[0004] In a first aspect, some embodiments of the present application provide a control method based on common reference source interference, which is applied to a successive approximation analog-to-digital converter, wherein the successive approximation analog-to-digital converter includes at least a reference source and a plurality of ADC modules, including:
[0005] Determine a synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information of the successive approximation analog-to-digital converter and the preset synchronous and asynchronous configuration rules; wherein the synchronous and asynchronous control strategy at least includes simultaneously sending an enable signal or gradually sending an enable signal;
[0006] According to the synchronous and asynchronous control strategy, the multiple ADC modules are controlled so that no interference is generated when the multiple ADC modules use the reference source to charge the conversion capacitor.
[0007] Some embodiments of the present application can determine a synchronous and asynchronous control strategy based on the reference source driving capability information of the successive approximation analog-to-digital converter by providing synchronous and asynchronous configuration rules. For example, enable signals are sent simultaneously or gradually, and the ADC module is controlled according to the synchronous and asynchronous control strategy to avoid interference when multiple ADC modules use the reference source to charge the conversion capacitor.
[0008] Optionally, determining the synchronous and asynchronous control strategy according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule includes:
[0009] When the reference source driving capability information is greater than the preset driving capability value and no interference signal is generated when the multiple ADC modules charge the conversion capacitor simultaneously, a synchronous control strategy corresponding to the successive approximation analog-to-digital converter is determined according to the synchronous and asynchronous configuration rules. The synchronous control strategy is used to simultaneously send an enable signal so that the multiple ADC modules use the reference source to charge the conversion capacitor simultaneously.
[0010] In some embodiments of the present application, when the reference source driving capability is strong and multiple ADCs have no impact on charging the conversion capacitor at the same time, it is not necessary to consider whether to perform asynchronous configuration.
[0011] Optionally, determining the synchronous and asynchronous control strategy according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule includes:
[0012] In a case where the reference source driving capability information is less than or equal to the preset driving capability value, determining periodic clock information corresponding to the frequency division information according to the system clock information and frequency division information of the successive approximation analog-to-digital converter;
[0013] The asynchronous control strategy is determined according to the periodic clock information and the charging time of the conversion capacitor, and the asynchronous control strategy is used to gradually send out enable signals so that the multiple ADC modules gradually charge the conversion capacitor using a reference source.
[0014] Some embodiments of the present application adopt an asynchronous strategy to control each ADC module to ensure that multiple ADC sampling conversions do not use a reference source to charge the conversion capacitor at the same time, thereby avoiding interference.
[0015] Optionally, determining the asynchronous control strategy according to the periodic clock information and the charging time of the conversion capacitor includes:
[0016] If the periodic clock information is less than the charging time of the conversion capacitor, the clock phase difference of adjacent ADC modules is adjusted to a preset number of system clock information.
[0017] In some embodiments of the present application, when the system clock frequency is high and the clock information of each cycle is less than the capacitor charging time of the conversion capacitor, the phase difference of adjacent ADC clocks is adjusted.
[0018] Optionally, the method further comprises:
[0019] In the process of the multiple ADC modules charging the conversion capacitor, the enable signal is turned off and the synchronous / asynchronous configuration rule is modified.
[0020] In some embodiments of the present application, when the configuration needs to be modified, the enable signal is first turned off, and then the configuration is modified. After the configuration modification is completed, the corresponding process is performed according to the synchronous and asynchronous configuration.
[0021] In a second aspect, some embodiments of the present application provide a control device based on common reference source interference, which is applied to a successive approximation analog-to-digital converter, wherein the successive approximation analog-to-digital converter includes at least a reference source and a plurality of ADC modules, including:
[0022] A determination module, configured to determine a synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule; wherein the synchronous and asynchronous control strategy at least includes simultaneously sending an enable signal or gradually sending an enable signal;
[0023] The control module is used to control the multiple ADC modules according to the synchronous and asynchronous control strategy so that no interference is generated when the multiple ADC modules use the reference source to charge the conversion capacitor.
[0024] Some embodiments of the present application can determine a synchronous and asynchronous control strategy based on the reference source driving capability information of the successive approximation analog-to-digital converter by providing synchronous and asynchronous configuration rules. For example, enable signals are sent simultaneously or gradually, and the ADC module is controlled according to the synchronous and asynchronous control strategy to avoid interference when multiple ADC modules use the reference source to charge the conversion capacitor.
[0025] Optionally, the determining module is used to:
[0026] When the reference source driving capability information is greater than the preset driving capability value and no interference signal is generated when the multiple ADC modules charge the conversion capacitor simultaneously, a synchronous control strategy corresponding to the successive approximation analog-to-digital converter is determined according to the synchronous and asynchronous configuration rules. The synchronous control strategy is used to simultaneously send an enable signal so that the multiple ADC modules use the reference source to charge the conversion capacitor simultaneously.
[0027] In some embodiments of the present application, when the reference source driving capability is strong and multiple ADCs have no impact on charging the conversion capacitor at the same time, it is not necessary to consider whether to perform asynchronous configuration.
[0028] Optionally, the determining module is used to:
[0029] In a case where the reference source driving capability information is less than or equal to the preset driving capability value, determining periodic clock information corresponding to the frequency division information according to the system clock information and frequency division information of the successive approximation analog-to-digital converter;
[0030] The asynchronous control strategy is determined according to the periodic clock information and the charging time of the conversion capacitor, and the asynchronous control strategy is used to gradually send out enable signals so that the multiple ADC modules gradually charge the conversion capacitor using a reference source.
[0031] Some embodiments of the present application adopt an asynchronous strategy to control each ADC module to ensure that multiple ADC sampling conversions do not use a reference source to charge the conversion capacitor at the same time, thereby avoiding interference.
[0032] Optionally, the determining module is used to:
[0033] If the periodic clock information is less than the charging time of the conversion capacitor, the clock phase difference of adjacent ADC modules is adjusted to a preset number of system clock information.
[0034] In some embodiments of the present application, when the system clock frequency is high and the clock information of each cycle is less than the capacitor charging time of the conversion capacitor, the phase difference of adjacent ADC clocks is adjusted.
[0035] Optionally, the control module is further used for:
[0036] In the process of the multiple ADC modules charging the conversion capacitor, the enable signal is turned off and the synchronous / asynchronous configuration rule is modified.
[0037] In some embodiments of the present application, when the configuration needs to be modified, the enable signal is first turned off, and then the configuration is modified. After the configuration modification is completed, the corresponding process is performed according to the synchronous and asynchronous configuration.
[0038] In a third aspect, some embodiments of the present application provide an electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein when the processor executes the program, the control method based on common reference source interference as described in any embodiment of the first aspect can be implemented.
[0039] In a fourth aspect, some embodiments of the present application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, can implement the control method based on common reference source interference as described in any embodiment of the first aspect.
[0040] In a fifth aspect, some embodiments of the present application provide a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, it can implement the control method based on common reference source interference as described in any embodiment of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] In order to more clearly illustrate the technical solutions of some embodiments of the present application, the drawings required for use in some embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0042] Figure 1 A flow chart of a control method based on common reference source interference provided in an embodiment of the present application;
[0043] Figure 2 A schematic diagram of ADC control logic provided in an embodiment of the present application;
[0044] Figure 3 A schematic diagram of the timing sequence of ADC analog-to-digital conversion synchronization provided by an embodiment of the present application;
[0045] Figure 4 A schematic diagram of the ADC asynchronous conversion timing provided by an embodiment of the present application;
[0046] Figure 5 A schematic diagram of the flow of configuration rules provided in an embodiment of the present application;
[0047] Figure 6 A schematic diagram of the charging timing of the conversion capacitor provided in an embodiment of the present application;
[0048] Figure 7 A schematic diagram of the structure of a control device based on common reference source interference provided in an embodiment of the present application;
[0049] Figure 8 A schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0050] The technical solutions in some embodiments of the present application will be described below in conjunction with the drawings in some embodiments of the present application.
[0051] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.
[0052] The working principle of SAR ADC (successive approximation ADC) is that during the conversion process of the sampling result, the conversion capacitor is charged by the reference source after a fixed time after the rising edge of the clock, and the sampling source is converted after the charging is completed. When multiple SAR ADCs charge conversion capacitors simultaneously by a reference source, the SAR ADCs will interfere with each other. In view of this, some embodiments of the present application provide a control method based on interference from a common reference source, which is applied to a successive approximation analog-to-digital converter. The successive approximation analog-to-digital converter includes at least a reference source and multiple ADC modules. The method includes: determining a synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule; wherein the synchronous and asynchronous control strategy at least includes simultaneously sending an enable signal or gradually sending an enable signal; according to the synchronous and asynchronous control strategy, controlling multiple ADC modules so that when multiple ADC modules use the reference source to charge the conversion capacitor, no interference is generated. Through the embodiments of the present application, a synchronous and asynchronous configuration rule is provided, and the synchronous and asynchronous control strategy can be determined according to the reference source driving capability information of the successive approximation analog-to-digital converter, for example, the enable signal is sent simultaneously or the enable signal is sent gradually, and the ADC module is controlled according to the synchronous and asynchronous control strategy to avoid interference when multiple ADC modules use the reference source to charge the conversion capacitor.
[0053] like Figure 1 As shown, an embodiment of the present application provides a control method based on common reference source interference, which is applied to a successive approximation analog-to-digital converter SAR ADC, wherein the successive approximation analog-to-digital converter includes at least a reference source and multiple ADC modules, and the method includes:
[0054] S101, determining a synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information of the successive approximation analog-to-digital converter and the preset synchronous and asynchronous configuration rules; wherein the synchronous and asynchronous control strategy at least includes sending an enable signal simultaneously or sending an enable signal step by step;
[0055] Among them, the reference source is the power supply, and the successive approximation analog-to-digital converter determines the synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information and the pre-configured synchronous and asynchronous configuration rules. The synchronous and asynchronous control strategy includes a synchronous control strategy and an asynchronous control strategy. The synchronous and asynchronous control strategy at least includes sending enable signals simultaneously or sending enable signals step by step.
[0056] S102. Control the multiple ADC modules according to the synchronous and asynchronous control strategy, so that no interference is generated when the multiple ADC modules use the reference source to charge the conversion capacitor.
[0057] Specifically, the successive approximation analog-to-digital converter controls the multiple ADC modules according to a synchronous control strategy or an asynchronous control strategy, so that when the multiple ADC modules use a reference source to charge the conversion capacitor, no interference is generated.
[0058] In the embodiment of the present application, the reference source synchronous and asynchronous selection is added, and the design is more flexible.
[0059] Some embodiments of the present application can determine a synchronous and asynchronous control strategy based on the reference source driving capability information of the successive approximation analog-to-digital converter by providing synchronous and asynchronous configuration rules. For example, enable signals are sent simultaneously or gradually, and the ADC module is controlled according to the synchronous and asynchronous control strategy to avoid interference when multiple ADC modules use the reference source to charge the conversion capacitor.
[0060] Another embodiment of the present application further supplements the control method based on common reference source interference provided in the above embodiment.
[0061] Optionally, the synchronous and asynchronous control strategy is determined according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule, including:
[0062] When the reference source driving capability information is greater than the preset driving capability value and no interference signal is generated when multiple ADC modules charge the conversion capacitor at the same time, a synchronous control strategy corresponding to the successive approximation analog-to-digital converter is determined according to the synchronous and asynchronous configuration rules. The synchronous control strategy is used to simultaneously send an enable signal so that the multiple ADC modules use the reference source to charge the conversion capacitor at the same time.
[0063] In some embodiments of the present application, when the reference source driving capability is strong and multiple ADCs have no impact on charging the conversion capacitor at the same time, it is not necessary to consider whether to perform asynchronous configuration.
[0064] Optionally, the synchronous and asynchronous control strategy is determined according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule, including:
[0065] When the reference source driving capability information is less than or equal to the preset driving capability value, determining the periodic clock information corresponding to the frequency division information according to the system clock information and the frequency division information of the successive approximation analog-to-digital converter;
[0066] An asynchronous control strategy is determined according to the periodic clock information and the charging time of the conversion capacitor. The asynchronous control strategy is used to gradually send out an enable signal so that the multiple ADC modules gradually charge the conversion capacitor using a reference source.
[0067] Some embodiments of the present application adopt an asynchronous strategy to control each ADC module to ensure that multiple ADC sampling conversions do not use a reference source to charge the conversion capacitor at the same time, thereby avoiding interference.
[0068] Optionally, determining an asynchronous control strategy according to the periodic clock information and the charging time of the conversion capacitor includes:
[0069] If the periodic clock information is less than the charging time of the conversion capacitor, the clock phase difference of the adjacent ADC modules is adjusted to a preset number of system clock information.
[0070] Specifically, the system clock information of the SAR ADC is the crystal oscillator clock of the chip. When the ADC module clock is the N-frequency division of the system clock information, asynchronous operation can be performed on up to N ADC modules. According to the system clock information and the N-frequency division, the cycle clock of the ADC module is calculated. When the frequency of the system clock information is high and the cycle clock of each ADC module is less than the charging time of the conversion capacitor, the design needs to be adjusted, and the phase difference of adjacent ADC clocks needs to be adjusted to a preset number of system clock information, for example, adjusted to 2 (3, 4...) system clock frequencies.
[0071] In some embodiments of the present application, when the system clock frequency is high and the clock information of each cycle is less than the capacitor charging time of the conversion capacitor, the phase difference of adjacent ADC clocks is adjusted.
[0072] Optionally, the method further comprises:
[0073] In the process that the multiple ADC modules charge the conversion capacitor, the enable signal is turned off and the synchronous and asynchronous configuration rules are modified.
[0074] like Figure 5 As shown, after the SAR ADC chip starts working, it first determines whether it is synchronized, and issues the enable at the same time or gradually according to the synchronous and asynchronous configuration; if it is synchronized, the enable is issued at the same time, if not, the enable is issued gradually;
[0075] After the enable signal is issued, if the configuration is not modified, the enable signal will be maintained;
[0076] When you need to modify the configuration, turn off the enable signal first, and then modify the configuration.
[0077] After the configuration modification is completed, the corresponding process is carried out according to the synchronous and asynchronous configuration.
[0078] In the embodiment of the present application, if the reference source driving capability is strong, even if multiple ADCs charge the conversion capacitor at the same time, it will not have any impact, then it is not necessary to consider whether to perform asynchronous configuration; if the influence of the sampling result introduced by the reference source interference is negligible, it is also not necessary to consider whether to perform asynchronous configuration. Flexible configuration is performed according to application requirements to meet various application environments of customers. Configuration updates can be met, and when the application environment changes, adjusting the configuration will not cause circuit errors.
[0079] In some embodiments of the present application, when the configuration needs to be modified, the enable signal is first turned off, and then the configuration is modified. After the configuration modification is completed, the corresponding process is performed according to the synchronous and asynchronous configuration.
[0080] The embodiment of the present application provides a SAR ADC (successive approximation ADC, successive approximation analog-to-digital converter) common reference source anti-interference implementation method, such as Figure 2 As shown, the SAR ADC chip includes a clock control logic part, an ADC control part and an ADC module, wherein the clock control logic part is respectively connected to multiple ADC control parts, the ADC control part is connected to the corresponding ADC module, and is connected to each ADC control part through the CLOCK clock signal and the clk-en clock enable signal. The ADC control part includes a gate circuit and a DIV. The clock control logic part controls the clock enable signal, and sends a clock enable signal to each ADC module according to different working modes (synchronous or asynchronous). In conjunction with the clock control logic signal, the control signal usage is adjusted according to different ADC designs, so that multiple ADCs will not charge the conversion capacitor at the same time, avoiding interference between multiple SAR ADCs. Among them, the synchronous control logic is as follows: Figure 3 As shown, the asynchronous control logic is as follows Figure 4 shown.
[0081] The embodiment of the present application adopts ADC timing synchronization control logic, and can adjust whether multiple ADCs work synchronously according to the application environment. The charging time of the conversion capacitor is as follows: Figure 6The red frame part.
[0082] It should be noted that each implementable method in this embodiment may be implemented separately, or may be implemented in combination in any combination without conflict, and this application is not limited thereto.
[0083] Another embodiment of the present application provides a control device based on common reference source interference, which is used to execute the control method based on common reference source interference provided by the above embodiment.
[0084] like Figure 7 As shown, it is a schematic diagram of the structure of a control device based on common reference source interference provided by an embodiment of the present application. The control device based on common reference source interference is applied to a successive approximation analog-to-digital converter, which includes at least a reference source and multiple ADC modules, including a determination module 701 and a control module 702, wherein:
[0085] The determination module 701 is used to determine the synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information of the successive approximation analog-to-digital converter and the preset synchronous and asynchronous configuration rules; wherein the synchronous and asynchronous control strategy at least includes sending the enable signal simultaneously or sending the enable signal step by step;
[0086] The control module 702 is used to control the multiple ADC modules according to the synchronous and asynchronous control strategy, so that when the multiple ADC modules use the reference source to charge the conversion capacitor, no interference will be generated.
[0087] Regarding the device in this embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.
[0088] Some embodiments of the present application can determine a synchronous and asynchronous control strategy based on the reference source driving capability information of the successive approximation analog-to-digital converter by providing synchronous and asynchronous configuration rules. For example, enable signals are sent simultaneously or gradually, and the ADC module is controlled according to the synchronous and asynchronous control strategy to avoid interference when multiple ADC modules use the reference source to charge the conversion capacitor.
[0089] Another embodiment of the present application further supplements the control device based on common reference source interference provided in the above embodiment.
[0090] Optionally, the determination module is used to:
[0091] When the reference source driving capability information is greater than the preset driving capability value and no interference signal is generated when multiple ADC modules charge the conversion capacitor at the same time, a synchronous control strategy corresponding to the successive approximation analog-to-digital converter is determined according to the synchronous and asynchronous configuration rules. The synchronous control strategy is used to simultaneously send an enable signal so that the multiple ADC modules use the reference source to charge the conversion capacitor at the same time.
[0092] In some embodiments of the present application, when the reference source driving capability is strong and multiple ADCs have no impact on charging the conversion capacitor at the same time, it is not necessary to consider whether to perform asynchronous configuration.
[0093] Optionally, the determination module is used to:
[0094] When the reference source driving capability information is less than or equal to the preset driving capability value, determining the periodic clock information corresponding to the frequency division information according to the system clock information and the frequency division information of the successive approximation analog-to-digital converter;
[0095] An asynchronous control strategy is determined according to the periodic clock information and the charging time of the conversion capacitor. The asynchronous control strategy is used to gradually send out an enable signal so that the multiple ADC modules gradually charge the conversion capacitor using a reference source.
[0096] Some embodiments of the present application adopt an asynchronous strategy to control each ADC module to ensure that multiple ADC sampling conversions do not use a reference source to charge the conversion capacitor at the same time, thereby avoiding interference.
[0097] Optionally, the determination module is used to:
[0098] If the periodic clock information is less than the charging time of the conversion capacitor, the clock phase difference of the adjacent ADC modules is adjusted to a preset number of system clock information.
[0099] In some embodiments of the present application, when the system clock frequency is high and the clock information of each cycle is less than the capacitor charging time of the conversion capacitor, the phase difference of adjacent ADC clocks is adjusted.
[0100] Optionally, the control module is further configured to:
[0101] In the process that the multiple ADC modules charge the conversion capacitor, the enable signal is turned off and the synchronous and asynchronous configuration rules are modified.
[0102] In some embodiments of the present application, when the configuration needs to be modified, the enable signal is first turned off, and then the configuration is modified. After the configuration modification is completed, the corresponding process is performed according to the synchronous and asynchronous configuration.
[0103] Regarding the device in this embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.
[0104] It should be noted that each implementable method in this embodiment may be implemented separately, or may be implemented in combination in any combination without conflict, and this application is not limited thereto.
[0105] An embodiment of the present application also provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the operation of the method corresponding to any embodiment of the control method based on common reference source interference provided in the above embodiments can be implemented.
[0106] An embodiment of the present application also provides a computer program product, which includes a computer program, wherein when the computer program is executed by a processor, it can implement the operations corresponding to any embodiment of the control method based on common reference source interference provided in the above embodiments.
[0107] like Figure 8 As shown, some embodiments of the present application provide an electronic device 800, which includes: a memory 810, a processor 820, and a computer program stored in the memory 810 and executable on the processor 820, wherein the processor 820 can implement any embodiment of the control method based on common reference source interference as described above when reading the program from the memory 810 through a bus 830 and executing the program.
[0108] Processor 820 can process digital signals and can include various computing structures, such as complex instruction set computer structure, reduced instruction set computer structure, or a structure that implements a combination of multiple instruction sets. In some examples, processor 820 can be a microprocessor.
[0109] The memory 810 may be used to store instructions executed by the processor 820 or data related to the execution of instructions. These instructions and / or data may include codes for implementing some or all functions of one or more modules described in the embodiments of the present application. The processor 820 of the disclosed embodiment may be used to execute instructions in the memory 810 to implement the method shown above. The memory 810 includes a dynamic random access memory, a static random access memory, a flash memory, an optical memory, or other memory known to those skilled in the art.
[0110] The above are only embodiments of the present application and are not intended to limit the scope of protection of the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.
[0111] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
[0112] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
Claims
1. A control method based on common reference source interference, characterized in that: Applied to a successive approximation analog-to-digital converter, the successive approximation analog-to-digital converter at least includes a reference source and a plurality of ADC modules, the method comprising: Determine a synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule; wherein the synchronous and asynchronous control strategy at least includes simultaneously sending an enable signal or gradually sending an enable signal; According to the synchronous and asynchronous control strategy, the multiple ADC modules are controlled so that no interference is generated when the multiple ADC modules use the reference source to charge the conversion capacitor.
2. The control method based on common reference source interference according to claim 1, characterized in that: The step of determining the synchronous and asynchronous control strategy according to the reference source driving capability information of the successive approximation analog-to-digital converter and the preset synchronous and asynchronous configuration rules includes: When the reference source driving capability information is greater than the preset driving capability value and no interference signal is generated when the multiple ADC modules charge the conversion capacitor simultaneously, a synchronous control strategy corresponding to the successive approximation analog-to-digital converter is determined according to the synchronous and asynchronous configuration rules. The synchronous control strategy is used to simultaneously send an enable signal so that the multiple ADC modules use the reference source to charge the conversion capacitor simultaneously.
3. The control method based on common reference source interference according to claim 1, characterized in that: The step of determining the synchronous and asynchronous control strategy according to the reference source driving capability information of the successive approximation analog-to-digital converter and the preset synchronous and asynchronous configuration rules includes: In a case where the reference source driving capability information is less than or equal to the preset driving capability value, determining periodic clock information corresponding to the frequency division information according to the system clock information and frequency division information of the successive approximation analog-to-digital converter; The asynchronous control strategy is determined according to the periodic clock information and the charging time of the conversion capacitor, and the asynchronous control strategy is used to gradually send out enable signals so that the multiple ADC modules gradually charge the conversion capacitor using a reference source.
4. The control method based on common reference source interference according to claim 3 is characterized in that: Determining the asynchronous control strategy according to the periodic clock information and the charging time of the conversion capacitor includes: If the periodic clock information is less than the charging time of the conversion capacitor, the clock phase difference of adjacent ADC modules is adjusted to a preset number of system clock information.
5. The control method based on common reference source interference according to claim 1, characterized in that: The method further comprises: In the process of the multiple ADC modules charging the conversion capacitor, the enable signal is turned off and the synchronous / asynchronous configuration rule is modified.
6. A control device based on common reference source interference, characterized in that: Applied to a successive approximation analog-to-digital converter, the successive approximation analog-to-digital converter at least includes a reference source and a plurality of ADC modules, and the device includes: A determination module, configured to determine a synchronous and asynchronous control strategy corresponding to the successive approximation analog-to-digital converter according to the reference source driving capability information of the successive approximation analog-to-digital converter and a preset synchronous and asynchronous configuration rule; wherein the synchronous and asynchronous control strategy at least includes simultaneously sending an enable signal or gradually sending an enable signal; The control module is used to control the multiple ADC modules according to the synchronous and asynchronous control strategy so that no interference is generated when the multiple ADC modules use the reference source to charge the conversion capacitor.
7. The control device based on common reference source interference according to claim 6, characterized in that: The determination module is used for: When the reference source driving capability information is greater than the preset driving capability value and no interference signal is generated when the multiple ADC modules charge the conversion capacitor simultaneously, a synchronous control strategy corresponding to the successive approximation analog-to-digital converter is determined according to the synchronous and asynchronous configuration rules. The synchronous control strategy is used to simultaneously send an enable signal so that the multiple ADC modules use the reference source to charge the conversion capacitor simultaneously.
8. The control device based on common reference source interference according to claim 6, characterized in that: The determination module is used for: In a case where the reference source driving capability information is less than or equal to the preset driving capability value, determining periodic clock information corresponding to the frequency division information according to the system clock information and frequency division information of the successive approximation analog-to-digital converter; The asynchronous control strategy is determined according to the periodic clock information and the charging time of the conversion capacitor, and the asynchronous control strategy is used to gradually send out enable signals so that the multiple ADC modules gradually charge the conversion capacitor using a reference source.
9. An electronic device, characterized in that: It comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, it can implement the control method based on common reference source interference as described in any one of claims 1 to 5.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the program, when executed by a processor, can implement the control method based on common reference source interference as described in any one of claims 1 to 5.
Citation Information
Patent Citations
SAR analog-to-digital converter selective synchronization
CN108023592A
Successive approximation register analog-digital converter and method for operating the same
CN109698700A
Multi-channel successive approximation analog-to-digital converter system, integrated circuit, chip and device
CN118353459A
Reference disturbance mitigation in successive approximation register analog to digital converter
US20180183457A1
