Optical module and performance test system and method for internal chip of optical module

Abstract

The invention discloses a performance test system and method for an optical module and an internal chip thereof, the system comprises HOST equipment and a loss-adjustable MCB, the loss-adjustable MCB is connected with a to-be-tested piece, the HOST equipment is used for generating a test code pattern, the loss-adjustable MCB is used for simulating port loss characteristics of different main equipment, and the loss-adjustable MCB is connected with the to-be-tested piece. The method and the device are used for testing the electric port output performance and the optical port output performance of a linear Driver, testing the electric port output performance of a linear TIA and testing the performance of a transmitting end and a receiving end of a semi-finished product / finished product LPO optical module in different degrees of electric link loss environments. According to the invention, key electric chips such as Driver, TIA and the like and an LPO optical module are self-researched and developed and are close to a final use scene, performance testing is carried out in different degrees of electric link loss environments, the insufficiency of product performance is found in time, the design is corrected, the research and development period of the chips and the optical module is shortened, and the method has relatively good practicability.

Description

Technical Field

[0001] The present invention belongs to the technical field of optical component performance testing, and in particular relates to a performance testing system and method for an optical module and an internal chip thereof. Background Art

[0002] With the widespread application of AI technology, the demand of enterprises and organizations for intelligent computing data centers continues to increase. The optical module market will become an important growth point, and new requirements for optical modules are also put forward. In order to reduce latency, power consumption and cost, and meet the requirements of high speed, high density, flexibility and upgradeability of optical networks, LPO (Linear Drive Pluggable Optical Module) came into being. LPO adopts a linear direct drive method, using only linear analog components in the data link, without DSP or CDR chips, thereby greatly reducing power consumption and latency, and deeply meeting the current AI computing center's short-distance, large-bandwidth, low-power and low-latency data connection requirements. Different from traditional Driver (driver chip) and TIA (Trans-Impedance Amplifier), the Driver and TIA used in LPO integrate CTLE (Continuous Time Linear Equalization) and EQ (Equalization) functions respectively, so as to compensate for high-speed electrical signals to a certain extent. In order to evaluate the performance of LPO optical modules and internal linear Driver and TIA chips, it is necessary to test them in different degrees of electrical link loss environments as much as possible to evaluate whether they meet the use requirements of the system or protocol.

[0003] Optical module manufacturers and main equipment manufacturers will perform performance tests on their products to verify whether the products meet the technical indicators required by the corresponding protocol. For optical module companies and main equipment manufacturers, in order to evaluate the performance of their products, they will produce MCB (Module Compliance Board) or HCB (Host Compliance Board) that meets the technical indicators of the corresponding protocol according to the protocol requirements of the products. In this way, they can test the various performance indicators of optical modules or main equipment (such as switches) according to the protocol requirements. Take CEI-112G-VSR-PAM4 in OIF-CEI-05.2 as an example: like Figure 1 As shown in the figure, the definition of related interfaces in CEI-112G-VSR-PAM4 is similar to that in IEEE Std 802.3ck™-2022. However, since CEI-112G-VSR-PAM4 only focuses on electrical interfaces, the focus is on the TP1 / TP1a / TP4 / TP4a interfaces, which are defined as follows: TP1a: Mainly used to test the signal performance of the HOST transmitter. The signal from the HOST chip is derived through the Host PCB Trace+Connector+HCB PCB Trace. Since there is no way to directly measure the performance of the chip output (TP0a), the test result of TP1a includes the loss of the three parts of Host PCB Trace+Connector+HCB PCB Trace. TP1: Mainly used to test the characteristics of the optical module's electrical receiving end. During the test, the signal will pass through the MCB PCBTrace+Connector+Module PCB Trace including AC coupling loss; TP4a: used to test the characteristics of the HOST receiving end. During the test, the signal will pass through the loss of HCB PCB Trace+Connector+Host PCB Trace; TP4: Mainly used to test the characteristics of the optical module's electrical transmitting end. During the test, the signal will pass through the MCB PCBTrace+Connector+Module PCB Trace including AC coupling loss.

[0004] Based on the above solution, it is not difficult to find that the protocol tests the signal indicators of the four key points of TP1 / TP1a / TP4 / TP4a, and it is often necessary to produce finished / semi-finished optical modules or main equipment to conduct corresponding performance tests. For main equipment manufacturers, there are certain differences in the optical module PCB design and the chipset solutions selected by different optical module manufacturers, so the link loss and signal integrity shown by the products of different optical module manufacturers are different. For optical module manufacturers, there are differences in the PCB and port designs of various main equipment manufacturers. Optical module manufacturers cannot obtain products from different main equipment manufacturers one by one to test their own optical modules or optical module chipset solutions.

[0005] At present, for the performance evaluation test of LPO optical modules and their internal linear Driver and TIA chips, the selected linear Driver and TIA and other key electrical chips must first be made into nearly finished modules according to the commonly used module packaging types of LPO (such as QSFP, OSFP, etc.), and then their performance is tested. At the same time, in order to test the compensation ability of LPO optical modules and their internal Driver and TIA chips for electrical link loss in real application scenarios, they often need to be jointly tested with many mainstream main devices on the market, which brings considerable challenges to the actual development of electrical chips or optical modules.

[0006] In summary, there are many main equipment models on the market and it is impossible to obtain them one by one for testing optical modules or optical module chipsets; secondly, only after the production of finished / semi-finished optical modules can corresponding performance tests be carried out. For those key electrical chips such as Driver and TIA that are in the research and development process, it is not possible to timely evaluate or test whether their performance can meet the protocol requirements. In order to solve this pain point, the present invention designs a performance testing scheme for optical modules and their internal chips. There is no need to produce finished / semi-finished optical modules. In the early chip research and development or LPO optical module development stage, it can be close to the actual application scenario, and the performance of LPO optical modules and their internal linear Driver and TIA and other key electrical chips can be tested. Secondly, it can simulate the performance of LPO optical modules in the research and development process and their internal linear Driver and TIA and other key electrical chips in different degrees of electrical link loss environments, and timely evaluate the performance of LPO optical modules in the research and development process and their internal linear Driver and TIA and other key electrical chips. Summary of the invention

[0007] The object of the present invention is to provide a performance testing system and method for an optical module and its internal chip, aiming to solve the above-mentioned problems.

[0008] The present invention is mainly achieved through the following technical solutions: A performance test system for an optical module and its internal chip, comprising a HOST device and a loss-adjustable MCB connected in sequence from front to back, wherein the loss-adjustable MCB is connected to a device to be tested, the HOST device is used to generate a test pattern, and the loss-adjustable MCB is used to simulate the port loss characteristics of different host devices, so as to test the electrical port output performance and optical port output performance of a linear driver, the electrical port output performance of a linear TIA, and the performance of a transmitting end and a receiving end of a semi-finished / finished LPO optical module under different degrees of electrical link loss environments.

[0009] In order to better realize the present invention, further, the system includes an electrical chip test module for testing the electrical port output performance and optical port output performance of the linear Driver and the electrical port output performance of the linear TIA; the electrical chip test module includes a HOST device, a loss-adjustable MCB and an HCB arranged in sequence from front to back, the output end of the HOST device is respectively connected to the loss-adjustable MCB, the linear Driver optical port EVB and the linear Driver electrical port EVB, the linear Driver optical port EVB is used to amplify the electrical signal and convert it into an optical signal output, and the linear Driver electrical port EVB is used to amplify the electrical signal; The output end of the loss-adjustable MCB is connected to the HCB and the calibrated finished LPO optical module through the optical module connector female socket, and the output end of the calibrated finished LPO optical module is connected to the adjustable optical attenuator; the HCB is connected to the linear driver optical port EVB and the linear driver electrical port EVB respectively; The output end of the linear Driver electrical port EVB is connected to an electrical sampling oscilloscope and a vector network analyzer respectively; The output end of the linear Driver optical port EVB is respectively connected to a high-bandwidth photodetector, an optical sampling oscilloscope and an adjustable optical attenuator; The adjustable optical attenuator is respectively connected to an electrical sampling oscilloscope, a bit error tester and a vector network analyzer through a linear TIA electrical port EVB; the linear TIA electrical port EVB is used to convert an optical signal into an electrical signal through a PD, and amplify the electrical signal through a TIA.

[0010] Specifically, the output ends of the HOST device, HCB, linear Driver electrical port EVB and linear TIA electrical port EVB, and the input ends of the loss-adjustable MCB, linear Driver optical port EVB and linear Driver electrical port EVB are respectively provided with RF coaxial connectors.

[0011] In order to better realize the present invention, further, the system also includes an LPO optical module test module for testing the performance of the transmitting end and the receiving end of the semi-finished / finished LPO optical module; the LPO optical module test module includes a HOST device, a loss-adjustable MCB, a LPO optical module transmitting unit to be tested, an adjustable optical attenuator, a LPO optical module receiving unit to be tested and a loss-adjustable MCB arranged in sequence from front to back, the LPO optical module transmitting unit to be tested is used to convert an electrical signal into an optical signal; the LPO optical module receiving unit to be tested is used to convert an optical signal into an electrical signal; the LPO optical module transmitting unit to be tested is respectively connected to a high-bandwidth photodetector, an optical sampling oscilloscope and an adjustable optical attenuator, and the high-bandwidth photodetector is connected to a vector network analyzer; the LPO optical module receiving unit to be tested is respectively connected to an electrical sampling oscilloscope and a bit error tester through the loss-adjustable MCB. Specifically, the HOST device is connected to the loss-adjustable MCB through a radio frequency coaxial connector; the LPO optical module transmitting unit to be tested and the LPO optical module receiving unit to be tested are respectively connected to the loss-adjustable MCB through optical module connector female sockets.

[0012] The present invention is mainly achieved through the following technical solutions: A performance test method for an optical module and its internal chip is based on the above system. When link attenuation is introduced or not, an electrical eye diagram test and an S parameter test are performed on the linear driver electrical port EVB and the linear driver optical port EVB respectively to evaluate the output performance of the linear driver electrical port and optical port under different degrees of link loss. When link attenuation is introduced and a calibrated finished LPO optical module is used as the optical signal source, when link attenuation is introduced and a linear Driver optical port EVB is used as the optical signal source, and when link attenuation is not introduced and a linear Driver optical port EVB is used as the optical signal source, the electrical eye diagram test, S parameter test, bit error rate and receiving sensitivity test are performed on the linear TIA electrical port EVB to evaluate the electrical port output performance of the TIA under different degrees of link loss. The actual link attenuation is simulated by the loss-adjustable MCB and input into the LPO optical module sending unit to be tested, so as to evaluate the performance of the transmitting end of the semi-finished / finished LPO optical module. The receiving unit of the LPO optical module to be tested is connected to the electrical sampling oscilloscope / bit error tester after simulating the actual link attenuation through the loss-adjustable MCB at the back end, and the electrical eye diagram / bit error rate and receiving sensitivity of the LPO optical module receiving unit to be tested are tested, so as to evaluate the performance of the receiving end of the semi-finished / finished LPO optical module.

[0013] In order to better implement the present invention, further, testing the electrical port output performance of the linear driver includes the following steps: Step A1: if link attenuation is introduced, proceed to step A2, otherwise proceed to step A4; Step A2: Conduct an electrical eye diagram test: The HOST device generates a corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB, and then flows into the input port of the tested linear driver electrical port EVB through the HCB. The electrical signal output by the linear driver electrical port EVB is input into the electrical sampling oscilloscope, thereby obtaining parameter information on the electrical eye diagram; Step A3: Perform S parameter test: the output port of the vector network analyzer is connected to the input port of the loss adjustable MCB, and then flows into the input port of the tested linear driver electrical port EVB through the HCB. The electrical signal output by the linear driver electrical port EVB is connected to the input port of the vector network analyzer, so as to obtain parameter information of S parameters; then, enter step A6; Step A4: Conducting an electrical eye diagram test: The HOST device generates a corresponding test pattern which directly flows into the input port of the tested linear Driver electrical port EVB, and the electrical signal output by the linear Driver electrical port EVB is input into the electrical sampling oscilloscope, thereby obtaining parameter information of the electrical eye diagram; Step A5: Perform S parameter test: the output port of the vector network analyzer is connected to the input port of the linear Driver electrical port EVB, and the electrical signal output by the linear Driver electrical port EVB is connected to the input end of the vector network analyzer, so as to obtain parameter information of S parameters; Step A6: Compare the test results of step A2 and step A3 and the test results of step A4 and step A5 to evaluate the electrical port output performance of the driver under different degrees of link loss.

[0014] In order to better implement the present invention, further, testing the optical port output performance of the linear driver includes the following steps: Step B1: If link attenuation is introduced, proceed to step B2, otherwise proceed to step B4; Step B2: Perform an optical eye diagram test: The HOST device generates a corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB, and then inputs the optical signal of the tested linear Driver optical port EVB through the HCB. The optical signal output by the linear Driver optical port EVB is input into the optical sampling oscilloscope, thereby obtaining parameter information of the optical eye diagram; Step B3: Perform S parameter test: the output port of the vector network analyzer is connected to the input port of the loss adjustable MCB, and then flows into the input port of the tested linear driver optical port EVB through the HCB. The optical signal output by the linear driver optical port EVB is connected to the input port of the vector network analyzer after optical / electrical conversion by the high-bandwidth photodetector, so as to obtain parameter information of S parameters; then, proceed to step B6; Step B4: Perform an optical eye diagram test: The HOST device generates a corresponding test pattern and directly flows it into the input port of the tested linear Driver optical port EVB. The optical signal output by the linear Driver optical port EVB is input into the optical sampling oscilloscope to obtain parameter information of the optical eye diagram. Step B5: Perform S parameter test: the output port of the vector network analyzer is connected to the input port of the linear driver optical port EVB, and the optical signal output by the linear driver optical port EVB is connected to the input end of the vector network analyzer after optical / electrical conversion by a high-bandwidth photodetector, so as to obtain parameter information of S parameters; Step B6: Compare the test results of step B2 and step B3 and the test results of step B4 and step B5 to evaluate the optical port output performance of the Driver under different degrees of link loss.

[0015] In order to better implement the present invention, further, testing the electrical port output performance of the linear TIA includes the following steps: Step C1: when link attenuation is introduced and a calibrated finished LPO optical module is used as the optical signal source, proceed to step C2; when link attenuation is introduced and a linear Driver optical port EVB is used as the optical signal source, proceed to step C3; when link attenuation is not introduced and a linear Driver optical port EVB is used as the optical signal source, proceed to step C4; Step C2: Conduct electrical eye diagram test, bit error rate and receiving sensitivity: The HOST device generates the corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB, and then inserts the calibrated finished LPO optical module into the loss-adjustable MCB. The optical signal source output by the calibrated finished LPO optical module flows into the tested linear TIA electrical port EVB after passing through the adjustable optical attenuator, and then the bit error rate and receiving sensitivity of the output electrical signal of the linear TIA electrical port EVB are tested with a bit error tester / the electrical sampling oscilloscope is used to test the electrical eye diagram related indicators of the output electrical signal of the linear TIA electrical port EVB; Conduct electrical / optical + optical / electrical joint test of S parameters: connect the output port of the vector network analyzer to the input port of the adjustable loss MCB, then insert the calibrated finished LPO optical module into the adjustable loss MCB, the optical signal source output by the calibrated finished LPO optical module flows into the tested linear TIA electrical port EVB after passing through the adjustable optical attenuator, and the output port of the linear TIA electrical port EVB is connected to the input port of the vector network analyzer, so as to obtain parameter information of S parameters; then, enter step C5; When there is no calibrated LPO optical module as the light source, the linear driver optical port evaluation board (linear driver optical port EVB) can be selected as the light source to quickly evaluate and test the linear TIA performance; Step C3: Conducting electrical eye diagram test, bit error rate and receiving sensitivity test: The HOST device generates the corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB, and then flows into the input port of the linear Driver optical port EVB through the HCB. The optical signal source output by the linear Driver optical port EVB flows into the tested linear TIA electrical port EVB after passing through the adjustable optical attenuator, and then the bit error rate and receiving sensitivity of the output electrical signal of the linear TIA electrical port EVB are tested with a bit error tester / the electrical sampling oscilloscope is used to test the electrical eye diagram related indicators of the output electrical signal of the linear TIA electrical port EVB; Conduct electrical / optical + optical / electrical joint test of S parameters: connect the output port of the vector network analyzer to the input port of the loss-adjustable MCB, and then flow into the input port of the linear Driver optical port EVB through the HCB; the optical signal source output by the linear Driver optical port EVB flows into the tested linear TIA electrical port EVB through the adjustable optical attenuator; the output port of the linear TIA electrical port EVB is connected to the input port of the vector network analyzer, thereby obtaining parameter information on S parameters; then, enter step C5; Step C4: When performing the electrical eye diagram test, bit error rate and receiving sensitivity test, the HOST device generates a corresponding test pattern that directly flows into the input port of the linear Driver optical port EVB, and the optical signal source output by the linear Driver optical port EVB flows into the tested linear TIA electrical port EVB after passing through the adjustable optical attenuator, and then the bit error rate and receiving sensitivity of the output electrical signal of the linear TIA electrical port EVB are tested by a bit error tester / the electrical sampling oscilloscope is used to test the electrical eye diagram related indicators of the output electrical signal of the linear TIA electrical port EVB; Conduct electrical / optical + optical / electrical joint test of S parameters: connect the output port of the vector network analyzer to the input port of the linear Driver optical port EVB. The optical signal source output by the linear Driver optical port EVB flows into the tested linear TIA electrical port EVB after passing through the adjustable optical attenuator. The output port of the linear TIA electrical port EVB is connected to the input port of the vector network analyzer, thereby obtaining parameter information on S parameters. Step C5: Based on the test results of steps C2 to C4, the electrical port output performance of the TIA under different degrees of link loss is evaluated.

[0016] In order to better realize the present invention, further, when testing the performance of the transmitting end of the semi-finished / finished LPO optical module, the HOST device generates a corresponding test code pattern and simulates the actual link attenuation through the front-end loss-adjustable MCB, and then connects the transmitting unit of the LPO optical module to be tested. The optical signal output by the transmitting unit of the LPO optical module to be tested is input into an optical sampling oscilloscope for testing to obtain the ER, OMA, average optical power and TDECQ of the optical signal.

[0017] In order to better realize the present invention, further, when testing the performance of the transmitting end of the semi-finished / finished LPO optical module, if the electrical / optical + optical / electrical joint test S parameters are performed, the output port of the vector network analyzer is connected to the input port of the loss-adjustable MCB at the front end, and connected to the transmitting unit of the LPO optical module to be tested through the loss-adjustable MCB at the front end. The optical signal output by the transmitting unit of the LPO optical module to be tested is output to the input port of the vector network analyzer after optical / electrical conversion by the high-bandwidth photodetector.

[0018] In order to better realize the present invention, further, when testing the performance of the receiving end of the semi-finished / finished LPO optical module, the HOST device generates a corresponding test code pattern and accesses the LPO optical module sending unit to be tested through the front-end loss-adjustable MCB, and generates an optical signal that meets the test requirements through the LPO optical module sending unit to be tested. The optical signal output by the LPO optical module sending unit to be tested passes through an adjustable optical attenuator and is input into the LPO optical module receiving unit to be tested. The LPO optical module receiving unit to be tested simulates the actual link attenuation through the rear-end loss-adjustable MCB and then is connected to an electrical sampling oscilloscope / bit error tester to perform electrical eye diagram / bit error rate and receiving sensitivity related tests on the LPO optical module receiving unit to be tested.

[0019] The beneficial effects of the present invention are as follows: The present invention can simulate the link loss of actual application scenarios for performance testing of linear Driver and TIA chips and semi-finished / finished LPO optical modules in the R&D stage. The present invention uses a loss-adjustable MCB component to simulate the port loss characteristics of different main devices, and at the same time cooperates with other test components to quickly and flexibly build a variety of test environments to test the performance of the Driver, TIA or optical module in the optical module chipset as close to the actual use scenario as possible. The present invention realizes that the key electrical chips such as Driver, TIA and LPO optical modules are developed from the beginning, close to the final use scenario, and perform performance testing in different degrees of electrical link loss environments, so as to discover the shortcomings of product performance as early as possible, correct the design in time, and shorten the R&D cycle of chips and optical modules.

[0020] The present invention enables R&D enterprises of key electrical chips such as Driver and TIA to conduct performance evaluation of the chips in a timely and rapid manner after the chips are taped out, close to the final use scenario, and screen out chip versions that meet the requirements. The present invention enables optical module R&D enterprises to conduct performance evaluation of the Driver and TIA samples sent by many chip enterprises quickly close to the actual use scenario and select chip solutions that meet the design requirements when evaluating the early stage of optical module R&D schemes, without having to make a complete optical module out of the Driver and TIA samples sent by many chip enterprises. During the optical module R&D period, the finished and semi-finished LPO optical module R&D samples can also be tested for performance close to the actual use scenario, which has good practicality. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is the test schematic diagram of CEI-112G-VSR-PAM4 in OIF-CEI-05.2; Figure 2 It is a structural schematic diagram of an electric chip test module; Figure 3 This is a schematic diagram of the structure of the LPO optical module test module.

[0022] Among them: 1-HOST equipment, 2-loss adjustable MCB, 3-HCB, 4-calibrated finished LPO optical module, 5-linear Driver optical port EVB, 6-linear Driver electrical port EVB, 7-electrical sampling oscilloscope, 8-bit error tester, 9-linear TIA electrical port EVB, 10-vector network analyzer, 11-high bandwidth photodetector, 12-optical sampling oscilloscope, 13-adjustable optical attenuator, 14-receiving unit of LPO optical module to be tested, 15-transmitting unit of LPO optical module to be tested. DETAILED DESCRIPTION

[0023] Embodiment 1: A performance test system for optical modules and their internal chips. When testing key electrical chips such as linear drivers and TIAs in the R&D stage, Figure 2 As shown, the constructed test platform includes HOST equipment 1, loss adjustable MCB 2, HCB 3, calibrated finished LPO optical module 4, linear Driver optical port EVB 5, linear Driver electrical port EVB 6, electrical sampling oscilloscope 7, bit error tester 8, linear TIA electrical port EVB 9, vector network analyzer 10, high bandwidth photodetector 11, optical sampling oscilloscope 12, and adjustable optical attenuator 13.

[0024] HOST device 1 uses AWG (Arbitrary Waveform Generator) as the main device to generate corresponding test patterns (such as PRBS13Q, PRBS31Q, SSPRQ, etc.).

[0025] The optical module connector that matches the module package (QSFP, OSFP, etc.) is placed on the MCB, and the loss-adjustable MCB2 also comes with an RF coaxial connector.

[0026] HCB3 can be directly inserted into the connector socket on the MCB, and also comes with an RF coaxial connector to meet the relevant requirements of the protocol and facilitate access to the test system.

[0027] The calibrated finished LPO optical module 4 is a calibrated finished LPO optical module 4, and its packaging form matches the connector female socket on the loss adjustable MCB 2.

[0028] Linear Driver optical port EVB5 / Linear Driver electrical port EVB6 is the optical port / electrical port EVB (Evaluation Board) of the linear Driver. The difference is that in addition to the linear Driver, the optical port EVB is also equipped with major components such as lasers and modulators. The electrical signal is input into the Driver through the RF coaxial connector, and the output signal of the Driver acts on the laser and modulator, and finally the electrical signal is output in the form of light; while the electrical port EVB does not introduce lasers and modulators. The electrical signal is input into the Driver through the RF coaxial connector, and is directly output to the RF coaxial connector after being amplified by the Driver.

[0029] The linear TIA electrical port EVB9 contains a PD (PhotoDiode) for photoelectric conversion. The optical signal is converted into an electrical signal by the PD. The TIA amplifies the electrical signal and outputs it through the RF coaxial connector. The test instruments and equipment used in the test platform include an electrical sampling oscilloscope 7, a bit error tester 8, a vector network analyzer 10, a high-bandwidth photodetector 11, an optical sampling oscilloscope 12, and an adjustable optical attenuator 13.

[0030] Embodiment 2: A method for testing the performance of an optical module and its internal chips is provided, and the system in Example 1 is used to perform performance testing of chips such as a linear driver and a TIA.

[0031] When testing the electrical output performance of a linear driver, it is mainly divided into two parts: electrical eye diagram test and S parameter test. The electrical eye diagram test can obtain the electrical eye diagram amplitude, average power, TDECQ (Transmitter Dispersion and Eye Closure Quaternary, transmitter dispersion eye closure cost) and other parameter information of the component under test, and the S parameter test mainly obtains the S11, S21, S22 and S21 Group Delay and other parameter information of the component under test.

[0032] When testing the linear driver electrical port EVB6 under test, the entire test system is divided into two situations: whether to introduce link attenuation or not. Situation 1 is to introduce link attenuation: when performing an electrical eye diagram test (signal flow direction: 1->2->3->6->7), the HOST device 1 generates the corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB2, and then flows into the input port of the linear driver electrical port EVB6 under test through HCB3, and the electrical signal output by the linear driver electrical port EVB6 is input into the electrical sampling oscilloscope 7, thereby obtaining parameter information on the electrical eye diagram; at this time, if the linear driver electrical port EVB6 is tested for S parameters (signal flow direction: 10->2->3->6->10), the output port of the vector network analyzer 10 is connected to the input port (point A) of the loss-adjustable MCB2, and then flows into the input port of the linear driver electrical port EVB6 under test through HCB3, and the electrical signal output by the linear driver electrical port EVB6 is connected to the input port of the vector network analyzer 10, thereby obtaining parameter information on the S parameters.

[0033] Case 2 is that link attenuation is not introduced: when the electrical eye diagram test is performed (signal flow direction is: 1->6->7), the HOST device 1 generates the corresponding test pattern and directly flows into the input port of the tested linear driver electrical port EVB6, and the electrical signal output by the linear driver electrical port EVB6 is input into the electrical sampling oscilloscope 7, thereby obtaining parameter information about the electrical eye diagram; at this time, if the linear driver electrical port EVB6 is tested for S parameters (signal flow direction is: 10->6->10), the output port of the vector network analyzer 10 is connected to the input port (point B) of the linear driver electrical port EVB6, and the electrical signal output by the linear driver electrical port EVB6 is connected to the input end of the vector network analyzer 10, thereby obtaining parameter information about the S parameters. Compared with Case 1, the loss-adjustable MCB2 and HCB3 in Case 1 are removed in Case 2, avoiding the introduction of the optical module connector itself and the link attenuation into the test, thereby comparing the two test results to evaluate the electrical port output performance of the driver under different degrees of link loss.

[0034] When testing the optical port output performance of the linear driver, it is mainly divided into two parts: optical eye diagram test and S parameter test. The optical eye diagram test can obtain the signal's ER (Extinction Ratio, extinction ratio), OMA (Optical Modulation Amplitude, optical modulation amplitude), average optical power, TDECQ (Transmitter Dispersion and Eye Closure Quaternary, transmitter dispersion eye closure cost) and other parameter information, and the S parameter test mainly obtains the S11, S21, S22 and S21 Group Delay and other parameter information of the tested component.

[0035] When testing the linear Driver optical port EVB5 under test, the entire test system is also divided into two situations: whether link attenuation is introduced or not. Case 1 is the introduction of link attenuation: when performing an optical eye diagram test (the signal flow direction is: 1->2->3->5->12), the HOST device 1 generates a corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB2, and then inputs the optical signal of the linear Driver optical port EVB5 to be tested through HCB3, and the optical signal output by the linear Driver optical port EVB5 is input into the optical sampling oscilloscope 12, so as to obtain parameter information of the optical eye diagram; at this time, if the S parameter test is performed on the linear Driver optical port EVB5 (the signal flow direction is: 10->2->3->5->11->10), the output port of the vector network analyzer 10 is connected to the input port (point A) of the loss-adjustable MCB2, and then flows into the input port of the linear Driver optical port EVB5 to be tested through HCB3, and the optical signal output by the linear Driver optical port EVB5 is connected to the input end of the vector network analyzer 10 after the optical / electrical conversion of the high-bandwidth photodetector 11, so as to obtain parameter information of the S parameter.

[0036] Case 2 is that link attenuation is not introduced: when performing an optical eye diagram test (signal flow direction: 1->5->12), the HOST device 1 generates a corresponding test pattern that directly flows into the input port of the linear driver optical port EVB5 under test, and the optical signal output by the linear driver optical port EVB5 is input into the optical sampling oscilloscope 12, thereby obtaining parameter information about the optical eye diagram; at this time, if the linear driver optical port EVB5 is tested for S parameters (signal flow direction: 10->5->11->10), the output port of the vector network analyzer 10 is connected to the input port (point B) of the linear driver optical port EVB5, and the optical signal output by the linear driver optical port EVB5 is connected to the input end of the vector network analyzer 10 after optical / electrical conversion by the high-bandwidth photodetector 11, thereby obtaining parameter information about S parameters. Compared with Case 1, the loss-adjustable MCB2 and HCB3 in Case 1 are removed in Case 2, thereby avoiding the introduction of the optical module connector itself and link attenuation into the test, and thus comparing the two test results to evaluate the optical port output performance of the driver under different degrees of link loss.

[0037] When testing the electrical output performance of a linear TIA, it is mainly divided into three parts: electrical eye diagram test, S parameter test, bit error rate and receiving sensitivity test. The electrical eye diagram test can obtain the electrical eye diagram amplitude, average power, TDECQ (Transmitter Dispersion and Eye Closure Quaternary, transmitter dispersion eye closure cost) and other parameter information of the tested component. The S parameter test mainly obtains the S11, S21, S22 and S21 Group Delay and other parameter information of the tested component. The bit error rate and receiving sensitivity test mainly evaluates the bit error of the side component at different optical power inputs and the minimum optical power input required under a certain bit error rate.

[0038] When testing the linear TIA electrical port EVB9 under test, there are three situations for the signal flow of the entire test system. Situation 1 is to introduce link attenuation and use the calibrated finished LPO optical module 4 as the optical signal source: when performing electrical eye diagram tests, bit error rate and receiving sensitivity (signal flow is: 1->2->4->13->9->8 / 7), the HOST device 1 generates the corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB2, and then inserts the calibrated finished LPO optical module 4 (a calibrated LPO optical module) into the loss-adjustable MCB2, and the optical signal source output by the calibrated finished LPO optical module 4 flows into the linear TIA electrical port EVB9 under test after passing through the adjustable optical attenuator 13, and then the bit error rate and receiving sensitivity of the output electrical signal of the linear TIA electrical port EVB9 are tested using the bit error tester 8 / electrical sampling oscilloscope 7. The electrical signal output by B9 is tested for related indicators of the electrical eye diagram; at this time, if the linear TIA electrical port EVB9 is tested for electrical / optical + optical / electrical joint S parameters (signal flow direction: 10->2->4->13->9->10), the output port of the vector network analyzer 10 is connected to the input port of the adjustable loss MCB2 (i.e., point A), and then the calibrated finished LPO optical module 4 is inserted into the adjustable loss MCB2, and the optical signal source output by the calibrated finished LPO optical module 4 flows into the tested linear TIA electrical port EVB9 after passing through the adjustable optical attenuator 13 (at this time, the attenuation of the adjustable optical attenuator 13 is generally set to 0dB), and the output port of the linear TIA electrical port EVB9 is connected to the input port of the vector network analyzer 10, so as to obtain parameter information on S parameters. When there is no calibrated LPO optical module as the light source, the optical port evaluation board of the linear driver (linear driver optical port EVB5) can be selected as the light source to quickly evaluate and test the performance of the linear TIA.

[0039] Case 2 is to introduce link attenuation and use the linear Driver optical port EVB5 as the optical signal source: when conducting electrical eye diagram tests, bit error rate and receiving sensitivity (signal flow direction is: 1->2->3->5->13->9->8 / 7), HOST device 1 generates the corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB2, and then flows into the input port of the linear Driver optical port EVB5 through HCB3, and the optical signal source output by the linear Driver optical port EVB5 flows into the tested linear TIA electrical port EVB9 after passing through the adjustable optical attenuator 13, and then the bit error rate and receiving sensitivity of the electrical signal output by the linear TIA electrical port EVB9 are tested using a bit error tester 8 and an electrical sampling oscilloscope 7. The electrical eye diagram related index test is performed; at this time, if the linear TIA electrical port EVB9 is subjected to electrical / optical + optical / electrical joint test S parameters (the signal flow direction is: 10->2->3->5->13->9->10), the output port of the vector network analyzer 10 is connected to the input port of the loss adjustable MCB2 (i.e. point A), and then flows into the input port of the linear Driver optical port EVB5 through HCB3, and the optical signal source output by the linear Driver optical port EVB5 flows into the tested linear TIA electrical port EVB9 after passing through the adjustable optical attenuator 13 (at this time, the attenuation of the adjustable optical attenuator 13 is generally set to 0dB), and the output port of the linear TIA electrical port EVB9 is connected to the input port of the vector network analyzer 10, so as to obtain parameter information on the S parameters.

[0040] Case 3 is that link attenuation is not introduced and the linear Driver optical port EVB5 is used as the optical signal source: when the electrical eye diagram test, bit error rate and receiving sensitivity are performed (the signal flow direction is: 1->5->13->9->8 / 7), the HOST device 1 generates the corresponding test pattern and directly flows into the input port of the linear Driver optical port EVB5, and the optical signal source output by the linear Driver optical port EVB5 flows into the tested linear TIA electrical port EVB9 after passing through the adjustable optical attenuator 13, and then the bit error rate and receiving sensitivity of the electrical signal output by the linear TIA electrical port EVB9 are tested with the bit error tester 8 and the electrical sampling oscilloscope 7 is used to test the electrical signal output by the linear TIA electrical port EVB9. The electrical eye diagram related index test is performed; at this time, if the linear TIA electrical port EVB9 is subjected to electrical / optical + optical / electrical joint test S parameters (signal flow direction is: 10->5->13->9->10), the output port of the vector network analyzer 10 is connected to the input port of the linear Driver optical port EVB5 (i.e., point B), and the optical signal source output by the linear Driver optical port EVB5 flows into the tested linear TIA electrical port EVB9 after passing through the adjustable optical attenuator 13 (the attenuation of the adjustable optical attenuator 13 is generally set to 0dB at this time), and the output port of the linear TIA electrical port EVB9 is connected to the input port of the vector network analyzer 10, thereby obtaining parameter information on S parameters. Compared with case 1 / 2, case 3 removes the loss-adjustable MCB2 and HCB3 in case 1 / 2, thereby avoiding the introduction of the optical module connector itself and the link attenuation into the test, and thus comparing the two test results to evaluate the electrical port output performance of the TIA under different degrees of link loss.

[0041] Embodiment 3: A performance test system for an optical module and its internal chip, when testing semi-finished / finished LPO optical modules, such as Figure 3 As shown, the constructed test platform includes a HOST device 1, a loss-adjustable MCB2, a LPO optical module transmitting unit 15 to be tested, an adjustable optical attenuator 13, a LPO optical module receiving unit 14 to be tested and a loss-adjustable MCB2, a vector network analyzer 10, a high-bandwidth photodetector 11, an optical sampling oscilloscope 12, and an adjustable optical attenuator 13.

[0042] The main functions and devices included in the LPO optical module sending unit 15 to be tested and the LPO optical module receiving unit 14 to be tested are as follows: the LPO optical module sending unit 15 to be tested is the transmitting end (TX) responsible for converting the received electrical signal into an optical signal, which is mainly accomplished by the cooperation of the linear Driver, the laser and the modulator; the LPO optical module receiving unit 14 to be tested is the receiving end (RX) responsible for converting the received optical signal into an electrical signal, which is mainly accomplished by the cooperation of the linear TIA and the PD.

[0043] Embodiment 4: A method for testing the performance of an optical module and its internal chip is provided, and the system in Example 3 is used to perform performance testing of a semi-finished / finished LPO optical module.

[0044] When testing the performance of the LPO optical module sending unit 15 to be tested (the signal flow direction is: 1->2->15->12), the HOST device 1 generates a corresponding test pattern and simulates the actual link attenuation through the front-end loss adjustable MCB2 to connect to the LPO optical module sending unit 15 to be tested. The optical signal output by the LPO optical module sending unit 15 to be tested is input into the optical sampling oscilloscope 12 to test and obtain the ER, OMA, average optical power, TDECQ, etc. of the optical signal; similarly, when it is necessary to perform electrical / optical + optical / electrical joint test S parameters (the signal flow direction is: 10->2->15->11->10), the output port of the vector network analyzer 10 is connected to the input port (point C) of the front-end loss adjustable MCB2, and connected to the LPO optical module sending unit 15 to be tested through the front-end loss adjustable MCB2. The optical signal output by the LPO optical module sending unit 15 to be tested is output to the input port of the vector network analyzer 10 after optical / electrical conversion by the high-bandwidth photodetector 11.

[0045] When testing the performance of the LPO optical module receiving unit 14 to be tested (the signal flow direction is: 1->2->15->13->14->2->7 / 8), the HOST device 1 also generates a corresponding test pattern and connects to the LPO optical module sending unit 15 to be tested through the front-end loss-adjustable MCB2, and generates an optical signal that meets the test requirements through the LPO optical module sending unit 15 to be tested. The optical signal output by the LPO optical module sending unit 15 to be tested is input into the LPO optical module receiving unit 14 to be tested after passing through the adjustable optical attenuator 13. The LPO optical module receiving unit 14 to be tested simulates the actual link attenuation through the rear-end loss-adjustable MCB2 and is connected to the electrical sampling oscilloscope 7 / bit error tester 8, and the electrical eye diagram / bit error rate and receiving sensitivity related tests are performed on the LPO optical module receiving unit 14 to be tested (the electrical eye diagram test generally sets the attenuation value of the adjustable optical attenuator 13 to 0dB).

[0046] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Any simple modification or equivalent change made to the above embodiment based on the technical essence of the present invention shall fall within the protection scope of the present invention.

Claims

1. A performance test system for an optical module and its internal chip, characterized in that: The invention comprises a HOST device (1) and a loss-adjustable MCB (2) connected in sequence from front to back, wherein the loss-adjustable MCB (2) is connected to a device to be tested, the HOST device (1) is used to generate a test pattern, and the loss-adjustable MCB (2) is used to simulate the port loss characteristics of different host devices, so as to test the electrical port output performance and optical port output performance of a linear driver, the electrical port output performance of a linear TIA, and the performance of a transmitting end and a receiving end of a semi-finished / finished LPO optical module under different degrees of electrical link loss environments.

2. The performance test system of an optical module and its internal chip according to claim 1, characterized in that: The system comprises an electrical chip test module for testing the electrical port output performance and optical port output performance of a linear driver and the electrical port output performance of a linear TIA; the electrical chip test module comprises a HOST device (1), a loss-adjustable MCB (2) and an HCB (3) arranged in sequence from front to back; the output end of the HOST device (1) is respectively connected to the loss-adjustable MCB (2), a linear driver optical port EVB (5) and a linear driver electrical port EVB (6); the linear driver optical port EVB (5) is used to amplify an electrical signal and convert it into an optical signal for output; and the linear driver electrical port EVB (6) is used to amplify an electrical signal; The output end of the adjustable-loss MCB (2) is respectively connected to the HCB (3) and the calibrated finished LPO optical module (4) through the optical module connector female socket, and the output end of the calibrated finished LPO optical module (4) is connected to the adjustable optical attenuator (13); the HCB (3) is respectively connected to the linear driver optical port EVB (5) and the linear driver electrical port EVB (6); The output end of the linear driver electrical port EVB (6) is connected to an electrical sampling oscilloscope (7) and a vector network analyzer (10) respectively; The output end of the linear driver optical port EVB (5) is respectively connected to a high-bandwidth photodetector (11), an optical sampling oscilloscope (12) and an adjustable optical attenuator (13); The adjustable optical attenuator (13) is respectively connected to an electrical sampling oscilloscope (7), a bit error tester (8) and a vector network analyzer (10) via a linear TIA electrical port EVB (9); the linear TIA electrical port EVB (9) is used to convert an optical signal into an electrical signal via a PD, and to amplify the electrical signal via the TIA.

3. The performance test system of an optical module and its internal chip according to claim 1, characterized in that: The system further comprises an LPO optical module test module for testing the performance of the transmitting end and the receiving end of the semi-finished / finished LPO optical module; the LPO optical module test module comprises a HOST device (1), a loss-adjustable MCB (2), a LPO optical module transmitting unit (15) to be tested, an adjustable optical attenuator (13), a LPO optical module receiving unit (14) to be tested and the loss-adjustable MCB (2) arranged in sequence from front to back, the LPO optical module transmitting unit (15) to be tested being used to convert an electrical signal into an optical signal; the LPO optical module receiving unit (14) to be tested being used to convert an optical signal into an electrical signal; The LPO optical module transmitting unit (15) to be tested is respectively connected to a high-bandwidth photodetector (11), an optical sampling oscilloscope (12) and an adjustable optical attenuator (13); the high-bandwidth photodetector (11) is connected to a vector network analyzer (10); and the LPO optical module receiving unit (14) to be tested is respectively connected to an electrical sampling oscilloscope (7) and a bit error tester (8) via a loss-adjustable MCB (2).

4. A performance test method for an optical module and its internal chip, based on the system according to any one of claims 1 to 3, characterized in that: When link attenuation is introduced or not, the electrical eye diagram test and S parameter test are performed on the linear driver electrical port EVB (6) and the linear driver optical port EVB (5) respectively to evaluate the output performance of the linear driver electrical port and optical port under different link losses. When link attenuation is introduced and a calibrated finished LPO optical module (4) is used as an optical signal source, when link attenuation is introduced and a linear driver optical port EVB (5) is used as an optical signal source, and when link attenuation is not introduced and a linear driver optical port EVB (5) is used as an optical signal source, an electrical eye diagram test, an S parameter test, a bit error rate test, and a receiving sensitivity test are performed on the linear TIA electrical port EVB (9) to evaluate the electrical port output performance of the TIA under different degrees of link loss; The actual link attenuation is simulated by the loss-adjustable MCB (2) and input into the LPO optical module transmitting unit (15) to be tested, so as to evaluate the performance of the transmitting end of the semi-finished / finished LPO optical module; the receiving unit (14) of the LPO optical module to be tested simulates the actual link attenuation through the rear-end loss-adjustable MCB (2) and then is connected to the electrical sampling oscilloscope (7) / bit error tester (8), so as to perform the electrical eye diagram / bit error rate and receiving sensitivity tests on the receiving unit (14) of the LPO optical module to be tested, so as to evaluate the performance of the receiving end of the semi-finished / finished LPO optical module.

5. The performance testing method of an optical module and its internal chip according to claim 4, characterized in that: Testing the electrical output performance of a linear driver includes the following steps: Step A1: If link attenuation is introduced, proceed to step A2, otherwise proceed to step A4; Step A2: Conducting an electrical eye diagram test: The HOST device (1) generates a corresponding test pattern and simulates actual link attenuation through the loss-adjustable MCB (2), and then flows into the input port of the tested linear driver electrical port EVB (6) through the HCB (3). The electrical signal output by the linear driver electrical port EVB (6) is input into the electrical sampling oscilloscope (7), thereby obtaining parameter information on the electrical eye diagram; Step A3: Perform S parameter test: the output port of the vector network analyzer (10) is connected to the input port of the loss adjustable MCB (2), and then flows into the input port of the linear driver electrical port EVB (6) under test through the HCB (3). The electrical signal output by the linear driver electrical port EVB (6) is connected to the input port of the vector network analyzer (10), thereby obtaining parameter information on S parameters; then, proceed to step A6; Step A4: Conducting an electrical eye diagram test: The HOST device (1) generates a corresponding test pattern which directly flows into the input port of the tested linear driver electrical port EVB (6), and the electrical signal output by the linear driver electrical port EVB (6) is input into the electrical sampling oscilloscope (7), thereby obtaining parameter information of the electrical eye diagram; Step A5: Performing an S parameter test: the output port of the vector network analyzer (10) is connected to the input port of the linear driver electrical port EVB (6), and the electrical signal output by the linear driver electrical port EVB (6) is connected to the input end of the vector network analyzer (10), thereby obtaining parameter information on the S parameters; Step A6: Compare the test results of step A2 and step A3 and the test results of step A4 and step A5 to evaluate the electrical port output performance of the driver under different degrees of link loss.

6. The performance testing method of an optical module and its internal chip according to claim 4, characterized in that: Testing the optical output performance of a linear driver includes the following steps: Step B1: If link attenuation is introduced, proceed to step B2, otherwise proceed to step B4; Step B2: Perform an optical eye diagram test: the HOST device (1) generates a corresponding test pattern and simulates actual link attenuation through the loss-adjustable MCB (2), and then inputs the optical signal into the tested linear driver optical port EVB (5) through the HCB (3). The optical signal output by the linear driver optical port EVB (5) is input into the optical sampling oscilloscope (12), thereby obtaining parameter information on the optical eye diagram; Step B3: Perform S parameter test: the output port of the vector network analyzer (10) is connected to the input port of the loss adjustable MCB (2), and then flows into the input port of the linear driver optical port EVB (5) to be tested through the HCB (3). The optical signal output by the linear driver optical port EVB (5) is connected to the input end of the vector network analyzer (10) after optical / electrical conversion by the high-bandwidth photodetector (11), so as to obtain parameter information of S parameters; then, enter step B6; Step B4: Perform an optical eye diagram test: the HOST device (1) generates a corresponding test pattern and directly flows it into the input port of the linear driver optical port EVB (5) under test, and the optical signal output by the linear driver optical port EVB (5) is input into the optical sampling oscilloscope (12), thereby obtaining parameter information of the optical eye diagram; Step B5: Performing an S parameter test: the output port of the vector network analyzer (10) is connected to the input port of the linear driver optical port EVB (5); the optical signal output by the linear driver optical port EVB (5) is connected to the input end of the vector network analyzer (10) after optical / electrical conversion by a high-bandwidth photodetector (11), thereby obtaining parameter information on S parameters; Step B6: Compare the test results of step B2 and step B3 and the test results of step B4 and step B5 to evaluate the optical port output performance of the Driver under different degrees of link loss.

7. The performance testing method of an optical module and its internal chip according to claim 4, characterized in that: Testing the electrical output performance of a linear TIA includes the following steps: Step C1: when link attenuation is introduced and a calibrated finished LPO optical module (4) is used as an optical signal source, proceed to step C2; when link attenuation is introduced and a linear driver optical port EVB (5) is used as an optical signal source, proceed to step C3; when link attenuation is not introduced and a linear driver optical port EVB (5) is used as an optical signal source, proceed to step C4; Step C2: Conducting electrical eye diagram test, bit error rate and receiving sensitivity test: the HOST device (1) generates a corresponding test pattern and simulates the actual link attenuation through the loss adjustable MCB (2), then inserts the calibrated finished LPO optical module (4) into the loss adjustable MCB (2), and the optical signal source output by the calibrated finished LPO optical module (4) flows into the tested linear TIA electrical port EVB (9) through the adjustable optical attenuator (13), and then uses the bit error tester (8) to test the bit error rate and receiving sensitivity of the electrical signal output by the linear TIA electrical port EVB (9) / the electrical sampling oscilloscope (7) to test the electrical eye diagram related indicators of the electrical signal output by the linear TIA electrical port EVB (9); Conducting electrical / optical + optical / electrical combined test of S parameters: connecting the output port of the vector network analyzer (10) to the input port of the loss adjustable MCB (2), then inserting the calibrated finished LPO optical module (4) into the loss adjustable MCB (2), the optical signal source output by the calibrated finished LPO optical module (4) flows into the tested linear TIA electrical port EVB (9) after passing through the adjustable optical attenuator (13), and the output port of the linear TIA electrical port EVB (9) is connected to the input port of the vector network analyzer (10), thereby obtaining parameter information on S parameters; then, entering step C5; When there is no calibrated LPO optical module as the light source, the linear driver optical port evaluation board (Linear Driver Optical Port EVB (5)) can be selected as the light source to quickly evaluate and test the linear TIA performance; Step C3: Conducting electrical eye diagram test, bit error rate and receiving sensitivity test: the HOST device (1) generates a corresponding test pattern and simulates the actual link attenuation through the loss-adjustable MCB (2), and then flows into the input port of the linear driver optical port EVB (5) through the HCB (3). The optical signal source output by the linear driver optical port EVB (5) flows into the tested linear TIA electrical port EVB (9) after passing through the adjustable optical attenuator (13). Then, the bit error rate and receiving sensitivity of the output electrical signal of the linear TIA electrical port EVB (9) are tested by the bit error tester (8) / the electrical sampling oscilloscope (7) is used to test the electrical eye diagram related indicators of the output electrical signal of the linear TIA electrical port EVB (9); Conducting electrical / optical + optical / electrical combined test of S parameters: connecting the output port of the vector network analyzer (10) to the input port of the loss-adjustable MCB (2), and then flowing into the input port of the linear driver optical port EVB (5) through the HCB (3); the optical signal source output by the linear driver optical port EVB (5) flows into the linear TIA electrical port EVB (9) under test after passing through the adjustable optical attenuator (13); the output port of the linear TIA electrical port EVB (9) is connected to the input port of the vector network analyzer (10), thereby obtaining parameter information on S parameters; then, entering step C5; Step C4: When performing the electrical eye diagram test, bit error rate and receiving sensitivity test, the HOST device (1) generates a corresponding test pattern and directly flows into the input port of the linear driver optical port EVB (5), and the optical signal source output by the linear driver optical port EVB (5) flows into the tested linear TIA electrical port EVB (9) after passing through the adjustable optical attenuator (13), and then the bit error rate and receiving sensitivity of the electrical signal output by the linear TIA electrical port EVB (9) are tested by the bit error tester (8) / the electrical sampling oscilloscope (7) is used to test the electrical eye diagram related indicators of the electrical signal output by the linear TIA electrical port EVB (9); Conducting electrical / optical + optical / electrical combined test of S parameters: connecting the output port of the vector network analyzer (10) to the input port of the linear driver optical port EVB (5); the optical signal source output by the linear driver optical port EVB (5) flows into the linear TIA electrical port EVB (9) under test after passing through the adjustable optical attenuator (13); the output port of the linear TIA electrical port EVB (9) is connected to the input port of the vector network analyzer (10), thereby obtaining parameter information on S parameters; Step C5: Based on the test results of steps C2 to C4, the electrical port output performance of the TIA under different degrees of link loss is evaluated.

8. The performance testing method of an optical module and its internal chip according to claim 4, characterized in that: When testing the performance of the transmitting end of a semi-finished / finished LPO optical module, a HOST device (1) generates a corresponding test pattern and simulates actual link attenuation through a front-end loss-adjustable MCB (2), and then connects to a transmitting unit (15) of the LPO optical module to be tested. The optical signal output by the transmitting unit (15) of the LPO optical module to be tested is input into an optical sampling oscilloscope (12) for testing to obtain ER, OMA, average optical power and TDECQ of the optical signal.

9. The method for testing the performance of an optical module and its internal chip according to claim 8, characterized in that: When testing the performance of the transmitting end of a semi-finished / finished LPO optical module, if an electrical / optical + optical / electrical combined test S parameter is performed, the output port of the vector network analyzer (10) is connected to the input port of the front-end loss adjustable MCB (2), and connected to the LPO optical module transmitting unit (15) to be tested via the front-end loss adjustable MCB (2). The optical signal output by the LPO optical module transmitting unit (15) to be tested is output to the input port of the vector network analyzer (10) after optical / electrical conversion by the high-bandwidth photodetector (11).

10. The performance testing method of an optical module and its internal chip according to claim 4, characterized in that: When testing the performance of the receiving end of a semi-finished / finished LPO optical module, a HOST device (1) generates a corresponding test pattern and connects to a transmitting unit (15) of the LPO optical module to be tested through a front-end loss-adjustable MCB (2). An optical signal that meets the test requirements is generated by the transmitting unit (15) of the LPO optical module to be tested. The optical signal output by the transmitting unit (15) of the LPO optical module to be tested passes through an adjustable optical attenuator (13) and is then input to a receiving unit (14) of the LPO optical module to be tested. The receiving unit (14) of the LPO optical module to be tested simulates actual link attenuation through a rear-end loss-adjustable MCB (2) and is then connected to an electrical sampling oscilloscope (7) / bit error tester (8). The receiving unit (14) of the LPO optical module to be tested is subjected to electrical eye diagram / bit error rate and receiving sensitivity related tests.

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