Mainboard function test processing method and device

Abstract

The invention provides a mainboard function test processing method and device. The method comprises the following steps: acquiring an address dictionary table corresponding to a mainboard to be tested; the address dictionary table comprises a plurality of hierarchies, and register address information corresponding to the to-be-tested mainboard is stored in the hierarchies respectively; searching register address information of a test part corresponding to the mainboard to be tested according to the register address information corresponding to the mainboard to be tested and stored in multiple levels in the address dictionary table, and generating a corresponding function test instruction according to the register address information of the test part; and under the condition that the mainboard function test trigger instruction is detected, executing the function test instruction to perform test processing on a target function of the test component to obtain a test result corresponding to the target function. According to the method provided by the invention, the processing efficiency of the function test of the mainboard can be effectively improved, so that the time of the function test of the mainboard is saved.

Description

Technical Field

[0001] The present invention relates to the field of computer application technology, and in particular to a method and device for processing a motherboard function test, and also to an electronic device, a non-transitory computer-readable storage medium, and a computer program product. Background Art

[0002] With the rapid development of computer technology, computer equipment such as servers are increasingly used in various fields, and their management and maintenance are becoming more and more important. Baseboard Management Controller (BMC) is a special controller used to monitor and manage computer equipment such as servers. It is responsible for monitoring and managing the status and fault alarm of the motherboard of computer equipment such as servers. Integrated Circuit Bus (I2C) is a line used for short-distance, low-speed data transmission between integrated circuits. It consists of two signal lines, namely, a serial data line and a serial clock line. It has the characteristics of simplicity, flexibility, and support for multiple devices. The integrated circuit bus is widely used on various boards on servers and other equipment. It is the basic line on computer equipment such as servers. The functional test for computer equipment such as servers in the prior art is usually an integrated test. It is necessary to integrate the various test components on the motherboard and the baseboard management controller through the integrated circuit bus before the functional test can be performed, resulting in poor efficiency of the actual functional test. Therefore, how to design a more efficient motherboard functional test processing solution has become a technical problem that needs to be solved urgently. Summary of the invention

[0003] The present invention provides a mainboard function test processing method, which is used to solve the defect that the mainboard function test processing scheme in the prior art has high limitations, resulting in poor function test processing efficiency.

[0004] The present invention provides a mainboard function test processing method, comprising: Acquire an address dictionary table corresponding to the motherboard to be tested; wherein the address dictionary table includes multiple levels, and the multiple levels respectively store register address information corresponding to the motherboard to be tested; Find the register address information of the test component corresponding to the host board to be tested according to the register address information corresponding to the host board to be tested stored in the multiple levels in the address dictionary table, and generate a functional test instruction corresponding to the test component according to the register address information of the test component; In the case where a mainboard function test trigger instruction is detected, the function test instruction is executed to perform a test process on a target function of the test component to obtain a test result corresponding to the target function.

[0005] According to the mainboard function test processing method provided by the present invention, before obtaining the address dictionary table corresponding to the mainboard to be tested, it also includes: Obtaining distribution information of the integrated circuit bus between the host board to be tested and its baseboard management controller; According to the distribution information of the integrated circuit bus between the motherboard to be tested and its baseboard management controller, the first level of the original address dictionary table is divided into the number of buses of the integrated circuit bus, and the bus address of each integrated circuit bus in the integrated circuit bus is determined; wherein different test components are deployed on each integrated circuit bus; The second level based on the original address dictionary table stores the register address information of each test component on the host board to be tested on the integrated circuit bus; The address dictionary table to be acquired is obtained based on the register address information of each functional configuration corresponding to the test component stored in the third level of the original address dictionary table.

[0006] According to the mainboard function test processing method provided by the present invention, when a mainboard function test trigger instruction is detected, executing the function test instruction to test the target function of the test component and obtaining a test result corresponding to the target function specifically includes: In the case of detecting a motherboard function test trigger instruction, obtaining a read test instruction in the function test instruction, and executing the read test instruction in the function test instruction to read register address information corresponding to the target function to be tested of the test component; comparing and analyzing the register address information corresponding to the target function to be tested with preset standard register address information to obtain a first comparison and analysis result; judging whether the target function to be tested is abnormally configured according to the first comparison and analysis result; In the case where it is determined that the target function to be tested has a configuration anomaly, obtaining a modification test instruction in the functional test instruction, and executing the modification test instruction in the functional test instruction, modifying the function parameters in the register address information corresponding to the target function to be tested, and obtaining new register address information corresponding to the target function to be tested of the test component; Obtain the verification test instruction in the functional test instruction, and execute the verification test instruction in the functional test instruction, compare and analyze the new register address information corresponding to the target function to be tested with the preset standard register address information to obtain a second comparison and analysis result; determine whether the modification of the target function to be tested is abnormally configured according to the second comparison and analysis result, and if not, output the test result.

[0007] According to the mainboard functional test processing method provided by the present invention, the obtaining of the read test instruction in the functional test instruction and the execution of the read test instruction in the functional test instruction to read the register address information corresponding to the target function to be tested of the test component specifically includes: obtaining the read test instruction in the functional test instruction and the execution of the read test instruction in the functional test instruction to perform a matching analysis on the third level in the address dictionary table and read the register address information corresponding to the target function to be tested of the test component stored in the third level in the address dictionary table.

[0008] According to the main board function test processing method provided by the present invention, after obtaining the second comparison and analysis result, it also includes: judging whether the new register address information corresponding to the target function to be tested recorded in the second comparison and analysis result is the same as the preset standard register address information; when the new register address information corresponding to the target function to be tested is not the same as the preset standard register address information, judging that there is a configuration abnormality in the modification of the target function to be tested, and outputting corresponding function configuration abnormality prompt information.

[0009] According to the mainboard function test processing method provided by the present invention, the register address information corresponding to the test component of the mainboard to be tested is found according to the register address information corresponding to the mainboard to be tested stored in multiple levels in the address dictionary table, specifically including: Determine the test components corresponding to the host board to be tested; Based on the test component corresponding to the host board to be tested, a matching analysis is performed at the first level in the address dictionary table to determine the bus address of the integrated circuit bus where the test component is located; According to the bus address of the integrated circuit bus where the test component is located, a matching analysis is performed at the second level in the address dictionary table to obtain the register address information corresponding to the test component.

[0010] The present invention also provides a mainboard function test processing device, comprising: An address dictionary table acquisition unit, used for acquiring an address dictionary table corresponding to the motherboard to be tested; wherein the address dictionary table includes a plurality of levels, and the plurality of levels respectively store register address information corresponding to the motherboard to be tested; An address information processing unit, configured to search for register address information of a test component corresponding to the motherboard to be tested according to register address information corresponding to the motherboard to be tested stored at multiple levels in the address dictionary table, and generate a functional test instruction corresponding to the test component according to the register address information of the test component; The functional test processing unit is used to execute the functional test instruction to test the target function of the test component and obtain the test result corresponding to the target function when the main board functional test trigger instruction is detected.

[0011] The mainboard function test processing device provided by the present invention further includes, before acquiring the address dictionary table corresponding to the mainboard to be tested: The address dictionary table building unit is specifically used for: Obtaining distribution information of the integrated circuit bus between the host board to be tested and its baseboard management controller; According to the distribution information of the integrated circuit bus between the motherboard to be tested and its baseboard management controller, the first level of the original address dictionary table is divided into the number of buses of the integrated circuit bus, and the bus address of each integrated circuit bus in the integrated circuit bus is determined; wherein different test components are deployed on each integrated circuit bus; The second level based on the original address dictionary table stores the register address information of each test component on the host board to be tested on the integrated circuit bus; The address dictionary table to be acquired is obtained based on the register address information of each functional configuration corresponding to the test component stored in the third level of the original address dictionary table.

[0012] According to the mainboard function test processing device provided by the present invention, the function test processing unit is specifically used for: In the case of detecting a motherboard function test trigger instruction, obtaining a read test instruction in the function test instruction, and executing the read test instruction in the function test instruction to read register address information corresponding to the target function to be tested of the test component; comparing and analyzing the register address information corresponding to the target function to be tested with preset standard register address information to obtain a first comparison and analysis result; judging whether the target function to be tested is abnormally configured according to the first comparison and analysis result; In the case where it is determined that the target function to be tested has a configuration anomaly, obtaining a modification test instruction in the functional test instruction, and executing the modification test instruction in the functional test instruction, modifying the function parameters in the register address information corresponding to the target function to be tested, and obtaining new register address information corresponding to the target function to be tested of the test component; Obtain the verification test instruction in the functional test instruction, and execute the verification test instruction in the functional test instruction, compare and analyze the new register address information corresponding to the target function to be tested with the preset standard register address information to obtain a second comparison and analysis result; determine whether the modification of the target function to be tested is abnormally configured according to the second comparison and analysis result, and if not, output the test result.

[0013] According to the motherboard functional test processing device provided by the present invention, the obtaining of the read test instruction in the functional test instruction and the execution of the read test instruction in the functional test instruction to read the register address information corresponding to the target function to be tested of the test component specifically includes: obtaining the read test instruction in the functional test instruction and the execution of the read test instruction in the functional test instruction to perform a matching analysis on the third level in the address dictionary table and read the register address information corresponding to the target function to be tested of the test component stored in the third level in the address dictionary table.

[0014] According to the main board function test processing device provided by the present invention, after obtaining the second comparison and analysis result, it also includes: a function configuration abnormality prompt unit, which is specifically used to: determine whether the new register address information corresponding to the target function to be tested recorded in the second comparison and analysis result is the same as the preset standard register address information; when the new register address information corresponding to the target function to be tested is not the same as the preset standard register address information, determine that there is a configuration abnormality in the modification of the target function to be tested, and output corresponding function configuration abnormality prompt information.

[0015] According to the motherboard function test processing device provided by the present invention, the address information processing unit is specifically used to: determine the test component corresponding to the motherboard to be tested; Based on the test component corresponding to the host board to be tested, a matching analysis is performed at the first level in the address dictionary table to determine the bus address of the integrated circuit bus where the test component is located; According to the bus address of the integrated circuit bus where the test component is located, a matching analysis is performed at the second level in the address dictionary table to obtain the register address information corresponding to the test component.

[0016] The present invention also provides an electronic device, comprising a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements any of the above mainboard function test processing methods when executing the program.

[0017] The present invention also provides a non-transitory computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the mainboard function test processing method as described in any one of the above items is implemented.

[0018] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the mainboard function test processing method as described in any one of the above items is implemented.

[0019] The mainboard function test processing method provided by the present invention obtains the address dictionary table corresponding to the mainboard to be tested, searches for the register address information of the test component corresponding to the mainboard to be tested according to the register address information corresponding to the mainboard to be tested stored in multiple levels in the address dictionary table, generates a function test instruction corresponding to the test component according to the register address information of the test component, and executes the function test instruction to test the target function of the test component when a mainboard function test trigger instruction is detected, and obtains the test result corresponding to the target function, which can effectively improve the processing efficiency of the mainboard function test, thereby saving the test time of the integrated test. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1 This is one of the flow charts of the mainboard function test processing method provided by the present invention.

[0022] Figure 2 It is a flow chart of a functional test processing method provided by the prior art.

[0023] Figure 3 This is the second flow chart of the mainboard function test processing method provided by the present invention.

[0024] Figure 4 This is one of the schematic diagrams of the integrated circuit bus interaction between the mainboard and the baseboard management controller provided by the present invention.

[0025] Figure 5 This is the second schematic diagram of the integrated circuit bus interaction between the mainboard and the baseboard management controller provided by the present invention.

[0026] Figure 6 It is a structural schematic diagram of the mainboard function test processing device provided by the present invention.

[0027] Figure 7 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] At present, in the prior art, when a problem occurs in the motherboard function, the motherboard function and the baseboard management controller need to be fully integrated before the function test can be performed, such as Figure 2 As shown, the efficiency is very low and requires coordination. The mainboard function test processing method described in the present invention is displayed in segments. The first stage is to read whether the corresponding register address information in the mainboard is correct, and the second stage is to read whether the corresponding address value conversion performed by the baseboard management controller after obtaining the register address information is incorrect. The scheme of the present invention can quickly locate abnormal problems. In addition, this scheme can decouple the baseboard management controller from the mainboard test, so that the mainboard function test can be performed independently before the baseboard management controller function is developed, saving the test time of the integrated test and leaving more time for the mainboard problem analysis. The following is combined with Figure 1-Figure 7 The mainboard function test processing method and device of the present invention are described, and the embodiments thereof are described in detail.

[0030] The following is a detailed description of an embodiment of the mainboard function test processing method according to the present invention. Figure 1 As shown, it is one of the flow charts of the mainboard function test processing method provided by the present invention, and the specific implementation process includes the following steps: Step 101 : Obtain an address dictionary table corresponding to the motherboard to be tested; wherein the address dictionary table includes multiple levels, and the multiple levels respectively store register address information corresponding to the motherboard to be tested.

[0031] In an embodiment of the present invention, before executing this step, it is necessary to obtain in advance the distribution information of the integrated circuit bus between the main board to be tested and its baseboard management controller, and according to the distribution information of the integrated circuit bus between the main board to be tested and its baseboard management controller, divide the first level of the original address dictionary table into the number of buses corresponding to the integrated circuit bus, and determine the bus address of each integrated circuit bus in the integrated circuit bus. Different test components are deployed on each integrated circuit bus. The register address information of each test component on the main board to be tested on the integrated circuit bus is stored based on the second level of the original address dictionary table, and the register address information of each functional configuration corresponding to the test component is stored based on the third level of the original address dictionary table, so as to construct the address dictionary table to be obtained, and store the address dictionary table to be obtained in a preset storage module. Figure 3 As shown, the address dictionary table is an address dictionary table corresponding to the integrated circuit bus between the host board to be tested and the baseboard management controller corresponding to the host board to be tested, which can be constructed based on the integrated circuit bus interaction information between the host board to be tested and the baseboard management controller corresponding to the host board to be tested. The register address information of the corresponding test component can be found according to the address dictionary table. In the process of executing this step, the address dictionary table corresponding to the host board to be tested can be obtained from the storage module, which has the advantages of strong compatibility and scalability, and can meet the subsequent expansion needs.

[0032] In the process of constructing the address dictionary table, specifically, the first level of the original address dictionary table can be divided into the number of buses corresponding to the baseboard management controller according to the bus distribution information of the baseboard management controller. For example, according to the bus distribution information of the current baseboard management controller, the original address dictionary table can be divided into 14 buses (i.e., integrated circuit buses). Different boards and test components such as equipment devices are deployed on each bus, such as host board CPLD (Complex Programmable logic device), SCP (System Control Panel) board CPLD (Complex Programmable logic device), indicator lights, various adapter cards, etc. Among them, the host board CPLD and the SCP board CPLD are processing units on different boards, and the indicator light is a heavy type of equipment device. For example, the host board CPLD is placed on bus No. 1, the SCP board CPLD is placed on bus No. 2, etc. It should be noted that each bus needs to reserve enough component addresses to facilitate subsequent expansion requirements and test component expansion. The No. 1 and No. 2 can be the bus addresses of the integrated circuit bus. The second level of the original address dictionary table is the register address information corresponding to a specific test component. The register address information corresponding to multiple test components must take into account the switching of multiple test components and the maximum number of switches to facilitate subsequent expansion. The third level of the original address dictionary table is to define a function under a specific test component. For example, to control the UID (Unit Identification) light on the server and turn on the indicator light, the function may be: turn off the indicator light and the flashing frequency; for the test component, the function may be: switch the register address information within the test component, address 1 is the fru information corresponding to the display component, and the sensor information of the component can be queried under address 2. The UID light on the server refers to the UID indicator light on the server motherboard. It should be noted that for simple functional test instructions, 3-7 bits are automatically reserved for one byte, and no additional fields are required; for more complex functional test instructions, sufficient bits need to be reserved to facilitate subsequent functional expansion and prevent the complexity from increasing after functional expansion; for functional test instructions that are strongly related to the platform, it is necessary to consider multi-platform compatibility and support shielding functions on different platforms; for customized requirements of different product lines, identification bits must also be reserved in a targeted manner to avoid confusion in subsequent maintenance.

[0033] Step 102: Find the register address information of the test component corresponding to the tested mainboard according to the register address information corresponding to the tested mainboard stored in multiple levels in the address dictionary table, and generate a functional test instruction corresponding to the test component according to the register address information of the test component.

[0034] In an embodiment of the present invention, it is necessary to determine the test component corresponding to the motherboard to be tested, and based on the test component corresponding to the motherboard to be tested, perform matching analysis at the first level in the address dictionary table to determine the bus address of the integrated circuit bus where the test component is located. Further, according to the bus address of the integrated circuit bus where the test component is located, perform matching analysis at the second level in the address dictionary table to obtain the register address information corresponding to the test component. Among them, the various types of register address information corresponding to the motherboard to be tested include the bus address of the integrated circuit bus between the motherboard to be tested and its baseboard management controller, the register address information of each test component corresponding to the integrated circuit bus, and the register address information of each function corresponding to the test component. In the process of generating a functional test instruction corresponding to the test component according to the register address information of the test component, based on the register address information of the test component, the functional test instruction corresponding to the test component can be generated by calling the i2ctransfer tool generated in the tools directory. According to the address dictionary table, the functions implemented on the motherboard are analyzed and disassembled. Corresponding test cases are designed for the different meanings expressed by each bit in the functional test instructions. The data in the read and write execution registers are read and written through the i2c tool, so as to determine whether the CPLD of the motherboard has successfully written data and whether the actual function of the motherboard meets expectations.

[0035] Step 103: When a motherboard function test trigger instruction is detected, the function test instruction is executed to test the target function of the test component to obtain a test result corresponding to the target function.

[0036] In an embodiment of the present invention, when a motherboard function test trigger instruction is detected, a read test instruction in the function test instruction is obtained, and the read test instruction in the function test instruction is executed to read the register address information corresponding to the target function to be tested of the test component. The register address information corresponding to the target function to be tested is compared and analyzed with the preset standard register address information to obtain a first comparison and analysis result. According to the first comparison and analysis result, it is judged whether the target function to be tested is abnormally configured. In the case where it is determined that the target function to be tested has a configuration abnormality, a modify test instruction in the function test instruction is obtained, and the modify test instruction in the function test instruction is executed to modify the function parameters in the register address information corresponding to the target function to be tested, and obtain the new register address information corresponding to the target function to be tested of the test component. A check test instruction in the function test instruction is obtained, and the check test instruction in the function test instruction is executed to compare and analyze the new register address information corresponding to the target function to be tested with the preset standard register address information to obtain a second comparison and analysis result; according to the second comparison and analysis result, it is judged whether the modification of the target function to be tested is abnormally configured, and if not, the test result is output. Among them, in the process of obtaining the read test instruction in the functional test instruction and executing the read test instruction in the functional test instruction to read the register address information corresponding to the target function to be tested of the test component, by obtaining the read test instruction in the functional test instruction and executing the read test instruction in the functional test instruction, a matching analysis is performed on the third level in the address dictionary table, and then the register address information corresponding to the target function to be tested of the test component stored in the third level in the address dictionary table is read. In addition, after obtaining the second comparison and analysis result, it also includes: judging whether the new register address information corresponding to the target function to be tested recorded in the second comparison and analysis result is the same as the preset standard register address information; when the new register address information corresponding to the target function to be tested is not the same as the preset standard register address information, it is judged that there is a configuration abnormality in the modification of the target function to be tested, and the corresponding function configuration abnormality prompt information is output.

[0037] The following describes a complete method for processing the motherboard function test according to the register address information corresponding to the function test instruction described in the address dictionary table. Take the baseboard management controller reading the UID LED status test as an example: construct an address dictionary table; through the address dictionary table, the register address information of the motherboard CPLD (slave address of CPLD) can be obtained as 0x10, and it is on the second bus; through the address dictionary table, the register address information of the function test instruction of the baseboard management controller to read the UID LED status can be obtained as 0x02 and the address byte length used by the function test instruction is 0x03; according to the above register address information, the UID LED status indicator can be read through the following read test instruction, and the read test instruction can be: I2ctransfer –f –y 2 w1@0x10 0x02 r3. According to the register address information in the address dictionary table, the UID LED status indicator can be modified through the following modify test instruction, and the modify test instruction can be: I2ctransfer –f –y 2 w3@0x10 0x82 0x01 0x00. The functional test instructions for the UID LED status indicator light can be defined through the third level in the address dictionary table. 0x00 means that the UID is always off, 0x01 means that the UID is flashing at 1HZ, 0x02 means that the UID is flashing at 2HZ, 0x04 means that the UID is flashing at 4HZ, and 0xff means that the UID is always on. Other register address values ​​(i.e., register address information) are expandable values. And based on the modified register address values, check whether the UID indicator light phenomenon of the rear window and front control panel (i.e., mainboard) on the server meets the preset conditions. The functional test instruction may include: I2ctransfer –f –y 2 w3@0x10 0x82 0x01 0x00; I2ctransfer –f –y 2 w3@0x10 0x820x02 0x00; I2ctransfer –f –y 2 w3@0x10 0x82 0x04 0x00; I2ctransfer –f –y 2 w3@0x10 0x82 0xff 0x00. Among them, I2ctransfer –f –y 2 w3@0x10 0x82 0x01 0x00. Among them: In the function test command, the -f parameter means forced access to the device, -y means turning off the human-computer interaction mode, 2 is the bus number (i.e., bus address), 0x10 is the device address (i.e., the register address information corresponding to the test component), 0x82 is the 8-bit register address information, and 0x01 and 0x00 are the written data. That is, 0x01 and 0x00 are written to the 0x82 register of the 0x10 chip. W3 means writing 3 bytes, i.e., the register address information 0x10 and the data 0x10 0x00.In addition, in I2ctransfer –f –y 2 w1@0x10 0x02 r3, W1 means writing 1 byte, that is, register address information. Writing only register address information (that is, register address) without writing the address of subsequent data in the register means reading, which needs to be used with r parameter. r3 means reading 3 bytes, that is, reading 3 bytes backward from the address of register 0x02. In addition, during the test process, you can also build a physical test prototype for testing. After building a test prototype, install the necessary test components such as motherboard CPLD, memory, power supply, fan, etc. on the motherboard, refresh BMC, BIOS, CPLD and other basic firmware ssh login system, download i2c-tools to the system, and decompress it. Take redhat8.6 as an example: tar -zxvf i2c-tools-4.3.tar.gz; cd i2c-tools-4.3; make USE_STATIC_LIB=1.

[0038] USE_STATIC_LIB uses static compilation. After the compilation is completed, i2c tools such as i2cdetect, i2cdump, i2cget, i2cset, and i2ctransfer will be generated in the tools directory. After building a test prototype and installing the motherboard, memory, power supply, fan and other test components on the server, the i2c tool is used to read and write the data in the execution register to view the actual test effect on the motherboard (such as lighting the UID light).

[0039] In the embodiment of the present invention, for the functional test processing that requires on-site verification (such as the above UID LED status command method for similar testing), it is necessary to check the functional status of the mainboard on-site. For the functional test processing that does not require on-site verification, it is completed through the following process: calling and executing the read test instruction in the functional test instruction through the i2c tool to query the corresponding register address information, and check the default value (that is, the preset standard register address information), and perform comparison analysis; calling and executing the modify test instruction in the functional test instruction through the i2c tool to modify the corresponding register address information and modify the functional parameters; calling the verification test instruction in the functional test instruction through the i2c tool to query the corresponding register address information, and perform the modified verification work, the verification test instruction can be the above-mentioned query test instruction; as Figure 4As shown, for the case where the same motherboard has multiple register address information, the switch chip is used to make the modification. For example, if the server is installed with multiple backplanes, but the defined register address information of the backplanes under the motherboard CPLD is the same, then the backplanes need to be distinguished manually. The default value of the query and the register address value queried after the modification are used to determine whether the modification function is correct. If there is a problem in this step, it can be determined that there is an abnormality in the CPLD register definition. Through the verification function method after the modification is successful, it can be verified whether the motherboard CPLD supports the function normally. If there is a problem in this step, it can be determined that there is an abnormality in the link of the CPLD for this function. The above content can screen out all the data definition problems and function problems of the motherboard. If there is a functional abnormality in the subsequent whole machine test, it can be determined that there is a problem with the BMC adaptation, so as to clearly locate the abnormal problem. The existing testing methods for motherboard testing are highly dependent on the maturity of BMC, which makes the motherboard function test time relatively late. If there is a problem, it poses a high challenge to the revision time of the motherboard. The present invention can accurately determine the problem through the decoupled segmented testing method, and provide a good means for analyzing the root cause of the problem. After applying this method, the motherboard related tests can be advanced by one stage, the problem can be discovered in advance, and enough time can be left for the rework of the motherboard.

[0040] The following example uses the basic management controller to control the NCSI function (i.e., the target function to be tested) on the motherboard as an example: read the test instruction I2ctransfer –f –y 2 w1@0x10 0x16 r3 to read the current default NCSI channel value, and verify whether it meets the expectations (i.e., the preset standard register address information) based on the return value (i.e., the corresponding register address value or the corresponding register address information); modify the current NCSI channel value (i.e., the corresponding register address information) by modifying the test instruction I2ctransfer –f –y 2 w2@0x10 0x96 0xf4, and verify whether the modification is successful by verifying the test instruction I2ctransfer –f –y 2 w1@0x10 0x16 r3 again. At this time, the NCSI function (i.e., the target function to be tested) is switched to the ocp2 network card; then, the NCSI function status of the ocp2 network card is obtained to determine whether the switch is successful. In addition, take the verification of the riser card FRU information (i.e., the target function to be tested) as an example (involving channel switching): query bus 6 (i.e., Figure 5I2C6 bus in the test component) and confirm whether the test component is in place I2cdetect –y –a 6. By reading the register address information corresponding to the test component and comparing it with the value in the chip manual (that is, the preset standard register address information), confirm whether the modified configuration is correct I2cdump –y –a 6 0x77. Modify the register address information to achieve the purpose of switching channels (0x10 means switching to the attached Figure 5 s4 in), I2ctransfer –y –f 6 w1@0x77 0x10. After switching channels, read the execution register, I2ctransfer –y 6 w1@0x50 0x30 r255. Translate the read ascii code into characters and compare them with the actual FRU information. It should be noted that Figure 5 Among them, s0-s7 correspond to different channels, which can be connected to different backplanes (for example, BP0-BP7 correspond to different backplanes). I2C1, I2C2...I2C6 are represented as bus numbers, corresponding to different buses.

[0041] In addition, after executing the functional test instruction to test the target function of the test component and obtaining the test result corresponding to the target function, if the test result is an abnormal test result, the abnormal type corresponding to the abnormal test result is classified, the target abnormal type corresponding to the abnormal test result is determined, and the detailed information of the corresponding test component is obtained. The target abnormal type is further used as an index to perform matching analysis in a preset solution database to obtain a solution list corresponding to the target abnormal type, and the solution list contains at least one processing solution for solving the target abnormal type. Finally, the target abnormal type, detailed information of the test component and the solution list are returned to the user end, thereby improving the efficiency of the motherboard functional test processing.

[0042] The mainboard function test processing method of the present invention obtains the address dictionary table corresponding to the mainboard to be tested, searches for the register address information of the test component corresponding to the mainboard to be tested according to the register address information corresponding to the mainboard to be tested stored in multiple levels in the address dictionary table, generates a function test instruction corresponding to the test component according to the register address information of the test component, and executes the function test instruction to test the target function of the test component when a mainboard function test trigger instruction is detected, so as to obtain a test result corresponding to the target function, which can effectively improve the processing efficiency of the mainboard function test, thereby saving the test time of the integrated test.

[0043] The mainboard function test processing device provided by the present invention is described below. The mainboard function test processing device described below and the mainboard function test processing method described above can be referred to each other. Figure 6 As shown, it is a schematic diagram of the structure of the mainboard function test processing device provided by the present invention. The mainboard function test processing device of the present invention specifically includes the following parts: The address dictionary table acquisition unit 601 is used to acquire the address dictionary table corresponding to the motherboard to be tested; wherein the address dictionary table includes multiple levels, and the multiple levels respectively store register address information corresponding to the motherboard to be tested.

[0044] The address information processing unit 602 is used to find the register address information of the test component corresponding to the motherboard to be tested according to the register address information corresponding to the motherboard to be tested stored in multiple levels in the address dictionary table, and generate a functional test instruction corresponding to the test component according to the register address information of the test component.

[0045] The function test processing unit 603 is used to execute the function test instruction to test the target function of the test component and obtain the test result corresponding to the target function when the motherboard function test trigger instruction is detected.

[0046] The mainboard function test processing device provided by the present invention further includes, before acquiring the address dictionary table corresponding to the mainboard to be tested: The address dictionary table building unit is specifically used for: Obtaining distribution information of the integrated circuit bus between the host board to be tested and its baseboard management controller; According to the distribution information of the integrated circuit bus between the motherboard to be tested and its baseboard management controller, the first level of the original address dictionary table is divided into the number of buses of the integrated circuit bus, and the bus address of each integrated circuit bus in the integrated circuit bus is determined; wherein different test components are deployed on each integrated circuit bus; The second level based on the original address dictionary table stores the register address information of each test component on the host board to be tested on the integrated circuit bus; The address dictionary table to be acquired is obtained based on the register address information of each functional configuration corresponding to the test component stored in the third level of the original address dictionary table.

[0047] According to the mainboard function test processing device provided by the present invention, the function test processing unit is specifically used for: In the case of detecting a motherboard function test trigger instruction, obtaining a read test instruction in the function test instruction, and executing the read test instruction in the function test instruction to read register address information corresponding to the target function to be tested of the test component; comparing and analyzing the register address information corresponding to the target function to be tested with preset standard register address information to obtain a first comparison and analysis result; judging whether the target function to be tested is abnormally configured according to the first comparison and analysis result; In the case where it is determined that the target function to be tested has a configuration anomaly, obtaining a modification test instruction in the functional test instruction, and executing the modification test instruction in the functional test instruction, modifying the function parameters in the register address information corresponding to the target function to be tested, and obtaining new register address information corresponding to the target function to be tested of the test component; Obtain the verification test instruction in the functional test instruction, and execute the verification test instruction in the functional test instruction, compare and analyze the new register address information corresponding to the target function to be tested with the preset standard register address information to obtain a second comparison and analysis result; determine whether the modification of the target function to be tested is abnormally configured according to the second comparison and analysis result, and if not, output the test result.

[0048] According to the motherboard functional test processing device provided by the present invention, the obtaining of the read test instruction in the functional test instruction and the execution of the read test instruction in the functional test instruction to read the register address information corresponding to the target function to be tested of the test component specifically includes: obtaining the read test instruction in the functional test instruction and the execution of the read test instruction in the functional test instruction to perform a matching analysis on the third level in the address dictionary table and read the register address information corresponding to the target function to be tested of the test component stored in the third level in the address dictionary table.

[0049] According to the main board function test processing device provided by the present invention, after obtaining the second comparison and analysis result, it also includes: a function configuration abnormality prompt unit, which is specifically used to: determine whether the new register address information corresponding to the target function to be tested recorded in the second comparison and analysis result is the same as the preset standard register address information; when the new register address information corresponding to the target function to be tested is not the same as the preset standard register address information, determine that there is a configuration abnormality in the modification of the target function to be tested, and output corresponding function configuration abnormality prompt information.

[0050] According to the motherboard function test processing device provided by the present invention, the address information processing unit is specifically used to: determine the test component corresponding to the motherboard to be tested; Based on the test component corresponding to the host board to be tested, a matching analysis is performed at the first level in the address dictionary table to determine the bus address of the integrated circuit bus where the test component is located; According to the bus address of the integrated circuit bus where the test component is located, a matching analysis is performed at the second level in the address dictionary table to obtain the register address information corresponding to the test component.

[0051] The mainboard function test processing device provided by the present invention obtains the address dictionary table corresponding to the mainboard to be tested, searches for the register address information of the test component corresponding to the mainboard to be tested according to the register address information corresponding to the mainboard to be tested stored in multiple levels in the address dictionary table, generates a function test instruction corresponding to the test component according to the register address information of the test component, and executes the function test instruction to test the target function of the test component when a mainboard function test trigger instruction is detected, so as to obtain a test result corresponding to the target function, which can effectively improve the processing efficiency of the mainboard function test, thereby saving the test time of the integrated test.

[0052] Figure 7 An example of a physical structure diagram of an electronic device is shown in FIG. Figure 7 As shown, the electronic device (i.e., electronic device) may include: a processor 701, a communication interface 704, a memory 702, and a communication bus 703, wherein the processor 701, the communication interface 704, and the memory 702 communicate with each other through the communication bus 703. The processor 701 may call the logic instructions in the memory 702 to execute the mainboard function test processing method, the method comprising: obtaining an address dictionary table corresponding to the mainboard to be tested; wherein the address dictionary table comprises a plurality of levels, and the plurality of levels respectively store register address information corresponding to the mainboard to be tested; searching for register address information corresponding to the test component of the mainboard to be tested according to the register address information corresponding to the mainboard to be tested stored in the plurality of levels in the address dictionary table, and generating a function test instruction corresponding to the test component according to the register address information of the test component; in the case of detecting a mainboard function test trigger instruction, executing the function test instruction to test the target function of the test component and obtaining a test result corresponding to the target function.

[0053] In addition, the logic instructions in the above-mentioned memory 702 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk.

[0054] On the other hand, the present application also provides a computer program product, which includes a computer program, which can be stored on a computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the motherboard function test processing method provided by the above-mentioned methods, the method including: obtaining an address dictionary table corresponding to the motherboard to be tested; wherein the address dictionary table includes multiple levels, and the multiple levels respectively store register address information corresponding to the motherboard to be tested; according to the register address information corresponding to the motherboard to be tested stored in multiple levels in the address dictionary table, the register address information of the test component corresponding to the motherboard to be tested is searched, and a function test instruction corresponding to the test component is generated according to the register address information of the test component; when a motherboard function test trigger instruction is detected, the function test instruction is executed to test the target function of the test component to obtain a test result corresponding to the target function.

[0055] On the other hand, the present application also provides a computer-readable storage medium, the computer-readable storage medium includes a stored program, wherein the program, when running, executes the mainboard function test processing method provided by the above-mentioned methods, the method including: obtaining an address dictionary table corresponding to the mainboard to be tested; wherein the address dictionary table includes multiple levels, and the multiple levels respectively store register address information corresponding to the mainboard to be tested; according to the register address information corresponding to the mainboard to be tested stored in multiple levels in the address dictionary table, the register address information of the test component corresponding to the mainboard to be tested is searched, and a function test instruction corresponding to the test component is generated according to the register address information of the test component; when a mainboard function test trigger instruction is detected, the function test instruction is executed to test the target function of the test component to obtain a test result corresponding to the target function.

[0056] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0057] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for processing a motherboard function test, characterized in that: include: Acquire an address dictionary table corresponding to the motherboard to be tested; wherein the address dictionary table includes multiple levels, and the multiple levels respectively store register address information corresponding to the motherboard to be tested; Find the register address information of the test component corresponding to the host board to be tested according to the register address information corresponding to the host board to be tested stored in the multiple levels in the address dictionary table, and generate a functional test instruction corresponding to the test component according to the register address information of the test component; In the case where a mainboard function test trigger instruction is detected, the function test instruction is executed to perform a test process on a target function of the test component to obtain a test result corresponding to the target function.

2. The method for processing the motherboard function test according to claim 1, characterized in that: Before obtaining the address dictionary table corresponding to the host board to be tested, the following steps are also included: Obtaining distribution information of the integrated circuit bus between the host board to be tested and its baseboard management controller; According to the distribution information of the integrated circuit bus between the motherboard to be tested and its baseboard management controller, the first level of the original address dictionary table is divided into the number of buses of the integrated circuit bus, and the bus address of each integrated circuit bus in the integrated circuit bus is determined; wherein different test components are deployed on each integrated circuit bus; The second level based on the original address dictionary table stores the register address information of each test component on the host board to be tested on the integrated circuit bus; The address dictionary table to be acquired is obtained based on the register address information of each functional configuration corresponding to the test component stored in the third level of the original address dictionary table.

3. The method for processing a motherboard function test according to claim 1, characterized in that: The method of executing the functional test instruction to test the target function of the test component and obtaining the test result corresponding to the target function when the mainboard functional test trigger instruction is detected specifically includes: In the case of detecting a motherboard function test trigger instruction, obtaining a read test instruction in the function test instruction, and executing the read test instruction in the function test instruction to read register address information corresponding to the target function to be tested of the test component; Compare and analyze the register address information corresponding to the target function to be tested with the preset standard register address information to obtain a first comparison and analysis result; and determine whether the target function to be tested is abnormally configured according to the first comparison and analysis result; In the case where it is determined that the target function to be tested has a configuration anomaly, obtaining a modification test instruction in the functional test instruction, and executing the modification test instruction in the functional test instruction, modifying the function parameters in the register address information corresponding to the target function to be tested, and obtaining new register address information corresponding to the target function to be tested of the test component; Obtaining a verification test instruction in the functional test instruction, and executing the verification test instruction in the functional test instruction, comparing and analyzing the new register address information corresponding to the target function to be tested with the preset standard register address information, and obtaining a second comparison and analysis result; Determine whether the modification of the target function to be tested is abnormally configured according to the second comparison and analysis result, and if not, output the test result.

4. The method for processing the motherboard function test according to claim 3, characterized in that: The obtaining of the read test instruction in the functional test instruction and executing the read test instruction in the functional test instruction to read the register address information corresponding to the target function to be tested of the test component specifically includes: obtaining the read test instruction in the functional test instruction and executing the read test instruction in the functional test instruction to perform a matching analysis on the third level in the address dictionary table, and reading the register address information corresponding to the target function to be tested of the test component stored in the third level in the address dictionary table.

5. The method for processing the motherboard function test according to claim 3, characterized in that: After obtaining the second comparison and analysis result, it also includes: judging whether the new register address information corresponding to the target function to be tested recorded in the second comparison and analysis result is the same as the preset standard register address information; when the new register address information corresponding to the target function to be tested is not the same as the preset standard register address information, judging that there is a configuration abnormality in the modification of the target function to be tested, and outputting corresponding function configuration abnormality prompt information.

6. The method for processing a motherboard function test according to claim 1, characterized in that: The step of searching for the register address information corresponding to the test component of the host board to be tested according to the register address information corresponding to the host board to be tested stored in the multiple levels in the address dictionary table specifically includes: Determine the test components corresponding to the host board to be tested; Based on the test component corresponding to the host board to be tested, a matching analysis is performed at the first level in the address dictionary table to determine the bus address of the integrated circuit bus where the test component is located; According to the bus address of the integrated circuit bus where the test component is located, a matching analysis is performed at the second level in the address dictionary table to obtain the register address information corresponding to the test component.

7. A motherboard function test processing device, characterized in that: include: An address dictionary table acquisition unit, used for acquiring an address dictionary table corresponding to the motherboard to be tested; wherein the address dictionary table includes a plurality of levels, and the plurality of levels respectively store register address information corresponding to the motherboard to be tested; An address information processing unit, configured to search for register address information of a test component corresponding to the motherboard to be tested according to register address information corresponding to the motherboard to be tested stored at multiple levels in the address dictionary table, and generate a functional test instruction corresponding to the test component according to the register address information of the test component; The functional test processing unit is used to execute the functional test instruction to test the target function of the test component and obtain the test result corresponding to the target function when the main board functional test trigger instruction is detected.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the mainboard function test processing method according to any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the mainboard function test processing method according to any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the mainboard function test processing method according to any one of claims 1 to 6 is implemented.

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