Satellite-borne large-scale pooling storage array unit based on hardware root of trust

Abstract

The invention discloses a satellite-borne large-scale pooling storage array unit based on a hardware root of trust, and relates to the technical field of satellite-borne systems, the satellite-borne large-scale pooling storage array unit comprises a main control circuit, a hardware root of trust circuit, a storage array, a power conversion circuit and a health management circuit, the main control circuit is connected with the storage array and the health management circuit; the power conversion circuit is respectively connected with the main control circuit, the hardware trust root circuit, the storage array and the health management circuit; the hardware root of trust circuit communicates with an external device. According to the invention, reliable storage of mass data, redundant backup and high-speed read-write can be realized, the security and integrity of the stored data are improved, the state of the board card can be detected in real time, and reliable operation of equipment is guaranteed.

Description

Technical Field

[0001] The present invention relates to the technical field of satellite-borne systems, and more particularly to a satellite-borne large-scale pooled storage array unit based on hardware root of trust. Background Art

[0002] A large-scale pooled storage array unit is a data storage unit in a satellite-borne computing system. It generally has the characteristics of high bandwidth, large capacity, and high reliability. It is a key component for realizing payload data storage and exchange in a satellite-borne computing system.

[0003] At present, most of the research on large-scale pooled storage array units focuses on storage capacity, read and write speed, and layout design. However, during the use of large-scale pooled storage array units on board, they may be illegally accessed, resulting in the risk of sensitive data leakage and data tampering, endangering the safety of platform use and causing system crashes and paralysis. Therefore, the security and integrity of data storage in large-scale pooled storage array units needs to be improved and studied.

[0004] Therefore, how to improve the data storage security of large-scale pooled storage array units is an urgent problem that technicians in this field need to solve. Summary of the invention

[0005] In view of this, the present invention provides a satellite-borne large-scale pooled storage array unit based on hardware trust root, which improves the security of data storage and the high reliability of hardware.

[0006] In order to achieve the above object, the present invention adopts the following technical solution:

[0007] A large-scale pooled storage array unit on board based on hardware root of trust, comprising:

[0008] Main control circuit, hardware root of trust circuit, storage array, power conversion circuit and health management circuit;

[0009] The main control circuit is respectively connected to the storage array and the health management circuit; the power conversion circuit is respectively connected to the main control circuit, the hardware trusted root circuit, the storage array and the health management circuit; the hardware trusted root circuit communicates with an external device.

[0010] The technical effect of the above technical solution is that the capacity of the entire unit is not less than 8TB, and the structure adopts VPX reinforced blade; the main control circuit serves as the controller of storage management to realize unified management of large-capacity storage arrays and efficient data storage and reading; the storage array realizes the storage of large-capacity data; the hardware trust root circuit adopts SRAM with physical unclonable function PUF to derive the unique encryption key of the unit, and read and write operations can only be performed after the verification is passed, thereby protecting the onboard large-scale pooled storage array unit from potential attacks and ensuring the authenticity, integrity and confidentiality of data reading and writing.

[0011] Preferably, the onboard large-scale pooled storage array unit is also provided with multiple high-speed data interfaces to provide external data transmission paths, and adopts a standard file management method internally, and can provide FTP access function through a gigabit network port.

[0012] Preferably, the main control circuit adopts an FPGA chip, which is connected to the storage array via a PCI interface. 2 The C bus is connected to external terminals as an integrated management bus. It realizes data acquisition, recording, storage and data management, responds to the verification control of the hardware trust root circuit, responds to the data and software loading requests of different terminals, and distributes the corresponding stored data or software; and reports the health status of the board through the integrated management bus (IPMB).

[0013] Preferably, the hardware root of trust circuit includes a PUF-SRAM chip, a peripheral circuit and an interface conversion circuit; the PUF-SRAM chip is connected to the power conversion circuit and the interface conversion circuit, completes circuit structure adjustment and interface conversion, and communicates with an external device through the interface conversion circuit.

[0014] Preferably, the storage array includes several groups of reinforced NVMe storage subcircuits, the reinforced NVMe storage subcircuits include NVMe controllers and several NAND Flash particles, the NVMe controllers are respectively connected to several NAND Flash particles, and all the NVMe controllers are connected to the FPGA chip of the main control circuit. The storage array composed of multiple large-capacity solid-state storage NAND Flash chips uses NAND Flash particles to achieve large-capacity storage that supports the NVMe protocol and has scalability.

[0015] Preferably, the power conversion circuit includes several groups of DC / DC converters and several groups of low-voltage dropout linear regulators, one group of DC / DC converters can be connected to several groups of low-voltage dropout linear regulators, and the output voltage of the DC / DC converter and the low-voltage dropout linear regulator is transmitted to the hardware trust root circuit, the reinforced NVMe storage subcircuit of the storage array, the main control circuit or the health management circuit to power the main control circuit, the hardware trust root circuit, the storage array and the health management circuit. The DC / DC converter is connected to an external power supply, and outputs multiple channels of stable low-voltage direct current with different voltages through the DC / DC converter, or through the DC / DC converter and the low-voltage dropout linear regulator in sequence, to power the PUF-SRAM chip of the hardware trust root circuit and the NVMe controller of the reinforced NVMe storage subcircuit.

[0016] Preferably, the health management circuit includes a temperature sensor and a plurality of sampling circuits, all of which are connected to the FPGA chip of the main control circuit. The FPGA chip determines the working state based on the board temperature collected by the temperature sensor and the output voltage and current collected by the sampling circuit to obtain the health state of the board.

[0017] Through the above technical solution, it can be known that compared with the prior art, the present invention discloses a satellite-borne large-scale pooled storage array unit based on hardware trust root, including a main control circuit, a hardware trust root circuit, a number of reinforced NVMe storage sub-circuits, a power conversion circuit and a health management circuit; wherein, in view of the hardware reliability, redundant backup, high-speed reading and writing of large-capacity pooled storage modules, etc., a hardware trust root is used to design a satellite-borne large-scale pooled storage array unit, adjust the circuit structure and interface conversion, and use the hardware trust root to ensure the authenticity, integrity and high-standard reliability of data reading and writing; a health management circuit is used to report its own voltage, temperature, normal / abnormal and other information to an external management controller, so that the output voltage, board temperature and working status have real-time monitoring functions; the reinforced NVMe storage sub-circuit is implemented by a storage control FPGA and a NANDFlash storage particle architecture, so that the unit board capacity is not less than 8TB; the main control circuit provides multiple high-speed data interfaces to the outside, and adopts a standard file management method internally, and can provide FTP access function through a gigabit network port, and is implemented by an FPGA and Flash storage particle architecture, which can support two access methods, PCI-E and Ethernet. The unit of the present invention has the characteristics of high bandwidth, large capacity and providing a standard file system. It can be widely used in data acquisition, record storage and data management in the fields of radar, electronic countermeasures, intelligence collection, etc. It can respond to data and software loading requests from different terminals and distribute the corresponding stored data or software. Due to the single-board stand-alone design mode, a large-capacity storage unit can be formed through multiple boards. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0019] Figure 1 A schematic diagram of the structure of a large-scale onboard pooled storage array unit based on hardware root of trust provided by the present invention;

[0020] Figure 2 A schematic diagram of the main control circuit structure provided by the present invention;

[0021] Figure 3 A schematic diagram of the hardware root of trust circuit structure provided by the present invention;

[0022] Figure 4 A schematic diagram of the reinforced NVMe storage subcircuit structure provided by the present invention;

[0023] Figure 5 A schematic diagram of the structure of a power conversion circuit provided by the present invention;

[0024] Figure 6 This is a schematic diagram of the health management circuit structure provided by the present invention. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] The embodiment of the present invention discloses a large-scale pooled storage array unit on board based on hardware trust root, such as Figure 1 As shown, it includes: a main control circuit, a hardware trusted root circuit, a storage array, a power conversion circuit and a health management circuit; the main control circuit is respectively connected to the storage array and the health management circuit; the power conversion circuit is respectively connected to the hardware trusted root circuit, the storage array, the main control circuit and the health management circuit; the hardware trusted root circuit communicates with external devices.

[0027] Furthermore, the onboard large-scale pooled storage array unit is also equipped with multiple high-speed data interfaces to provide external data transmission paths, and adopts standard file management methods internally, and can provide FTP access function through the Gigabit network port.

[0028] Further, such as Figure 2 As shown in the figure, the main control circuit adopts a high-performance FPGA chip, which is connected to several reinforced NVMe storage sub-circuits through the PCI interface. The reinforced NVMe storage sub-circuit adopts the reinforced storage of the XMC connector; the FPGA chip is connected to the health management circuit, and the health status of the board is judged according to the board temperature and output voltage collected by the health management circuit, and the I 2 The C bus is connected to the external terminal as an integrated management bus to report the health status of the board to it. The FPGA chip consists of a PS (Processing System) part responsible for general computing and a PL (Programmable Logic) part responsible for logical operations; the FPGA chip implements storage control, external interface, system management, file management and other operations, provides a PCIe Endpoint module for access by the host computer, and encapsulates the NVMe Target function on the Endpoint, so that the storage array unit has NVMe device functions, and also includes 4 PCIe Root Port modules, which are respectively connected to 4 PCIeGen3 x4 reinforced NVMe storage sub-circuits. The AXI Interconnect module in the FPGA chip provides interconnection functions, and also includes a DDR controller on the PL side for operating DDR4 SDRAM for data caching. The ARM processor embedded in the main controller runs the firmware program to parse and distribute the host computer read and write operations to the corresponding reinforced NVMe storage sub-circuits.

[0029] Further, such as Figure 3 As shown in FIG. 1 , the hardware root of trust circuit includes a PUF-SRAM chip, an interface conversion circuit, and a peripheral circuit. The PUF-SRAM chip is connected to the power conversion circuit and communicates with an external device (host computer) through the interface conversion circuit. The PUF-SRAM chip adopts I 2 C communication protocol receives data, and the interface conversion circuit converts I 2 The C communication protocol data is converted into RS422 communication protocol data and transmitted to the host computer.

[0030] Furthermore, an authentication circuit is provided in the host computer, which authenticates the key transmitted by the interface conversion circuit, obtains an authentication result, and sends the authentication result to the FPGA chip of the main control circuit for identification. Each time the host computer initiates a read / write operation on the onboard large-scale pooled storage array unit, the key is first sent to the host computer, and the authentication circuit in the host computer authenticates the key to obtain an authentication result, and sends the authentication result to the high-performance FPGA chip. The high-performance FPGA chip has a built-in authentication result recognition program for recognition. Only after successfully receiving the "PASS" (verification qualified) signal, the data read / write operation is started, otherwise no response is made, thereby eliminating illegal access.

[0031] Further, such as Figure 4 As shown, the reinforced NVMe storage subcircuit includes an NVMe controller and several NAND Flash particles. The NVMe controller is respectively connected to several NAND Flash particles to control them. An ASP-103612 series reinforced board-to-board high-reliability connector is used, in which the installation hole spacing in the x-axis direction is 76mm, and the installation hole spacing in the y-axis direction is 28mm.

[0032] Further, such as Figure 5 As shown, the power conversion circuit includes several groups of DC / DC converters and several groups of low-voltage dropout linear regulators (LDOs). Each group of DC / DC converters is connected to several groups of LDOs to provide DC working voltages such as 0.6VDC, 0.85VDC, 1.2VDC, and 3.3VDC. The DC / DC converter is used for large voltage difference conversion, and the LDO is used for small voltage difference conversion to power the main control circuit, hardware trust root circuit, storage array, and health management circuit.

[0033] Further, such as Figure 6 As shown, the health management circuit includes a temperature sensor and several groups of voltage sampling circuits and current sampling circuits, all of which are connected to the FPGA chip, and use its PS part for data processing to realize working status monitoring; the temperature sensor collects the board temperature, several groups of voltage sampling circuits collect different output voltages, and several groups of current sampling circuits collect different currents respectively. The high-performance FPGA chip makes judgments based on the board temperature, output voltage and current, and actively reports the working status through the IPMB after obtaining it.

[0034] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0035] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A large-scale pooled storage array unit based on hardware root of trust, characterized in that: include: Main control circuit, hardware root of trust circuit, storage array, power conversion circuit and health management circuit; The main control circuit is respectively connected to the storage array and the health management circuit; the power conversion circuit is respectively connected to the main control circuit, the hardware trusted root circuit, the storage array and the health management circuit; The hardware trusted root circuit communicates with an external device.

2. The onboard large-scale pooled storage array unit based on hardware root of trust according to claim 1, characterized in that: The main control circuit adopts FPGA chip, which is connected to the storage array through PCI interface. 2 C bus is connected to the external terminal.

3. The onboard large-scale pooled storage array unit based on hardware root of trust according to claim 1, characterized in that: The hardware root of trust circuit includes a PUF-SRAM chip, a peripheral circuit and an interface conversion circuit; the PUF-SRAM chip is connected to the power conversion circuit and the interface conversion circuit to complete circuit structure adjustment and interface conversion, and communicates with an external device through the interface conversion circuit.

4. The onboard large-scale pooled storage array unit based on hardware root of trust according to claim 1, characterized in that: The storage array includes several groups of reinforced NVMe storage sub-circuits, and the reinforced NVMe storage sub-circuits include an NVMe controller and several NAND Flash particles. The NVMe controllers are respectively connected to several NAND Flash particles, and all the NVMe controllers are connected to the main control circuit.

5. The onboard large-scale pooled storage array unit based on hardware root of trust according to claim 1, characterized in that: The power conversion circuit includes several groups of DC / DC converters and several groups of low-voltage dropout linear regulators. One group of DC / DC converters can be connected to several groups of low-voltage dropout linear regulators. The output voltages of the DC / DC converters and the low-voltage dropout linear regulators are transmitted to the hardware trusted root circuit, the storage array, the main control circuit or the health management circuit.

6. The onboard large-scale pooled storage array unit based on hardware root of trust according to claim 1, characterized in that: The health management circuit includes a temperature sensor and a plurality of sampling circuits, all of which are connected to the main control circuit.

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