Stable chip packaging technology

Abstract

The invention discloses a stable chip packaging technology, which comprises a ceramic cover, two pins, two insulating layers, a metal flange, a chip and an interlayer, and is characterized in that the two insulating layers are respectively arranged at two sides of the top of the metal flange, the two pins are respectively arranged at the tops of the two insulating layers, and the two insulating layers are respectively arranged at two sides of the top of the metal flange. The ceramic cover is adhered to the tops of the two pins, the chip is sintered and fixed at the center of the top of the metal flange, and the interlayer is embedded and mounted at the inner bottom of the ceramic cover. According to the invention, a layer of interlayer material is added in the ceramic cover and absorbs or blocks part of electromagnetic wave signals, so that under the condition that the appearance of the device is not changed, the performance of the device is improved, and the stability of the device is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a stable chip packaging technology. Background Art

[0002] The traditional ceramic metal packaging technology is to sinter the chip on a high thermal conductivity metal material, then connect the electrical characteristics of the chip to the corresponding package pins through gold wires, and finally glue the ceramic cover to the package pins and the insulation layer. Figure 1 shown.

[0003] However, since the chip is generally small in size, the distance between its input gold wire LG and output gold wire LD is relatively close. The electromagnetic wave signal passing through the chip will be equivalent to a capacitor between its input and output. This capacitor will affect the frequency response curve of the entire device, resulting in reduced performance and stability of the device. Summary of the invention

[0004] The purpose of the present invention is to solve the shortcomings of the prior art and to propose a stable chip packaging technology.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A stable chip packaging technology includes: a ceramic cover, a pin, an insulating layer, a metal flange, a chip and a partition, wherein two insulating layers and two pins are provided, and the two insulating layers are respectively installed on the top two sides of the metal flange, the two pins are respectively installed on the top of the two insulating layers, the ceramic cover is bonded to the top of the two pins, the chip is sintered and fixed at the top center of the metal flange, and the partition is embedded and installed on the inner bottom of the ceramic cover.

[0007] As a further technical solution of the present invention, a gold wire LG and a gold wire LD are electrically connected between the chip and the two pins respectively.

[0008] As a further technical solution of the present invention, the metal flange is made of a material with high thermal conductivity.

[0009] As a further technical solution of the present invention, the insulating layer is made of ceramic material.

[0010] As a further technical solution of the present invention, the ceramic cover is made of ceramic material, and the ceramic cover is installed by a glue bonding process.

[0011] As a further technical solution of the present invention, the partition layer is made of one of a carbon-based material and an iron-based material.

[0012] As a further technical solution of the present invention, carbon-based materials such as graphene, graphite, carbon black, and carbon fiber.

[0013] As a further technical solution of the present invention, iron-based materials such as ferrite, magnetic materials, and mixed materials of iron, cobalt, and nickel elements.

[0014] As a further technical solution of the present invention, the spacer is "M"-shaped, and the spacer shows a pattern of wrapping the gold wire according to the parameter characteristics of the gold wire LG and the gold wire LD, and the spacer does not contact the gold wire LG, the gold wire LD and the chip.

[0015] The "M"-shaped spacer material effectively reduces the mutual inductance between the gold wires without contacting the chip and the gold wires, thereby improving the stability of the device.

[0016] The beneficial effects of the present invention are as follows: a layer of interlayer material is added inside the ceramic cover, which absorbs or blocks part of the electromagnetic wave signal, thereby increasing the performance of the device and improving the stability of the device without changing the shape of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of the ceramic-metal packaging technology of the prior art;

[0018] Figure 2 A schematic diagram of a stable chip packaging technology proposed by the present invention.

[0019] In the figure: 1. Ceramic cover; 2. Pins; 3. Insulation layer; 4. Metal flange; 5. Chip; 6. Gold wire LG; 7. Gold wire LD; 8. Interlayer. DETAILED DESCRIPTION

[0020] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further explained below in conjunction with specific implementation methods.

[0021] Please see attached Figure 2 , a stable chip packaging technology, including: a ceramic cover 1, a pin 2, an insulating layer 3, a metal flange 4, a chip 5 and a partition 8, two insulating layers 3 and two pins 2 are provided, and the two insulating layers 3 are respectively installed on the top two sides of the metal flange 4, the two pins 2 are respectively installed on the top of the two insulating layers 3, the ceramic cover 1 is bonded to the top of the two pins 2, the chip 5 is sintered and fixed at the top center of the metal flange 4, and the partition 8 is inlaid and installed on the inner bottom of the ceramic cover 1.

[0022] The metal flange 4 transfers the heat of the chip 5 during operation; the insulating layer 3 provides a high breakdown voltage and electrically isolates the package pins 2 and the metal flange 4; the ceramic cover 1 prevents dust and physically isolates the internal chip 5 and the gold wire.

[0023] Please see attached Figure 2In a preferred embodiment, the chip 5 and the two pins 2 are electrically connected by a gold wire LG6 and a gold wire LD7 respectively.

[0024] In a preferred embodiment, the metal flange 4 is made of a material with high thermal conductivity.

[0025] In a preferred embodiment, the insulating layer 3 is made of ceramic material.

[0026] In a preferred embodiment, the ceramic cover 1 is made of ceramic material, and the ceramic cover 1 is installed by a gluing process.

[0027] In a preferred embodiment, the spacer 8 is made of one of a carbon-based material and an iron-based material.

[0028] In a preferred embodiment, the carbon-based material is, for example, graphene, graphite, carbon black, or carbon fiber.

[0029] The characteristic of carbon-based materials is that when electromagnetic waves pass through this material, part of the energy of the electromagnetic waves is converted into heat loss, thereby reducing the mutual inductance between gold wires and improving the stability of the device.

[0030] In a preferred embodiment, the iron-based material is, for example, ferrite, magnetic material, or a mixed material of iron, cobalt, and nickel.

[0031] The characteristic of iron-based materials is that they can convert electromagnetic waves into magnetic losses, thereby reducing the mutual inductance between gold wires and improving the stability of the device.

[0032] Please see attached Figure 2 In a preferred embodiment, the spacer 8 is in an "M" shape, and the spacer 8 shows a pattern of wrapping the gold wire according to the parameter characteristics of the gold wire LG6 and the gold wire LD7, and the spacer 8 does not contact the gold wire LG6, the gold wire LD7 and the chip 5.

[0033] The "M"-shaped spacer material effectively reduces the mutual inductance between the gold wires without contacting the chip and the gold wires, thereby improving the stability of the device.

[0034] From the above description, it can be seen that the above-mentioned embodiment of the present invention achieves the following technical effects: a layer of interlayer 8 material is added inside the ceramic cover 1, which absorbs or blocks part of the electromagnetic wave signal, thereby increasing the performance of the device and improving the stability of the device without changing the shape of the device.

[0035] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present invention (including the claims) is limited to these examples. Under the concept of the present invention, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the present invention as described above, which are not provided in detail for the sake of simplicity.

[0036] The present invention is intended to cover all such substitutions, modifications and variations that fall within the broad scope of the claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A stable chip packaging technology, characterized in that: include: A ceramic cover (1), a pin (2), an insulating layer (3), a metal flange (4), a chip (5) and a spacer (8), wherein the insulating layer (3) and the pin (2) are each provided with two, and the two insulating layers (3) are respectively installed on both sides of the top of the metal flange (4), and the two pins (2) are respectively installed on the top of the two insulating layers (3), the ceramic cover (1) is bonded to the top of the two pins (2), the chip (5) is sintered and fixed at the top center of the metal flange (4), and the spacer (8) is embedded and installed on the inner bottom of the ceramic cover (1).

2. The stable chip packaging technology according to claim 1, characterized in that: A gold wire LG (6) and a gold wire LD (7) are electrically connected between the chip (5) and the two pins (2) respectively.

3. The stable chip packaging technology according to claim 1, characterized in that: The metal flange (4) is made of a material with high thermal conductivity.

4. The stable chip packaging technology according to claim 1, characterized in that: The insulating layer (3) is made of ceramic material.

5. The stable chip packaging technology according to claim 1, characterized in that: The ceramic cover (1) is made of ceramic material, and the ceramic cover (1) is installed using a glue bonding process.

6. The stable chip packaging technology according to claim 1, characterized in that: The partition layer (8) is made of one of a carbon-based material and an iron-based material.

7. The stable chip packaging technology according to claim 6, characterized in that: Carbon-based materials such as graphene, graphite, carbon black, and carbon fiber.

8. The stable chip packaging technology according to claim 6, characterized in that: Iron-based materials such as ferrite, magnetic materials, and mixed materials of iron, cobalt and nickel elements.

9. The stable chip packaging technology according to claim 2, characterized in that: The spacer (8) is in an "M" shape, and the spacer (8) displays a pattern of wrapping the gold wire according to the parameter characteristics of the gold wire LG (6) and the gold wire LD (7), and the spacer (8) does not contact the gold wire LG (6), the gold wire LD (7) and the chip (5).

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