Image sensor and manufacturing method thereof

Abstract

The invention discloses an image sensor and a manufacturing method thereof. The image sensor comprises a substrate; the first dielectric layer is positioned on the substrate; the deep groove is located in the first dielectric layer and the substrate, and an isolation layer and a conductive layer which cover the side wall and the bottom of the deep groove are sequentially formed in the deep groove. The isolation layer and the conductive layer which cover the side wall and the bottom of the deep trench are sequentially formed in the deep trench, the conductive layer is connected with the external voltage, and the voltage of the conductive layer is changed by changing the external voltage, so that the voltage of the BDTI can be changed, etching damage can be inhibited, and the width and depth of P-type isolation injection can be reduced; therefore, the effective area of the PD region is increased, the FWC is improved, and the CIS imaging quality is improved. In addition, the metal grating and the deep trench isolation are formed by using one mask, so that the process period is shortened, and the process cost is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an image sensor and a method for manufacturing the same. Background Art

[0002] In the BSI (Backside illumination) CIS (CMOS Image Sensor) process, the BDTI (Backside deep trench isolation) process can form a good electrical / optical isolation structure, but the etching process to form the BDTI trench will damage the substrate surface. In addition, in the BSI process, the damage cannot be repaired by long-term high-temperature annealing because it will cause electrical deviation of the device. The damage caused by etching is one of the important sources of white pixels and dark current.

[0003] In order to compensate for this damage, in the front-end process, in the area where BDTI is to be formed, P-type ion isolation that is anti-type to PD (Photo diode, photoelectric conversion area) is generally injected to suppress white pixels and dark current caused by etching damage. However, the P-type ion isolation will form a PN junction with the N-well in the PD area, which will reduce the effective PD area and lead to a decrease in FWC (Full well capacity). In addition, in the existing process, at least one mask is required to form the deep trench isolation and the metal grid, respectively, resulting in excessively high production process costs. Summary of the invention

[0004] A series of simplified concepts are introduced in the Summary of the Invention, which will be further described in detail in the Detailed Description of the Invention. The Summary of the Invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0005] In view of the existing problems, an embodiment of the present invention provides an image sensor, including: substrate; a first dielectric layer located on the substrate; A deep trench is located in the first dielectric layer and the substrate, wherein an isolation layer and a conductive layer covering the sidewall and bottom of the deep trench are sequentially formed in the deep trench.

[0006] Exemplarily, the image sensor further includes a second dielectric layer located on the first dielectric layer, an opening exposing the conductive layer is formed in the second dielectric layer, and a pad electrically connected to the conductive layer is formed in the opening.

[0007] Exemplarily, the pad is connected to a negative potential.

[0008] Exemplarily, the conductive layer is a grid structure.

[0009] Exemplarily, the isolation layer includes a high-K material or does not include a high-K material.

[0010] Another aspect of an embodiment of the present invention provides a method for manufacturing an image sensor, the method comprising: providing a substrate; forming a first dielectric layer on the first surface of the substrate; Etching the first dielectric layer and the substrate to form deep trenches in the first dielectric layer and the substrate; An isolation layer and a conductive layer are sequentially formed in the deep trench to cover the sidewall and the bottom of the deep trench.

[0011] Exemplarily, the step of etching the first dielectric layer and the substrate to form deep trenches in the first dielectric layer and the substrate uses a mask.

[0012] Exemplarily, after forming an isolation layer and a conductive layer in the deep trench in sequence to cover the sidewalls and bottom of the deep trench, the method further includes the steps of forming a second dielectric layer covering the first dielectric layer and the deep trench, forming an opening in the second dielectric layer to expose the conductive layer, and forming a pad electrically connected to the conductive layer in the opening.

[0013] Exemplarily, the pad is connected to a negative potential.

[0014] Exemplarily, the isolation layer includes a high-K material or does not include a high-K material.

[0015] According to the image sensor provided by the present invention, an isolation layer and a conductive layer covering the sidewall and bottom of the deep trench are sequentially formed in the deep trench, and the conductive layer is connected to an external voltage. By changing the external voltage, the voltage of the conductive layer can be changed, that is, the voltage of the BDTI can be changed, the etching damage can be suppressed, and the width and depth of the P-type isolation injection can be reduced, thereby increasing the effective area of ​​the PD area, improving the FWC, and improving the CIS imaging quality. In addition, the metal grid and the deep trench isolation are formed using a mask, which reduces the process cycle and cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The following drawings of the present invention are used as part of the present invention for understanding the present invention. The drawings show embodiments of the present invention and their descriptions to explain the principles of the present invention. In the drawings:

[0017] Figure 1 A schematic flow chart showing a method for manufacturing an image sensor according to a specific embodiment of the present invention; FIG. 2A to FIG. 2J The cross-sectional schematic diagram of an image sensor obtained by sequentially implementing each step of a method for manufacturing an image sensor according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0018] In the following description, a large number of specific details are provided to provide a more thorough understanding of the present invention. However, it is apparent to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features well known in the art are not described.

[0019] It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0020] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0021] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0022] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0023] In the BDTI process, the etching process will cause damage to the substrate, and this etching damage is one of the important sources of white pixels and dark currents. In order to compensate for the white pixels and dark currents caused by this damage, the related technology fills the deep trench with a high-K dielectric layer to induce positive charges on the substrate surface to reduce the impact of white pixels and dark currents caused by deep trench etching. However, the positive charge induced by the high-K dielectric layer is limited, and it is necessary to inject P-type ions for isolation to strengthen the elimination of etching damage. The injection of P-type ions generally wraps the BDTI, which will reduce the area of ​​the n-PD region, especially in small-sized pixel structures, which will significantly reduce QE (Quantum Efficiency, photoelectric conversion efficiency) and FWC. In addition, in the existing process, at least one mask is required to form the deep trench isolation and metal grid, respectively, resulting in excessively high production process costs.

[0024] Therefore, in view of the existence of the above-mentioned technical problems, an embodiment of the present invention proposes a method for manufacturing an image sensor, such as Figure 1 As shown, it mainly includes the following steps: Step S110: providing a substrate; Step S120: forming a first dielectric layer on the first surface of the substrate; Step S130: etching the first dielectric layer and the substrate to form deep trenches in the first dielectric layer and the substrate; Step S140: forming an isolation layer and a conductive layer in the deep trench in sequence to cover the sidewall and bottom of the deep trench.

[0025] The manufacturing method of the image sensor provided by the embodiment of the present invention forms a deep trench in the first dielectric layer and the substrate, and sequentially forms an isolation layer and a conductive layer covering the sidewall and bottom of the deep trench in the deep trench, connects the conductive layer to an external voltage, changes the external voltage to change the voltage of BDTI, suppresses etching damage, reduces the width and depth of the P-type isolation injection, thereby increasing the effective area of ​​the PD region, improving FWC, and improving the CIS imaging quality. In addition, the metal grid and the deep trench isolation are formed using a mask, which reduces the process cycle and cost.

[0026] Embodiment 1 Below, reference FIG. 2A to FIG. 2J A method for manufacturing an image sensor according to an embodiment of the present invention is described in detail, wherein: FIG. 2A to FIG. 2J The cross-sectional view of a semiconductor device obtained by sequentially implementing each step of a method for manufacturing an image sensor according to an embodiment of the present invention is shown.

[0027] First, perform step S110: provide a substrate. Figure 2A As shown, the substrate 200 includes a first surface and a second surface opposite to each other. The substrate 200 can be used as a pixel wafer to form a pixel array to receive incident light and convert it into an electrical signal. The material of the substrate 200 includes but is not limited to at least one of the following materials: silicon (Si), germanium (Ge), silicon germanium (SiGe), carbon silicon (SiC), carbon germanium silicon (SiGeC), indium arsenide (InAs), gallium arsenide (GaAs), indium phosphide (InP) or other III / V compound semiconductors, or silicon on dielectric (SOI), stacked silicon on dielectric (SSOI), stacked silicon germanium on dielectric (S-SiGeOI), silicon germanium on dielectric (SiGeOI) and germanium on dielectric (GeOI).

[0028] Next, step S120 is performed: forming a first dielectric layer on the first surface of the substrate. Figure 2AAs shown, a first dielectric layer 201 is formed on a provided substrate 200 by deposition. Exemplarily, various deposition methods commonly used in the art may be used to form the first dielectric layer 201, for example, it may be formed by a chemical vapor deposition (CVD) method, a physical vapor deposition (PVD) method, or an atomic layer deposition (ALD) method. Exemplarily, the material of the first dielectric layer 201 may be an insulating material such as silicon dioxide, a fluorocarbon, a carbon-doped silicon oxide, or silicon carbonitride, and the present application is not limited thereto. Exemplarily, after forming the first dielectric layer 201, it also includes: performing a planarization treatment on the first dielectric layer 201. Exemplarily, non-limiting examples of the planarization method include a mechanical planarization method and a chemical mechanical polishing planarization method.

[0029] For example, Figure 2A As shown, a third dielectric layer 202 is formed on the second surface of the substrate 200. The third dielectric layer 202 may be a silicon oxide layer or other dielectric material layer, and may be formed by chemical vapor deposition, physical vapor deposition, and the like. An interconnection structure 2021 is formed in the third dielectric layer 202, and the interconnection structure 2021 is used to lead out the electrical signal generated by the pixel unit of the image sensor.

[0030] Then, step S130 is performed: etching the first dielectric layer and the substrate to form deep trenches in the first dielectric layer and the substrate.

[0031] Exemplarily, a mask is used in the step of etching the first dielectric layer and the substrate to form deep trenches in the first dielectric layer and the substrate. The first dielectric layer and the substrate are sequentially etched using the same mask, and the etched deep trenches are filled with a conductive layer in a subsequent step. Thus, the deep trenches and the conductive layer structure can be formed by using a mask, which reduces a mask and can shorten the production cycle and process cost. Exemplarily, the conductive layer formed is a grid structure.

[0032] The specific steps of forming deep trenches in the first dielectric layer and the substrate using a mask include: Figure 2B As shown, a patterned mask layer 203 is formed on the first dielectric layer 201; then Figure 2C As shown, the first dielectric layer 201 and the substrate 200 are etched in sequence using the patterned mask layer 203 as a mask, thereby forming a deep trench 204 in the first dielectric layer 201 and the substrate 200; finally, as shown Figure 2D As shown, the mask layer 203 is removed. For example, the mask layer may be a hard mask layer or a photoresist layer. For example, the first dielectric layer and the substrate may be etched by dry etching and / or wet etching.

[0033] Then, step S140 is performed: an isolation layer and a conductive layer are sequentially formed in the deep trench to cover the sidewall and the bottom of the deep trench.

[0034] First, if Figure 2E As shown, an isolation layer 205 is formed in the deep trench 204 to cover the sidewalls and bottom of the deep trench 204, and the isolation layer 205 will also cover the surface area of ​​the first dielectric layer 201 except the deep trench 204. The isolation layer 205 plays a role in isolating the conductive layer 206 from the substrate 200 and the first dielectric layer 201 in the subsequent process of forming the conductive layer 206 and filling the deep trench 204, so as to prevent the substrate 200 and the first dielectric layer 201 from directly contacting the conductive layer 206 and contaminating the substrate 200 and the first dielectric layer 201. Exemplarily, the material of the isolation layer may include but is not limited to at least one of oxides such as SiO2, SiN, Al2O3, and HfO2.

[0035] Exemplarily, the isolation layer may not include high-K materials, and the high-K materials include at least one of Al2O3, HfO2, Ta2O5, ZrO2, and TiO2. In the embodiment of the present invention, the voltage of the BDTI can be changed by electrically connecting the conductive layer formed in the subsequent steps to the external voltage, thereby causing the potential of the substrate around the BDTI to change, which plays the same role as including high-K materials. Therefore, the embodiment of the present invention may not include high-K materials.

[0036] Then, if Figure 2F As shown, a conductive layer 206 is formed on the isolation layer 205, and the conductive layer 206 fills the deep trench 204. By way of example, the conductive layer 206 may be formed by various deposition methods commonly used in the art, or by a magnetron sputtering process, or by an ECP (Electrochemical Plating) electroplating process. By way of example, the conductive layer 206 may include commonly used conductive materials, such as but not limited to at least one of titanium, titanium nitride, tungsten, copper, and polysilicon. Next, as Figure 2G As shown, a planarization process is performed to remove the conductive layer 206 in the area outside the deep trench 204, and the isolation layer 205 on the surface of the first dielectric layer 201 is also removed. After planarization, the top surface of the conductive layer 206 in the deep trench is flush with the top surface of the first dielectric layer 201. Exemplarily, non-limiting examples of the planarization method include a mechanical planarization method and a chemical mechanical polishing planarization method.

[0037] Exemplarily, after sequentially forming an isolation layer and a conductive layer in the deep trench to cover the sidewalls and bottom of the deep trench, the method further includes forming a second dielectric layer covering the first dielectric layer and the deep trench, and forming an opening in the second dielectric layer to expose the conductive layer, and forming a pad electrically connected to the conductive layer in the opening.

[0038] First, if Figure 2H As shown, various deposition methods commonly used in the art are used to form a second dielectric layer 207 covering the first dielectric layer 201 and the deep trench. Exemplarily, the second dielectric layer and the first dielectric layer may be made of the same material. Fig.2I As shown, an opening 208 exposing the conductive layer 206 is formed in the second dielectric layer 207 at a position corresponding to the deep trench. Exemplarily, the width of the opening is not less than the width of the conductive layer. Figure 2J As shown, a pad 209 electrically connected to the conductive layer 206 is formed in the opening 208. The pad 209 is electrically connected to an external voltage so that the conductive layer 206 is electrically connected to the external voltage. By changing the external voltage, the voltage of the conductive layer 206 is changed, that is, the voltage of the BDTI can be changed.

[0039] Exemplarily, the pad is connected to a negative potential. The pad is electrically connected to the conductive layer and is also connected to an external voltage. By changing the external voltage, the voltage of the conductive layer can be changed, that is, the voltage of the BDTI can be changed. By connecting the pad to a negative potential, the BDTI also presents a negative voltage, and the external voltage is relatively controllable, so that the substrate around the BDTI can induce more positive charges, and the adverse effects of etching damage can be better suppressed and eliminated.

[0040] At this point, the process steps implemented in the method for manufacturing an image sensor according to an embodiment of the present invention have been completed. It can be understood that the method for manufacturing an image sensor in this embodiment not only includes the above steps, but may also include other necessary steps before, during or after the above steps, which are all included in the scope of the manufacturing method of this embodiment.

[0041] The manufacturing method of the image sensor provided by the embodiment of the present invention forms a deep trench in the first dielectric layer and the substrate, and sequentially forms an isolation layer and a conductive layer covering the sidewall and bottom of the deep trench in the deep trench, connects the conductive layer to an external voltage, changes the external voltage to change the voltage of BDTI, suppresses etching damage, reduces the width and depth of the P-type isolation injection, thereby not reducing the effective area of ​​the PD region after the P-type isolation injection, improves FWC, and improves CIS imaging quality. In addition, the metal grid and the deep trench isolation are formed using a mask, which reduces the process cycle and cost.

[0042] Embodiment 2 The present invention also provides an image sensor, which can be prepared by the method in the above-mentioned embodiment 1.

[0043] Below, reference Figure 2J The image sensor of the present invention is introduced and described in detail. It is worth mentioning that in order to avoid repetition, only a brief description is given for the same components and structures as in the aforementioned embodiment 1. For specific explanations and descriptions, reference can be made to the description in embodiment 1.

[0044] Specifically, Figure 2J As shown, the image sensor of the embodiment of the present invention comprises: a substrate 200; a first dielectric layer 201 located on the substrate; a deep trench located in the first dielectric layer 201 and the substrate 200, wherein an isolation layer 205 and a conductive layer 206 covering the sidewalls and bottom of the deep trench are sequentially formed in the deep trench. The conductive layer 206 is electrically connected to an external voltage. For example, Figure 2J As shown, the image sensor further includes a second dielectric layer 207 located on the first dielectric layer 201, an opening exposing the conductive layer 206 is formed in the second dielectric layer 207, a pad 209 electrically connected to the conductive layer 206 is formed in the opening, and the pad 209 is electrically connected to an external voltage, so that the external voltage is connected to the conductive layer 206. The deep trench is covered and filled by the conductive layer 206.

[0045] Exemplarily, the conductive layer is a grid structure, and the grid is used to isolate light passing through the filter, thereby reducing light crosstalk and improving the imaging quality of the image sensor.

[0046] The image sensor provided by the embodiment of the present invention sequentially forms an isolation layer and a conductive layer covering the sidewall and bottom of the deep trench in the deep trench, and the conductive layer is connected to an external voltage. By changing the external voltage, the voltage of the conductive layer can be changed, that is, the voltage of the BDTI can be changed, the etching damage can be suppressed, and the width and depth of the P-type isolation injection can be reduced, so that the effective area of ​​the PD area will not be reduced after the P-type isolation injection, the FWC is improved, and the CIS imaging quality is improved. In addition, the metal grid and the deep trench isolation are formed using a mask, which reduces the process cycle and cost.

[0047] The present invention has been described by the above embodiments, but it should be understood that the above embodiments are only for the purpose of example and description, and are not intended to limit the present invention to the scope of the described embodiments. In addition, it can be understood by those skilled in the art that the present invention is not limited to the above embodiments, and more variations and modifications can be made according to the teachings of the present invention, and these variations and modifications all fall within the scope of the protection claimed by the present invention. The protection scope of the present invention is defined by the attached claims and their equivalents.

Claims

1. An image sensor, characterized in that: include: substrate; a first dielectric layer located on the substrate; A deep trench is located in the first dielectric layer and the substrate, wherein an isolation layer and a conductive layer covering the sidewall and bottom of the deep trench are sequentially formed in the deep trench.

2. The image sensor according to claim 1, wherein: It also includes a second dielectric layer located on the first dielectric layer, wherein an opening exposing the conductive layer is formed in the second dielectric layer, and a pad electrically connected to the conductive layer is formed in the opening.

3. The image sensor according to claim 2, wherein: The pad is connected to a negative potential.

4. The image sensor according to claim 1, wherein: The conductive layer is a grid structure.

5. The image sensor according to claim 1, wherein: The isolation layer includes a high-K material or does not include a high-K material.

6. A method for manufacturing an image sensor, characterized in that: The method comprises: providing a substrate; forming a first dielectric layer on the first surface of the substrate; Etching the first dielectric layer and the substrate to form deep trenches in the first dielectric layer and the substrate; An isolation layer and a conductive layer are sequentially formed in the deep trench to cover the sidewall and the bottom of the deep trench.

7. The manufacturing method according to claim 6, characterized in that: The step of etching the first dielectric layer and the substrate to form deep trenches in the first dielectric layer and the substrate uses a mask.

8. The manufacturing method according to claim 6, characterized in that: After sequentially forming an isolation layer and a conductive layer in the deep trench to cover the sidewalls and the bottom of the deep trench, the method further includes the steps of forming a second dielectric layer covering the first dielectric layer and the deep trench, forming an opening in the second dielectric layer to expose the conductive layer, and forming a pad electrically connected to the conductive layer in the opening.

9. The manufacturing method according to claim 8, characterized in that: The pad is connected to a negative potential.

10. The manufacturing method according to claim 6, characterized in that: The isolation layer includes a high-K material or does not include a high-K material.

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