Pixel arrangement structure and display panel

Abstract

The invention discloses a pixel arrangement structure and a display panel, the pixel arrangement structure comprises a plurality of pixel units, each pixel unit is located in a virtual square, and each pixel unit comprises a first sub-pixel, a second sub-pixel and a plurality of third sub-pixels; the first sub-pixel is of a polygonal structure, the geometric center of the first sub-pixel coincides with the center of the pixel, and the first sub-pixel is provided with a first outer boundary; the second sub-pixel is of an annular structure arranged around the first sub-pixel and is provided with a second outer boundary and a second inner boundary, and the second inner boundary is of a similar polygon structure which is concentric with the first outer boundary and has the same edge number as the first outer boundary; the plurality of third sub-pixels are clamped between the edge of the virtual square and the second outer boundary, and the plurality of third sub-pixels are respectively and correspondingly located at a plurality of vertex angles of the virtual square. According to the scheme, the area of unutilized space is reduced, the arrangement compactness of the sub-pixels is improved, the space utilization rate is improved, and therefore the pixel aperture opening ratio is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel arrangement structure and a display panel. Background Art

[0002] OLED (Organic Light Emitting Diode) is a new type of current-type semiconductor light-emitting device and belongs to autonomous light-emitting technology. Compared with traditional liquid crystal display panels, OLED display panels have the advantages of fast response speed, high contrast and wide viewing angle.

[0003] In a traditional display panel, the pixel layer is composed of multiple pixel units arranged in an array. A single pixel unit usually includes three sub-pixels of different colors: red, green, and blue. By controlling the size of the three color components R / G / B corresponding to the three sub-pixels in a certain pixel unit, the color and brightness displayed by the pixel can be controlled. There are many ways to arrange pixels in the existing pixel layer. In the conventional diamond arrangement, the shape of each sub-pixel is a diamond structure, and the sub-pixels are arranged closely. However, under different product designs, if the shape of one of the sub-pixels is changed, for example, it is changed to a polygonal structure with more sides than the diamond structure, the sub-pixels will no longer be arranged closely, and unused parts will appear between the sub-pixels, resulting in a decrease in the overall aperture ratio of the display panel. Summary of the invention

[0004] The present application provides a pixel arrangement structure and a display panel to improve space utilization, thereby increasing pixel aperture ratio.

[0005] In order to solve the above technical problems, the technical solution provided by this application is:

[0006] In a first aspect, a pixel arrangement structure is provided, comprising a plurality of pixel units, each of which is located in a virtual square, each of which has a geometric center, each of which is defined to have a pixel center that coincides with the geometric center of the virtual square, and each of which comprises a first sub-pixel, a second sub-pixel and a plurality of third sub-pixels; the first sub-pixel is a polygonal structure, and its geometric center coincides with the pixel center; the second sub-pixel is an annular structure arranged around the first sub-pixel, and has a second outer boundary and a second inner boundary, the second inner boundary and the second outer boundary are both polygonal structures, and the second inner boundary is a similar polygonal structure that is concentric with the first outer boundary and has the same number of sides; a plurality of third sub-pixels are sandwiched between the edge of the virtual square and the second outer boundary, and the plurality of third sub-pixels are respectively located at a plurality of vertices of the virtual square, the third sub-pixel has a third outer boundary and a third inner boundary, and the third outer boundary coincides with the edge of the virtual square; wherein the ratio of the area of ​​the second sub-pixel to the area of ​​the first sub-pixel is 2-4:1.

[0007] According to an embodiment of the present application, the second outer boundary is also a similar polygonal structure that is concentric with the first outer boundary and has the same number of sides.

[0008] According to an embodiment of the present application, the first sub-pixel is configured to emit green light, the second sub-pixel is configured to emit blue light, and the third sub-pixel is configured to emit red light.

[0009] According to an embodiment of the present application, the light-emitting layer of the first sub-pixel is a continuous light-emitting layer; the light-emitting layer of the second sub-pixel is a continuous light-emitting layer or a discontinuous light-emitting layer.

[0010] According to an embodiment of the present application, the light-emitting layers of the two opposite third sub-pixels of any two adjacent pixel units constitute a continuous light-emitting layer.

[0011] According to an embodiment of the present application, the light-emitting layers of the four third sub-pixels at the intersections of the four pixel units arranged in any matrix form a continuous light-emitting layer.

[0012] In a second aspect, a display panel is provided, comprising: a driving substrate, a pixel definition layer, a conductive partition structure and the above-mentioned pixel arrangement structure; the pixel definition layer is arranged on one side of the driving substrate; the conductive partition structure is arranged on the pixel definition layer and is located on the side of the pixel definition layer away from the driving substrate; a plurality of the pixel units are arranged in a matrix; wherein the conductive partition structure and the pixel definition layer jointly define a pixel accommodating area, and the plurality of pixel units are arranged in the pixel accommodating area.

[0013] According to one embodiment of the present application, the conductive partition structure includes a plurality of partition units, and the plurality of partition units are arranged in a matrix, and one partition unit corresponds to one pixel unit; a single partition unit includes an outer ring partition portion, an inner ring partition portion, and at least one connecting partition portion, the inner ring partition portion is located inside the outer ring partition portion and is arranged to be separated from the outer ring partition portion, the inner ring partition portion is a similar polygonal structure that is concentric with the first outer boundary and has the same number of sides, the outer ring partition portion is a similar polygonal structure that is concentric with the second outer boundary and has the same number of sides, the connecting partition portion is located between the outer ring partition portion and the inner ring partition portion and electrically connects the outer ring partition portion and the inner ring partition portion; the inner side of the inner ring partition portion defines a first image The first sub-pixel is correspondingly arranged in the first pixel accommodating area; the inner ring partition part, the outer ring partition part and the at least one connecting partition part jointly define a second pixel accommodating area, and the second sub-pixel is correspondingly arranged in the second pixel accommodating area; the outer ring partition part at the top corner of the virtual square and the edge of the virtual square jointly define a third pixel accommodating area, and the third sub-pixel is correspondingly arranged in the third pixel accommodating area; wherein, when the number of the connecting partition parts of a single partition unit is one, the light-emitting layer of the second sub-pixel is a continuous light-emitting layer, and when the number of the connecting partition parts of a single partition unit is greater than one, the light-emitting layer of the second sub-pixel is separated by the connecting partition part to form a discontinuous light-emitting layer.

[0014] According to one embodiment of the present application, the connecting partition portion is perpendicular to corresponding sides of the outer ring partition portion and the inner ring partition portion.

[0015] According to an embodiment of the present application, the partition unit is defined with a first partition central axis and a second partition central axis, the first partition central axis is along the row direction of the partition unit matrix, the second partition central axis is along the column direction of the partition unit matrix, and the partition unit is an axisymmetric structure along the first partition central axis and the second partition central axis;

[0016] The number of the connecting partition parts of a single partition unit is one, the connecting partition part is electrically connected to the corresponding sides of the outer ring partition part and the inner ring partition part, and the connecting partition part extends along the first partition central axis, or extends along the second partition central axis, or is arranged at an angle with the first partition central axis and the second partition central axis;

[0017] Or; the number of the connecting partition parts of a single partition unit is two, the two connecting partition parts respectively connect different corresponding sides of the outer ring partition part and the inner ring partition part, and the two connecting partition parts respectively extend along the first partition central axis and the second partition central axis, or the two connecting partition parts are both arranged at an angle to the first partition central axis and the second partition central axis;

[0018] Or; the number of the connecting partition parts of a single partition unit is four, the four connecting partition parts respectively connect different corresponding sides of the outer ring partition part and the inner ring partition part, two of the four connecting partition parts extend along the first partition central axis, and the other two extend along the second partition central axis, or each of the four connecting partition parts is set at an angle to the first partition central axis and the second partition central axis.

[0019] The beneficial effects of this application are:

[0020] The pixel arrangement structure and display panel provided by the present application include a plurality of pixel units, each pixel unit includes a first sub-pixel, a second sub-pixel and a plurality of third sub-pixels, the second sub-pixel is a ring structure arranged around the first sub-pixel, and has a second outer boundary and a second inner boundary, the second inner boundary and the second outer boundary are both similar regular polygon structures concentric with the first sub-pixel and having the same number of sides, a plurality of third sub-pixels are sandwiched between the edge of the virtual square and the second outer boundary, and the plurality of third sub-pixels are respectively located at the plurality of vertices of the virtual square, thereby forming a new pixel arrangement structure, especially the second sub-pixel is a ring structure arranged around the first sub-pixel, and the third sub-pixel fills the space between the outside of the second sub-pixel and the edge of the virtual square, reducing the area of ​​the unused space, which is conducive to improving the compactness of the sub-pixel arrangement, improving the space utilization rate, and thus improving the pixel aperture ratio. In addition, in the pixel unit of the present application, the area ratio of each sub-pixel can be changed by changing the distance between the second inner boundary and the second outer boundary of the second sub-pixel without changing the structure of the first sub-pixel, the second sub-pixel and the third sub-pixel, and the area ratio of each sub-pixel can be adjusted more conveniently. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0022] Figure 1 is a structural schematic diagram of an exemplary embodiment of a pixel unit in a pixel arrangement structure provided by the present application;

[0023] Figure 2 yes Figure 1 Structural schematic diagrams of various situations in which the number of the conductive gaps in the pixel unit is one;

[0024] Figure 3 yes Figure 1 Structural schematic diagrams of various situations in which the number of conductive gaps in a pixel unit is two;

[0025] Figure 4 yes Figure 1 Structural schematic diagrams of various situations in which the number of conductive gaps in a pixel unit is four;

[0026] Figure 5 for Figures 2 to 4 Schematic diagrams of various structures of pixel unit matrix arrangement;

[0027] Figure 6 is a schematic structural diagram of an embodiment of a display panel provided by the present application;

[0028] Figure 7 yes Figure 6 A magnified image of a display panel within a virtual square;

[0029] Figure 8 yes Figure 7 A cross-sectional view at any sub-pixel;

[0030] Fig. 9 yes Figure 7 A schematic diagram of the structure of a single partition unit;

[0031] Fig.10 yes Fig. 9 Structural schematic diagrams of various situations in which the number of connected partition parts in the partition unit is one;

[0032] Fig.11 yes Fig. 9 Structural schematic diagrams of various situations in which the number of connected partition parts in the partition unit is two;

[0033] Fig.12 yes Fig. 9 Structural schematic diagrams of various situations in which the number of connected partition parts in the partition unit is four;

[0034] Fig.13 It is a schematic diagram of various structures of the display panel provided in this application.

[0035] Description of reference numerals:

[0036] Pixel unit P

[0037] Pixel Center PC

[0038] Virtual Square VS

[0039] The first sub-pixel P1

[0040] The second sub-pixel P2

[0041] The third sub-pixel P3

[0042] First outer boundary P1a

[0043] Second inner boundary P2a

[0044] Second outer boundary P2b

[0045] The third inner boundary P3a

[0046] The third outer boundary P3b

[0047] Gap inner ring G1

[0048] Gap outer ring G2

[0049] Conductive gap G3

[0050] The first pixel center axis CS1

[0051] The second pixel center axis CS2

[0052] The first partition center axis CS3

[0053] Second partition center axis CS4

[0054] Pixel accommodating area 100a

[0055] Anode 110

[0056] Self-luminous layer 120

[0057] Cathode 130

[0058] Driving substrate 200

[0059] Pixel definition layer 300

[0060] Conductive partition structure 400

[0061] Partition unit 400a

[0062] Inner ring partition 410

[0063] First pixel accommodating area 410a

[0064] Outer ring partition 420

[0065] The second pixel accommodating area 420a

[0066] Partition parallel section 4201

[0067] Partition inclined section 4202

[0068] Connecting partition 430

[0069] The third pixel accommodating area 430a DETAILED DESCRIPTION

[0070] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0071] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0072] The present application provides a pixel arrangement structure, which includes a plurality of pixel units. Figure 1 , Figure 1 is a structural diagram of an exemplary embodiment of a pixel unit in a pixel arrangement structure provided by the present application, and each pixel unit P is located in a virtual square VS (Virtual square). Each virtual square has a geometric center. It can be understood that the geometric center of the virtual square VS is the intersection of its two diagonals, and each pixel unit P is defined with a pixel center PC that coincides with the geometric center of the virtual square VS.

[0073] Each pixel unit P includes a first sub-pixel P1, a second sub-pixel P2, and a plurality of third sub-pixels P3. The first sub-pixel P1 is a polygonal structure, and its geometric center coincides with the pixel center PC. The first sub-pixel P1 has a first outer boundary P1a. The second sub-pixel P2 is a ring structure arranged around the first sub-pixel P1, and has a second inner boundary P2a and a second outer boundary P2b. The second inner boundary P2a and the second outer boundary P2b are both polygonal structures. The second inner boundary P2a is a similar polygonal structure that is concentric with the first outer boundary P1a and has the same number of sides. The third sub-pixel P3 is sandwiched between the edge of the virtual square VS and the second outer boundary P2b, and the plurality of third sub-pixels P3 are respectively located at the plurality of vertices of the virtual square VS. The third sub-pixel P3 has a third inner boundary P3a and a third outer boundary P3b, and the third outer boundary P3b coincides with the edge of the virtual square VS.

[0074] Among them, the meaning of the second inner boundary P2a being a similar polygonal structure that is concentric with the first outer boundary P1a and has the same number of sides is that the corresponding angles of the polygon of the second inner boundary P2a and the polygon of the first outer boundary P1a are equal, and the corresponding sides are proportional, thereby forming similar polygons, and the distances between the second inner boundary P2a and each corresponding side of the first outer boundary P1a are the same.

[0075] The ratio of the area of ​​the second subpixel P2 to the area of ​​the first subpixel P1 is 2-4:1. Exemplarily, the ratio of the area of ​​the second subpixel P2 to the area of ​​the first subpixel P1 may be 2:1, or 3:1, or 4:1.

[0076] The shortest distance from the first outer boundary P1a to the pixel center PC is defined as D1, the shortest distance from the second inner boundary P2a to the pixel center PC is defined as D2, and the shortest distance from the third inner boundary P3a to the pixel center PC is defined as D3, wherein D3>D2>D1. The shortest distance from the first outer boundary P1a to the pixel center PC is the shortest distance from the pixel boundary of the first sub-pixel P1 to the pixel center PC, the shortest distance from the second inner boundary P2a to the pixel center PC is the shortest distance from the pixel boundary of the second sub-pixel P2 to the pixel center PC, and the shortest distance from the third inner boundary P3a to the pixel center PC is the straight-line distance from the pixel boundary of the third sub-pixel P3 to the pixel center PC. Therefore, D3>D2>D1 means that the straight-line distance from the pixel boundary of the first sub-pixel P1 to the pixel center PC>the straight-line distance from the pixel boundary of the second sub-pixel P2 to the pixel center PC>the straight-line distance from the pixel boundary of the third sub-pixel P3 to the pixel center PC.

[0077] The shortest distance from the first outer boundary P1a to the pixel center PC means the minimum value of the vertical distances from each side of the first outer boundary P1a to the pixel center PC; the shortest distance from the second inner boundary P2a to the pixel center PC means the minimum value of the vertical distances from each side of the second inner boundary P2a to the pixel center PC; the shortest distance from the third inner boundary P3a to the pixel center PC means the minimum value of the straight-line distances from each point on the third inner boundary P3a to the pixel center PC.

[0078] In the pixel arrangement structure of the present application, each pixel unit P includes a first sub-pixel P1, a second sub-pixel P2 and a plurality of third sub-pixels P3, the second sub-pixel P2 is an annular structure arranged around the first sub-pixel P1, the second inner boundary P2a of the second sub-pixel P2 is a similar polygonal structure concentric with the first sub-pixel P1 and having the same number of sides, the plurality of third sub-pixels P3 are sandwiched between the edge of the virtual square VS and the second outer boundary P2b, and the plurality of third sub-pixels P3 are respectively located at a plurality of vertices of the virtual square VS, thereby forming a new pixel arrangement structure, especially the second sub-pixel P2 is an annular structure arranged around the first sub-pixel P1, the third sub-pixel P3 fills the space between the outside of the second sub-pixel P2 and the edge of the virtual square VS, reducing the area of ​​the unused space, which is beneficial to improving the compactness of the sub-pixel arrangement, improving the space utilization, and thus improving the pixel aperture ratio. Moreover, in the pixel unit P of the present application, the area ratio of each sub-pixel can be changed by changing the distance between the second inner boundary P2a and the second outer boundary P2b of the second sub-pixel P2 without changing the structures of the first sub-pixel P1, the second sub-pixel P2 and the third sub-pixel P3, so that the area ratio of each sub-pixel can be adjusted more conveniently.

[0079] In some embodiments, the second outer boundary P2b is also a similar polygonal structure that is concentric with the first outer boundary P1a and has the same number of sides. The second outer boundary P2b is a similar polygonal structure that is concentric with the first outer boundary P1a and has the same number of sides. The meaning of the second outer boundary P2b being a similar polygonal structure that is concentric with the first outer boundary P1a and has the same number of sides is that the corresponding angles of the polygon of the second outer boundary P2b and the polygon of the first outer boundary P1a are equal, and the corresponding sides are proportional, so as to form similar polygons, and the distance between the second outer boundary P2b and each side of the first outer boundary P1a is the same. The second inner boundary P2a and the second outer boundary P2b are both similar polygonal structures that are concentric with the first outer boundary P1a and have the same number of sides, and the symmetry of the pixel unit P is better.

[0080] In some embodiments, corresponding to the shape of the virtual square VS, the number of sides of the second outer boundary P2b is at least twice four. For example, the second outer boundary P2b may be an octagon, a dodecagon, a hexadecagon, etc. Figure 1 The case where the number of sides of the second outer boundary P2b is eight is shown, and the number of sides of the first outer boundary P1a and the second inner boundary P2a is also eight.

[0081] In these embodiments, the second outer boundary P2b includes four parallel boundary segments P2b1 respectively parallel to the four sides of the virtual square VS, and an inclined boundary segment P2b2 connected between two adjacent parallel boundary segments P2b1, and the inclined boundary segment P2b2 is one inclined side or at least two inclined sides connected in sequence. When the number of sides of the second outer boundary P2b is eight ( Figure 1In the case shown in the figure, the boundary inclined segment P2b2 is an inclined edge. When the number of edges of the second outer boundary P2b is twelve or more, the boundary inclined segment P2b2 is formed by at least two inclined edges connected in sequence, and each inclined edge is arranged to be inclined relative to the edge of the virtual square VS. The third sub-pixel P3 is sandwiched between the boundary inclined segment P2b2 and the edge of the virtual square VS. The second sub-pixel P2 adopts such a shape so that the third sub-pixel P3 itself also presents an axisymmetric structure symmetrical about the diagonal of the virtual square VS, especially when the pixel units P are arranged in a matrix, the four third sub-pixels P3 at the intersection of the four pixel units P arranged in any matrix can form a polygonal structure together, so the overall symmetry of the pixel arrangement structure is better, and the display effect of each sub-pixel is more uniform.

[0082] In these embodiments, the side lengths of the four boundary parallel segments P2b1 are equal, the side length of the boundary inclined segment P2b2 may be equal to or unequal to the side lengths of the four boundary parallel segments P2b1. When the side length of the boundary inclined segment P2b2 is equal to the side lengths of the four boundary parallel segments P2b1, and the inner angles of the second outer boundary P2b are equal, the second outer boundary P2b constitutes a regular octagon, and correspondingly, the first outer boundary P1a and the second inner boundary P2a are also regular octagons. In this case, the symmetry of the pixel unit P is better.

[0083] Of course, in the present application, the number of sides of the second outer boundary P2b is not limited to multiples of four, but can also be five, six, seven, nine, ten, fourteen, etc. The number of sides of the second outer boundary P2b that is a multiple of four makes the pixel arrangement structure more symmetrical compared to other values.

[0084] See again Figure 1 The pixel unit P is defined with a first pixel center axis CS1 and a second pixel center axis CS2. The first pixel center axis CS1 is along the row direction of the pixel unit P matrix arrangement, and the second pixel center axis CS2 is along the column direction of the pixel unit P matrix arrangement.

[0085] The first outer boundary P1a, the second inner boundary P2a, and the second outer boundary P2b are all symmetrical along the first pixel center axis CS1, and the first outer boundary P1a, the second inner boundary P2a, and the second outer boundary P2b are all symmetrical along the second pixel center axis CS2, so the symmetry of the pixel unit P is better. In other embodiments, the first outer boundary P1a, the second inner boundary P2a, and the second outer boundary P2b may not be symmetrical along the first pixel center axis CS1 and the second pixel center axis CS2. The first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 are configured to emit light of different colors. In some embodiments, the first sub-pixel P1 is configured to emit green light (G), the second sub-pixel P2 is configured to emit blue light (B), and the third sub-pixel P3 is configured to emit red light (R). According to the RGB light-emitting principle, on an OLED screen, the luminous efficiency of blue is lower than that of red and green. Therefore, when the opening is not enough, in order to make the blue light reach the required brightness, the current must be increased, which will make the blue decay faster, thereby affecting the life and color accuracy of the entire screen. In related technologies, to solve this problem, the area of ​​the blue sub-pixel is usually larger than the area of ​​the green sub-pixel and the red sub-pixel, so that the current passing through the blue sub-pixel can be reduced while ensuring the brightness, thereby improving the life of the screen. In a single pixel unit P, the ratio of the area of ​​the blue sub-pixel to the green sub-pixel can usually be set to 2-4:1. For example, it can be 2:1, or 3:1, or 4:1. It should be noted that this is only an exemplary representation of the ratio of the area of ​​the blue sub-pixel to the green sub-pixel, and is not limited to these specific ratios.

[0086] The position of the blue light is usually unchanged, and the positions of the red light and the green light are interchangeable, that is, in the present application, the second sub-pixel P2 may be configured to emit blue light, the first sub-pixel P1 may be configured to emit red light, and the third sub-pixel P3 may be configured to emit green light. It should be understood that in other embodiments, the three sub-pixels of different colors included in each pixel unit P may also be sub-pixels of other colors, not limited to the three primary colors of RGB.

[0087] In a single pixel unit P, the first subpixel P1, the second subpixel P2 and the third subpixel P3 may each include an anode, a self-luminous layer and a cathode stacked in sequence, and the self-luminous layer of each of the first subpixel P1, the second subpixel P2 and the third subpixel P3 is used to emit light of different colors.

[0088] See again Figure 1In a single pixel unit P, there is an inner gap ring G1 between the first sub-pixel P1 and the second sub-pixel P2, an outer gap ring G2 between the second sub-pixel P2 and the third sub-pixel P3, and a conductive gap G3 is connected between the inner gap ring G1 and the outer gap ring G2. Since the sub-pixels of each color are formed by evaporation deposition in the related art, in order to define the position of the sub-pixels of each color, one method can be to use FMM (Fine Metal Mask, high-precision metal mask template) evaporation deposition to form the inner gap ring G1, the outer gap ring G2 and the conductive gap G3 by separating the evaporated material by the mask during the evaporation process; another method can be to set a conductive partition structure on the pixel definition layer instead of the mask, and the inner gap ring G1, the outer gap ring G2 and the conductive gap G3 are formed by separating the evaporated material by the conductive partition structure during the evaporation process. The connection structure between each pixel unit P and the conductive partition structure will be described in detail later. Here, the purpose is to explain the reasons why the inner gap ring G1, the outer gap ring G2 and the conductive gap G3 are formed in the pixel unit P.

[0089] Figure 1 When the first outer boundary P1a, the second inner boundary P2a and the second outer boundary P2b are all octagons, the third inner boundary P3a is a hypotenuse parallel to and spaced from the inclined boundary segment P2b2, and the shortest distance between the third inner boundary P3a and the pixel center PC is the straight-line distance between the midpoint of the third inner boundary P3a and the pixel center PC.

[0090] The gap inner ring G1 is also a similar polygonal structure that is concentric with the first outer boundary P1a and the second inner boundary P2a and has the same number of sides. When the second outer boundary P2b is also a similar polygonal structure that is concentric with the first outer boundary P1a and has the same number of sides, the gap outer ring G2 is also a similar polygonal structure that is concentric with the first outer boundary P1a and the second inner boundary P2a and has the same number of sides. Figure 2 , Figure 3 and Figure 4 Different structures of the conductive gap G3 are shown, and a specific description is given by taking the example that both the inner gap ring G1 and the outer gap ring G2 are octagonal structures.

[0091] Figure 2 (a)-(h) show various situations in which the number of the conductive gap G3 in a single pixel unit P is one, the conductive gap G3 is connected to the corresponding edges of the gap outer ring G2 and the gap inner ring G1, and the conductive gap G3 extends along the first pixel center axis CS1, or extends along the second pixel center axis CS2, or is set at an angle to the first pixel center axis CS1 and the second pixel center axis CS2.

[0092] Figure 3(a)-(l) show various situations in which the number of the conductive gap G3 in a single pixel unit P is two, the two conductive gaps G3 respectively connect different corresponding edges of the gap outer ring G2 and the gap inner ring G1, and the two conductive gaps G3 extend along the first pixel center axis CS1 and the second pixel center axis CS2, respectively, or the two conductive gaps G3 are set at an angle to the first pixel center axis CS1 and the second pixel center axis CS2.

[0093] Figure 4 (a)-(b) show the case where the number of the conduction gaps G3 of a single pixel unit P is four, and the four conduction gaps G3 respectively connect different corresponding sides of the gap outer ring G2 and the gap inner ring G1, two of the four conduction gaps G3 extend along the first pixel center axis CS1, and the other two extend along the second pixel center axis CS2, or each of the four conduction gaps is set at an angle to the first pixel center axis CS1 and the second pixel center axis CS2.

[0094] In some embodiments, the light-emitting layer of the first sub-pixel P1 is a continuous light-emitting layer, and the light-emitting layer of the second sub-pixel P2 is a continuous light-emitting layer or a discontinuous light-emitting layer. The continuous light-emitting layer means that its light-emitting surface is a continuous surface, and the discontinuous light-emitting layer means that its light-emitting surface is composed of a plurality of spaced light-emitting surfaces.

[0095] When the light-emitting layer of the second sub-pixel P2 is a continuous light-emitting layer, the second sub-pixel P2 can be deposited and formed simultaneously in the same opening area; when the light-emitting layer of the second sub-pixel P2 is a discontinuous light-emitting layer, the light-emitting layer of the second sub-pixel P2 can be formed into a discontinuous light-emitting layer through a conductive partition structure described later. When the number of the conduction gaps G3 in a single pixel unit P is one, the light-emitting layer of the second sub-pixel P2 is a continuous light-emitting layer; when the number of the conduction gaps G3 in a single pixel unit P is at least two, the light-emitting layer of the second sub-pixel P2 is a discontinuous light-emitting layer.

[0096] In some embodiments, after the pixel units P are arranged in a matrix, the light-emitting layers of two opposite third sub-pixels P3 of any two adjacent pixel units P constitute a continuous light-emitting layer.

[0097] Furthermore, the light-emitting layers of the four third sub-pixels P3 at the intersection of the four pixel units P arranged in any matrix form a continuous light-emitting layer. Therefore, the four third sub-pixels P3 at the intersection of the four pixel units P arranged in any matrix can be deposited and formed simultaneously in the same opening area to ensure the opening ratio of the third sub-pixel P3 and simplify the conductive partition structure. Figure 1The figure shows a case where the number of sides of the first outer boundary P1a, the second inner boundary P2a, and the second outer boundary P2b are all eight. In order to increase the pixel symmetry, the four third sub-pixels P3 in a single pixel unit P can be set to be an isosceles right triangle structure. After the pixel units P are arranged in a matrix, the light-emitting layers of the four third sub-pixels P3 at the intersection of the four pixel units P arranged in any matrix constitute a diamond-shaped continuous light-emitting layer, that is, a complete diamond-shaped red sub-pixel, which can ensure that the shape of the red sub-pixel remains unchanged from the shape of the red sub-pixel in the traditional diamond arrangement structure.

[0098] Figure 5 (a)-(e) show several representative structures of the matrix arrangement of each pixel unit P. The number of conductive gaps G3 in each pixel unit P usually used in the matrix arrangement is the same, and the multiple conductive gaps G3 jointly constituted by the four pixel units P arranged in the matrix can also form a symmetrical structure at the intersection of the arrangement to further increase the symmetry of the pixel arrangement.

[0099] The second aspect of the present application provides a display panel. Figure 6 , Figure 7 and Figure 8 , Figure 6 is a schematic structural diagram of an embodiment of a display panel provided by the present application, Figure 7 yes Figure 6 A magnified image of the display panel within a virtual square VS. Figure 8 yes Figure 7 The display panel includes a driving substrate 200, a pixel definition layer 300, a conductive partition structure 400 and a pixel arrangement structure. The pixel arrangement structure refers to the above embodiment, and a plurality of pixel units P are arranged in a matrix. It should be noted that: Figure 6 A matrix arrangement structure of four pixel units P is shown, which is a schematic matrix arrangement. In fact, the number of pixel units P in a display panel is far more than four. Usually, a display panel may be composed of hundreds of thousands or millions of pixel units P.

[0100] In a single pixel unit P, the first subpixel P1, the second subpixel P2 and the third subpixel P3 each include an anode 110, a self-luminous layer 120 and a cathode 130 stacked in sequence, and the self-luminous layer 120 of each of the first subpixel P1, the second subpixel P2 and the third subpixel P3 is used to emit light of different colors.

[0101] The driving substrate 200 is used to drive the first sub-pixel P1 , the second sub-pixel P2 , and the third sub-pixel P3 in the pixel unit P to emit light. The driving substrate 200 may be a TFT (Thin Film Transistor) substrate.

[0102] The pixel definition layer 300 is disposed on one side of the driving substrate 200 to define the position of each color sub-pixel and isolate the anodes 110 of each color sub-pixel to avoid short circuits between the anodes 110 .

[0103] The conductive partition structure 400 is arranged on the pixel definition layer 300 and is located on the side of the pixel definition layer 300 away from the driving substrate 200. The main function of the conductive partition structure 400 is to jointly define the pixel accommodating area 100a with the pixel definition layer 300, so that multiple pixel units P are arranged in the pixel accommodating area 100a to limit the position of each color sub-pixel. The conductive partition structure 400 is also used to realize the mutual electrical connection between the cathodes 130 of each sub-pixel.

[0104] Traditionally, red, green and blue sub-pixels are usually formed by FMM (Fine Metal Mask) evaporation deposition, while the display panel of the present application uses a conductive partition structure 400 instead of a mask, which is a maskless (FMMfree) evaporation deposition technology. The width of the conductive partition structure 400 is smaller than that of the mask, so the spacing between the sub-pixels of each color of the display panel can be made smaller, thereby improving the pixel aperture ratio of the display panel.

[0105] Furthermore, the conductive partition structure 400 includes a plurality of partition units 400a, and the plurality of partition units 400a are arranged in a matrix to form the conductive partition structure 400. Figure 7 and Fig. 9 , Fig. 9 yes Figure 7 Schematic diagram of the structure of a single partition unit 400a, one partition unit 400a corresponds to one pixel unit P.

[0106] A single partition unit 400a is also located in the virtual square VS where the corresponding pixel unit P is located. The single partition unit 400a includes an inner ring partition portion 410, an outer ring partition portion 420 and at least one connecting partition portion 430. The inner ring partition portion 410 is located on the inner side of the outer ring partition portion 420 and is arranged to be separated from the outer ring partition portion 420, corresponding to the shape of the first outer boundary P1a and the second inner boundary P2a. The inner ring partition portion 410 is a similar polygonal structure that is concentric with the first outer boundary P1a and has the same number of sides. The outer ring partition portion 420 is a similar polygonal structure that is concentric with the second outer boundary P2b and has the same number of sides. The connecting partition portion 430 is located between the outer ring partition portion 420 and the inner ring partition portion 410 and electrically connects the outer ring partition portion 420 and the inner ring partition portion 410. The main function of the connecting partition portion 430 is to realize the electrical connection between the outer ring partition portion 420 and the inner ring partition portion 410.

[0107] The inner side of the inner ring partition portion 410 defines a first pixel accommodating area 410a, and the first sub-pixel P1 is correspondingly arranged in the first pixel accommodating area 410a. The inner ring partition portion 410, the outer ring partition portion 420 and at least one connecting partition portion 430 jointly define a second pixel accommodating area 420a, and the second sub-pixel P2 is correspondingly arranged in the second pixel accommodating area 420a. The outer ring partition portion 420 defines a third pixel accommodating area 430a at the top corner of the virtual square VS and the edge of the virtual square VS, and the third sub-pixel P3 is correspondingly arranged in the third pixel accommodating area 430a.

[0108] The cathode 130 of each color sub-pixel covers its own self-luminous layer 120 and extends to contact the conductive partition structure 400 to achieve mutual electrical connection between the cathodes 130 of each color sub-pixel. Figure 7 and Figure 8 As shown in the example, for a single pixel unit P, the outer boundary of the cathode 130 of the first sub-pixel P1 extends to the inner wall of the inner ring partition portion 410 to electrically contact the inner ring partition portion 410, the inner boundary of the third sub-pixel P3 extends to the outer wall of the outer ring partition portion 420 to electrically contact the outer ring partition portion 420, the inner boundary of the second sub-pixel P2 extends to the outer wall of the inner ring partition portion 410 to electrically contact the inner ring partition portion 410, the outer boundary of the second sub-pixel P2 extends to the inner wall of the outer ring partition portion 420 to electrically contact the outer ring partition portion 420, and the second sub-pixel P2 also extends to the side wall of the connecting partition portion 430 to electrically contact the connecting partition portion 430.

[0109] Combination Figure 1 and Figure 7 In the present application, due to the provision of a conductive partition structure 400, during the deposition of the evaporation material, the conductive partition structure 400 is used to partition the inner gap ring G1, the outer gap ring G2, and the conductive gap G3 in each pixel unit P. Therefore, the inner gap ring G1, the outer gap ring G2, and the conductive gap G3 actually refer to the formation of a discontinuous light-emitting surface between the sub-pixels of each color through the conductive partition structure 400, and do not refer to a gap structure in the true sense. Specifically, for a single pixel unit P, the inner ring partition portion 410 of the partition unit 400a allows the first sub-pixel P1 and the second sub-pixel P2 to have an inner gap ring G1, the outer ring partition portion 420 allows the second sub-pixel P2 and the third sub-pixel P3 to have an outer gap ring G2, and the connecting partition portion 430 allows the second sub-pixel P2 to have a conductive gap G3.

[0110] Corresponding to the aforementioned second outer boundary P2b, including four boundary parallel segments P2b1 respectively parallel to the four sides of the virtual square VS, and a boundary inclined segment P2b2 connected between two adjacent boundary parallel segments P2b1, the outer ring partition portion 420 of the present application includes four partition parallel segments 4201 and a partition inclined segment 4202 connected between two adjacent partition parallel segments 4201. The outer edges of the four partition parallel segments 4201 coincide with the four sides of the virtual square VS respectively, and the partition inclined segment 4202 is also formed by one inclined edge or at least two inclined edges connected in sequence. When the number of sides of the outer ring partition portion 420 is eight ( Fig. 9 In the case shown in the figure, the partition inclined section 4202 is an inclined edge. When the number of edges of the outer ring partition part 420 is twelve or more, the partition inclined section 4202 is formed by at least two inclined edges connected in sequence, and each inclined edge is arranged to be inclined relative to the edge of the virtual square VS. Therefore, in fact, the four partition parallel sections 4201 of the outer ring partition part 420 are used to partition the second sub-pixels P2 of two adjacent pixel units P after each pixel unit P is arranged, and the four partition inclined sections 4202 of the outer ring partition part 420 are used to partition the second sub-pixel P2 and the third sub-pixel P3 of two adjacent pixel units P after each pixel unit P is arranged.

[0111] When the number of connected partition parts 430 of a single partition unit 400a is one, the light-emitting layer of the second sub-pixel P2 is a continuous light-emitting layer. When the number of connected partition parts 430 of a single partition unit 400a is at least two, the light-emitting layer of the second sub-pixel P2 is separated by at least two connected partition parts 430 to form a discontinuous light-emitting layer.

[0112] In some embodiments, the connecting partition part 430 is perpendicular to the corresponding sides of the outer ring partition part 420 and the inner ring partition part 410. It should be understood that in other embodiments, the connecting partition part 430 may not be perpendicular to the corresponding sides of the outer ring partition part 420 and the inner ring partition part 410, and the connecting partition part 430 may also connect any sides of the outer ring partition part 420 and the inner ring partition part 410. In the present application, the main function of the connecting partition part 430 is to electrically connect the outer ring partition part 420 and the inner ring partition part 410. Therefore, in theory, the connecting partition part 430 only needs to electrically contact the outer ring partition part 420 and the inner ring partition part 410, and the structure and shape of the connecting partition part 430 are not specifically limited.

[0113] Corresponds to Figure 2-Figure 4 The pixel arrangement structure of Figure 10-12 Different structural forms of the partition unit 400a are shown, and the Figure 1 , Figure 7 and Fig. 9The partition unit 400a is defined with a first partition center axis CS3 and a second partition center axis CS4. The first partition center axis CS3 is along the row direction of the partition unit 400a matrix arrangement, that is, along the row direction of the pixel unit P matrix arrangement. The second partition center axis CS4 is along the column direction of the partition unit 400a matrix arrangement, that is, along the column direction of the pixel unit P matrix arrangement. The partition unit 400a is axially symmetrical along the first partition center axis CS3 and the second partition center axis CS4. When each pixel unit P is formed in the pixel accommodating area 100a, the first partition center axis CS3 of a single partition unit 400a is the first pixel center axis CS1 of the corresponding single pixel unit P, and the second partition center axis CS4 of a single partition unit 400a is the second pixel center axis CS2 of the corresponding single pixel unit P. The following is a specific description of the structure in which the outer ring partition portion 420 and the inner ring partition portion 410 of the partition unit 400a are both octagonal as an example.

[0114] Fig.10 (a)-(h) show various situations in which the number of connecting partition parts 430 of a single partition unit 400a is one, and the connecting partition part 430 is electrically connected to the corresponding edges of the outer ring partition part 420 and the inner ring partition part 410, and the connecting partition part 430 extends along the first partition center axis CS3, or extends along the second partition center axis CS4, or is set at an angle to the first partition center axis CS3 and the second partition center axis CS4.

[0115] Fig.11 (a)-(l) show various situations in which the number of connecting partition parts 430 of a single partition unit 400a is two, the two connecting partition parts 430 respectively connect different corresponding edges of the outer ring partition part 420 and the inner ring partition part 410, and the two connecting partition parts 430 respectively extend along the first partition center axis CS3 and the second partition center axis CS4, or the two connecting partition parts 430 are both set at an angle to the first partition center axis CS3 and the second partition center axis CS4.

[0116] Fig.12 (a)-(b) show the case where the number of connected partition parts 430 of a single partition unit 400a is four, and the four connected partition parts 430 respectively connect different corresponding sides of the outer ring partition part 420 and the inner ring partition part 410, two of the four connected partition parts 430 extend along the first partition center axis CS3, and the other two extend along the second partition center axis CS4, or each of the four connected partition parts 430 is set at an angle to the first partition center axis CS3 and the second partition center axis CS4.

[0117] According to the principle of the electrical connection function of the connecting partition part 430, since the outer ring partition part 420 and the inner ring partition part 410 are both polygonal structures, multiple connecting partition parts 430 are evenly distributed between the outer ring partition part 420 and the inner ring partition part 410, which can make the electrical conduction effect between the cathodes 130 of each sub-pixel on the entire display panel more uniform.

[0118] In addition, the outer ring partition portion 420, the inner ring partition portion 410 and the connecting partition portion 430 all have a certain width. Since multiple partition units 400a need to be arranged in a matrix to form a conductive partition structure 400 of the display panel, after each partition unit 400a is arranged in a matrix, the relative contact portions between adjacent partition units 400a can share edges. In order to simplify the structure and manufacturing process of the conductive partition structure 400, the width of each part of the conductive partition structure 400 can be made the same, that is, the width of each partition inclined section 4202 of the inner ring partition part 410, the connecting partition part 430 and the outer ring partition part 420 can be made the same, and the width of the partition parallel section 4201 is half of the partition inclined section 4201. Therefore, after each partition unit 400a is arranged in a matrix, the half width of the partition parallel section 4201 of two adjacent partition units 400a together constitutes the entire width of each partition inclined section 4202 of the inner ring partition part 410, the connecting partition part 430 and the outer ring partition part 420, so as to achieve the same width of each part of the conductive partition structure 400. It should be understood that in other embodiments, the width of each part of the conductive partition structure 400 can also be made different.

[0119] See also Fig.13 , Fig.13 is a schematic diagram of different structures of the display panel provided in this application, Fig.13 (a)-(e) show several representative structures of the matrix arrangement of each partition unit 400a and the pixel unit P. Generally, the number of connecting partition parts 430 in each partition unit 400a used for the matrix arrangement is the same, and the multiple connecting partition parts 430 jointly constituted by the four partition units 400a arranged in the matrix can also form a symmetrical structure at the intersection of the arrangement, so as to further increase the symmetry of the arrangement of the conductive partition structure 400, that is, to increase the symmetry of the pixel arrangement.

[0120] The terms "first", "second", "third" in this application are only used for descriptive purposes and cannot be understood as indicating the quantity of the indicated technical features. Thus, the features defined as "first", "second", "third" can expressly or implicitly include at least one of these features. In the embodiments of the present application, all directional indications (such as up, down, left, right, front, back ...) are only used to explain the relative positional relationship, motion conditions, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication also changes accordingly. In addition, the terms "include" and "have" and any of their variations are intended to cover non-exclusive inclusions. The process, method, system, product or equipment such as including a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or equipment.

[0121] The above descriptions are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A pixel arrangement structure, characterized in that: The invention comprises a plurality of pixel units, each of which is located in a virtual square, each of which has a geometric center, each of which is defined to have a pixel center that coincides with the geometric center of the virtual square, and each of which comprises: A first sub-pixel is in a polygonal structure, a geometric center of which coincides with the center of the pixel, and the first sub-pixel has a first outer boundary; The second sub-pixel is a ring structure arranged around the first sub-pixel and has a second outer boundary and a second inner boundary, the second inner boundary and the second outer boundary are both polygonal structures, and the second inner boundary is a similar polygonal structure that is concentric with the first outer boundary and has the same number of sides; a plurality of third sub-pixels, sandwiched between the edge of the virtual square and the second outer boundary, and the plurality of third sub-pixels are respectively located at a plurality of vertex corners of the virtual square, the third sub-pixels have a third outer boundary and a third inner boundary, and the third outer boundary coincides with the edge of the virtual square; The ratio of the area of ​​the second sub-pixel to the area of ​​the first sub-pixel is 2-4:

1.

2. The pixel arrangement structure according to claim 1, characterized in that: The second outer boundary is also a similar polygonal structure that is concentric with the first outer boundary and has the same number of sides.

3. The pixel arrangement structure according to claim 1, characterized in that: The first sub-pixel is configured to emit green light, the second sub-pixel is configured to emit blue light, and the third sub-pixel is configured to emit red light.

4. The pixel arrangement structure according to claim 1, characterized in that: The light-emitting layer of the first sub-pixel is a continuous light-emitting layer; The light-emitting layer of the second sub-pixel is a continuous light-emitting layer or a discontinuous light-emitting layer.

5. The pixel arrangement structure according to claim 1 or 4, characterized in that: The light-emitting layers of the two opposite third sub-pixels of any two adjacent pixel units constitute a continuous light-emitting layer.

6. The pixel arrangement structure according to claim 5, characterized in that: The light-emitting layers of the four third sub-pixels at the intersections of the four pixel units arranged in any matrix form a continuous light-emitting layer.

7. A display panel, characterized in that: include: Driver substrate; A pixel definition layer, disposed on one side of the driving substrate; a conductive partition structure, disposed on the pixel definition layer and located on a side of the pixel definition layer away from the driving substrate; and The pixel arrangement structure according to any one of claims 1 to 6, wherein the plurality of pixel units are arranged in a matrix; The conductive partition structure and the pixel definition layer jointly define a pixel accommodating area, and the plurality of pixel units are arranged in the pixel accommodating area.

8. The display panel according to claim 7, characterized in that: The conductive partition structure includes a plurality of partition units, the plurality of partition units are arranged in a matrix, and one partition unit corresponds to one pixel unit; A single partition unit comprises an outer ring partition portion, an inner ring partition portion and at least one connecting partition portion, wherein the inner ring partition portion is located inside the outer ring partition portion and is arranged to be separated from the outer ring partition portion, the inner ring partition portion is a similar polygonal structure that is concentric with the first outer boundary and has the same number of sides, the outer ring partition portion is a similar polygonal structure that is concentric with the second outer boundary and has the same number of sides, and the connecting partition portion is located between the outer ring partition portion and the inner ring partition portion and electrically connects the outer ring partition portion and the inner ring partition portion; The inner side of the inner ring partition portion defines a first pixel accommodating area, and the first sub-pixel is correspondingly arranged in the first pixel accommodating area; The inner ring partition portion, the outer ring partition portion and the at least one connecting partition portion jointly define a second pixel accommodating area, and the second sub-pixel is correspondingly arranged in the second pixel accommodating area; The outer ring partition portion defines a third pixel accommodating area together with the edge of the virtual square at the top corner of the virtual square, and the third sub-pixel is correspondingly arranged in the third pixel accommodating area; Among them, when the number of the connecting partition parts of a single partition unit is one, the light-emitting layer of the second sub-pixel is a continuous light-emitting layer; when the number of the connecting partition parts of a single partition unit is greater than one, the light-emitting layer of the second sub-pixel is separated by the connecting partition parts to form a discontinuous light-emitting layer.

9. The display panel according to claim 8, characterized in that: The connecting partition portion is perpendicular to corresponding sides of the outer ring partition portion and the inner ring partition portion.

10. The display panel according to claim 8, characterized in that: The partition unit is defined with a first partition central axis and a second partition central axis, the first partition central axis is along the row direction of the partition unit matrix, the second partition central axis is along the column direction of the partition unit matrix, and the partition unit is in an axisymmetric structure along the first partition central axis and the second partition central axis; The number of the connecting partition parts of a single partition unit is one, the connecting partition part is electrically connected to the corresponding sides of the outer ring partition part and the inner ring partition part, and the connecting partition part extends along the first partition central axis, or extends along the second partition central axis, or is arranged at an angle with the first partition central axis and the second partition central axis; Or; the number of the connecting partition parts of a single partition unit is two, the two connecting partition parts respectively connect different corresponding sides of the outer ring partition part and the inner ring partition part, and the two connecting partition parts respectively extend along the first partition central axis and the second partition central axis, or the two connecting partition parts are both arranged at an angle to the first partition central axis and the second partition central axis; Or; the number of the connecting partition parts of a single partition unit is four, the four connecting partition parts respectively connect different corresponding sides of the outer ring partition part and the inner ring partition part, two of the four connecting partition parts extend along the first partition central axis, and the other two extend along the second partition central axis, or each of the four connecting partition parts is set at an angle to the first partition central axis and the second partition central axis.

Images