Millimeter wave single-bit synthetic aperture radar signal processing system

Abstract

The invention discloses a millimeter wave single-bit synthetic aperture radar signal processing system. Comprising a signal conversion module used for being connected with a radio frequency system, converting a first analog signal output by the radio frequency system into a first digital signal and outputting the first digital signal; the control processing module is connected with the signal conversion module and used for receiving the first digital signal, analyzing and processing the first digital signal and then outputting a second digital signal; the signal conversion module is used for converting the linear frequency modulation digital signal into a second analog signal and outputting the second analog signal to the radio frequency system; the upper computer is in communication connection with the control processing module and is used for performing single-bit data synthesis on the second digital signal to obtain a radar image; and the storage module is connected with the control processing module and is used for storing the first digital signal and an operation program of the control processing module. The invention aims to improve the data processing capability and the data storage capability of a radar digital system.

Description

Technical Field

[0001] The invention relates to the field of radar signal systems, and in particular to a millimeter wave single-bit synthetic aperture radar signal processing system. Background Art

[0002] Compared with centimeter or decimeter wave radar, millimeter wave radar has advantages such as high resolution and small antenna, which is more conducive to the miniaturization of the overall system. Therefore, the drone market has made great progress, and small and medium-sized civilian drones and large industrial drones have emerged like a blowout. Mounting millimeter wave synthetic aperture radar on small and medium-sized drones for radar data collection has become a hot topic in the field of synthetic aperture radar. Compared with traditional synthetic aperture radar, millimeter wave synthetic aperture radar naturally has the advantages of smaller size and lower power consumption.

[0003] The data rate of the I (in-phase) signal and Q (quadrature) signal is 3.2Gbps when the 16-bit DAC is sampled at a 100MHz sampling rate. If the radar needs to detect a longer distance, the sampling rate of the DAC needs to be higher, which may cause the data rate to exceed 10Gbps. However, the data processing and storage capabilities of the current radar digital system cannot meet the radar's detection at a longer distance. Summary of the invention

[0004] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a millimeter-wave single-bit synthetic aperture radar signal processing system to enhance the data processing capability and data storage capability of the radar digital system.

[0005] The technical solution of the present invention is as follows: The present invention provides a millimeter wave single-bit synthetic aperture radar signal processing system, comprising: A signal conversion module, used for connecting to the radio frequency system and converting the first analog signal output by the radio frequency system into a first digital signal for output; A control processing module, connected to the signal conversion module, and also used for communication connection with the host computer, the control processing module is used for receiving the first digital signal, and outputting it to the host computer after analyzing and processing; The control processing module is further used to generate a linear frequency modulation digital signal within a preset frequency range and output it to the signal conversion module. The signal conversion module is further used to convert the linear frequency modulation digital signal into a second analog signal and then output it to the radio frequency system; A storage module is connected to the control processing module, and is used to store the first digital signal and the operating program of the control processing module.

[0006] Optionally, the signal conversion module includes: A digital-to-analog converter, used to connect to the radio frequency system and the control processing module, the digital-to-analog converter is used to receive the linear frequency modulation digital signal output by the control processing module, and convert it into a second analog signal and then output it to the radio frequency system; The analog-to-digital converter is used to connect to the radio frequency system and the control processing module. The analog-to-digital converter is used to receive the first analog signal output by the radio frequency system, convert it into a first digital signal, and then output it to the control processing module.

[0007] Optionally, the digital-to-analog converter is used to receive a linear frequency modulated digital signal with a frequency range of 50MHz-500MHz output by the control processing module at a sampling rate of 12GSPS, and modulate the linear frequency modulated digital signal from 50MHz-500MHz to 2.53GHz-2.98GHz, and then perform digital-to-analog conversion after filtering, and output a second analog signal of 2.53GHz-2.98GHz to the RF system.

[0008] Optionally, the analog-to-digital converter is used to enter a training mode when receiving a training trigger signal output by the control processing module; In the training mode, the analog-to-digital converter repeatedly sends a fixed training codeword to the control processing module, and the control processing module adjusts the delay and bit shift of each data channel according to the training codeword sent by the analog-to-digital converter. When the control processing module receives the training codeword sent by the analog-to-digital converter and it matches the preset standard, it outputs a working trigger signal to the analog-to-digital converter to control the analog-to-digital converter to enter the working mode; In the working mode, the analog-to-digital converter receives a first analog signal output by the radio frequency system, converts the first analog signal into a first digital signal, and then outputs the first digital signal to the control processing module.

[0009] Optionally, the host computer is used to perform IQ amplitude and phase correction on the second digital signal, filter the second digital signal according to a preset frequency, and then perform single-bit data sampling on the second digital signal to synthesize a radar image.

[0010] Optionally, the control processing module includes: A processor is connected to the signal conversion module and is also used to communicate with the host computer. The control processing module is used to receive the first digital signal and output it to the host computer after analyzing and processing it; A field programmable gate array is connected to the signal conversion module, and the field programmable gate array is used to generate a linear frequency modulation digital signal within a preset frequency range and output it to the signal conversion module.

[0011] Optionally, the field programmable gate array comprises: A pulse generator, used for generating a pulse signal; A waveform parameter configuration module, connected to the pulse generator, and configured to configure the parameters of the pulse signal before outputting it; A phase step calculation module, connected to the waveform parameter configuration module, and configured to perform phase step calculation on the pulse signal output by the waveform parameter configuration module and then output the result; A phase accumulation module, connected to the phase step calculation module, and configured to perform phase accumulation on the pulse signal output by the phase step calculation module and then output the result; The phase-amplitude mapping module is connected to the phase accumulation module and the signal conversion module respectively, and is used to perform phase-amplitude mapping on the pulse signal output by the phase accumulation module and then output a linear frequency modulated digital signal to the signal conversion module.

[0012] Optionally, the storage module includes: A first memory bar, connected to the processor, and used to store a running program of the processor; A second memory bar, connected to the signal conversion module and the field programmable gate array, the second memory bar being used to cache the first digital signal output by the signal conversion module; Solid-state drive; A solid-state drive read / write module is respectively connected to the solid-state drive and the second memory stick, and is also connected to the processor. The solid-state drive read / write module writes the first digital signal cached by the second memory stick into the solid-state drive. The solid-state drive read / write module is also used to output the first digital signal cached by the second memory stick to the processor.

[0013] Optionally, the storage module further includes: A storage control module is connected to the first memory bar and the second memory bar respectively, and is also connected to the control processing module. The storage control module is used to detect the remaining space size of the first memory bar and the second memory bar, and output a corresponding cache space signal to the control processing module. The control processing module is used to output an alarm signal when a cache overflow is detected according to the cache space signal.

[0014] Optionally, it also includes: An inertial navigation interface is used to connect the inertial navigation module. The inertial navigation interface is connected to the storage module. The storage module is used to receive and store the inertial navigation data output by the inertial navigation module through the inertial navigation interface. The control processing module is also used to read the inertial navigation data in the storage module.

[0015] The technical solution of the present invention constitutes a millimeter wave single-bit synthetic aperture radar signal processing system through a signal conversion module, a control processing module, a host computer and a storage module, wherein the signal conversion module is used to connect to the radio frequency system, and convert the first analog signal output by the radio frequency system into a first digital signal and then output it to the control processing module, the control processing module can analyze and process the first digital signal and then output the second digital signal to the host computer, and the host computer can synthesize the second digital signal using single-bit data to obtain a radar image; the control processing module is also used to generate a linear frequency modulation digital signal within a preset frequency range and output it to the signal conversion module, and the signal conversion module is also used to convert the linear frequency modulation digital signal into a second analog signal and then output it to the radio frequency system; the storage module is used to store the first digital signal and the operating program of the control processing module. In this way, the present invention analyzes and processes the first digital signal through the control processing module to output the second digital signal, and generates a linear frequency modulation digital signal within a preset frequency range, and the host computer synthesizes the second digital signal using single-bit data to obtain a radar image; the storage module is also used to store the first digital signal and the operating program of the control processing module, which can improve the data processing capability and data storage capability of the millimeter wave single-bit synthetic aperture radar signal processing system. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary personnel in this field, other drawings can be obtained based on the structures shown in these drawings without paying any creative work.

[0017] Figure 1 It is a functional module diagram of an embodiment of a millimeter-wave single-bit synthetic aperture radar signal processing system of the present invention.

[0018] Figure 2 It is a functional module diagram of another embodiment of the millimeter-wave single-bit synthetic aperture radar signal processing system of the present invention.

[0019] Figure 3 It is a functional module diagram of another embodiment of the millimeter-wave single-bit synthetic aperture radar signal processing system of the present invention.

[0020] Figure 4 The present invention is a pin power-on flow chart of a digital-to-analog converter in a millimeter-wave single-bit synthetic aperture radar signal processing system according to an embodiment of the present invention.

[0021] Figure 5 It is a register configuration flow chart of an embodiment of a digital-to-analog converter in a millimeter-wave single-bit synthetic aperture radar signal processing system of the present invention.

[0022] Figure 6 The present invention is a flow chart of an embodiment of a control processing module generating a linear frequency modulation digital signal in a millimeter wave single-bit synthetic aperture radar signal processing system.

[0023] Figure 7 The present invention is a schematic diagram of the control of the analog-to-digital converter and data reception by the control processing module in the millimeter-wave single-bit synthetic aperture radar signal processing system.

[0024] Figure 8 The present invention is a schematic diagram of a data cache process of a storage module in a millimeter-wave single-bit synthetic aperture radar signal processing system according to an embodiment of the present invention.

[0025] Fig. 9 The present invention is a flow chart of network port data transmission in a communication module of a millimeter wave single-bit synthetic aperture radar signal processing system according to an embodiment of the present invention.

[0026] Fig.10 It is a radar data processing flow chart of an upper computer in an embodiment of a millimeter-wave single-bit synthetic aperture radar signal processing system of the present invention.

[0027] Explanation of the accompanying drawings: 10, control processing module; 20, signal conversion module; 30, storage module; 11, processor; 12, field programmable gate array; 21, digital-to-analog converter; 22, analog-to-digital converter; 31, first memory stick; 32, second memory stick; 33, solid-state drive; 41, LoRa module; 42, gigabit network port; J, inertial navigation interface; 50, host computer. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention is further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0029] In the embodiments and the scope of the patent application, unless the text specifically defines the article, "a", "an", "the" and "the" may also include plural forms. If there are descriptions involving "first", "second", etc. in the embodiments of the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features.

[0030] It should be further understood that the term "comprising" used in the specification of the present invention refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when an element is said to be "connected" or "coupled" to another element, it can be directly connected or coupled to the other element, or there can also be intermediate elements. In addition, the "connection" or "coupling" used herein can include wireless connection or wireless coupling. The term "and / or" used herein includes all or any unit and all combinations of one or more associated listed items.

[0031] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as generally understood by those skilled in the art in the art to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with the meanings in the context of the prior art, and will not be interpreted with idealized or overly formal meanings unless specifically defined as herein.

[0032] In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0033] Compared with centimeter or decimeter wave radar, millimeter wave radar has advantages such as high resolution and small antenna, which is more conducive to the miniaturization of the overall system. Therefore, the drone market has made great progress, and small and medium-sized civilian drones and large industrial drones have emerged like a blowout. Mounting millimeter wave synthetic aperture radar on small and medium-sized drones for radar data collection has become a hot topic in the field of synthetic aperture radar. Compared with traditional synthetic aperture radar, millimeter wave synthetic aperture radar naturally has the advantages of smaller size and lower power consumption.

[0034] The data rate of the I (in-phase) signal and Q (quadrature) signal is 3.2Gbps when the 16-bit DAC is sampled at a 100MHz sampling rate. If the radar needs to detect a longer distance, the sampling rate of the DAC needs to be higher, which may cause the data rate to exceed 10Gbps. However, the data processing and storage capabilities of the current radar digital system cannot meet the radar's detection at a longer distance.

[0035] To this end, the present invention proposes a millimeter-wave single-bit synthetic aperture radar signal processing system.

[0036] Reference Figure 1In one embodiment, the millimeter wave single-bit synthetic aperture radar signal processing system includes: The signal conversion module 20 is used to connect to the radio frequency system and convert the first analog signal output by the radio frequency system into a first digital signal and then output it; A control processing module 10 is connected to the signal conversion module 20, and the control processing module 10 is used to receive the first digital signal, and output a second digital signal after analyzing and processing; The control processing module 10 is also used to generate a linear frequency modulation digital signal within a preset frequency range and output it to the signal conversion module 20. The signal conversion module 20 is also used to convert the linear frequency modulation digital signal into a second analog signal and then output it to the radio frequency system; A host computer 50 is connected to the control processing module 10 for communication, and the host computer 50 is used to synthesize the second digital signal using single-bit data to obtain a radar image; The storage module 30 is connected to the control processing module 10 , and is used to store the first digital signal and the operating program of the control processing module 10 .

[0037] In this embodiment, the millimeter wave single-bit synthetic aperture radar signal processing system can generate and transmit a digital signal waveform to the radio frequency system, or receive an analog signal output by the radio frequency system, and convert it into a digital signal and output it to the host computer 50. The signal conversion module 20 can be composed of an analog-to-digital converter 21 (ADC) and an analog-to-digital converter 22 (DAC), so that the mutual conversion between digital signals and analog signals can be realized through the signal conversion module 20. The control processing module 10 can be composed of a processor 11 and a controller and other devices. The processor 11 can be a microprocessor and other devices, and the controller can be a field programmable gate array 12 (Field Programmable Gate Array, referred to as FPGA) or a programmable logic device (Programmable Logic Device, referred to as PLD), etc. The processor 11 in the control processing module 10 can analyze and process the first digital signal and then output the second digital signal to the host computer 50, which can be sent to the host computer 50 by wireless communication or wired communication; the host computer 50 can be a computer and other equipment, and the host computer 50 can synthesize the second digital signal with single-bit data to obtain a radar image. It can be understood that compared with imaging with 16-bit or 12-bit data, the single-bit data imaging in this solution can reduce the amount of data, thereby improving the data processing capability of the millimeter-wave single-bit synthetic aperture radar signal processing system.

[0038] In addition, the field programmable gate array 12 can also generate a linear frequency modulated digital signal within a preset frequency range and output it to the signal conversion module 20, for example, by using a waveform generation technology based on phase accumulation and phase amplitude mapping to generate a linear frequency modulated digital signal, and the preset frequency range can be 50MHz-500MHz; the signal conversion module 20 can convert the frequency modulated digital signal into a second analog signal and then output it to the radio frequency system. In this way, the millimeter wave single-bit synthetic aperture radar signal processing system can complete the signal reception and signal transmission of the radio frequency system. The storage module 30 can be composed of multiple storage devices, such as memory sticks and solid state hard disks 33 and other storage devices, which can store the first digital signal and the operating program of the control processing module 10. By caching data through the memory stick, data loss due to delayed response of the solid state hard disk 33 during storage can be avoided, and the processor 11 resources with limited resources in the control processing module 10 can be avoided. The resource, thereby improving the data storage capacity of the radar digital system; the operating program of the control processing module 10 can include an operating program for parsing and processing the first digital signal, and a timing control program for other modules and peripheral devices in the millimeter wave single-bit synthetic aperture radar signal processing system.

[0039] The technical solution of the present invention constitutes a millimeter-wave single-bit synthetic aperture radar signal processing system through a signal conversion module 20, a control processing module 10 and a storage module 30, wherein the signal conversion module 20 is used to connect to the radio frequency system, and convert the first analog signal output by the radio frequency system into a first digital signal and then output it to the control processing module 10, the control processing module 10 can analyze the first digital signal and then output a second digital signal to the host computer 50, and the host computer 50 can synthesize the second digital signal using single-bit data to obtain a radar image; the control processing module 10 is also used to generate a linear frequency modulated digital signal within a preset frequency range and output it to the signal conversion module 20, and the signal conversion module 20 is also used to convert the linear frequency modulated digital signal into a second analog signal and then output it to the radio frequency system; the storage module 30 is used to store the first digital signal and the running program of the control processing module 10. In this way, the present invention analyzes and processes the first digital signal through the control processing module 10 to output the second digital signal, and generates a linear frequency modulation digital signal within a preset frequency range, and the host computer 50 uses single-bit data synthesis to obtain a radar image for the second digital signal; the storage module 30 is also used to store the first digital signal and the operating program of the control processing module 10, which can improve the data processing capability and data storage capability of the millimeter-wave single-bit synthetic aperture radar signal processing system.

[0040] Reference Figures 2 to 3 In one embodiment, the signal conversion module 20 includes: A digital-to-analog converter 21 is used to connect to the radio frequency system and to the control processing module 10. The digital-to-analog converter 21 is used to receive the linear frequency modulation digital signal output by the control processing module 10, convert it into a second analog signal, and then output it to the radio frequency system; The analog-to-digital converter 22 is used to connect to the radio frequency system and to the control processing module 10 . The analog-to-digital converter 22 is used to receive the first analog signal output by the radio frequency system, convert it into a first digital signal, and then output it to the control processing module 10 .

[0041] In this embodiment, the signal conversion module 20 can be composed of a digital-to-analog converter 21 and an analog-to-digital converter 22. The digital-to-analog converter 21 and the analog-to-digital converter 22 can be used as two components that complement each other in signal processing in a digital system. The collaborative work of the digital-to-analog converter 21 and the analog-to-digital converter 22 can realize data acquisition, transmission and processing. The digital-to-analog converter 21 can receive the linear frequency modulated digital signal output by the control processing module 10, and output it to the radio frequency system after converting it into a second analog signal; the analog-to-digital converter 22 can receive the first analog signal output by the radio frequency system, and output it to the control processing module 10 after converting it into a first digital signal. In this way, the signal reception and signal transmission of the radio frequency system can be completed.

[0042] In one embodiment, the digital-to-analog converter 21 is used to receive a linear frequency modulated digital signal with a frequency range of 50MHz-500MHz output by the control processing module 10 at a sampling rate of 12GSPS, and modulate the linear frequency modulated digital signal from 50MHz-500MHz to 2.53GHz-2.98GHz, and then perform digital-to-analog conversion after filtering, and output a second analog signal of 2.53GHz-2.98GHz to the RF system.

[0043] In this embodiment, a digital-to-analog converter 21 of the AD9162 model can be used, and other types of digital-to-analog converters 21 can also be selected according to actual conditions and user needs. The workflow of the digital-to-analog converter 21 may include an initialization process and a normal working process. The initialization process is: after the control processing module 10 receives a command to turn on the digital-to-analog converter 21 (the processor 11 in the control processing module 10 parses the received wireless communication command), the power-on timing of the digital-to-analog converter 21 is controlled by controlling the voltage conversion chip on the millimeter-wave single-bit synthetic aperture radar signal processing system. The pin power-on sequence of AD9162 can refer to Figure 4 It should be noted that Figure 4The pins in are the pins of AD9162. First, the four pins of digital pin IOVDD, clock circuit pin VDD12_CLK, analog part pin VDD12A and digital circuit pin DVDD are powered on. Then, the five pins of negative power supply pin VNEG_N1P2, positive power supply pin VDD_1P2, phase-locked loop pin PLL_CLK_VDD12, digital circuit pin DVDD_1P2 and synchronization circuit pin SYNC_VDD_3P3 are powered on. Finally, the analog part pin VDD25_DAC is powered on. According to the different models of digital-to-analog converter 21, the pins corresponding to the power-on sequence will also be different. After the digital-to-analog converter 21 is powered on, the control processing module 10 can set the register of the digital-to-analog converter 21 through the serial peripheral interface (SPI) protocol, configure the working parameters, and enable the communication link between the digital-to-analog converter 21 and the control processing module 10; the communication core and the related control logic in the control processing module 10 establish a communication link with the digital-to-analog converter 21 to complete the code group synchronization and channel synchronization. The normal working process is: the control processing module 10 transmits the linear frequency modulated digital signal between 50MHz-500MHz to the digital-to-analog converter 21 through the communication link; the digital-to-analog converter 21 increases the sampling rate of the digital signal to 12GSPS through the internal interpolator; and then modulates the linear frequency modulated digital signal from 50MHz-500MHz to 2.53GHz-2.98GHz through the digital IQ modulator inside the digital-to-analog converter 21; the digital-to-analog converter 21 performs digital-to-analog conversion after inverse SINC filtering, and outputs an analog signal of 2.53GHz-2.98GHz.

[0044] Furthermore, the control processing module 10 can also use the SPI protocol to configure the digital-to-analog converter 21. The power-on configuration sequence of the registers of the digital-to-analog converter 21 can refer to Figure 5, first soft reset, then configure the digital-to-analog converter 21, communication and oscillator in turn. If the communication link is successfully established, the configuration is completed. If the communication link is not successfully established, return to the soft reset step to continue the configuration. In addition to the standard configuration process, the additional configuration parameters set in the present invention include (completed through the configuration register): the full-scale current of the digital-to-analog converter 21 is set to 40mA (0x042=0xFF, 0x041=0x03); turn on the NRZ (Non-Return-to-Zero) mode (0x152=0x00); enable 8 communication channels, and the interpolation coefficient is 3 (0x110=0x84); enable the inverse sinc filter and the digitally controlled oscillator (Numerically Controlled Oscillator, referred to as NCO), and select the upper sideband (0x111=D1); set the NCO frequency and turn on the NCO (0x113~0x119=0x01). It should be noted that in the brackets of the above configuration parameter description, the number before = represents the register number, and the number after = represents the value assigned to the register. In the present invention, since the output waveform of the digital-to-analog converter 21 is fixed, the value assigned to the register is unchanged. Figure 5 The oscillator configuration in is to control the oscillation frequency of the digital signal.

[0045] In one embodiment, the analog-to-digital converter 22 is used to enter a training mode when receiving a training trigger signal output by the control processing module 10; In the training mode, the analog-to-digital converter 22 repeatedly sends a fixed training codeword to the control processing module 10, and the control processing module 10 adjusts the delay and bit shift of each data channel according to the training codeword sent by the analog-to-digital converter 22. When the control processing module 10 receives the training codeword sent by the analog-to-digital converter 22 and it matches the preset standard, it outputs a working trigger signal to the analog-to-digital converter 22 to control the analog-to-digital converter 22 to enter the working mode; In the working mode, the analog-to-digital converter 22 receives the first analog signal output by the radio frequency system, converts the first analog signal into a first digital signal, and then outputs the first digital signal to the control processing module 10 .

[0046] In this embodiment, the model of the analog-to-digital converter 22 used in the present invention is described by taking AD9653 as an example. The maximum sampling rate of this analog-to-digital converter 22 is 125MSPS, and the sampling rate used in the present invention is 100MSPS. The control processing module 10 configures the register of the analog-to-digital converter 22 through the SPI interface, and receives the sampling data from the analog-to-digital converter 22 through the low-voltage differential signal (Low-Voltage Differential Signaling, referred to as LVDS) interface. In the present invention, a total of two sampling channels are used to sample the intermediate frequency signals of the I channel and the Q channel respectively. Each sampling channel corresponds to two LVDS interfaces, so there are a total of four LVDS interfaces; in addition, there are differential clock outputs (Differential Clock Output, referred to as DCO) and single-ended clock outputs (Single-ended Clock Output, referred to as FCO), which are used to control the sampling and serial-to-parallel conversion of LVDS data by the processing module 10. The working process of AD9653 is as follows. Figure 7 As shown, the ADC control module of AD9653 includes a dual-ended differential input buffer, a global clock buffer, a programmable delay component, an input serial / parallel converter and a splicing module, wherein the parameters and identifiers are for reference only, and interact with the ADC control module in the control processing module 10, so as to realize the control and data reception of the analog-to-digital converter 22 by the control processing module 10; the specific process of the analog-to-digital converter 22 entering the training mode is as follows: the control processing module 10 uses the SPI protocol to configure the working parameters of the analog-to-digital converter 22, and commands the analog-to-digital converter 22 to enter the LVDS training mode (because the delay of the data before reaching the control processing module 10 may be different, resulting in data bit misalignment, the training mode is required to adjust the additional delay of the control processing module 10 for each data line, so that the data is re-aligned inside the control processing module 10 In the LVDS training mode, the analog-to-digital converter 22 will repeatedly send fixed training code words, and the control processing module 10 will continuously adjust the delay and bit shift of each LVDS channel until the training code words sent by the analog-to-digital converter 22 received by the control processing module 10 match the preset standard, that is, the control processing module 10 correctly receives the training code words from the analog-to-digital converter 22. The specific correct judgment standard can be set according to the actual situation and user needs; then the control processing module 10 commands the analog-to-digital converter 22 to end the LVDS training mode through the SPI interface and enter the normal working state; the analog-to-digital converter 22 starts to receive the first analog signal output by the RF system, and converts it into a first digital signal and outputs it to the control processing module 10, and the control processing module 10 can package and cache the received data.

[0047] Reference Figures 2 to 3In one embodiment, the millimeter wave single-bit synthetic aperture radar signal processing system further includes: The inertial navigation interface J is used to connect the inertial navigation module. The inertial navigation interface J is connected to the storage module 30. The storage module 30 is used to receive and store the inertial navigation data output by the inertial navigation module through the inertial navigation interface J. The control processing module 10 is also used to read the inertial navigation data in the storage module 30.

[0048] In this embodiment, the inertial navigation module (INS module) is a device for providing navigation and positioning information. The INS module can estimate the motion state of an object, including position, speed and attitude, based on an inertial measurement unit (IMU) and other sensors. The INS module sends the recorded position information data to the control processing module 10 in the millimeter wave single-bit synthetic aperture radar signal processing system through the INS interface J. The control processing module 10 packages the INS data sent by the INS module with the first digital signal output by the received signal conversion module 20 and writes them into the solid state drive 33.

[0049] Furthermore, in one embodiment, after the radar data and the inertial navigation data are packaged, the output is a 100MHz / 32bit data stream; the data read and written by the memory chip is 400Hz / 32bit; the solid-state hard disk read and write module is 125MHz / 128bit, so the following is adopted: Figure 8 The structure shown implements the function of data caching and performs cross-clock domain processing and bit width conversion according to the requirements of upstream and downstream modules.

[0050] from Figure 8 It can be seen that the cache process of writing data to the solid-state drive 33 is: the packaged data first undergoes data bit width conversion: the 32-bit data bit width is converted into 128 bits, and then the data is cached in a small-capacity first-in-first-out buffer. If there is remaining space in the memory stick, the storage control module will transfer the data to the memory chip. When the solid-state drive 33 can receive data, the data in the memory stick will be sent to another small-capacity first-in-first-out buffer for a short cache through the storage control module, and finally sent to the write logic of the solid-state drive 33. In addition, the data can be output to the data cache status register through the storage control module, and the data cache status can be monitored through the cache management system; and the storage control module can be connected to the memory chip through the cache interconnect and the interface core.

[0051] In one embodiment, the host computer 50 is used to perform IQ amplitude and phase correction on the second digital signal, filter the second digital signal according to a preset frequency, and then perform single-bit data sampling on the second digital signal to synthesize a radar image.

[0052] In this embodiment, after obtaining the radar data output by the control processing module 10, that is, the second digital signal, the host computer 50 can process the data to obtain a radar image. It is understandable that due to the differences in the characteristics of the radar RF transceiver system components, the IQ two-way signal output by the control processing module 10, that is, the I (in-phase) signal and the Q (quadrature) signal, will have a certain phase and amplitude imbalance, so the radar raw data is firstly subjected to IQ amplitude and phase correction, and the specific correction procedure can be set according to the actual situation. It is understandable that since the present invention finally uses the sampled single-bit data for imaging, a fixed frequency offset is usually added to the IQ signal output in the traditional RF transceiver system for data processing, but when the frequency offset is added, the 3rd, 5th, 7th... and other odd harmonic components of the frequency will also be introduced, and the amplitude of the 3rd and 5th harmonics is usually larger. Therefore, the second step can filter the second digital signal according to the preset frequency, that is, use two bandpass filters to filter out the 3rd and 5th harmonics of the frequency offset respectively. The third step is to perform single-bit sampling on the signal, which can be specifically according to the following formula: ; Among them, s is the final sampling result, sample is the sampling value of the signal conversion module 20, and n is the quantization bit width of the signal conversion module 20. Single-bit sampling can greatly reduce the amount of data and is beneficial to subsequent data processing. Then, a distance-dimensional fast Fourier transform (Fast Fourier Transform, referred to as FFT) operation is performed to obtain a distance-dimensional compressed image, and then a direction-dimensional FFT is performed to transform the data from the range-time domain to the range-Doppler domain, and distance migration correction is performed in this domain. The azimuth matching filter can compensate for part of the radar motion error after being integrated into the inertial navigation data. The azimuth inverse fast Fourier transform (Inverse Fast Fourier Transform, referred to as IFFT) transforms the data back to the range-time domain, and finally the coordinate projection is performed according to the actual physical parameters of the radar to obtain the final radar image. The specific processing flow of the host computer 50 for the second digital signal can be referred to. Fig.10 . Compared with the traditional imaging method using 16-bit or 12-bit data, this scheme greatly reduces the amount of data. Compared with the traditional digital system using single-bit quantized analog-to-digital converters, the IQ amplitude and phase correction and filtering operations of this system are implemented using digital signal processing, while the traditional digital system using single-bit quantized ADC for sampling uses analog devices to implement these two operations from a hardware perspective. Therefore, the millimeter-wave single-bit synthetic aperture radar signal processing system of this scheme can flexibly adjust the parameters of IQ amplitude and phase correction and filtering without changing the actual hardware.

[0053] Reference Figures 2 to 3In one embodiment, the control processing module 10 includes: The processor 11 is connected to the signal conversion module 20 and is also used to communicate with the host computer 50. The control processing module 10 is used to receive the first digital signal and output it to the host computer 50 after analyzing and processing; The field programmable gate array 12 is connected to the signal conversion module 20 , and is used to generate a linear frequency modulation digital signal within a preset frequency range and output it to the signal conversion module 20 .

[0054] In this embodiment, the control processing module 10 can be composed of devices such as a processor 11 and a field programmable gate array 12. The processor 11 can be a microprocessor or other device, and the field programmable gate array 12 can also be replaced by a device with the same function such as a programmable logic device. The program for parsing the control instructions runs in the processor 11, and the parameters of the above-mentioned signal conversion module 20 can be configured after the instructions are parsed. The field programmable gate array 12 can also be connected to a solid-state hard disk configuration soft core, which is responsible for powering on the solid-state hard disk 33 in the storage module 30 and configuring the clock chip HMC7043 through the SPI interface.

[0055] In one embodiment, the field programmable gate array 12 includes: A pulse generator, used for generating a pulse signal; A waveform parameter configuration module, connected to the pulse generator, and configured to configure the parameters of the pulse signal before outputting it; A phase step calculation module, connected to the waveform parameter configuration module, and configured to perform phase step calculation on the pulse signal output by the waveform parameter configuration module and then output the result; A phase accumulation module, connected to the phase step calculation module, and configured to perform phase accumulation on the pulse signal output by the phase step calculation module and then output the result; The phase-amplitude mapping module is connected to the phase accumulation module and the signal conversion module 20 respectively. The phase-amplitude mapping module is used to perform phase-amplitude mapping on the pulse signal output by the phase accumulation module and then output a linear frequency modulated digital signal to the signal conversion module 20 .

[0056] In this embodiment, the field programmable gate array 12 can generate a linear frequency modulated digital signal for the digital-to-analog converter 21 in the input signal conversion module 20. The present invention requires that the signal bandwidth output by the digital-to-analog converter 21 is 500MHz. In order to improve the quality of the signal, the sampling rate of the digital signal generally needs to be a higher sampling rate such as 1GSPS or 2GSPS. Since the main frequency of the control processing module 10 cannot reach the sampling rate, a multi-channel parallel direct digital synthesis (Direct Digital Synthesis, referred to as DDS) solution is used in this embodiment to generate a linear frequency modulated digital signal. DDS is a type of waveform generation technology based on phase accumulation and phase amplitude mapping. The structural schematic diagram of the linear frequency modulated digital signal based on the multi-channel parallel DDS technology is shown in FIG. Figure 6 As shown, it mainly includes four sub-modules: waveform parameter configuration module, phase step calculation module, phase accumulation module and phase amplitude mapping module. Each phase accumulator has a different initial phase, but shares the phase step. The specific steps of generating a linear frequency modulation digital signal are: first generate a pulse signal through a pulse generator, the waveform parameter configuration module (signal source control module) is used to perform parameter configuration and reset control on the pulse signal according to the control instruction, and then output the corresponding initial frequency, frequency modulation slope and multiple initial phases to the phase step calculation module, the phase step calculation module is used to perform phase step calculation on the pulse signal output by the waveform parameter configuration module and then output it to the phase accumulation module, the phase accumulation module is used to perform phase accumulation on the pulse signal output by the phase step calculation module and then output it to the phase amplitude mapping module, the phase amplitude mapping module is used to perform phase amplitude mapping on the pulse signal output by the phase accumulation module and then generate a 500MHz linear frequency modulation digital signal and output it to the signal conversion module 20.

[0057] Reference Figures 2 to 3 In one embodiment, the storage module 30 includes: A first memory bar 31, connected to the processor 11, and used to store a running program of the processor 11; A second memory bar 32, connected to the signal conversion module 20 and the field programmable gate array 12, the second memory bar 32 is used to cache the first digital signal output by the signal conversion module 20; Solid state drive 33; The solid-state hard disk read-write module is connected to the solid-state hard disk 33 and the second memory stick 32 respectively, and is also connected to the processor 11. The solid-state hard disk read-write module writes the first digital signal cached by the second memory stick 32 into the solid-state hard disk 33. The solid-state hard disk read-write module is also used to output the first digital signal cached by the second memory stick 32 to the processor 11.

[0058] In this embodiment, the first memory bar 31 and the second memory bar 32 may be DDR3, and data caching may be implemented through the first memory bar 31 and the second memory bar 32. The solid state drive read / write module may write the first digital signal cached by the second memory bar 32 into the solid state drive 33, and the solid state drive read / write module may also output the first digital signal cached by the second memory bar 32 to the processor 11. It is understandable that, since the response delay of the solid state drive 33 in actual work is not stable enough, in order to ensure that the collected data will not be lost, the present invention adds data caching before writing to the solid state drive 33. In practical applications, 2ms is generally taken as the maximum write response delay of the solid state drive 33. The maximum data rate generated by the millimeter wave single-bit synthetic aperture radar signal processing system of the present invention is about 3.2Gbps, and the amount of data generated within 2ms is about 0.8MB (6.4Mb), that is, about 364 18Kb BRAMs are required, so the present invention uses the second memory bar 32 connected to the field programmable gate array 12 as a data cache. In the present invention, two 512MB DDR3 memory strips can be selected as buffers, that is, memory strips are cascaded to provide a 1GB cache capacity, which is sufficient to meet the performance requirements of the data cache part. This not only avoids the loss of data due to the delayed response of the solid state drive 33 during storage, but also avoids the large-scale use of the processor 11 resources in the control processing module 10, which are very scarce. In this embodiment, the chip program of the control processing module 10, such as the chip driver, can also be stored in Flash.

[0059] It should be noted that in Figure 3 In the processor 11 of the control processing module 10, the first digital signal is output to the LoRa module 41 after the control instruction parses the working status and returns it. The solid-state hard disk read-write module can read the data in the solid-state hard disk 33 and transmit the data to the gigabit network port 42 through the processor 11. The solid-state hard disk configuration soft core is the software configuration of the solid-state hard disk read-write module. DAC control and ADC control are control devices for the digital-to-analog converter 21 and the analog-to-digital converter 22 in the control processing module 10 respectively. The inertial measurement unit control soft core is to package and output the inertial navigation data output by the inertial navigation module. ADC control can also package the first digital signal, so that the first digital signal and the inertial navigation data are packaged and cached together and then output to the solid-state hard disk read-write module. The linear frequency modulation digital signal generation includes four sub-modules: waveform parameter configuration module, phase step calculation module, phase accumulation module and phase amplitude mapping module.

[0060] Reference Figures 2 to 3 In one embodiment, the storage module 30 further includes: A storage control module is connected to the first memory bar 31 and the second memory bar 32 respectively, and is also connected to the control processing module 10. The storage control module is used to detect the remaining space size of the first memory bar 31 and the second memory bar 32, and output the corresponding cache space signal to the control processing module 10. The control processing module 10 is used to output an alarm signal when a cache overflow is detected according to the cache space signal.

[0061] In this embodiment, the storage control module is the core of the data cache part. The storage control module can encapsulate DDR3 into a large-capacity first-in-first-out buffer and output the size of the remaining space to the corresponding status register for the program of the processor 11 in the control processing module 10 and the host computer 50 to monitor through the interface, and issue an alarm when the radar system operates abnormally and causes a cache overflow.

[0062] Reference Figure 2 In one embodiment, the millimeter wave single-bit synthetic aperture radar signal processing system includes: The communication module is used to connect to the host computer 50 . The communication module is connected to the control processing module 10 . The communication module is used to perform communication conversion on the first digital signal output by the control processing module 10 and then output it to the host computer 50 .

[0063] In this embodiment, the communication module may include a LoRa module 41 and a gigabit network port 42. The control processing module 10 in the millimeter wave single-bit synthetic aperture radar signal processing system may wirelessly communicate with the host computer 50 through the LoRa module 41, and then the host computer 50 may configure the operating parameters of the millimeter wave single-bit synthetic aperture radar signal processing system, and monitor its motion state. The millimeter wave single-bit synthetic aperture radar signal processing system of the present invention stores the echo data in the solid state drive 33 when working, and after completing the task, the data in the solid state drive 33 may be obtained through the network port on the digital board. The specific operation method is: connect the host computer 50 and the network port on the digital board through the gigabit network cable connected to the gigabit network port 42, and configure the network segment of the host computer 50 to make it consistent with the network segment of the digital board. Before starting the transmission, run the network port receiving data code of the host computer 50, and configure the host computer 50 to TCP server mode. Finally, control the LoRa module 41 connected to the host computer 50 to send data transmission instructions to the millimeter wave single-bit synthetic aperture radar signal processing system. After receiving the correct instructions, the millimeter wave single-bit synthetic aperture radar signal processing system can start transmitting data. The specific process of data transmission is as follows Fig. 9As shown, first, the LWIP protocol stack is initialized. If the LoRa module 41 receives a data sending instruction, the address information in the instruction is parsed, the number of transmissions is calculated, a read request is sent to the solid-state drive read controller, and the solid-state drive controller is waited for to move the data to the memory stick. The data in the memory stick is sent to the host computer 50 through the TCP protocol. After the transmission is completed, it continues to determine whether the LoRa module 41 has received the data sending instruction. If not, it returns to the step of sending a read request to the solid-state drive read controller; if the LoRa module 41 does not receive the data sending instruction, it returns to the step of initializing the LWIP protocol stack.

[0064] It should be understood that the application of the present invention is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A millimeter wave single-bit synthetic aperture radar signal processing system, characterized in that: include: A signal conversion module, used for connecting to the radio frequency system and converting the first analog signal output by the radio frequency system into a first digital signal for output; A control processing module connected to the signal conversion module, the control processing module is used to receive the first digital signal, and output a second digital signal after analyzing and processing; The control processing module is further used to generate a linear frequency modulation digital signal within a preset frequency range and output it to the signal conversion module. The signal conversion module is further used to convert the linear frequency modulation digital signal into a second analog signal and then output it to the radio frequency system; A host computer, which is in communication with the control processing module, and is used to synthesize the second digital signal using single-bit data to obtain a radar image; A storage module is connected to the control processing module, and is used to store the first digital signal and the operating program of the control processing module.

2. The millimeter-wave single-bit synthetic aperture radar signal processing system according to claim 1, characterized in that: The signal conversion module comprises: A digital-to-analog converter, used to connect to the radio frequency system and the control processing module, the digital-to-analog converter is used to receive the linear frequency modulation digital signal output by the control processing module, and convert it into a second analog signal and then output it to the radio frequency system; The analog-to-digital converter is used to connect to the radio frequency system and the control processing module. The analog-to-digital converter is used to receive the first analog signal output by the radio frequency system, convert it into a first digital signal, and then output it to the control processing module.

3. The millimeter-wave single-bit synthetic aperture radar signal processing system according to claim 2, characterized in that: The digital-to-analog converter is used to receive the linear frequency modulated digital signal with a frequency range of 50MHz-500MHz output by the control processing module at a sampling rate of 12GSPS, and modulate the linear frequency modulated digital signal from 50MHz-500MHz to 2.53GHz-2.98GHz, and then perform digital-to-analog conversion after filtering, and output a second analog signal of 2.53GHz-2.98GHz to the RF system.

4. The millimeter-wave single-bit synthetic aperture radar signal processing system according to claim 2, characterized in that: The analog-to-digital converter is used to enter a training mode when receiving a training trigger signal output by the control processing module; In the training mode, the analog-to-digital converter repeatedly sends a fixed training codeword to the control processing module, and the control processing module adjusts the delay and bit shift of each data channel according to the training codeword sent by the analog-to-digital converter. When the control processing module receives the training codeword sent by the analog-to-digital converter and it matches the preset standard, it outputs a working trigger signal to the analog-to-digital converter to control the analog-to-digital converter to enter the working mode; In the working mode, the analog-to-digital converter receives a first analog signal output by the radio frequency system, converts the first analog signal into a first digital signal, and then outputs the first digital signal to the control processing module.

5. The millimeter-wave single-bit synthetic aperture radar signal processing system according to claim 1, characterized in that: The host computer is used to perform IQ amplitude and phase correction on the second digital signal, and after filtering the second digital signal according to a preset frequency, perform single-bit data sampling on the second digital signal to synthesize a radar image.

6. The millimeter-wave single-bit synthetic aperture radar signal processing system according to claim 1, characterized in that: The control processing module comprises: A processor is connected to the signal conversion module and is also used to communicate with the host computer. The control processing module is used to receive the first digital signal and output it to the host computer after analyzing and processing it; A field programmable gate array is connected to the signal conversion module, and the field programmable gate array is used to generate a linear frequency modulation digital signal within a preset frequency range and output it to the signal conversion module.

7. The millimeter-wave single-bit synthetic aperture radar signal processing system according to claim 6, characterized in that: The field programmable gate array comprises: A pulse generator, used for generating a pulse signal; A waveform parameter configuration module, connected to the pulse generator, and configured to configure the parameters of the pulse signal before outputting it; A phase step calculation module, connected to the waveform parameter configuration module, and configured to perform phase step calculation on the pulse signal output by the waveform parameter configuration module and then output the result; A phase accumulation module, connected to the phase step calculation module, and configured to perform phase accumulation on the pulse signal output by the phase step calculation module and then output the result; The phase-amplitude mapping module is connected to the phase accumulation module and the signal conversion module respectively, and is used to perform phase-amplitude mapping on the pulse signal output by the phase accumulation module and then output a linear frequency modulated digital signal to the signal conversion module.

8. The millimeter-wave single-bit synthetic aperture radar signal processing system according to claim 6, characterized in that: The storage module comprises: A first memory bar, connected to the processor, and used to store a running program of the processor; A second memory bar, connected to the signal conversion module and the field programmable gate array, the second memory bar being used to cache the first digital signal output by the signal conversion module; Solid-state drive; A solid-state drive read / write module is respectively connected to the solid-state drive and the second memory stick, and is also connected to the processor. The solid-state drive read / write module writes the first digital signal cached by the second memory stick into the solid-state drive. The solid-state drive read / write module is also used to output the first digital signal cached by the second memory stick to the processor.

9. The millimeter-wave single-bit synthetic aperture radar signal processing system according to claim 8, characterized in that: The storage module also includes: A storage control module is connected to the first memory bar and the second memory bar respectively, and is also connected to the control processing module. The storage control module is used to detect the remaining space size of the first memory bar and the second memory bar, and output a corresponding cache space signal to the control processing module. The control processing module is used to output an alarm signal when a cache overflow is detected according to the cache space signal.

10. The millimeter wave single-bit synthetic aperture radar signal processing system according to claim 1, characterized in that: Also includes: An inertial navigation interface is used to connect the inertial navigation module. The inertial navigation interface is connected to the storage module. The storage module is used to receive and store the inertial navigation data output by the inertial navigation module through the inertial navigation interface. The control processing module is also used to read the inertial navigation data in the storage module.

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