T-shaped gate preparation method and T-shaped gate

Abstract

The invention discloses a T-shaped gate preparation method and a T-shaped gate. The method comprises the following steps: depositing a silicon nitride film on an epitaxial wafer and coating a first photoresist; exposing and developing the first photoresist by using an i-line photoetching machine to form a first photoresist pattern; performing hot reflux heating to form a second photoresist pattern with a shrunk opening; etching the silicon nitride film to form a gate manufacturing window; depositing a first metal film, coating a layer of thick glue, and exposing and developing by using an i-line stepping photoetching machine to form an area needing to be electroplated; thickening the first metal film into a second metal film by electroplating; coating a second photoresist, and exposing and developing by using an i-line stepping photoetching machine to form an area needing reverse electroplating; removing the second metal film which is not covered by the second photoresist through reverse electroplating; and removing the second photoresist pattern, and reserving the second metal film as a T-shaped gate. The T-shaped gate with smaller gate length can be prepared by using the traditional i-line photoetching machine, so that the equipment cost can be reduced, and the preparation efficiency can be improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor devices, and in particular relates to a T-type gate preparation method and a T-type gate. Background Art

[0002] Compound semiconductor materials (such as GaN, GaAs, InP) have many excellent properties, such as high critical breakdown electric field, high electron mobility, high two-dimensional electron gas concentration and good high-temperature working ability. Devices such as high electron mobility transistors (HEMTs) and heterostructure field effect transistors (HFETs) based on compound semiconductors have been widely used, especially in the fields of radio frequency and microwave that require high power and high frequency.

[0003] In the manufacturing process of compound semiconductor RF power devices, the production of T-type gate electrodes is a key process. T-type gate refers to a T-shaped gate electrode with a mushroom-shaped cross-section. The gate root at the bottom that contacts the semiconductor surface is very narrow, which can increase the cutoff frequency of the device, while the gate cap at the top is very wide, which can reduce the resistance of the gate. However, when it is necessary to achieve gate length lines that cannot be achieved by traditional i-line lithography machines (such as 0.25 and 0.15μm), it is inevitable to require expensive and slow electron beam lithography machines, or DUV stepper lithography machines that are not commonly used in compound semiconductor processes.

[0004] Therefore, there is an urgent need for a T-type gate with a smaller gate length that can be prepared using a traditional i-line lithography machine to reduce equipment costs and improve preparation efficiency. Summary of the invention

[0005] The purpose of the present invention is to provide a T-type gate preparation method and a T-type gate, which can use a traditional i-line lithography machine to prepare a T-type gate with a smaller gate length, thereby reducing equipment costs and improving preparation efficiency.

[0006] One aspect of the present invention provides a method for preparing a T-gate, comprising:

[0007] Step S1: providing an epitaxial wafer;

[0008] Step S2: depositing a silicon nitride film on the epitaxial wafer;

[0009] Step S3: coating a layer of first photoresist on the silicon nitride film, wherein the first photoresist is a thermal reflow resin;

[0010] Step S4: using an i-line stepper to expose and develop the first photoresist to form an open first photoresist pattern;

[0011] Step S5: performing thermal reflow heating on the first photoresist pattern to form a second photoresist pattern having an opening smaller than that of the first photoresist pattern;

[0012] Step S6: using the second photoresist pattern as a mask, using plasma etching to etch the silicon nitride film to form a gate manufacturing window;

[0013] Step S7: depositing a first metal film on the second photoresist pattern and in the gate manufacturing window;

[0014] Step S8: coating a thick layer of resist on the first metal film, exposing and developing using an i-line stepper lithography machine to form an area requiring electroplating;

[0015] Step S9: thickening the first metal film in the area to be electroplated into a second metal film by electroplating, and removing the thick glue;

[0016] Step S10: coating a layer of second photoresist on the second metal film, exposing and developing the second photoresist using an i-line stepper lithography machine to form an area requiring reverse electroplating;

[0017] Step S11: removing the second metal film not covered by the second photoresist by reverse electroplating;

[0018] Step S12: removing the second photoresist pattern and retaining the second metal film to form a T-type gate.

[0019] Preferably, the opening of the second photoresist pattern is smaller than that of the first photoresist pattern by 0.13-0.18 μm.

[0020] Preferably, the first metal film has a thickness of 100 nm to 150 nm, and the second metal film has a thickness of 400 nm to 500 nm thicker than the first metal film.

[0021] Preferably, the first metal film is a multi-layer metal film, and the materials of the multi-layer metal film are Ni, Au or Ti, Au or Mo, Ti, and Au from bottom to top.

[0022] Preferably, in step S9, a cyanide-free gold plating solution is used for electroplating, and the uppermost Au layer of the first metal film is used as the starting layer for gold electroplating.

[0023] Preferably, in step S8, the coating thickness of the thick glue is 20-50 um.

[0024] Preferably, in step S5, heating is performed using a hot plate, the heating temperature is 155-160° C., and the heating time is 5-6 min.

[0025] Preferably, in step S6, the equipment used for the plasma etching is a barrel plasma etcher, a parallel plate plasma etcher, a downstream plasma etcher, a RIE etcher, an ECR etcher or an ICP etcher, and the plasma is an O-based gas, a Cl-based gas or a F-based gas.

[0026] Preferably, the F-based gas is SF 6 , the Cl-based gas is BCl 3 , Cl 2 、COCl 2 , CCl 4 , CCl 2 F 2 、PCl 3 , HCl, Cl 2 With BCl 3 A mixture of CF 2 Cl 2 or CCl 4 , the O-based gas is O 2 or 2 A mixture with Ar.

[0027] Another aspect of the present invention provides a T-type grid, which is prepared by the above method.

[0028] According to the T-type gate preparation method and the T-type gate of the above aspects of the present invention, a T-type gate with a smaller gate length can be prepared using a traditional i-line lithography machine, which can reduce equipment costs and improve preparation efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings used in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work:

[0030] Figure 1 is a flow chart of a method for preparing a T-type gate according to an embodiment of the present invention;

[0031] Figure 2 It is a schematic diagram of the process of a method for preparing a T-type gate according to an embodiment of the present invention. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0033] An embodiment of the present invention provides a method for preparing a T-type gate. Figure 1 FIG. 1 is a flow chart of a method for preparing a T-type gate according to an embodiment of the present invention. Figure 1 As shown, the T-gate preparation method according to the embodiment of the present invention includes steps S1 to S12.

[0034] In step S1, an epitaxial wafer is provided. In this step, a clean, contamination-free epitaxial wafer 11 is obtained by a method known in the art, such as Figure 2 As shown in (a).

[0035] In step S2, a silicon nitride film is deposited on the epitaxial wafer.

[0036] In this step, if Figure 2 As shown in (b), a layer of silicon nitride film 12 is deposited on the surface of the epitaxial wafer 11. In one embodiment, the silicon nitride film 12 is deposited using LPCVD to a thickness of Preferably

[0037] In step S3, a layer of first photoresist is coated on the silicon nitride film.

[0038] In this step, if Figure 2 As shown in (c), a first photoresist 13 is coated on the surface of the silicon nitride film 12. The first photoresist 13 is a thermal reflow glue.

[0039] In step S4, an i-line photolithography machine is used to expose and develop the first photoresist to form an open first photoresist pattern.

[0040] In this step, if Figure 2 As shown in (d), the first photoresist 13 is exposed and developed using an i-line lithography machine to form an opening first photoresist pattern 14. The exposure in this step is performed using a conventional i-line lithography machine. Preferably, the conventional i-line lithography machine is a stepper lithography machine. Then, by developing, the first photoresist in the mask shielding area not used for exposure is removed to form the first photoresist pattern 14.

[0041] In step S5 , the first photoresist pattern is subjected to thermal reflow heating to form a second photoresist pattern having an opening smaller than that of the first photoresist pattern.

[0042] In this step, the first photoresist pattern 14 is subjected to thermal reflow heating, and the second photoresist pattern 15 formed by thermal reflow is as shown in FIG. Figure 2 As shown in (e). In this step, the heating method is an oven and a hot plate, the heating temperature is 120-200°C, and the time is 3-10 minutes. The preferred heating method is a hot plate, the heating temperature is 155-160°C, and the time is 5-6 minutes. The opening of the second photoresist pattern 15 is 0.13-0.18 μm smaller than the first photoresist pattern 14.

[0043] In step S6, the silicon nitride film is etched using plasma etching with the second photoresist pattern as a mask to form a gate manufacturing window.

[0044] In this step, if Figure 2 As shown in (f), the silicon nitride film 12 is etched by plasma etching using the second photoresist pattern 15 as a mask to form a gate manufacturing window 16. The equipment used for the plasma etching is a barrel plasma etcher, a parallel plate plasma etcher, a downstream plasma etcher, a RIE etcher, an ECR etcher or an ICP etcher. According to the concentration of the etching plasma and the requirement for more isotropic etching, an ICP etcher is preferably used. The plasma includes but is not limited to O-based gases, Cl-based gases, and F-based gases. Based on the uniformity and low damage requirements of etching, F-based gases are preferred. Preferably, the F-based gas is SF 6 Based on the need to manufacture normally-off devices, it is most preferred to use F-based gas for plasma etching, and it is less preferred to use Cl-based gas and O-based gas for plasma etching. The Cl-based gas is BCl 3 , Cl 2 、COCl 2 , CCl 4 , CCl 2 F 2 、PCl 3 , HCl, Cl 2 and BCl 3 A mixture of CF 2 Cl 2 or CCl 4 The O-based gas is O 2 or 2 A mixture of argon and argon.

[0045] In step S7 , a first metal film is deposited over the second photoresist pattern and in the gate fabrication window.

[0046] In this step, if Figure 2As shown in (g), a first metal film 17 is deposited above the second photoresist pattern 15 and in the gate manufacturing window 16. Methods for depositing metal include but are not limited to CVD, PVD and ALD. In one embodiment, PVD is used to deposit metal, and the PVD includes but is not limited to electron beam evaporation and magnetron sputtering. The material of the first metal film 17 includes but is not limited to Au, Ni, Ti, Al, Ta, Mo and Pt. Preferably, the first metal film 17 is a multilayer metal film. Preferably, based on the requirements of adhesion, barrier layer and conductivity, the materials of the multilayer metal film are Ni, Au or Ti, Au or Mo, Ti, Au from bottom to top. The thickness of the first metal film 17 is 100nm to 150nm.

[0047] In step S8, a thick layer of resist is coated on the first metal film, and an i-line stepper is used to expose and develop the film to form an area requiring electroplating.

[0048] In this step, if Figure 2 As shown in (h), a layer of thick resist 18 is coated on the first metal film 17, and an i-line stepper is used to expose and develop the layer to form an area that needs to be electroplated (the area of ​​the first metal film 17 not covered by the remaining thick resist 18 in the figure). In one embodiment, the thickness of the thick resist is 20 to 50 um.

[0049] In step S9 , the first metal film in the area requiring electroplating is thickened into a second metal film by electroplating, and the thick resist is removed.

[0050] In this step, the first metal film in the area to be plated is thickened by electroplating, and the second metal film 19 formed after the thickening is as shown in FIG. Figure 2 In one embodiment, the second metal film 19 is 400-500 nm thicker than the first metal film 17. In the embodiment where the first metal film 17 is a multi-layer metal film and the top layer is Au, the electroplating method is to use a cyanide-free gold plating solution to electroplate gold with Au on the first metal film 17 as the starting layer.

[0051] In step S10, a layer of second photoresist is coated on the second metal film, and an i-line stepper is used to expose and develop the second photoresist to form an area requiring reverse electroplating.

[0052] In this step, a layer of second photoresist 20 is coated on the second metal film 19, and the second photoresist 20 is exposed and developed using an i-line stepper lithography machine to form an area that requires reverse electroplating, such as Figure 2 As shown in (j), the area not covered by the second photoresist 20 in the figure is the area that needs reverse plating.

[0053] In step S11 , the second metal film not covered by the second photoresist is removed by reverse plating.

[0054] In this step, a reverse plating machine is used to perform a reverse plating process to remove the second metal film 19 that is not covered and protected by the second photoresist. Figure 2 In one embodiment, based on the consideration of removing the second metal film 19 that is not protected by the second photoresist 20, a wet etching or dry etching step can be added. Preferably, based on the consideration of device reliability, dry etching is used for removal. Specifically, Ar or Ar / O 2 Plasma removal.

[0055] In step S12, the second photoresist pattern is removed, and the second metal film is retained to form a T-type gate.

[0056] In this step, the second photoresist pattern 15 is removed, and the second metal film 19 is retained as the gate metal, thereby obtaining a T-type gate. Figure 2 In one embodiment, the second photoresist pattern 15 is removed by a dry process or a wet process. Specifically, the dry process is: 2 Plasma ashing process, the wet process uses a photoresist remover. Preferably, the photoresist remover is EKC.

[0057] An embodiment of the present invention further provides a T-type gate, which is prepared by using the T-type gate preparation method of the above embodiment of the present invention as described above.

[0058] The T-gate preparation method of the above-mentioned embodiment of the present invention adopts a traditional i-line stepper lithography machine with a relatively large line width, and can prepare a T-gate with a small gate length, thereby reducing the equipment cost of the T-gate preparation, improving the device preparation efficiency, and reducing the cost. It can be used for the preparation of HEMT devices, reducing the requirements of the small gate length HEMT devices on the equipment, and overcoming the problems of increased equipment cost and low preparation efficiency caused by the fact that the T-gate with a gate length of 0.25μm or less inevitably requires an expensive and slow electron beam lithography machine, or requires a DUV stepper lithography machine that is not commonly used in compound semiconductor processes.

[0059] The above description is only by way of illustration of certain exemplary embodiments of the present invention. It is undoubted that those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A method for preparing a T-gate, characterized in that: include: Step S1: providing an epitaxial wafer; Step S2: depositing a silicon nitride film on the epitaxial wafer; Step S3: coating a layer of first photoresist on the silicon nitride film, wherein the first photoresist is a thermal reflow resin; Step S4: using an i-line stepper to expose and develop the first photoresist to form an open first photoresist pattern; Step S5: performing thermal reflow heating on the first photoresist pattern to form a second photoresist pattern having an opening smaller than that of the first photoresist pattern; Step S6: using the second photoresist pattern as a mask, using plasma etching to etch the silicon nitride film to form a gate manufacturing window; Step S7: depositing a first metal film on the second photoresist pattern and in the gate manufacturing window; Step S8: coating a thick layer of resist on the first metal film, exposing and developing using an i-line stepper lithography machine to form an area requiring electroplating; Step S9: thickening the first metal film in the area to be plated into a second metal film by electroplating, and removing the thick glue; Step S10: coating a layer of second photoresist on the second metal film, exposing and developing the second photoresist using an i-line stepper lithography machine to form an area requiring reverse electroplating; Step S11: removing the second metal film not covered by the second photoresist by reverse electroplating; Step S12; The second photoresist pattern is removed, and the second metal film is retained to form a T-type gate.

2. The method according to claim 1, characterized in that The opening of the second photoresist pattern is smaller than that of the first photoresist pattern by 0.13 to 0.18 μm.

3. The method according to claim 1 or 2, characterized in that The thickness of the first metal film is 100 nm to 150 nm, and the thickness of the second metal film is 400 nm to 500 nm thicker than that of the first metal film.

4. The method according to claim 1 or 2, characterized in that: The first metal film is a multi-layer metal film, and the materials of the multi-layer metal film are Ni, Au or Ti, Au or Mo, Ti, and Au from bottom to top.

5. The method according to claim 4, characterized in that In step S9 , a cyanide-free gold plating solution is used for electroplating, and the uppermost Au layer of the first metal film is used as the starting layer for gold plating.

6. The method according to claim 1 or 2, characterized in that: In step S8, the coating thickness of the thick glue is 20-50 um.

7. The method according to claim 1 or 2, characterized in that: In step S5, heating is performed using a hot plate at a temperature of 155 to 160° C. for 5 to 6 minutes.

8. The method according to claim 1 or 2, characterized in that: In step S6, the equipment used for plasma etching is a barrel plasma etcher, a parallel plate plasma etcher, a downstream plasma etcher, a RIE etcher, an ECR etcher or an ICP etcher, and the plasma is an O-based gas, a Cl-based gas or a F-based gas.

9. The method according to claim 8, characterized in that The F-based gas is SF6, the Cl-based gas is BCl3, Cl2, COCl2, CCl4, CCl2F2, PCl3, HCl, a mixture of Cl2 and BCl3, CF2Cl2 or CCl4, and the O-based gas is O2 or a mixture of O2 and Ar.

10. A T-type grid, characterized in that: The method is prepared by any one of claims 1 to 9.

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