Display panel and display device

Abstract

The display panel comprises a display area and a non-display area, the non-display area comprises a fan-out area and a first non-display area which are located on the two opposite sides of the display area, and the fan-out area and the first non-display area are arranged in the first direction; the display area comprises a plurality of first signal lines extending in the first direction, and an edge area and a middle area which are arranged in the second direction, and the second direction intersects with the first direction; the switching signal lines in the display panel are correspondingly and electrically connected with the first signal lines in the edge area, and at least part of the same switching signal line is located in the middle area of the display area; the plurality of transfer signal lines comprise a first type of transfer signal lines, and in the same first type of transfer signal lines, a first section is located in the first non-display area, and a second section is located in the middle area of the display area; wherein the first signal line in at least part of the edge area is correspondingly connected with the first section. The brightness abnormity condition of the sub-pixels in the corresponding line can be improved, and the display quality can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In recent years, narrow-border display panels have become more and more popular with users and have become the focus of research by major manufacturers. In order to reduce the bottom border of the display panel, the existing method is to use the display area fan-out technology (Fanout in AA, FIAA), transfer the signal line of the edge area of ​​the display panel to the middle area, and fan out at the edge of the middle area, thereby replacing the fan-out line at the peripheral arc corner and reducing the bottom border.

[0003] However, in existing display panels, FIAA technology easily leads to uneven display. Therefore, a solution is urgently needed. Summary of the invention

[0004] In view of this, embodiments of the present application provide a display panel and a display device to solve the above problems.

[0005] In a first aspect, an embodiment of the present application provides a display panel, including a display area and a non-display area, wherein the non-display area surrounds at least a portion of the display area, and the non-display area includes a fan-out area and a first non-display area located on opposite sides of the display area, and the fan-out area and the first non-display area are arranged along a first direction; the display area includes:

[0006] A plurality of first signal lines, the first signal lines extending along a first direction, and the plurality of first signal lines arranged along a second direction, the second direction intersecting the first direction;

[0007] an edge region and a middle region arranged along a second direction;

[0008] The display panel includes a plurality of transfer signal lines, the transfer signal lines are electrically connected to the first signal lines in the edge area, and at least part of the same transfer signal line is located in the middle area of ​​the display area;

[0009] The multiple transfer signal lines include a first type of transfer signal lines, and the same first type of transfer signal line includes an electrically connected first segment and a second segment, the first segment is located in a first non-display area, and the second segment is located in a middle area of ​​the display area; wherein, the first signal line in at least part of the edge area is correspondingly connected to the first segment.

[0010] In an implementation of the first aspect, the first signal line in the edge region includes a first sub-signal line and a second sub-signal line, and the first sub-signal line is farther away from the middle region than the second sub-signal line; at least part of the first sub-signal line is correspondingly connected to the first section.

[0011] In an implementation of the first aspect, the plurality of transfer signal lines include a second type of transfer signal line located in the display area, the second type of transfer signal line being electrically connected to the second sub-signal line correspondingly; the second type of transfer signal line is located on a side of the second section close to the edge area.

[0012] In an implementation manner of the first aspect, the second-type switching signal line is connected to the second sub-signal line through a first via hole, and in the display area, the first via holes are arranged in a direction away from the middle area.

[0013] In an implementation manner of the first aspect, in the edge region, the number of first signal lines correspondingly connected to the first sections is N, where N≥100.

[0014] In an implementation manner of the first aspect, in the edge region, a plurality of first signal lines corresponding to and connected to the first sections are arranged continuously.

[0015] In an implementation manner of the first aspect, in the edge region, a plurality of first signal lines correspondingly connected to the first sections are arranged at intervals.

[0016] In an implementation of the first aspect, the non-display area includes a second non-display area, the second non-display area is connected to the first non-display area, and the second non-display area includes a shift register circuit; the first non-display area includes a rounded corner area close to the second non-display area, the rounded corner area includes a scan connection line, and the scan connection line is electrically connected to the shift register circuit and the gate line in the display area; wherein at least part of the first segment includes a first sub-portion located in the rounded corner area, and the first sub-portion and the scan connection line are located in different film layers.

[0017] In an implementation manner of the first aspect, the first sub-portion is located on a side of the scan connection line away from the display panel substrate.

[0018] In an implementation manner of the first aspect, the first section and the second section are located in the same film layer.

[0019] In a second aspect, an embodiment of the present application provides a display device, including a display panel as provided in the first aspect.

[0020] In an embodiment of the present application, a first signal line in an edge area is electrically connected to a transfer signal line extending to the middle area. The first signal line in the edge area can be led out from the middle area through the transfer signal line and electrically connected to the fan-out line. There is no need to set a fan-out line extending toward the edge area in the fan-out area, which is beneficial for reducing the width of the frame where the fan-out area is located and realizing a narrow frame of the display panel.

[0021] Moreover, by leading the first signal lines in at least part of the edge area to the middle area through the first section located in the first non-display area, it is possible to avoid a large coupling capacitance between the first type of switching signal lines electrically connected to the first signal lines and the gate lines in the display area, thereby helping to avoid a large impact of signal jumps on the gate lines on the signals received by the first signal lines, which in turn helps to improve the abnormal brightness of the sub-pixels in the corresponding rows and improve the display quality of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0023] Figure 1 It is a schematic plan view of a display panel in the prior art;

[0024] Figure 2 A schematic plan view of a display panel provided in an embodiment of the present application;

[0025] Figure 3 for Figure 2 An enlarged schematic diagram of a local area in FIG.

[0026] Figure 4 for Figure 3 A schematic cross-sectional view along the NN' tangent line;

[0027] Figure 5 A partially enlarged schematic diagram of a display panel provided in an embodiment of the present application;

[0028] Figure 6 A partially enlarged schematic diagram of another display panel provided in an embodiment of the present application;

[0029] Figure 7 A schematic plan view of another display panel provided in an embodiment of the present application;

[0030] Figure 8 for Figure 7 An enlarged schematic diagram of the middle region Q;

[0031] Fig. 9 A schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0033] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0034] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0035] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0036] Figure 1 The diagram is a plan view of a display panel in the prior art.

[0037] In the prior art, Figure 1 As shown, the display panel 01' includes a display area AA' and a fan-out area FA' located on one side of the display area AA', and the display area AA' and the fan-out area FA' are arranged along a first direction Y'. The display area AA' includes a plurality of data signal lines DL', the data signal lines DL' extend along the first direction Y', and the plurality of data signal lines DL' are arranged along a second direction X', and the second direction X' intersects with the first direction Y'.

[0038] Optionally, the first direction Y' is a column direction in the display panel 01', and the second direction X' is a row direction in the display panel 01'.

[0039] Please continue to refer to Figure 1 , the display area AA' includes an edge area A1' and a middle area A2' arranged along the second direction X', and the edge area A1' is closer to the edge of the display panel 01' than the middle area A2'. Since the display panel 01' includes two opposite edges in the second direction X', the display area AA' may include two edge areas A1' and one middle area A2'.

[0040] The edge area A1' and the middle area A2' are both provided with data signal lines DL', the fan-out area FA' is provided with fan-out wiring FA1', and the data signal lines DL' in the middle area A2' can be directly electrically connected to the fan-out wiring FA1'.

[0041] The display area AA' also includes a transfer line FIAA', which is electrically connected to the data signal line DL' in the edge area A1', and the transfer line FIAA' extends from the edge area A1' to the middle area A2'. The transfer line FIAA' includes a first portion F1' extending along the second direction X' and a second portion F2' extending along the first direction Y'. The data signal line DL' in the edge area A1' is electrically connected to the fan-out line FA1' through the transfer line FIAA'.

[0042] The inventor of the present application has found through research that in the existing display panel 01', if Figure 1 As shown, the first portion F1' of some transfer lines FIAA' is relatively long and may span hundreds of sub-pixels in the second direction X'. The display panel 01' is usually provided with a plurality of gate lines extending along the second direction X' (not shown in the figure), which results in the longer first portion F1' forming a larger coupling capacitance with the gate lines in the display area AA'.

[0043] It is understandable that the signal transmitted on the gate line is used to drive the transistor in the sub-pixel to turn on or off, and the data signal line DL' is used to transmit the received data voltage signal to the sub-pixel. The data signal line DL' in the edge area A1' receives the data voltage signal through the transfer line FIAA'.

[0044] Wherein, the gate line includes a first gate line for controlling the resetting of the sub-pixel, and a second gate line for controlling the writing of the sub-pixel data voltage signal. In some cases, when the second gate line connected to the i-th row of sub-pixels transmits a valid signal, the first gate line connected to the i+1-th row of sub-pixels also transmits a valid signal, and i is a positive integer greater than or equal to 1. The valid signal transmitted by the second gate line and the valid signal transmitted by the first gate line are usually low-level signals.

[0045] In this case, when the second gate line connected to the i-th row of sub-pixels transmits a valid signal, the sub-pixels in the edge area A1' of the row receive the data voltage signal transmitted by the transfer line FIAA'. At this time, the signal jump on the first gate line connected to the i+1-th row of sub-pixels couples the data voltage signal on the transfer line FIAA', causing the brightness of the sub-pixels in the edge area A1' of the i-th row to change, thereby causing the display panel 01' to display unevenly, affecting the display quality.

[0046] In view of this, embodiments of the present application provide a display panel and a display device to solve the above problems.

[0047] Figure 2 A schematic plan view of a display panel provided in an embodiment of the present application.

[0048] like Figure 2 As shown, the embodiment of the present application provides a display panel 01, including a display area AA and a non-display area NA, wherein the non-display area NA surrounds at least a portion of the display area AA. Figure 2 As shown, the display area AA is completely surrounded by the non-display area NA.

[0049] The non-display area NA includes a fan-out area FA and a first non-display area NA1 located at opposite sides of the display area AA, and the fan-out area FA and the first non-display area NA1 are arranged along the first direction Y. The fan-out area FA may be located at the "lower" frame of the display panel 01, and the first non-display area NA1 may be located at the "upper" frame of the display panel 01.

[0050] The display area AA includes a plurality of first signal lines DL, which can be used to transmit data voltage signals to the sub-pixels in the display area AA. The first signal lines DL extend along a first direction Y, and the plurality of first signal lines DL are arranged along a second direction X, and the first direction Y intersects with the second direction X.

[0051] Optionally, the first direction Y is a column direction in the display panel 01 , and the second direction X is a row direction in the display panel 01 .

[0052] The display area AA also includes an edge region A1 and a middle region A2 arranged along the second direction X. In the second direction X, the edge region A1 is closer to the edge of the non-display panel 01 than the middle region A2. Since the display panel 01 includes two opposite edges in the second direction X, the display area AA may include two edge regions A1 and one middle region A2.

[0053] The first signal lines DL are disposed in both the edge area A1 and the middle area A2 , the fan-out area FA includes the fan-out wiring FA1 , and the first signal lines DL in the middle area A2 can be directly electrically connected to the fan-out wiring FA1 .

[0054] Please continue to refer to Figure 2 The display panel 01 includes a plurality of transfer signal lines FL, which are electrically connected to the first signal lines DL in the edge area A1, and at least part of the same transfer signal line FL is located in the middle area A2 of the display area AA. The first signal line DL in the edge area A1 can be led out from the middle area A2 through the transfer signal line FL and electrically connected to the fan-out line FA1.

[0055] The plurality of transfer signal lines FL include a first type transfer signal line FLA, the first type transfer signal line FLA includes a first segment FL1 and a second segment FL2 electrically connected, the first segment FL1 is located in the first non-display area NA1, and the second segment FL2 is located in the middle area A2 of the display area AA. The second segment FL2 can extend along the first direction Y.

[0056] The first signal line DL in at least a portion of the edge area A1 is correspondingly connected to the first segment FL1 .

[0057] That is, the first signal line DL in at least a portion of the edge area A1 may be led out to the first non-display area NA1 and connected to the first segment FL1 , and led out to the fan-out area FA through the second segment FL2 connected to the first segment FL1 .

[0058] In the embodiment of the present application, the first signal line DL in the edge area A1 is electrically connected to the switching signal line FL extending to the middle area A2. The first signal line DL in the edge area A1 can be led out from the middle area A2 through the switching signal line FL and electrically connected to the fan-out line FA1. There is no need to set a fan-out line extending toward the edge area A1 in the fan-out area FA, which is beneficial to reducing the width of the frame where the fan-out area FA is located, thereby realizing a narrow frame of the display panel 01.

[0059] Moreover, by leading the first signal lines DL in at least part of the edge area A1 to the middle area A2 through the first segment FL1 located in the first non-display area NA1, it is possible to avoid the first type of transfer signal lines FLA electrically connected to the first signal lines DL and the gate lines in the display area AA from generating a large coupling capacitance, thereby helping to avoid the signal jumps on the gate lines from having a large impact on the signals received by the first signal lines DL, and further helping to improve the abnormal brightness of the sub-pixels in the corresponding rows, thereby improving the display quality of the display panel 01.

[0060] Optionally, in the edge area A1, the number of first signal lines DL correspondingly connected to the first segment FL1 is N, where N≥100. That is, no less than 100 first signal lines DL in the edge area A1 are led to the middle area A2 through the first type of connecting signal lines FLA. In this way, the brightness abnormality of at least 100 sub-pixels can be improved, thereby facilitating the improvement of the display quality of the display panel 01 to a large extent.

[0061] For example, in the first non-display area NA1, the virtual sub-pixels and the power line PVEE that are usually set in the prior art can be removed to provide a larger space for setting the first segment FL1. In this way, it is beneficial to set a larger number of first segments FL1 in the first non-display area NA1. Since the first signal lines DL are correspondingly connected to the first segments FL1, it is beneficial to ensure that more first signal lines DL in the edge area A1 can be led to the middle area A2 through the first type of connection signal line FLA. Optionally, the first segment FL1 and the power line PVEE can also be set in different layers, so that the width of the power line PVEE can be guaranteed to provide a stable PVEE voltage, and there is also enough space to set the first segment FL1.

[0062] Figure 3 for Figure 2 An enlarged schematic diagram of a local area in Figure 4 for Figure 3 A schematic cross-sectional view along the NN' tangent line.

[0063] Further, combined with Figure 3 and Figure 4 As shown, in the first non-display area NA1, two adjacent first segments FL1 are layered. Based on this arrangement, the two adjacent first segments FL1 can be arranged closer in the first direction Y, which is conducive to further ensuring that a larger number of first segments FL1 are arranged in the first non-display area NA1.

[0064] In one embodiment of the present application, Figure 3 As shown, the first signal line DL in the edge area A1 includes a first sub-signal line DL1 and a second sub-signal line DL2, and the first sub-signal line DL1 is farther away from the middle area A2 than the second sub-signal line DL2. That is, in the second direction X, the first sub-signal line DL1 is closer to the edge of the display panel 01 than the second sub-signal line DL2.

[0065] At least part of the first signal sub-line DL1 is correspondingly connected to the first segment FL1 , that is, at least part of the first signal sub-line DL1 is electrically connected to the first segment FL1 to receive the signal transmitted by the first segment FL1 .

[0066] Optional, such as Figure 3 As shown, in the same edge area A1 , N first sub-signal lines DL1 adjacent to the edge of the display panel 01 in the second direction X are connected to the first segment FL1 correspondingly, and N≥100.

[0067] The inventors of the present application have discovered through research that, in the prior art, the closer the data line DL' is to the edge of the display panel 01', the longer the horizontal portion of the connected transfer trace FIAA' is, the more susceptible it is to the coupling of the gate lines in the display area, and the more obvious the brightness abnormality of the sub-pixels in the corresponding row connected to the data line DL' is.

[0068] In view of this, the embodiment of the present application sets a first sub-signal line DL1 that is closer to the edge of the display panel 01 and is connected to the first segment FL1 accordingly, which can avoid the generation of a large coupling capacitance between the switching signal line FL connected to the first sub-signal line DL1 and the gate line in the display area AA, which is beneficial to eliminating the more serious brightness abnormality on the edge side of the display panel 01, thereby helping to greatly improve the display unevenness.

[0069] Please continue to refer to Figure 3In one embodiment of the present application, the plurality of transfer signal lines FL include a second type of transfer signal line FLB, the second type of transfer signal line FLB is located in the display area AA, the second type of transfer signal line FLB is electrically connected to the second sub-signal line DL2, and the second type of transfer signal line FLB extends from the edge area A1 to the middle area A2.

[0070] For example, Figure 3 As shown, the same second-type switching signal line FLB includes an electrically connected third segment FL3 and a fourth segment FL4 , the third segment extends along the second direction X, the fourth segment FL4 extends along the first direction Y, and the fourth segment FL4 is located in the middle area A2 .

[0071] Since the second signal line DL2 is closer to the middle area A2 than the first signal line DL1, the length of the second transfer signal line FLB electrically connected to the second signal line DL2 may be shorter than the length of the first transfer signal line FLA electrically connected to the first signal line DL1.

[0072] In the embodiment of the present application, a second-type transfer signal line FLB electrically connected to the second sub-signal line DL2 is arranged in the display area AA, which is beneficial to reducing the length of the second-type transfer signal line FLB. While ensuring that the impedance of the second sub-signal line DL2 receiving the data voltage signal is not too small relative to the impedance of the first sub-signal line DL1 receiving the data voltage signal, it can avoid that the impedance of the second sub-signal line DL2 receiving the data voltage signal is too large relative to the impedance of the first signal line DL in the middle area A2 receiving the data voltage signal. This is beneficial to avoid a sudden change in the impedance of the data voltage signals received by multiple first signal lines DL in the second direction X, thereby helping to avoid uneven charging at different positions of the display panel 01, which causes the problem of split screen display.

[0073] Optional, such as Figure 3 As shown, the second-type switching signal line FLB is electrically connected to the second sub-signal line DL2 through the first via hole K. In the display area AA, the first via holes K are arranged in a direction away from the middle area A2.

[0074] Based on this arrangement, the length of the second type of transfer signal line FLB can be gradually reduced along the direction from the edge area A1 to the middle area A2, which is conducive to further avoiding the situation in which the impedance of the multiple first signal lines DL receiving the data voltage signal changes suddenly in the second direction X. In other words, among the multiple transfer lines FL of the display panel, the length of the transfer line FL electrically connected to the first signal line DL closest to the conventional data line (which does not need to pass through the transfer line FL) is the shortest, so that the impedance difference between the conventional data line and the first signal line DL can be reduced to avoid excessive impedance difference and display problems. The influence of uniform change of impedance difference between signal lines on display is less than the influence of sudden change of impedance difference on display.

[0075] In one embodiment of the present application, Figure 3 As shown, the second-type switching signal line FLB is located on a side of the second section FL2 close to the edge area A1.

[0076] That is, in the second-type switching signal line FLB, the third section FL3 and the fourth section FL4 are both located on a side of the second section FL2 close to the edge area A1.

[0077] Since the third segment FL3 extends along the second direction X and the second segment FL2 extends along the first direction Y, in the embodiment of the present application, the third segment FL3 and the fourth segment FL4 are both located on the side of the second segment FL2 close to the edge area A1. On the one hand, it can avoid the third segment FL3 of the second type of switching signal line FLB from crossing the second segment FL2 of the first type of switching signal line FLA, thereby avoiding routing interference between the two; on the other hand, it is beneficial to reduce the length of the third segment FL3, thereby facilitating reducing the coupling capacitance between the gate line in the display area AA and the third segment FL3, and reducing the interference of the signal on the gate line on the signal on the second type of switching signal line FLB.

[0078] In one embodiment of the present application, Figure 3 As shown, in the edge area A1, a plurality of first signal lines DL corresponding to and connected to the first segment FL1 are arranged continuously. That is, in the second direction X, no other first signal lines are arranged between two adjacent first signal lines DL connected to the first segment FL1.

[0079] From the above analysis, it can be seen that the first signal line DL is connected to the first segment FL1, which can eliminate the brightness abnormality of the sub-pixels in the corresponding row connected to the first signal line DL. In the embodiment of the present application, a plurality of first signal lines DL connected to the first segment FL1 are arranged in a continuous manner, which is conducive to eliminating the brightness abnormality of the plurality of sub-pixels arranged in a continuous manner, thereby alleviating the problem of uneven display of the display panel 01.

[0080] For example, Figure 3As shown, a plurality of continuous first signal lines DL adjacent to the edge of the display panel 01 are connected to the first segment FL1, and no other first signal lines are arranged between the first signal line DL connected to the first segment FL1 and the edge of the display panel 01. This helps to eliminate the relatively serious brightness abnormality at the edge of the display panel 01, so as to alleviate the problem of uneven display to the greatest extent.

[0081] For example, Figure 5 As shown, Figure 5 A local enlarged schematic diagram of a display panel provided in an embodiment of the present application, the first signal lines DL corresponding to the first segment FL1 form a plurality of first signal line groups ZDL, the same first signal line group ZDL includes a plurality of first signal lines DL arranged continuously, and a first signal line DL electrically connected to the second-type switching signal line FLB is arranged between two adjacent first signal line groups ZDL.

[0082] That is, in the edge area A1, along the second direction X, some first signal lines DL arranged continuously are electrically connected to the first type switching signal lines FLA, and some first signal lines DL arranged continuously are electrically connected to the second type switching signal lines FLB, and the two are arranged alternately.

[0083] Based on this setting method, it is helpful to avoid sub-pixels with abnormal brightness in the corresponding row from forming a continuous pattern, thereby helping to weaken the impact of sub-pixels with abnormal brightness on display uniformity, and further helping to improve the problem of uneven display of the display panel and enhance the display quality of the display panel 01.

[0084] Further, such as Figure 6 As shown, Figure 6 A partial enlarged schematic diagram of another display panel provided in an embodiment of the present application, in which a plurality of first signal lines DL corresponding to the first segment FL1 are arranged at intervals in the edge area A1. That is, in the second direction X, a first signal line DL connected to the second type of switching signal line FLB is included between two adjacent first signal lines DL connected to the first type of switching signal line FLA.

[0085] For example, Figure 6 As shown, in the edge area A1, N odd-numbered columns of first signal lines DL may be arranged to be electrically connected to the first-type transfer signal lines FLA, where N≥100.

[0086] In this way, the influence of sub-pixels with abnormal brightness on display uniformity is further weakened, thereby further improving the problem of uneven display of the display panel.

[0087] Figure 7 A schematic plan view of another display panel provided in an embodiment of the present application.

[0088] In one embodiment of the present application, Figure 7 As shown, the non-display area NA includes a second non-display area NA2, which intersects with the first non-display area NA1 and may be located at the "left" frame or the "right frame" of the display panel 01. The second non-display area NA2 includes a shift register circuit VSR.

[0089] The first non-display area NA1 includes a rounded area NR near the second non-display area NA2, and the rounded area NR includes a scan connection line ZL, which is electrically connected to the shift register circuit VSR and the gate line SL in the display area AA. The signal output by the shift register circuit VSR is transmitted to the corresponding gate line SL through the scan connection line ZL.

[0090] Among them, combined Figure 8 As shown, Figure 8 for Figure 7 An enlarged schematic diagram of the middle area Q, at least part of the first segment FL1 includes a first sub-portion FL11 located in the rounded area NR, and the first signal line DL near the second non-display area NA2 can be electrically connected to the first sub-portion FL11 in the rounded area NR, thereby achieving electrical connection with the first type of transfer signal line FLA. The first sub-portion FL11 and the scan connection line ZL are located in different film layers.

[0091] In the embodiment of the present application, the first sub-portion FL11 and the scan connection line ZL are arranged in different layers. On the one hand, it can avoid routing interference between the first sub-portion FL11 and the scan connection line ZL; on the other hand, it is beneficial to reserve sufficient space in the rounded area NR to set the first sub-portion FL11, thereby facilitating the electrical connection of a sufficient number of first signal lines DL with the first type of switching signal line FLA, and further facilitating the improvement of the abnormal brightness of a sufficient number of sub-pixels, thereby greatly improving the display quality of the display panel 01.

[0092] Optionally, the first sub-portion FL11 overlaps the scanning connection line ZL in a direction perpendicular to the plane where the display panel 01 is located. In this way, it is helpful to reduce the width of the rounded area NR and realize a narrow frame of the display panel 01.

[0093] Furthermore, the first sub-portion FL11 is located on a side of the scan connection line ZL away from the substrate of the display panel 01. That is, in the manufacturing process of the display panel 01, the first sub-portion FL11 is manufactured after the manufacturing of the scan connection line ZL is completed.

[0094] In the existing process, the metal on the side of the scan connection line ZL facing the display panel 01 substrate usually has a larger square resistance, such as metal nickel, while the metal on the side of the scan connection line ZL away from the display panel 01 substrate usually has a smaller square resistance, such as metal aluminum.

[0095] Since the conductive structure of the same layer is usually prepared by the same process and the same material, the first sub-section FL11 is arranged on the side of the scan connection line ZL away from the display panel 01 substrate, and the first sub-section FL11 can be prepared by a metal with a small square resistance, such as metal aluminum, without increasing the preparation process. This is beneficial to reducing the impedance of the first section FL1, and further to reducing the loss of the first signal line DL electrically connected to the first section FL1 in receiving the data voltage signal.

[0096] In one embodiment of the present application, the first segment FL1 and the second segment FL2 are disposed in the same layer. In this way, the first segment FL1 and the second segment FL2 do not need to be electrically connected through punching, which is conducive to simplifying the manufacturing process of the display panel 01 and saving costs.

[0097] Fig. 9 A schematic diagram of a display device provided in an embodiment of the present application.

[0098] The present application embodiment provides a display device 02, such as Fig. 9 As shown, the display device 02 includes the display panel 01 provided in the above embodiment. For example, the display device 02 can be an electronic device such as a mobile phone, a computer, a television, a car display, etc., which is not specifically limited in this application.

[0099] In the display device 02, the first signal line DL in the edge area A1 is electrically connected to the switching signal line FL extending to the middle area A2. Then, the first signal line DL in the edge area A1 can be led out from the middle area A2 through the switching signal line FL and electrically connected to the fan-out line FA1. There is no need to set a fan-out line extending toward the edge area A1 in the fan-out area FA, which is beneficial to reducing the width of the frame where the fan-out area FA is located, thereby realizing a narrow frame of the display panel 01.

[0100] Moreover, by leading the first signal lines DL in at least part of the edge area A1 to the middle area A2 through the first segment FL1 located in the first non-display area NA1, it is possible to avoid the first type of transfer signal lines FLA electrically connected to the first signal lines DL and the gate lines in the display area AA from generating a large coupling capacitance, thereby helping to avoid the signal jumps on the gate lines from having a large impact on the signals received by the first signal lines DL, and further helping to improve the abnormal brightness of the sub-pixels in the corresponding rows, thereby improving the display quality of the display device 02.

[0101] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A display panel, It is characterized in that It includes a display area and a non-display area, wherein the non-display area surrounds at least a portion of the display area, the non-display area includes a fan-out area and a first non-display area located at two opposite sides of the display area, and the fan-out area and the first non-display area are arranged along a first direction; The display area includes: A plurality of first signal lines, wherein the first signal lines extend along the first direction, and the plurality of first signal lines are arranged along a second direction, and the second direction intersects the first direction; an edge region and a middle region arranged along the second direction; The display panel comprises a plurality of transfer signal lines, the transfer signal lines are electrically connected to the first signal lines in the edge area, and at least part of the same transfer signal line is located in the middle area of ​​the display area; The multiple transfer signal lines include a first type of transfer signal lines, and the same first type of transfer signal line includes an electrically connected first segment and a second segment, the first segment is located in the first non-display area, and the second segment is located in the middle area of ​​the display area; wherein, at least part of the first signal line in the edge area is correspondingly connected to the first segment.

2. The display panel according to claim 1, It is characterized in that The first signal line in the edge region includes a first sub-signal line and a second sub-signal line, and the first sub-signal line is farther away from the middle region than the second sub-signal line; At least a portion of the first signal sub-lines are correspondingly connected to the first sections.

3. The display panel according to claim 2, It is characterized in that The plurality of transfer signal lines include second-type transfer signal lines located in the display area, and the second-type transfer signal lines are electrically connected to the second sub-signal lines accordingly; The second type switching signal line is located at a side of the second section close to the edge area.

4. The display panel according to claim 3, It is characterized in that The second-type switching signal line is electrically connected to the second sub-signal line through a first via hole, and in the display area, the first via holes are arranged in a direction away from the middle area.

5. The display panel according to claim 1, It is characterized in that In the edge region, the number of the first signal lines correspondingly connected to the first section is N, where N≥100.

6. The display panel according to claim 1, It is characterized in that In the edge region, a plurality of first signal lines corresponding to and connected to the first sections are arranged continuously.

7. The display panel according to claim 1, It is characterized in that In the edge region, a plurality of first signal lines correspondingly connected to the first sections are arranged at intervals.

8. The display panel according to claim 1, It is characterized in that The non-display area includes a second non-display area, the second non-display area is connected to the first non-display area, and the second non-display area includes a shift register circuit; The first non-display area includes a rounded corner area close to the second non-display area, the rounded corner area includes a scan connection line, and the scan connection line is electrically connected to the shift register circuit and the gate line in the display area; At least part of the first section includes a first sub-portion located in the rounded corner area, and the first sub-portion and the scanning connection line are located in different film layers.

9. The display panel according to claim 8, It is characterized in that The first sub-portion is located at a side of the scan connection line away from the display panel substrate.

10. The display panel according to claim 1, It is characterized in that The first section and the second section are located in the same film layer.

11. A display device, It is characterized in that Comprising a display panel as described in any one of claims 1-10.

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