Semiconductor device processing method applying instantaneous single event upset self-recovery technology and semiconductor device

Abstract

The invention discloses a semiconductor device processing method applying an instantaneous single event upset self-recovery technology and a semiconductor device, and the method comprises the steps: putting a carbon nanotube and a dispersant in a predetermined proportion into toluene, and carrying out dispersion for a predetermined time by using a disperser to obtain a dispersed solution; centrifuging the dispersed solution for at least two times to obtain a carbon nanotube solution; diluting the carbon nano tube solution with methylbenzene, putting a substrate into the diluted carbon nano tube solution, soaking and baking to obtain a carbon nano tube film; constructing a carbon nanotube field effect transistor through an electron beam lithography technology; sequentially performing single-particle irradiation and pulse laser irradiation on the carbon nanotube field effect transistor to form charge light spots; and an oscilloscope is used to monitor the charge light spots, and the single particle irradiation resistance of the carbon nanotube field effect transistor is evaluated. The radiation resistance of the device is improved, and the requirement for stable performance of the device in a complex radiation environment can be met.

Description

Technical Field

[0001] The invention belongs to the field of semiconductor devices and discloses a semiconductor device processing method and a semiconductor device using an instantaneous single particle upset self-recovery technology. Background Art

[0002] In the field of electronic devices, ensuring the reliability of devices is always an important issue. With the increasing demand for human exploration of outer space, from launching spacecraft to building space stations, to human landing on the moon and even Mars, radiation-resistant integrated circuits, as special-purpose integrated circuits, have received increasing attention for their ability to resist high-energy solar particles and cosmic rays.

[0003] In the field of radiation resistance, total dose effect, displacement damage and single particle effect are three main radiation effects, each of which affects materials and devices in different ways. These effects need to be considered when studying and designing radiation resistance. The total dose effect is a long-term damage that will cause a decrease in carrier mobility and on-current, and will increase the drift of leakage current and threshold voltage. Displacement damage is a physical damage that mainly causes the dislocation of atoms in the device, resulting in deep energy level defects, which leads to an increase in the recombination rate and a decrease in the carrier lifetime, causing device damage or even failure. The single particle effect is a transient effect. A single high-energy particle generates a large amount of ionized charge in the sensitive area of ​​the semiconductor device, causing an instantaneous current, which causes the device to fail. Specifically, a single particle enters the sensitive area of ​​the semiconductor device, causing its logical state to flip from "0" to "1" or from "1" to "0", that is, a single particle flip occurs. Although the damage caused is not permanent, it will seriously affect the safety of the system, especially in space stations or nuclear power plants. The rate of single particle flips will increase greatly, which is a problem that cannot be ignored. Single event upset (SEU) is the most common form of single event effect, which refers to the data bit flip caused by high-energy particles passing through a memory cell or logic circuit. This flip may cause calculation errors, instruction errors or data loss.

[0004] Compared with the total dose effect and displacement damage, the impact of single-particle upset is more direct and instantaneous. The occurrence of SEU may cause instantaneous errors in the system, and frequent occurrence may lead to a decrease in system stability. Therefore, in the radiation-resistant design, SEU prevention measures must be considered, such as redundant design, error detection and correction (EDAC) technology, etc. In summary, single-particle effects have become an important part of the device radiation resistance performance research due to their randomness, sensitivity to memory, and instantaneous errors caused by single-particle upsets. Researching and preventing single-particle effects is crucial to ensuring the reliability and stability of the system in a radiation environment.

[0005] At present, many reinforcement methods have been adopted for single particle effects, which can be mainly divided into hardware reinforcement and software reinforcement. The most common hardware reinforcement is hardware redundancy design, which covers the impact of faults by adding additional unit devices. The most widely used is triple mode redundancy (TMR), which has the advantage of fast speed. By performing three redundancies on each computing unit and adopting a majority voting mechanism, it can effectively resist errors caused by single particle effects and improve the stability of the system to a certain extent. However, adding additional devices will increase the quality, area, and power consumption of the system. Therefore, it is necessary to improve TMR. Similarly, common software reinforcement technology uses repeated calculations to increase the workload of the system at the software level. Although it can improve the stability of the system, the system will face more complex calculations, which will affect the performance of the system and will be more complicated when designing the system. Therefore, by analyzing the existing reinforcement technologies, it is necessary to adopt new reinforcement technologies to ensure the reliability of the system while avoiding the complexity of hardware and the calculation of huge data during operation. Summary of the invention

[0006] The purpose of the invention is to provide a semiconductor device processing method and a semiconductor device using instantaneous single-particle upset self-recovery technology to solve the above-mentioned problems existing in the prior art.

[0007] Technical solution, a method for processing semiconductor devices using instantaneous single-particle upset self-recovery technology, comprising the following steps:

[0008] S1, putting carbon nanotubes and a dispersant in a predetermined ratio into toluene, and using a disperser to disperse for a predetermined time at a power P to obtain a dispersed solution;

[0009] S2, centrifuging the dispersed solution at least twice under a centrifugal force G to obtain a carbon nanotube solution;

[0010] S3, diluting the carbon nanotube solution with toluene by at least ten times, placing a substrate in the diluted carbon nanotube solution for a soaking time t1, rinsing the soaked substrate with toluene for a time t2, purging the rinsed substrate with nitrogen, and baking it in air at a temperature of C for a time t3 to obtain a carbon nanotube film;

[0011] S4, based on the carbon nanotube film and the fast frequency response gate dielectric, patterning is performed by electron beam lithography technology to construct a local bottom gate window of the carbon nanotube field effect transistor, palladium with a thickness of h1 is evaporated on the local bottom gate window by atomic layer deposition technology and hafnium oxide with a thickness of h2 is grown, and a diluted carbon nanotube solution is deposited on the local bottom gate window where hafnium oxide is grown, and the deposited carbon nanotube solution is etched by oxygen plasma for a time of t4 to form a channel of the carbon nanotube field effect transistor, and the channel is patterned by electron beam lithography technology to construct an active channel region, and the active channel region is etched by oxygen plasma for a time of t5 to form an active channel of the carbon nanotube field effect transistor;

[0012] The active channel is patterned by electron beam lithography to construct the top gate window of the carbon nanotube field effect transistor, hafnium oxide with a thickness of h3 is grown on the top gate window by atomic layer deposition, and palladium with a thickness of h4 is evaporated;

[0013] The two ends of the active channel are patterned by electron beam lithography to form the source and drain of the carbon nanotube field effect transistor, and titanium with a thickness of h5 and palladium with a thickness of h6 are evaporated to obtain P-type contacts of the source and drain;

[0014] S5, sequentially performing single particle irradiation and pulse laser irradiation on the carbon nanotube field effect transistor, focusing the pulse laser beam using a microscope objective lens with a magnification of at least 100 times to form a charge spot on the carbon nanotube field effect transistor;

[0015] S6. Use an oscilloscope to monitor the charge spot, record the response data of the single event transient based on the monitoring result, and evaluate the single particle irradiation resistance of the carbon nanotube field effect transistor based on the response data.

[0016] According to one aspect of the present application, step S2 is further:

[0017] S21, subjecting the dispersed solution to a first centrifugal operation under a centrifugal force G, the first centrifugal operation time being t, to obtain a clear solution with a purity of at least 90%;

[0018] S22, subjecting the clear liquid to a second centrifugal operation under a centrifugal force G, the second centrifugal operation time being t', to obtain a carbon nanotube solution with a purity of at least 90%;

[0019] The centrifugal force G is 50000g, the first centrifugal operation time t is 0.5h, and the second centrifugal operation time t' is 2h.

[0020] According to one aspect of the present application, step S3 further includes:

[0021] The carbon nanotube film is annealed in a tube furnace with a forming gas at a temperature C1 for at least 3 hours to remove polymers in the carbon nanotube film.

[0022] According to one aspect of the present application, the forming gas is a mixture of argon and hydrogen in a ratio of 5:1.

[0023] According to one aspect of the present application, the substrate is a silicon substrate or a silicon dioxide substrate.

[0024] According to one aspect of the present application, the purity of the nitrogen is not less than 99.999%.

[0025] According to one aspect of the present application, the carbon nanotube is graphene.

[0026] According to one aspect of the present application, in step S4, the palladium thickness h1 is 20 nm, the hafnium oxide thickness h2 is 10 nm, the hafnium oxide thickness h3 is 10 nm, the palladium thickness h4 is 20 nm, the titanium thickness h5 is 0.3 nm, and the palladium thickness h6 is 70 nm.

[0027] According to one aspect of the present application, the predetermined ratio described in step S1 is 1:1.

[0028] A semiconductor device manufactured by the semiconductor device processing method using the instantaneous single event upset self-recovery technology described in any of the above technical solutions is characterized by comprising:

[0029] Carbon nanotube film, used as channel material;

[0030] The gate dielectric grown on the carbon nanotube film includes hafnium oxide.

[0031] Beneficial effect: The present invention proposes to use carbon nanotubes as channel materials and select high dielectric constant gate dielectrics such as HfO2 to reinforce semiconductor devices, so that they can use the single particle flip self-recovery ability to greatly improve the device's radiation resistance, improve the stability and consistency of the device itself, and meet the requirements for stable device performance in complex radiation environments. At the same time, it also avoids the problems of hardware complexity and large amount of computation during operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a flow chart of the present invention.

[0033] Figure 2 SET result diagram of a single device according to an embodiment of the present invention.

[0034] Figure 3 Charge collection curve of the device in an embodiment of the present invention.

[0035] Figure 4This is a SEUR result diagram of a single device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0036] like Figure 1 As shown, the present invention proposes a semiconductor device processing method using instantaneous single event upset self-recovery technology, comprising the following steps:

[0037] S1, putting carbon nanotubes and a dispersant in a predetermined ratio into toluene, and using a disperser to disperse for a predetermined time at a power P to obtain a dispersed solution;

[0038] S2, centrifuging the dispersed solution at least twice under a centrifugal force G to obtain a carbon nanotube solution;

[0039] S3, diluting the carbon nanotube solution with toluene by at least ten times, placing a substrate in the diluted carbon nanotube solution for a soaking time t1, rinsing the soaked substrate with toluene for a time t2, purging the rinsed substrate with nitrogen, and baking it in air at a temperature of C for a time t3 to obtain a carbon nanotube film;

[0040] S4, based on the carbon nanotube film and the fast frequency response gate dielectric, patterning is performed by electron beam lithography technology to construct a local bottom gate window of the carbon nanotube field effect transistor, palladium with a thickness of h1 is evaporated on the local bottom gate window by atomic layer deposition technology and hafnium oxide with a thickness of h2 is grown, and a diluted carbon nanotube solution is deposited on the local bottom gate window where hafnium oxide is grown, and the deposited carbon nanotube solution is etched by oxygen plasma for a time of t4 to form a channel of the carbon nanotube field effect transistor, and the channel is patterned by electron beam lithography technology to construct an active channel region, and the active channel region is etched by oxygen plasma for a time of t5 to form an active channel of the carbon nanotube field effect transistor;

[0041] The active channel is patterned by electron beam lithography to construct the top gate window of the carbon nanotube field effect transistor, hafnium oxide with a thickness of h3 is grown on the top gate window by atomic layer deposition, and palladium with a thickness of h4 is evaporated;

[0042] The two ends of the active channel are patterned by electron beam lithography to form the source and drain of the carbon nanotube field effect transistor, and titanium with a thickness of h5 and palladium with a thickness of h6 are evaporated to obtain P-type contacts of the source and drain;

[0043] S5, sequentially performing single particle irradiation and pulse laser irradiation on the carbon nanotube field effect transistor, focusing the pulse laser beam using a microscope objective lens with a magnification of at least 100 times to form a charge spot on the carbon nanotube field effect transistor;

[0044] S6. Use an oscilloscope to monitor the charge spot, record the response data of the single event transient based on the monitoring result, and evaluate the single particle irradiation resistance of the carbon nanotube field effect transistor based on the response data.

[0045] In this embodiment, carbon nanotubes are mixed with a dispersant, which can help the carbon nanotubes to be evenly dispersed in toluene, ensuring that the carbon nanotubes can be evenly deposited on the substrate in the subsequent steps; the dispersed carbon nanotube solution is separated from the solution by centrifugal operation to obtain a high-purity carbon nanotube solution, which helps to obtain a high-quality film; the diluted carbon nanotube solution is deposited on the substrate, and then baked and annealed to remove excess polymer to ensure the quality of the carbon nanotube film; the film is patterned using electron beam lithography technology to construct a local bottom gate window, an active channel, and a top gate window, which are key parts of the carbon nanotube field effect transistor; the carbon nanotube field effect transistor is subjected to single particle irradiation and pulsed laser irradiation to form a charge spot, which helps to evaluate the single particle irradiation resistance of the carbon nanotube field effect transistor. In this embodiment, carbon nanotubes are used as channel materials, and SRAM circuits are manufactured through a specific process, which has a single particle flip self-recovery effect and can well meet current needs. Since carbon nanotube FETs and integrated circuits have strong CC bonds, nanoscale cross-sections, and negligible parasitic effects in carbon nanotube channels, they are highly anticipated in the field of radiation resistance. At the same time, carbon nanotubes are also excellent in low power consumption and low temperature stability, so they can meet the needs of deep space exploration.

[0046] In one embodiment of the present application, when making a carbon nanotube film, carbon nanotubes (CNTs) prepared by arc discharge method are obtained, and a dispersant (poly[9-(1-octylnonyl)-9H-carbazole]), referred to as PCz, is synthesized by Suzuki polycondensation method. 100 mg of carbon nanotubes and 100 mg of dispersant are added to 100 ml of toluene, and then dispersed for 30 minutes at 300 W using a top disperser (Sonics VC700) to ensure that the carbon nanotubes are well dispersed in the solution, and then the dispersed solution is offline at 50,000 g for 0.5 h to remove most of the metallic carbon nanotubes and insoluble substances. More than 90% of the clear liquid is collected, and centrifuged for a second time at 50,000 g for 2 h. Finally, more than 90% of the supernatant is collected and a film is prepared by dip coating. The sorted carbon nanotube solution is diluted ten times with toluene. The silicon / silicon dioxide (Si / SiO2) substrate was immersed in the diluted solution for 72 hours, then the substrate was taken out of the solution, rinsed with toluene for 30 minutes, purged with 99.999% nitrogen N2, and baked in air at 120°C for 30 minutes. Finally, in order to reduce the effect of polymer on the radiation hardness of carbon nanotubes, the film was annealed at 600°C for 3 hours in a tube furnace with forming gas to remove the polymer, where the forming gas was a mixture of argon and hydrogen in a ratio of 5:1.

[0047] The local bottom gate of the carbon nanotube field effect transistor is made by selecting a gate dielectric with high dielectric constant (High-k) characteristics and fast frequency response characteristics, such as hafnium oxide. The local bottom gate window is patterned by electron beam lithography (EBL), and then 20nm of palladium (Pd) is evaporated and 10nm of hafnium oxide (HfO2) is grown by atomic layer deposition (ALD) in a standard rise process. Next, the carbon nanotube solution is deposited and oxygen plasma etched for 60 s to define the channel of the carbon nanotube field effect transistor. The active channel area is determined by electron beam lithography, and then etched by oxygen plasma for 60s. The top gate window is patterned by electron beam lithography, and then 10nm of hafnium oxide (HfO2) is grown by atomic layer deposition and 20nm of palladium is evaporated by a standard rise process. Finally, the source and drain are patterned by electron beam lithography, and then p-type contacts are prepared by 0.3nm of titanium (Ti) and 70nm of palladium (Pd) evaporation.

[0048] The prepared device was subjected to single particle irradiation and pulsed laser irradiation. An oscilloscope with an input impedance of 50Ω was used to display and record single event transients (SETs). A 100x microscope objective was used to focus the laser beam to form a charge spot of about 2μm in size. The wavelength of the laser pulse was 1064nm, the normal pulse width was 150fs, and the repetition frequency was 1kHz. In the single event transient pulse laser test, the carbon nanotube field effect transistor was fixed on the xyz stage with a resolution of 0.1μm.

[0049] For the test of the device's ability to resist single-particle irradiation, a pulsed laser was used. The pulsed laser emitted a 1062nm laser, which is larger than the bandgap width of the carbon nanotube, and will produce a single-event charge effect, thereby generating a peak current in the source-drain current, called a single-event transient (SETs). It was compared with the peak current of the traditional silicon-based field-effect transistor (Si-FET). The results showed that when the short tail of the peak current appeared, it was 3ns in the carbon nanotube field-effect transistor, which was much lower than the 70ns of the silicon-based field-effect transistor, showing that the carbon nanotube has a low response to single-event transients. This means that the carbon nanotube field-effect transistor can resume normal operation faster when hit by high-energy particles, showing excellent radiation resistance.

[0050] In order to solve the current reinforcement problem of single particle effects, this embodiment discovers a new type of single particle flip self-recovery effect in low-dimensional materials for reinforcement. The mechanism of single particle occurrence can be divided into channel material-induced and gate voltage-induced. The single particle effect induced by gate voltage can self-recover under certain circumstances. This embodiment can reduce the probability of single particle effects occurring directly in channel materials and convert them to gate voltage-induced, thereby utilizing its self-recovery effect for reinforcement and enhancing the stability of the device.

[0051] Among single-particle effects, single-particle flips are not uncommon in SRAM. Whether it is hardware reinforcement or software reinforcement, it will affect the performance of the system compared to the device itself, and even cause a reduction in life. Therefore, the emergence of the single-particle flip self-recovery effect is a new type of reinforcement method that can change the redundant state caused by hardware reinforcement or software reinforcement, and will not increase the complexity of system design and integration. Normally, in an SRAM circuit, when a single-particle flip occurs in an inverter in a storage unit, it will be accompanied by feedback amplification, and a single-particle flip will also occur in the adjacent inverter, causing the entire storage unit to be flipped, resulting in a logical error.

[0052] In the SRAM made of carbon nanotubes as the channel material, after a single-particle flip occurs in an inverter, due to the particularity of the single-particle effect mechanism, discharge occurs during the current propagation to the second inverter, which will not cause the second inverter to flip, and the entire logic circuit will not fail, that is, the single-particle flip self-recovery effect occurs.

[0053] The single particle upset self-recovery effect occurs in two-dimensional materials. Its essence lies in the fact that the occurrence mechanism of the single particle effect is different from that of silicon-based devices. Among the two mechanisms of two-dimensional materials, single particle upset self-recovery will only occur when the gate voltage induces the single particle effect. Therefore, in order to amplify this effect, the focus should be placed on increasing the gate voltage induction mechanism, reducing the thickness of the channel material, and reducing the thickness of the gate oxide layer, so that the single particle upset self-recovery effect is more likely to occur.

[0054] A gate dielectric with High-k characteristics and fast frequency response characteristics is selected to make a local bottom-gate carbon nanotube field effect tube. In the process of making the device, it is necessary to ensure that the device has a single-particle upset self-recovery effect. The key is to change the mechanism of single-particle occurrence from channel induction to gate voltage induction. Due to the characteristics of the carbon nanotube itself, it is difficult to emit electron-hole pairs in the channel. Therefore, the thickness of the channel material is reduced to further reduce the probability of single-particle effect. It is ensured that the occurrence of single-particle effect is induced by gate voltage, so that the single-particle upset self-recovery effect can be successfully triggered to achieve the purpose of reinforcement.

[0055] Similarly, in the single-particle effect induced by gate voltage, in order to ensure the smooth occurrence of the single-particle flip self-recovery effect and achieve the effect of reinforcement, it is necessary to ensure better discharge of the gate capacitance, so that the thickness of the gate oxide layer can be reduced. The discharge capacity can be enhanced by using gate dielectric materials with high-frequency response characteristics. The capacitor impedance formula is: Zc=1 / j2πfC, where j represents the imaginary unit, f represents the frequency, and C represents the capacitance; when the frequency is very large, its impedance is very low, and the discharge time is greatly shortened, so that it can discharge smoothly, the single-particle flip self-recovery effect occurs, and the purpose of reinforcement is achieved.

[0056] This application proposes the single-particle upset self-recovery effect for the first time, reduces the threshold of the self-recovery effect, and utilizes the single-particle upset self-recovery effect to strengthen the memory's ability to resist single particles.

[0057] According to another aspect of the present application, the carbon nanotube is graphene, and an ultra-thin two-dimensional material such as graphene is used as a channel material. A single film is grown by physical (vacuum evaporation, magnetron deposition) or chemical method (liquid phase stripping, chemical vapor deposition), and the film is directly grown on a Si / SiO2 substrate. A High-K gate dielectric, such as strontium titanate (SrTiO3), etc., is selected to increase the gate dielectric capacitance. When the charge amount of charged particles accumulated on the gate dielectric is constant, the additional gate voltage offset generated is small. According to the current characteristic curve generated by the gate voltage, the current offset generated is small, and the interference to the circuit is reduced.

[0058] The single-particle upset self-recovery effect is used to reinforce the device against radiation. The effect of this embodiment comes from the fact that the gate dielectric with fast frequency response under the ultra-thin channel can quickly self-recover after the single-particle effect occurs. In the case of selecting traditional channel materials, due to the large sensitive area of ​​traditional materials, a large number of electron-hole pairs will be generated when high-energy particles are incident. After the source and drain are absorbed, a large current will be generated, causing the single-particle effect. When ultra-thin carbon nanotubes are selected as channel materials, due to their relatively small sensitive area, very few electron-hole pairs are generated. When high-energy particles enter the gate oxide layer, they will cause charge accumulation in the gate oxide layer, generate gate voltage, and thus cause the single-particle effect. The difference in the mechanism of generating the single-particle effect has created a single-particle upset self-recovery effect in the SRAM circuit made of carbon nanotubes as the channel material, so that the circuit can be reinforced.

[0059] These high-energy particles not only affect the channel, but also the gate of the device has the characteristics of capacitance. The charge of high-energy particles can accumulate in such places, generating additional gate voltage, generating single-particle transient pulses, and affecting the memory storage content. In the face of the flip caused by the single-particle effect, reinforcement is required. Compared with traditional hardware reinforcement and software reinforcement, the single-particle flip self-recovery effect discovered when selecting two-dimensional materials as channel materials is a more efficient and simpler reinforcement method.

[0060] On the basis of clarifying the mechanism of the occurrence of the single particle effect, the two-dimensional material can change the thickness of the channel material, reduce the probability of the already small probability of the channel inducing the single particle effect to a lower level, thereby increasing the probability of the gate voltage inducing the single particle effect, and thus causing the single particle upset self-recovery effect. At the same time, in order to ensure the reinforcement effect and increase the effect of the single particle upset self-recovery, the thickness of the gate oxide layer can be reduced, the capacitance can be increased, and the discharge capacity can be improved, so that the single particle upset self-recovery can occur smoothly in the SRAM circuit.

[0061] A gate dielectric with fast frequency response characteristics is selected so that it can discharge quickly after accumulating charges. After the single-particle effect occurs, the extra current in the channel disappears quickly. By utilizing the single-particle flip self-recovery effect, the impact of the single particle on the performance of the device is greatly reduced, thereby achieving the device's anti-radiation reinforcement effect.

[0062] According to the capacitor impedance formula: Zc=1 / j2πfC, it can be seen that the gate dielectric with fast frequency response characteristics (f>10 9hz) allows the device to quickly discharge and restore to its original state after a single particle effect occurs. The single particle flip and recovery effect is used so that the potential change caused by a single particle has little effect on the circuit. New High-K gate dielectric materials such as HfO2, Al2O3 and other gate dielectrics have higher dielectric constants, better thermal stability and lower leakage current, which can effectively improve the frequency response characteristics of the gate dielectric. At the same time, attention should also be paid to optimizing the interface quality. Improving the interface quality between the gate dielectric and the semiconductor can reduce interface charge traps and defect states, thereby increasing the capacitance density and response speed of the gate dielectric. This can be achieved by using appropriate interface layer materials, surface treatment technology or annealing process.

[0063] In order to cope with the challenge of single particles to device stability, ultra-thin channels, high-k and gate dielectrics with fast frequency response characteristics can be used in combination. At the mechanism level, single-particle flip self-recovery is used to weaken the impact of high-energy particles on device stability, thereby greatly improving its anti-single-particle performance.

[0064] This application uses single-particle flip self-recovery technology to reinforce carbon nanotube field effect transistors, and the resistance to single-particle effects has been significantly increased. Monitor the impact position of high-energy particles, and when the detector detects a single-particle flip, record the affected node. Then wait for a while to make sure that the particle has left. Use electron beam lithography technology to reactivate the affected nodes and restore them to normal. Record the location, response time and current change of each single-particle event. The node state after recovery also needs to be recorded. The effect of single-particle flip self-recovery technology can be evaluated by the following indicators: the frequency of single-particle flips, the success rate of recovery, and the comparison of the current performance after recovery with the initial state. Through single-particle flip self-recovery technology, we can significantly improve the single-particle irradiation resistance of carbon nanotube field effect transistors. This helps to reduce device failures and performance degradation and improve system reliability.

[0065] Furthermore, a semiconductor device using the instantaneous single particle upset self-recovery technology includes: a carbon nanotube film used as a channel material; and a gate dielectric grown on the carbon nanotube film, including hafnium oxide.

[0066] This application has developed a semiconductor device processing technology that uses single-particle flip self-recovery technology. Compared with non-carbon nanotube field-effect transistors and devices that do not use single-particle flip self-recovery, its radiation resistance has a substantial leap. On the basis of using carbon nanotubes as channel materials, the single-particle flip self-recovery analysis method combined with simulation organically combines experiments and simulations to achieve complementary advantages of heavy ion wide beam experiments, heavy ion microbeam experiments and numerical simulations, and the device's resistance to single-particle effects is significantly enhanced; low-dimensional materials are used as channel materials, making it difficult for high-energy particles to accumulate in the channel; and by selecting High-K gate dielectrics, the single-particle effect of the device is further weakened.

[0067] like Figure 2 As shown in the figure, it is the transient current size after the single particle effect occurs. The highest point is the peak current and the pulse width is the peak width. The tail current indicates that the current drops rapidly after reaching the peak value and stabilizes in a very short time scale (about 0.7 nanoseconds). Figure 3 As shown, the vertical axis is Figure 2 The integral of V, that is, the total charge accumulated in the channel, is a laser with an energy of 5 nanojoules, which is used to excite the charge in the channel, thereby causing the single particle effect. Under this laser energy, the total charge accumulated in the channel changes over time. GS is the potential difference between the gate and source, V DS is the potential difference between the drain and the source, λ is the laser wavelength, and the single-particle effect is excited by a single photon. Figure 2 and Figure 3 This reflects that the device generates a transient current after a single particle is injected, and then quickly returns to its original state.

[0068] like Figure 4 The figure shows the result of single event upset self-recovery (SEUR) of a single device. The waveform in the figure rises first and then falls, indicating that the device state recovers to its previous state after the change, verifying the single event upset self-recovery effect. DD Represents the positive power supply voltage of the circuit, V BL Indicates a bit line, which is used for signal transmission when reading or writing data.

[0069] The preferred embodiments of the present invention are described in detail above; however, the present invention is not limited to the specific details in the above embodiments. Within the technical concept of the present invention, various equivalent transformations can be made to the technical solutions of the present invention, and these equivalent transformations all belong to the protection scope of the present invention.

Claims

1. A semiconductor device processing method using instantaneous single event upset self-recovery technology, characterized in that: The steps include: S1, putting carbon nanotubes and a dispersant in a predetermined ratio into toluene, and using a disperser to disperse for a predetermined time at a power P to obtain a dispersed solution; S2, centrifuging the dispersed solution at least twice under a centrifugal force G to obtain a carbon nanotube solution; S3, diluting the carbon nanotube solution with toluene by at least ten times, placing a substrate in the diluted carbon nanotube solution for a soaking time t1, rinsing the soaked substrate with toluene for a time t2, purging the rinsed substrate with nitrogen, and baking it in air at a temperature of C for a time t3 to obtain a carbon nanotube film; S4, based on the carbon nanotube film and the fast frequency response gate dielectric, patterning is performed by electron beam lithography technology to construct a local bottom gate window of the carbon nanotube field effect transistor, palladium with a thickness of h1 is evaporated on the local bottom gate window by atomic layer deposition technology and hafnium oxide with a thickness of h2 is grown, and a diluted carbon nanotube solution is deposited on the local bottom gate window where hafnium oxide is grown, and the deposited carbon nanotube solution is etched by oxygen plasma for a time of t4 to form a channel of the carbon nanotube field effect transistor, and the channel is patterned by electron beam lithography technology to construct an active channel region, and the active channel region is etched by oxygen plasma for a time of t5 to form an active channel of the carbon nanotube field effect transistor; The active channel is patterned by electron beam lithography to construct the top gate window of the carbon nanotube field effect transistor, hafnium oxide with a thickness of h3 is grown on the top gate window by atomic layer deposition, and palladium with a thickness of h4 is evaporated; The two ends of the active channel are patterned by electron beam lithography to form the source and drain of the carbon nanotube field effect transistor, and titanium with a thickness of h5 and palladium with a thickness of h6 are evaporated to obtain P-type contacts of the source and drain; S5, sequentially performing single particle irradiation and pulse laser irradiation on the carbon nanotube field effect transistor, focusing the pulse laser beam using a microscope objective lens with a magnification of at least 100 times to form a charge spot on the carbon nanotube field effect transistor; S6. Use an oscilloscope to monitor the charge spot, record the response data of the single event transient based on the monitoring result, and evaluate the single particle irradiation resistance of the carbon nanotube field effect transistor based on the response data.

2. The semiconductor device processing method using instantaneous single event upset self-recovery technology according to claim 1, characterized in that: Step S2 is further as follows: S21, subjecting the dispersed solution to a first centrifugal operation under a centrifugal force G, the first centrifugal operation time being t, to obtain a clear solution with a purity of at least 90%; S22, subjecting the clear liquid to a second centrifugal operation under a centrifugal force G, the second centrifugal operation time being t', to obtain a carbon nanotube solution with a purity of at least 90%; The centrifugal force G is 50000g, the first centrifugal operation time t is 0.5h, and the second centrifugal operation time t' is 2h.

3. The semiconductor device processing method using instantaneous single event upset self-recovery technology according to claim 1, characterized in that: Step S3 also includes: The carbon nanotube film is annealed in a tube furnace with a forming gas at a temperature C1 for at least 3 hours to remove polymers in the carbon nanotube film.

4. The semiconductor device processing method using instantaneous single event upset self-recovery technology according to claim 3, characterized in that: The forming gas is a mixture of argon and hydrogen in a ratio of 5:

1.

5. The semiconductor device processing method using instantaneous single event upset self-recovery technology according to claim 1, characterized in that: The substrate is a silicon substrate or a silicon dioxide substrate.

6. The semiconductor device processing method using instantaneous single event upset self-recovery technology according to claim 1, characterized in that: The purity of the nitrogen is not less than 99.999%.

7. The semiconductor device processing method using instantaneous single event upset self-recovery technology according to claim 1, characterized in that: The carbon nanotube is graphene.

8. The method for processing a semiconductor device using the transient single event upset self-recovery technology according to claim 1, characterized in that: In step S4, the palladium thickness h1 is 20 nm, the hafnium oxide thickness h2 is 10 nm, the hafnium oxide thickness h3 is 10 nm, the palladium thickness h4 is 20 nm, the titanium thickness h5 is 0.3 nm, and the palladium thickness h6 is 70 nm.

9. The semiconductor device processing method using instantaneous single event upset self-recovery technology according to claim 1, characterized in that: The predetermined ratio in step S1 is 1:

1.

10. A semiconductor device manufactured using the semiconductor device processing method using the transient single event upset self-recovery technology according to any one of claims 1 to 9, characterized in that: include: Carbon nanotube film, used as channel material; A gate dielectric grown on a carbon nanotube film, comprising hafnium oxide.

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