Lower Electrode Assembly and Plasma Processing Equipment

Abstract

The present invention provides a lower electrode assembly and a plasma processing apparatus. The lower electrode assembly is used for plasma process treatment and includes: an electrostatic chuck, the upper surface of which is used for carrying a substrate; a first electrode located in the electrostatic chuck, which is electrically connected to a pulsed DC bias voltage source; a second electrode located in the electrostatic chuck, which is electrically connected to a DC voltage source through an isolation circuit, and the second electrode is located above the first electrode; the isolation circuit includes a diode, the negative electrode of the diode is electrically connected to the negative electrode of the DC voltage source, and the positive electrode is electrically connected to the second electrode. The present invention solves the problem of the instability of the substrate clamping voltage during the process by eliminating the influence of the pulsed DC bias voltage source on the clamping voltage.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor equipment, and particularly relates to a lower electrode assembly and a plasma processing equipment. Background Art

[0002] In a plasma processing equipment, an electrostatic chuck is one of the core components of the equipment. The electrostatic chuck mainly plays two roles in plasma processing. One is to generate a bias voltage on the surface of the substrate on the electrostatic chuck, thereby accelerating the movement of ions in the plasma sheath layer towards the substrate. The other is to firmly hold the substrate disposed thereon, so that the substrate remains stable during the plasma processing. In order to achieve higher aspect ratio etching or ALE etching, an effective method is to use a pulsed DC bias source to bias the substrate, which can generate a single-peak ion energy distribution function.

[0003] An electrostatic chuck usually includes two electrodes. In the existing scheme of using a pulsed DC bias source to bias the substrate, one scheme is to connect the pulsed DC bias source to one of the electrodes in the electrostatic chuck and couple it to the substrate through a capacitor; the fastening of the substrate is achieved by applying a DC voltage to the other electrode embedded in the electrostatic chuck to generate an electrostatic attraction force between the electrostatic chuck and the substrate. However, during the process, the pulsed DC bias will be adjusted with the change of the process environment, thereby causing mutual influence between the two electrodes, making the electrostatic force between the substrates change with the change of the pulsed voltage, resulting in insufficient or excessive clamping of the substrate during the etching process, causing losses such as substrate scrapping and etching failure. Summary of the Invention

[0004] The purpose of the present invention is to provide a lower electrode assembly and a plasma processing equipment, by eliminating the influence of the pulsed DC bias source on the clamping voltage, to solve the problem of instability of the clamping voltage of the substrate during the etching process.

[0005] In order to achieve the above purpose, the present invention is realized through the following technical solutions:

[0006] A lower electrode assembly for plasma process treatment, comprising:

[0007] An electrostatic chuck, whose upper surface is used to carry a substrate;

[0008] A first electrode located in the electrostatic chuck, which is electrically connected to a pulsed DC bias source;

[0009] A second electrode located in the electrostatic chuck, which is electrically connected to a DC voltage source through an isolation circuit, and the second electrode is located above the first electrode;

[0010] The isolation circuit includes a diode, the negative electrode of the diode is electrically connected to the negative electrode of the DC voltage source, and the positive electrode is electrically connected to the second electrode.

[0011] Optionally, the pulsed DC bias voltage source outputs a negative pulsed voltage.

[0012] Optionally, the positive electrode of the DC voltage source is grounded.

[0013] Optionally, the isolation circuit further includes a resistor connected in series with the diode, and the resistance value of the resistor is 1 kΩ to 1 GΩ.

[0014] Optionally, an RF filter is provided between the isolation circuit and the DC voltage source.

[0015] Optionally, the electrostatic chuck includes a ceramic material layer and a metal base for supporting the ceramic material layer;

[0016] Both the first electrode and the second electrode are disk electrodes located on the ceramic material layer;

[0017] Alternatively, the first electrode is the metal base, and the second electrode is a disk electrode located on the ceramic material layer.

[0018] Optionally, the isolation circuit and the DC voltage source are integrally provided.

[0019] Optionally, the voltage range of the DC voltage source is 0 to -10 kV.

[0020] Optionally, the duty cycle range of the pulsed DC bias voltage source is 1% - 95%, the frequency range is 10 kHz to 5 MHz, and the voltage difference between the high and low levels of the output is 100 V to 50 kV.

[0021] Optionally, the isolation circuit is provided on a circuit board, and the circuit board is disposed below the electrostatic chuck.

[0022] A plasma processing apparatus, comprising:

[0023] A reaction chamber;

[0024] An intake mechanism for delivering a process gas into the reaction chamber;

[0025] A source radio frequency for igniting the process gas into plasma;

[0026] The lower electrode assembly as described above, located at the bottom of the reaction chamber.

[0027] Compared with the prior art, the present invention has the following advantages:

[0028] An isolation circuit is provided between the DC voltage source and the second electrode. Since a diode has the characteristics of forward conduction and reverse cut-off, when the pulsed DC bias voltage source outputs a pulse, the diode is reverse cut-off and cannot be charged or discharged through the loop of the DC voltage source, so that no potential difference is brought to both ends of the second capacitor due to the addition of the pulsed DC bias voltage source. The potential difference between both ends of the second capacitor only depends on the DC voltage source, thereby keeping the clamping voltage stable, eliminating the influence of the pulse voltage of the pulsed DC bias voltage source on the clamping voltage, and solving the problem of instability of the substrate clamping voltage in the process. A resistor is also connected in series with the diode in the isolation circuit, which can block the AC component in the pulsed DC bias voltage source and the RF power for generating plasma, thereby stabilizing the current in the loop of the DC voltage source. Brief Description of the Drawings

[0029] In order to more clearly illustrate the technical solutions of the present invention, the drawings required for description will be briefly introduced below. Obviously, the drawings in the following description are an embodiment of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings:

[0030] Figure 1 It is a structural diagram of a plasma processing device;

[0031] Figure 2 It is a structural diagram of a lower electrode assembly in the prior art;

[0032] Figure 3 For Figure 2 The equivalent circuit diagram of the shown structure;

[0033] Figure 4 It is a curve graph showing the change of the voltage at both ends of the capacitor C2 with time under different pulse output voltages in the simulation experiment using the prior art;

[0034] Figure 5 It is a structural diagram of a lower electrode assembly in an embodiment of the present invention;

[0035] Figure 6 For Figure 5 An equivalent circuit diagram of the shown structure;

[0036] Figure 7 For Figure 5 Another equivalent circuit diagram of the shown structure;

[0037] Figure 8 It is a curve graph showing the change of the voltage at both ends of the capacitor C2 with time under different pulse output voltages in the simulation experiment using the solution of the present invention;

[0038] Figure 9 It is a structural diagram of a lower electrode assembly in another embodiment of the present invention;

[0039] Figure 10 This is the equivalent circuit diagram of the lower electrode assembly in another embodiment of the present invention. Detailed implementation manners

[0040] The solution proposed by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are in a very simplified form and are all drawn with non-precise scales, only for the purpose of conveniently and clearly assisting in explaining the implementation manners of the present invention. In order to make the purpose, features, and advantages of the present invention more obvious and understandable, please refer to the accompanying drawings. It should be noted that the structures, scales, sizes, etc. shown in the drawings of this specification are only used to cooperate with the content disclosed in the specification for those skilled in this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention. Therefore, they do not have technical substantial significance. Any modification of the structure, change of the proportional relationship, or adjustment of the size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope covered by the technical content disclosed by the present invention.

[0041] Figure 1 The structural schematic diagram of a plasma processing device is shown. The plasma processing device includes: a reaction chamber 10, a lower electrode assembly 20 located at the bottom of the reaction chamber 10, and the lower electrode assembly 20 includes an electrostatic chuck for carrying a substrate W. The reaction chamber 10 is further provided with an air inlet mechanism 30 for delivering process gas into the reaction chamber 10. The air inlet mechanism 30 can introduce gas from the top or the side wall of the reaction chamber 10. In a capacitively coupled plasma processing device, the air inlet mechanism 30 can be a gas shower head, which also serves as the upper electrode for generating plasma. It further includes a radio frequency power supply 40 for igniting the process gas into plasma (Plasma). One or more radio frequency power supplies 40 can be electrically connected to the lower electrode or the upper electrode separately, or simultaneously to the upper electrode and the lower electrode, so as to deliver radio frequency power to the lower electrode or simultaneously to the upper electrode and the lower electrode, thereby generating a large radio frequency electric field inside the reaction chamber 10. Some gas molecules in the reaction gas lose electrons when experiencing these strong electric fields, leaving positively charged ions. The positively charged ions are accelerated towards the lower electrode direction under the action of the bias voltage and combine with the neutral substances in the substrate W to be processed, performing processes such as etching and deposition on the substrate.

[0042] Figure 2The structural schematic diagram of the lower electrode assembly in an existing plasma processing device is shown. Among them, a first electrode 22 and a second electrode 23 are arranged in the electrostatic chuck 21. The second electrode 23 is located above the first electrode 22, and their areas can be the same or different. The first electrode 22 is electrically connected to a pulsed DC bias voltage source PDC, which is used to bias the substrate W on the electrostatic chuck 21, so that the charged particles in the sheath layer above it accelerate to bombard the substrate W. The second electrode 23 is electrically connected to a DC voltage source DC, which is used to generate an electrostatic attraction between the electrostatic chuck 21 and the substrate W, thereby fixing the substrate W. The high-frequency RF power source for generating plasma is not shown in Figure 2 the figure. Although a resistor Re with a relatively large resistance value is provided between the DC voltage source DC and the second electrode 23 to isolate the RF signal and the pulsed DC signal, the pulsed voltage of the pulsed DC bias voltage source PDC will still be capacitively coupled to the second electrode 23 in the electrostatic chuck 21, thereby changing the clamping voltage and causing insufficient or excessive clamping of the substrate W.

[0043] Figure 3 is Figure 2 the equivalent circuit diagram of the shown structure. In the figure, C1 represents the capacitance between the first electrode 22 and the second electrode 23, and C2 represents the capacitance between the second electrode 23 and the substrate W. The capacitance values of C1 and C2 can be 1 nF to 100 nF. D SH , C SH and R SH 's parallel circuit represents the equivalent circuit model of the plasma sheath layer on the surface of the substrate W. D W , C W and R W 's parallel circuit represents the equivalent circuit model of the plasma sheath layer on the cavity wall surface. R pl represents the resistance inside the plasma, and Re represents the resistance between the DC voltage source DC and the second electrode 23.

[0044] Figure 4It is the curve of the voltage at both ends of C2, i.e., the clamping voltage (Chuck Voltage), varying with time under different pulsed output voltages (Pulsing Voltage) obtained through experimental simulation. The voltage of the DC voltage source DC is set to -12 kV, and the pulsed output voltages of the pulsed DC bias voltage source PDC are -15 kV, -10 kV, and -5 kV respectively, with a duty cycle of 50% and a frequency of 400 kHz. According to the simulation results, when the pulsed output voltage switches among the three values, the top curve corresponds to the value of the clamping voltage when the pulsed output voltage is -15 kV, the middle curve corresponds to the value of the clamping voltage when the pulsed output voltage is -10 kV, and the bottom curve corresponds to the value of the clamping voltage when the pulsed output voltage is -5 kV. It can be clearly seen that the value of the clamping voltage also fluctuates up and down. If the appropriate value of the clamping voltage is between the top and bottom curves, there will be problems of over-clamping and under-clamping when the pulsed output voltage changes for the substrate.

[0045] It can be understood that in Figure 3 , the potential signal at point B is the potential on the substrate W, which is jointly affected by the pulsed DC bias voltage source PDC, the plasma, and the DC voltage source DC. The voltage output by the DC voltage source DC remains unchanged. The influence of the plasma on point B is related to the source radio frequency and the plasma equipment. When the source radio frequency and the equipment structure are fixed, the influence of the plasma at point B is also fixed, that is, the waveform at point B is approximately the output waveform -U~0 of the pulsed DC bias voltage source PDC (-U is approximately the voltage difference between the high and low levels of the pulsed DC bias voltage source PDC). And the potential at point A is the superposition of the outputs of the DC voltage source DC and the pulsed DC bias voltage source PDC. The output voltage of the pulsed DC bias voltage source PDC is shunted by the branch where the DC voltage source DC is located at point A. When the output voltage of the pulsed DC bias voltage source PDC switches, in order to achieve dynamic balance at point A, there will be a current passing through the loop of the DC voltage source DC to charge and discharge point A. For the convenience of discussion, for example, the duty cycle of the high and low levels of PDC is 50% and the voltage difference is U, then the waveform at point A is approximately a pulsed waveform changing from -U / 2~U / 2 plus the voltage output by the DC voltage source DC. It can be seen that the pulsed DC bias voltage source PDC causes the potential difference between points B and A, and the magnitude of this potential difference depends on the pulsed output voltage of the pulsed DC bias voltage source PDC.

[0046] During the plasma process treatment, the pulsed output voltage of the pulsed DC bias voltage source PDC is usually different under different treatment processes. When the pulsed output voltage is adjusted, the clamping voltage will also change accordingly, resulting in process instability and even damage to the substrate W.

[0047] Based on this, the present invention provides a lower electrode assembly, in which an isolation circuit is provided between a DC voltage source DC and a second electrode 23 to eliminate the influence of the pulsed output voltage of a pulsed DC bias voltage source PDC on the clamping voltage.

[0048] Specifically, as Figure 5 shown, the lower electrode assembly 20 provided by an embodiment of the present invention includes: an electrostatic chuck 21, whose upper surface is used to carry a substrate W; a first electrode 22 located in the electrostatic chuck 21, which is electrically connected to a pulsed DC bias voltage source PDC; a second electrode 23 located in the electrostatic chuck 21, which is electrically connected to a DC voltage source DC through an isolation circuit 24, and the second electrode 23 is located above the first electrode 22. The capacitance formed between the first electrode 22 and the second electrode 23 is called capacitance C1, and the capacitance formed between the second electrode 23 and the substrate W is called capacitance C2.

[0049] Figure 6 is Figure 5 the equivalent circuit diagram of the shown structure. Combining Figure 6 shown, the isolation circuit 24 includes a diode D. The negative electrode of the diode D is electrically connected to the negative electrode of the DC voltage source DC, and the positive electrode is electrically connected to the second electrode 23.

[0050] In this embodiment, the positive electrode of the DC voltage source DC is grounded, the DC voltage source DC outputs a negative voltage, the positive electrode of the pulsed DC bias voltage source PDC is grounded, and the pulsed DC bias voltage source PDC outputs a negative pulse voltage. Combining Figure 6 shown, the negative electrode of the diode D is connected to the negative electrode of the DC voltage source DC. When the voltage output by the pulsed DC bias voltage source PDC is 0, the diode D conducts, and at this time the voltage at point A is the output voltage -V chuck of DC. At this time, the potential at point B is 0, so the adsorption voltage is V chuck ; when the PDC output voltage is -V, since C1 is very large, the voltage at point A jumps following the PDC output voltage and becomes (-V chuck -V). At this time, the diode is cut off, and the corresponding potential at point B is -V. Therefore, the voltage difference between A and B is still V chuck . Therefore, no potential difference will be brought between points B and A due to the addition of the pulsed DC bias voltage source PDC, that is, the potential difference across C2 only depends on the DC voltage source DC, so that the clamping voltage remains stable.

[0051] In this embodiment, the voltage range of the DC voltage source is from 0 to -10 kV, the duty cycle of the pulsed DC bias voltage source is from 1% to 95%, the frequency is from 10 kHz to 5 MHz, and the output voltage range is from -100 V to -50 kV.

[0052] AsFigure 7 As shown, the isolation circuit 24 may further include a resistor R connected in series with the diode D, and the resistance value of the resistor R is 1 kΩ to 1 GΩ. The function of the resistor R is to block the AC component and high-frequency RF power in the pulsed DC bias voltage source PDC, so as to stabilize the current in the DC voltage source DC loop.

[0053] Figure 8 It is a curve obtained by experimental simulation of the voltage across the capacitor C2, i.e., the clamping voltage, varying with time under different pulsed output voltages using the solution of the present invention. Figure 8 In it, the voltage of the DC voltage source DC is set to -5 kV, the pulsed output voltages of the pulsed DC bias voltage source PDC are -15 kV, -10 kV, and -5 kV respectively, the duty cycle is 50%, and the frequency is 400 kHz. It can be seen that the isolation circuit 24 can well eliminate the influence of the output of the pulsed DC bias voltage source PDC on the clamping voltage, and the clamping voltage does not change with the change of the output voltage of the DC bias voltage source PDC.

[0054] In this embodiment, the two output voltages of the pulsed DC bias voltage source may not be limited to 0 V and a negative voltage. The pulsed DC bias voltage source is only limited to an output voltage high-low level voltage difference of 100 V to 50 kV. The isolation circuit 24 may be disposed on a circuit board, and the circuit board is disposed below the electrostatic chuck. The isolation circuit 24 may be integrally provided with the DC voltage source DC to simplify the structure. Specifically, each component in the isolation circuit 24 is integrated on a circuit board and fixed in the power supply box of the DC voltage source DC. Alternatively, each component of the isolation circuit 24 may also be separately assembled in the power supply box of the DC voltage source DC.

[0055] The electrostatic chuck 21 includes a ceramic material layer 211 and a metal base 212 for supporting the ceramic material layer 211, and the metal base 212 is also used to assist in controlling the temperature of the ceramic material layer 211. In Figure 5 In the shown embodiment, both the first electrode 22 and the second electrode 23 are disk electrodes embedded in the ceramic material layer 211, and the second electrode 23 is located above the first electrode 22. In Figure 9 In the shown embodiment, the first electrode 22 is the metal base 212, and the second electrode 23 is a disk electrode embedded in the ceramic material layer 211, so as to ensure that the second electrode 23 is located above the first electrode 22.

[0056] As Figure 10 As shown, an RF filter 25 may also be provided between the isolation circuit 24 and the DC voltage source DC to better block RF signals from entering the DC voltage source DC.

[0057] In summary, an isolation circuit is provided between the DC voltage source and the second electrode. Since the diode has the characteristics of forward conduction and reverse cut-off, the influence of the pulse voltage of the pulsed DC bias voltage source on the clamping voltage is eliminated, and the problem of the instability of the substrate clamping voltage in the process is solved. A resistor is also connected in series with the diode in the isolation circuit, which can block the AC component in the pulsed DC bias voltage source, thereby stabilizing the current in the DC voltage source loop.

[0058] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0059] Although the content of the present invention has been introduced in detail through the above preferred embodiments, it should be recognized that the above description should not be considered as a limitation of the present invention. After those skilled in the art have read the above content, various modifications and alternatives to the present invention will be obvious. Therefore, the protection scope of the present invention should be defined by the appended claims.

Claims

1. A lower electrode assembly for plasma process treatment, characterized in that, Comprising: An electrostatic chuck, the upper surface of which is used to carry a substrate; A first electrode located in the electrostatic chuck, which is electrically connected to a pulsed DC bias voltage source; A second electrode located in the electrostatic chuck, which is electrically connected to a DC voltage source through an isolation circuit, and the second electrode is located above the first electrode; The isolation circuit includes a diode, the negative electrode of the diode is electrically connected to the negative electrode of the DC voltage source, and the positive electrode is electrically connected to the second electrode. The isolation circuit ensures that the voltage delivered by the DC voltage source to the second electrode is forward-conductive and reverse-blocking.

2. The lower electrode assembly according to claim 1, characterized in that, The pulsed DC bias voltage source outputs a negative pulse voltage.

3. The lower electrode assembly according to claim 1, characterized in that The positive electrode of the DC voltage source is grounded.

4. The lower electrode assembly according to claim 1, wherein The isolation circuit further includes a resistor connected in series with the diode, and the resistance value of the resistor is 1 kΩ to 1 GΩ.

5. The lower electrode assembly according to claim 1, wherein An RF filter is provided between the isolation circuit and the DC voltage source.

6. The lower electrode assembly according to claim 1, characterized in that The electrostatic chuck includes a ceramic material layer and a metal base for supporting the ceramic material layer; Both the first electrode and the second electrode are disk electrodes located in the ceramic material layer; Alternatively, the first electrode is the metal base, and the second electrode is a disk electrode located in the ceramic material layer.

7. The lower electrode assembly according to claim 1, characterized in that, The isolation circuit and the DC voltage source are integrally provided.

8. The lower electrode assembly according to claim 1, wherein, The voltage range of the DC voltage source is 0 to -10 kV.

9. The lower electrode assembly according to claim 1, wherein, The duty cycle range of the pulsed DC bias voltage source is 1% - 95%, the frequency range is 10 kHz to 5 MHz, and the voltage difference between the high and low levels output is 100 V to 50 kV.

10. The lower electrode assembly according to claim 1, wherein The isolation circuit is provided on a circuit board, and the circuit board is provided below the electrostatic chuck.

11. A plasma processing apparatus, characterized in that, Comprising: A reaction chamber; An intake mechanism for delivering process gas into the reaction chamber; A source radio frequency for igniting the process gas into plasma; The lower electrode assembly according to any one of claims 1 to 10, located at the bottom of the reaction chamber.

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