A gallium nitride device with single event effect irradiation resistance and a method for manufacturing the same

Abstract

The present invention relates to the field of semiconductor technology, and in particular to a gallium nitride device with single particle effect radiation resistance and a method for manufacturing the same. The gallium nitride device with single particle effect radiation resistance designed by the present invention comprises a substrate layer, a high resistance layer, a back barrier layer, a gallium nitride layer, a barrier layer, and a gate, a source and a drain arranged on the barrier layer in sequence from bottom to top; characterized in that the gallium nitride device also comprises a single particle radiation charge extraction electrode, the single particle radiation charge extraction electrode comprises a plurality of p-type gallium nitride blocks uniformly arranged on the top surface of the barrier layer, an ohmic metal column arranged in the middle of each of the p-type gallium nitride blocks, and an interconnecting metal sheet for connecting each dispersed ohmic metal column; the single particle radiation charge extraction electrode can provide a path for radiation-induced holes to be discharged to the outside of the device, thereby improving the radiation resistance and reliability of the device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a gallium nitride device with single-particle effect irradiation resistance capability and a manufacturing method thereof. Background Art

[0002] Gallium nitride materials have advantages such as wide bandgap, high breakdown voltage, and high electron mobility. Gallium nitride power devices have been used in the field of consumer electronics. In addition, gallium nitride devices also have broad application prospects in the aerospace field. Aerospace devices have strict requirements for high energy efficiency and light weight. The advantages of gallium nitride devices such as high speed, miniaturization, and easy integration can meet the requirements of aerospace devices. However, when gallium nitride devices work in space, they will be affected by the single particle irradiation effect. In the current enhancement-mode gallium nitride high electron mobility transistor (GaN HEMT), the gate is mostly made of p-type gallium nitride to form an enhancement-mode device. However, carriers, especially holes, cannot cross the gate structure to be released outside the device when the device is turned off, and the device's radiation resistance is severely restricted.

[0003] The existing GaN high electron mobility transistor consists of a substrate layer, a high resistance layer, a back barrier layer, a GaN layer, and a barrier layer from bottom to top. A two-dimensional electron gas can be formed at the interface between the GaN layer and the barrier layer, and a two-dimensional hole gas can be formed at the interface between the GaN layer and the back barrier layer. When the device is subjected to an irradiation experiment in the off state (the gate is not biased and the drain is biased), a large number of electron-hole pairs are generated due to the single particle effect. The electrons are attracted by the high voltage of the drain and can be discharged from the drain to the outside of the device. However, the holes cross the gate structure and gather near the gate, affecting the normal operation of the transistor. In severe cases, the transistor may be damaged by irradiation or even completely burned out.

[0004] Therefore, in order to meet the application needs of GaN high electron mobility transistors in the aerospace field, it is urgent to solve the problem of hole accumulation caused by single particle effect irradiation in this type of device, so that the radiation-induced carriers can be smoothly discharged to the outside of the device, thereby improving the device's radiation resistance. Summary of the invention

[0005] In order to overcome the above problems, the purpose of the present invention is to provide a gallium nitride device with single-particle effect radiation resistance and a method for manufacturing the same, which can provide a path for the radiation-induced holes to be discharged to the outside of the device, thereby improving the radiation resistance and reliability of the device.

[0006] To achieve the above-mentioned purpose, the gallium nitride device with single-particle effect irradiation resistance designed in the present invention comprises a substrate layer, a high-resistance layer, a back barrier layer, a gallium nitride layer, a barrier layer, and a gate, a source and a drain arranged on the barrier layer in sequence from bottom to top; characterized in that the gallium nitride device also comprises a single-particle irradiation charge extraction electrode, the single-particle irradiation charge extraction electrode comprises a plurality of p-type gallium nitride blocks uniformly arranged on the top surface of the barrier layer, an ohmic metal column arranged in the middle of each of the p-type gallium nitride blocks, and an interconnecting metal sheet for connecting the dispersed ohmic metal columns; each of the p-type gallium nitride blocks A middle hole for downward etching is provided in the middle part, and a hole extraction hole is formed by etching downward along the inner wall of the middle hole in the thickness direction of the gallium nitride device to the interface between the back barrier layer and the gallium nitride layer, each hole extraction hole is filled with the ohmic metal column, and the interconnection metal sheet is arranged above the ohmic metal column, and each ohmic metal column is connected to the interconnection metal sheet through a first metal connecting column; the bottom surface of each ohmic metal column forms an ohmic contact with the top surface of the back barrier layer, the side wall of each ohmic metal column is fitted with the inner wall of the corresponding hole extraction hole, and the top surface of each ohmic metal column is connected to the interconnection metal sheet.

[0007] As a preferred solution, an isolation line is provided on the top surface of the barrier layer, with the isolation line as the boundary, the area within the isolation line is the active area, and the area outside the isolation line is the isolation area, and the gate, source and drain are all arranged in the active area.

[0008] As a preferred embodiment, the source includes two source ohmic metal strips, two source interconnection metal sheets located above the source ohmic metal strips, and two source top-layer metal sheets located above the source interconnection metal sheets, the two source ohmic metal strips are connected to the two source interconnection metal sheets one-to-one through a first metal connecting column, and the two source interconnection metal sheets are connected to the source top-layer metal sheets through a second metal connecting column; the drain includes two drain ohmic metal strips, two drain interconnection metal sheets located above the drain ohmic metal strips, and two drain top-layer metal sheets located above the drain interconnection metal sheets, the two drain ohmic metal strips are connected to the two drain interconnection metal sheets one-to-one through a first metal connecting column, and the drain interconnection metal sheet is connected to the drain top-layer metal sheet through a second metal connecting column.

[0009] As a preferred embodiment, the gate includes three p-type gallium nitride strips arranged in parallel and spaced apart, a gate metal strip arranged on each p-type gallium nitride strip, and a metal connecting strip used to connect the head ends of the three gate metal strips. Two source ohmic metal strips, two drain ohmic metal strips and three p-type gallium nitride strips are arranged in parallel and spaced apart along the width direction of the gallium nitride device. Each gate metal strip forms a finger with the source ohmic metal strips and drain ohmic metal strips adjacent to it on both sides, forming a total of three fingers. The head ends of the gate metal strips of the three fingers extend outward and are connected through the metal connecting strips.

[0010] As a preferred solution, the source ohmic metal strip located on the outside of the source electrode is composed of a plurality of source ohmic metal blocks evenly spaced along the length direction of the gallium nitride device, and a source spacing region is formed between two adjacent source ohmic metal blocks; the drain ohmic metal strip located on the outside of the drain electrode is composed of a plurality of drain ohmic metal blocks evenly spaced along the length direction of the gallium nitride device, and a drain spacing region is formed between two adjacent drain ohmic metal blocks.

[0011] As a preferred solution, the multiple p-type gallium nitride blocks of the single-particle irradiation charge extraction electrode are evenly arranged in the active area and the isolation area, and the multiple p-type gallium nitride blocks located in the isolation area are evenly spaced along the edge of the gallium nitride device; the multiple p-type gallium nitride blocks located in the active area are arranged at both ends of each source ohmic metal strip and drain ohmic metal strip, and are arranged in the source spacing area and the drain spacing area.

[0012] As a preferred solution, the p-type gallium nitride block is in a “U” shape, and has a rectangular outer contour and a rectangular middle hole.

[0013] As a preferred solution, the p-type gallium nitride block is in a toroidal shape, and has a circular outer contour and a circular middle hole.

[0014] A method for preparing a gallium nitride device having single event effect irradiation resistance, characterized in that it comprises the steps of:

[0015] S1: The epitaxial wafer sequentially grows a substrate layer, a high resistance layer, a back barrier layer, a gallium nitride layer, and a barrier layer from bottom to top, and a p-type gallium nitride layer is grown on the top surface of the barrier layer, and multiple p-type gallium nitride blocks and multiple p-type gallium nitride strips are formed by etching;

[0016] S2: growing a dielectric layer on the epitaxial wafer, etching the dielectric layer and the barrier layer downward in the source and drain regions in sequence until reaching the top surface of the gallium nitride layer, depositing an ohmic metal layer on the epitaxial wafer, and forming a source ohmic metal strip and a drain ohmic metal strip by a photolithography lift-off method;

[0017] S3: Formation of the isolation zone:

[0018] An isolation line is defined, with the isolation line as the boundary, the area within the isolation line is the active area, and the area outside the isolation line is the isolation area, and high-energy fluorine ions are injected into the area outside the isolation line to form the isolation area;

[0019] S4: Gate formation:

[0020] A dielectric layer is grown on the epitaxial wafer, and the dielectric layer is etched in the gate region by a photolithography lift-off method, and metal materials are deposited to obtain a gate metal strip and a metal connecting strip. The p-type gallium nitride strip, the gate metal strip and the metal connecting strip together constitute the gate of the gallium nitride device;

[0021] S5: Formation of Ohmic Metal Pillars:

[0022] A dielectric layer is grown on the epitaxial wafer, and a hole extraction hole is formed by etching downward along the middle hole of the p-type gallium nitride block to the interface between the back barrier layer and the gallium nitride layer, and an ohmic metal layer is deposited on the surface of the epitaxial wafer. The ohmic metal layer in the area outside the hole extraction hole is removed by a photolithography lift-off method to form an ohmic metal column;

[0023] S6: Formation of the first metal connection column:

[0024] A dielectric layer is grown on the epitaxial wafer, and then holes are etched on the source ohmic metal strip, the drain ohmic metal strip and the ohmic metal column, and a tungsten metal layer is deposited, and a first metal connection column is formed on the source ohmic metal strip, the drain ohmic metal strip and the ohmic metal column by a photolithography lift-off method;

[0025] S7: Formation of source interconnect metal sheet, drain interconnect metal sheet and interconnect metal sheet:

[0026] A dielectric layer is grown on the epitaxial wafer, and then a source interconnection metal sheet, a drain interconnection metal sheet and an interconnection metal sheet are grown on the first metal connection column by using a photolithography lift-off method;

[0027] A plurality of p-type gallium nitride blocks, an ohmic metal column arranged in each of the p-type gallium nitride blocks, and an interconnecting metal sheet for connecting each dispersed ohmic metal column form a single particle irradiation charge extraction electrode;

[0028] S8: Formation of source and drain:

[0029] A dielectric layer is grown on the epitaxial wafer, and a second metal connection column is formed on the source interconnection metal sheet and the drain interconnection metal sheet by using a photolithography stripping method. A source top metal sheet and a drain top metal sheet are deposited on the second metal connection column by using a photolithography stripping method. A source electrode for electrical connection is led out through the source top metal sheet, and a drain electrode for electrical connection is led out through the drain top metal sheet.

[0030] As a preferred solution, the dielectric layer is made of at least one of silicon dioxide, silicon nitride and polyimide.

[0031] The advantages of the present invention are as follows: the gallium nitride device of the present invention is provided with a single particle irradiation charge extraction electrode, the middle part of each p-type gallium nitride block in the single particle irradiation charge extraction electrode has a middle hole for downward etching, and the hole extraction hole is formed by etching downward along the inner wall of the middle hole to the interface between the back barrier layer and the gallium nitride layer, and an ohmic metal column is arranged in each hole extraction hole, the bottom surface of the ohmic metal column is in ohmic contact with the top surface of the back barrier layer, and the side wall of the ohmic metal column is in contact with the inner wall of the hole extraction hole, and the holes generated under the single particle effect gather and move toward the hole extraction hole at the interface between the back barrier layer and the gallium nitride layer, and the ohmic metal column is in direct contact with the back barrier layer, so as to provide a path for the radiation-induced holes to be discharged to the outside of the device, thereby improving the radiation resistance and reliability of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 This is a schematic structural diagram of a gallium nitride device having single event effect irradiation resistance capability according to Example 1;

[0033] Figure 2 for Figure 1 Schematic diagram of the structure of the GaN device after removing the dielectric layer;

[0034] Figure 3 This is a schematic diagram of the structure of preparing a substrate layer, a high resistance layer, a back barrier layer, a gallium nitride layer, a barrier layer and a p-type gallium nitride layer in step S1 of Example 2;

[0035] Figure 4 This is a schematic diagram of the structure of preparing the source ohmic metal strip and the drain ohmic metal strip in step S2 of Example 2;

[0036] Figure 5 This is a schematic diagram of the structure of forming an isolation region in step S3 of Example 2;

[0037] Figure 6 It is a schematic diagram of the structure of forming a gate in step S4 of embodiment 2;

[0038] Figure 7 This is a schematic diagram of the structure of forming an ohmic metal column in step S5 of Example 2;

[0039] Figure 8 This is a schematic diagram of the structure of forming a first metal connecting column in step S6 of Example 2;

[0040] Fig. 9 It is a schematic diagram of the structure of forming a source interconnection metal sheet, a drain interconnection metal sheet and an interconnection metal sheet in step S7 of embodiment 2;

[0041] Fig.10 This is a schematic structural diagram of a gallium nitride device having single event effect irradiation resistance capability according to Example 3;

[0042] In the figure, isolation line 1, active area 2, isolation area 3, first metal connecting column 4, second metal connecting column 5, dielectric layer 6, p-type gallium nitride layer 7, substrate layer 10, high resistance layer 20, back barrier layer 30, gallium nitride layer 40, barrier layer 50, gate 60, p-type gallium nitride strip 61, gate metal strip 62, metal connecting strip 63, source 70, source ohmic metal strip 71, source ohmic metal block 72, source spacer 73, source interconnection metal sheet 75, source top metal sheet 77, drain 80, drain ohmic metal strip 81, drain ohmic metal block 82, drain spacer 83, drain interconnection metal sheet 85, drain top metal sheet 87, single particle irradiation charge extraction electrode 90, p-type gallium nitride block 91, ohmic metal column 92, interconnection metal sheet 93, and middle hole 94. DETAILED DESCRIPTION

[0043] In order to better understand the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific examples.

[0044] For the convenience of description, in the following embodiments, the width direction of the gallium nitride device is the x direction, the length direction of the gallium nitride device is the y direction, and the thickness direction of the gallium nitride device is the z direction.

[0045] Example 1

[0046] Combination Figure 1 As described above, the gallium nitride device with single-particle effect irradiation resistance of this embodiment includes a substrate layer 10, a high-resistance layer 20, a back barrier layer 30, a gallium nitride layer 40, a barrier layer 50, and a gate 60, a source 70 and a drain 80 arranged on the barrier layer 50, and a single-particle irradiation charge extraction electrode 90, which are arranged in sequence from bottom to top.

[0047] Combination Figure 5 and Figure 2 As shown, an isolation line 1 is provided on the surface of the barrier layer 50 , with the isolation line 1 as the boundary, the area within the isolation line 1 is the active area 2 , and the area outside the isolation line 1 is the isolation area 3 , and the gate 60 , the source 70 and the drain 80 are all arranged in the active area 2 .

[0048] Among them, combined Figure 6As shown, the gate 60 includes three p-type gallium nitride strips 61 arranged in parallel and spaced apart along the x direction, a gate metal strip 62 arranged on each p-type gallium nitride strip 61, and a metal connecting strip 63 for connecting the head ends of the three gate metal strips 62; more specifically, the lengths of the three p-type gallium nitride strips 61 are the same, which is 100 μm, and the intervals between the three p-type gallium nitride strips 61 are different. The distance between the p-type gallium nitride strip 61 in the middle and the p-type gallium nitride strip 61 on the left is greater than the distance between the p-type gallium nitride strip 61 in the middle and the p-type gallium nitride strip 61 on the right. The top surface of each p-type gallium nitride strip is in contact with the gate metal strip 62, and the width of the gate metal strip 62 is the same as that of the p-type gallium nitride strip 61. The head ends of the three gate metal strips 62 extend outward along the y direction and are connected through the metal connecting strip 63 to lead out the gate of the gallium nitride device. The lengths of the three gate metal strips are all greater than the length of the p-type gallium nitride strip 61.

[0049] Among them, combined Figure 4 , Fig. 9 and Figure 2 As shown, the source 70 includes two source ohmic metal strips 71, two source interconnection metal sheets 75 and two source top metal sheets 77; the two source ohmic metal strips 71 are connected to the two source interconnection metal sheets 75 one by one through the first metal connecting column 4, the two source interconnection metal sheets 75 are connected to the source top metal sheet 77 through the second metal connecting column 5, and the two source interconnection metal sheets 75 are connected in series through the source top metal sheet 77, that is, one end of the source top metal sheet 77 is connected to one of the source interconnection metal sheets 75 through the second metal connecting column 5, and the other end of the source top metal sheet 77 is connected to the other source interconnection metal sheet 75 through the second metal connecting column 5. The drain 80 includes two drain ohmic metal strips 81, two drain interconnection metal sheets 85 and two drain top metal sheets 87. The two drain ohmic metal strips 81 are connected to the two drain interconnection metal sheets 85 in a one-to-one correspondence through the first metal connecting column 4, and the drain interconnection metal sheet 85 is connected to the drain top metal sheet 87 through the second metal connecting column 5, that is, the two drain interconnection metal sheets 85 are connected in series through the drain top metal sheet 87, that is, one end of the drain top metal sheet 87 is connected to one of the drain interconnection metal sheets through the second metal connecting column 5. The two source ohmic metal strips 71 and the two drain ohmic metal strips 81 are embedded in the junction of the gallium nitride layer 40 and the barrier layer 50 in parallel and spaced apart along the x direction, that is, the bottom surfaces of the two source ohmic metal strips 71 and the two drain ohmic metal strips 81 are in contact with the top surface of the gallium nitride layer 40, and the top surfaces of the two source ohmic metal strips 71 and the two drain ohmic metal strips 81 are protruding upward relative to the barrier layer 50.

[0050] Combination Figure 4As shown, two source ohmic metal strips 71 and two drain ohmic metal strips 81 and three p-type gallium nitride strips 61 are arranged alternately and in parallel along the x direction. More specifically, from left to right, they are the source ohmic metal strip 71, the p-type gallium nitride strip 61, the drain ohmic metal strip 81, the p-type gallium nitride strip 61, the source ohmic metal strip 71, the p-type gallium nitride strip 61, and the drain ohmic metal strip 81; wherein the distance between the source ohmic metal strip 71 and the adjacent p-type gallium nitride strip 61 is 1-4 μm, the distance between the drain ohmic metal strip 81 and the adjacent p-type gallium nitride strip 61 is 3-25 μm, and the distance between the source ohmic metal strip 71 and the adjacent p-type gallium nitride strip 61 is less than the distance between the drain ohmic metal strip 81 and the adjacent p-type gallium nitride strip 61; combined Figure 6 As shown, each gate metal strip 62 forms a fork with the source ohmic metal strip 71 and the drain ohmic metal strip 81 adjacent to both sides, forming a total of three forks, the length of the fork is 100 μm, the head end of the three forked gate metal strips 62 extends outward along the y direction and is connected through the metal connecting strip 63 to lead out the gate of the gallium nitride device. Figure 4 As shown, the source ohmic metal strip 71 located on the outside and the drain ohmic metal strip 81 located on the outside are interrupted structures. Specifically, the source ohmic metal strip 71 located on the outside is composed of a plurality of source ohmic metal blocks 72 arranged at intervals along the y direction, and a source spacing region 73 is formed between two adjacent source ohmic metal blocks 72; the drain ohmic metal strip 81 located on the outside is composed of a plurality of drain ohmic metal blocks 82 arranged at intervals along the y direction, and a drain spacing region 83 is formed between two adjacent drain ohmic metal blocks 82.

[0051] Combination Figure 8 , Fig. 9 and Figure 2 As shown, the top surfaces of the two source ohmic metal strips 71 are respectively connected to two source interconnection metal sheets 75 through the first metal connecting column 4, and the top surfaces of the two source interconnection metal sheets 75 are connected to two source top metal sheets 77 through the second metal connecting column 5. The source 70 for electrical connection is led out through the source top metal sheet 77.

[0052] Combination Figure 8 , Fig. 9 and Figure 2 As shown, the top surfaces of the two drain ohmic metal strips 81 are respectively connected to two drain interconnection metal sheets 85 through the first metal connecting column 4, and the top surfaces of the two drain interconnection metal sheets 85 are connected to two drain top metal sheets 87 through the second metal connecting column 5. The drain 80 for electrical connection is led out through the drain top metal sheet 87.

[0053] Combination Figure 3 , Figure 7 and Figure 2As shown, the single-particle irradiation charge extraction electrode 90 includes a plurality of p-type gallium nitride blocks 91 uniformly arranged on the top surface of the barrier layer 50, an ohmic metal column 92 provided in each p-type gallium nitride block 91, and an interconnecting metal sheet 93 for connecting each dispersed ohmic metal column 92; a middle portion of each p-type gallium nitride block 91 has a middle hole 94 for downward etching, and a hole extraction hole is formed by etching downward along the inner wall of the middle hole 94 along the z direction to the interface between the back barrier layer 30 and the gallium nitride layer 40, and an ohmic metal column 92 is provided in each hole extraction hole, the bottom surface of the ohmic metal column 92 is in ohmic contact with the top surface of the back barrier layer 30, the side wall of the ohmic metal column 92 is in contact with the inner wall of the hole extraction hole, and the top surface of the ohmic metal column 92 is connected to the interconnecting metal sheet 93 through the first metal connecting column 4. The holes generated under the single particle effect will gather and move toward the hole extraction hole at the interface between the back barrier layer 30 and the gallium nitride layer 40. The ohmic metal pillar 92 is in direct contact with the back barrier layer 30, providing a path for the radiation-induced holes to be discharged to the outside of the device.

[0054] Combination Figure 3 and Figure 5 As shown, the p-type gallium nitride block of this embodiment is in the shape of a U.S. character. The U-shaped p-type gallium nitride block 91 has a rectangular outer contour and a rectangular middle hole 94. The length of the U-shaped p-type gallium nitride block is 8 μm and the width is 5 μm. The length of the rectangular middle hole is 6 μm and the width is 3 μm. The distance between adjacent p-type gallium nitride blocks is 22 μm. The p-type gallium nitride blocks 91 are arranged in the isolation region 3 and the active region 2. The multiple p-type gallium nitride blocks 91 located in the isolation region 3 are evenly spaced along the edge of the gallium nitride device, and the outer sides of the multiple p-type gallium nitride blocks 91 located in the isolation region are flush with the edge of the gallium nitride device, and the inner sides of the multiple p-type gallium nitride blocks 91 in the isolation region are 5 μm away from the isolation line 1; the multiple p-type gallium nitride blocks 91 located in the active region are arranged at both ends of each source ohmic metal strip 71 and drain ohmic metal strip 81, and are located in the source spacer region 73 and the drain spacer region 83. The outer sides of the multiple p-type gallium nitride blocks located in the active region are 5 μm away from the isolation line 1.

[0055] Embodiment 2 A method for preparing a gallium nitride device having single event effect irradiation resistance comprises the steps of:

[0056] S1: Combination Figure 3 As shown, the epitaxial wafer is sequentially grown from bottom to top with a 0.65 mm substrate layer 10, a 2 μm high resistance layer 20, a 15 nm back barrier layer 30, a 200 nm gallium nitride layer 40, and a 20 nm barrier layer 50, and a 100 nm p-type gallium nitride layer 7 is grown on the top surface of the barrier layer 50, and the p-type gallium nitride layer 7 in the non-patterned area is etched away by inductively coupled plasma dry etching to form a plurality of p-type gallium nitride blocks 91 and a plurality of p-type gallium nitride strips 61;

[0057] S2: Combination Figure 4 As shown, a silicon nitride dielectric layer is grown on an epitaxial wafer by a plasma enhanced chemical vapor deposition method, and the dielectric layer and the barrier layer 50 are sequentially etched downward in the source and drain regions until the top surface of the gallium nitride layer 40 is reached, and a Ti / Al (300nm / 700nm) ohmic metal layer is deposited on the epitaxial wafer, a titanium metal layer is deposited first, and then an aluminum metal layer is deposited, and the ohmic metal layer in the non-patterned region is removed by an inductively coupled plasma dry etching method and a photolithography stripping method to form a source ohmic metal strip 71 and a drain ohmic metal strip 81, wherein the source ohmic metal strip 71 located on the outside is composed of a plurality of source ohmic metal blocks 72 arranged at intervals along the y direction, and a source spacing region 73 is formed between two adjacent source ohmic metal blocks 72; the drain ohmic metal strip 81 located on the outside is composed of a plurality of drain ohmic metal blocks 82 arranged at intervals along the y direction, and a drain spacing region 83 is formed between two adjacent drain ohmic metal blocks 82;

[0058] S3: Formation of the isolation zone:

[0059] Combination Figure 5 As shown, an isolation line 1 is delineated, with the isolation line 1 as the boundary, the area within the isolation line 1 is the active area 2, and the area outside the isolation line 1 is the isolation area 3. High-energy fluorine ions are injected into the area outside the isolation line 1 to a depth reaching the high-resistance layer, thereby forming an isolation area that can achieve an electrical isolation effect; that is, the area where the ions are injected is the barrier layer, gallium nitride layer, back barrier layer and part of the high-resistance layer outside the isolation line.

[0060] S4: Formation of the gate 60:

[0061] Combination Figure 6 As shown, a silicon nitride dielectric layer 6 is grown on the epitaxial wafer, the silicon nitride dielectric layer is etched in the gate region and a gate metal layer of Ni / Al (100nm / 400nm) is deposited in sequence, and the gate metal layer outside the gate pattern region is stripped by a photolithography stripping method to obtain a gate metal strip 62 and a metal connecting strip 63 located on the p-type gallium nitride strip; the p-type gallium nitride strip 61, the gate metal strip 62 and the metal connecting strip 63 together constitute a gate 60 of the gallium nitride device;

[0062] S5: Formation of Ohmic Metal Pillar 92:

[0063] Combination Figure 7As shown, a silicon nitride dielectric layer 6 is grown on the epitaxial wafer, and a hole extraction hole is formed by etching downward along the middle hole 94 of the p-type gallium nitride block 91 to the interface between the back barrier layer 30 and the gallium nitride layer 40, and a Ti / Al (300nm / 900nm) ohmic metal layer is deposited on the surface of the epitaxial wafer. The ohmic metal layer in the area outside the hole extraction hole is removed by photolithography stripping to form an ohmic metal column 92, the bottom surface of the ohmic metal column 92 is in ohmic contact with the top surface of the back barrier layer 30, the side wall of the ohmic metal column 92 is in contact with the inner wall of the hole extraction hole, and the top surface of the ohmic metal column 92 is in the same horizontal plane as the top surfaces of the source ohmic metal strip 71 and the drain ohmic metal strip 81;

[0064] S6: Formation of the first metal connection column 4:

[0065] Combination Figure 8 As shown, a silicon nitride dielectric layer 6 is grown on the epitaxial wafer, and then holes are etched and a tungsten metal layer is deposited on the source ohmic metal strip 71, the drain ohmic metal strip 81 and the ohmic metal column 92, and a first metal connection column 4 is formed on the source ohmic metal strip 71, the drain ohmic metal strip 81 and the ohmic metal column 92 by a photolithography lift-off method;

[0066] S7: Formation of source interconnection metal sheet 75, drain interconnection metal sheet 85 and interconnection metal sheet 93:

[0067] Combination Fig. 9 As shown, a silicon nitride dielectric layer 6 is grown on the epitaxial wafer, and then the dielectric layer is etched by photolithography and a 300nm / 700nm titanium / aluminum metal interconnection metal layer is grown on the first metal connection column 4, and the interconnection metal layer outside the pattern is removed by photolithography stripping, and an interconnection metal sheet 93 is formed above the ohmic metal column, a source interconnection metal sheet 75 is formed above the source ohmic metal strip 71, and a drain interconnection metal sheet 85 is formed above the drain ohmic metal strip 81;

[0068] A plurality of p-type gallium nitride blocks 91, an ohmic metal column 92 disposed in each p-type gallium nitride block 91, and an interconnecting metal sheet 93 for connecting each dispersed ohmic metal column 92 form a single particle irradiation charge extraction electrode 90;

[0069] S8: Formation of source 70 and drain 80:

[0070] Combination Figure 2As shown, a silicon nitride dielectric layer 6 is grown on the epitaxial wafer, and holes are etched and a tungsten metal layer is deposited on the source interconnect metal sheet 75 and the drain interconnect metal sheet 85 respectively by using a photolithography stripping method, and the tungsten metal layer outside the pattern is removed to form a second metal connecting column 5; a 300nm / 700nm titanium / aluminum metal interconnect metal layer is further deposited on the second metal connecting column 5, and a source top metal sheet 77 and a drain top metal sheet 87 are formed by using a photolithography stripping method, and a source 70 for electrical connection is led out through the source top metal sheet 77, and a drain 80 for electrical connection is led out through the drain top metal sheet 87.

[0071] Combination Figure 1 As shown, the GaN device with single event effect irradiation resistance obtained by the above-mentioned preparation method is filled with a dielectric layer 6 from below the source top metal sheet 77 and the drain top metal sheet 87 to above the top surface of the barrier layer 50. For the convenience of readers to observe the illustrated structure, Figure 2~Figure 9 The drawing of the dielectric layer 6 is omitted.

[0072] Example 3

[0073] Combination Fig.10 As shown, the gallium nitride device with single-particle effect irradiation resistance of this embodiment is different from that of embodiment 1 in that the p-type gallium nitride block 91 of the single-particle irradiation charge extraction electrode 90 in the gallium nitride device of this embodiment is located in the isolation region 3 and the active region 2, the multiple p-type gallium nitride blocks 91 located in the isolation region 3 are evenly spaced along the outer side of the isolation line 1, and the multiple p-type gallium nitride blocks 91 located in the active region 2 are arranged at both ends of each source ohmic metal strip 71 and drain ohmic metal strip 81. In this embodiment, the source ohmic metal strip 71 close to the isolation line 1 and the drain ohmic metal strip 81 close to the isolation line 1 are both integrally formed, and there is no source spacing region and drain spacing region. Compared with Example 3, in Example 1, part of the p-type gallium nitride blocks 91 are arranged in the source spacer area 73 and the drain spacer area 83, and the number of p-type gallium nitride blocks 91 and hole extraction holes is increased on the basis of limited utilization area, and the path for radiation-induced holes to be discharged to the outside of the device is increased, thereby further effectively improving the radiation resistance of the gallium nitride device.

Claims

1. A gallium nitride device with single event effect irradiation resistance, comprising a substrate layer (10), a high resistance layer (20), a back barrier layer (30), a gallium nitride layer (40), a barrier layer (50) arranged in sequence from bottom to top, and a gate (60), a source (70) and a drain (80) arranged on the barrier layer (50); characterized in that: The gallium nitride device further comprises a single particle irradiation charge extraction electrode (90), the single particle irradiation charge extraction electrode (90) comprising a plurality of p-type gallium nitride blocks (91) uniformly arranged on the top surface of the barrier layer (50), an ohmic metal column (92) arranged in the middle of each of the p-type gallium nitride blocks (91), and an interconnecting metal sheet (93) for connecting each of the dispersed ohmic metal columns (92); each of the p-type gallium nitride blocks (91) has a middle hole (94) for downward etching in the middle, and a hole (94) is formed along the inner wall of the middle hole (94) in the thickness direction of the gallium nitride device. Etching down to the interface between the back barrier layer (30) and the gallium nitride layer (40) forms a hole extraction hole, each hole extraction hole is filled with the ohmic metal column (92), and the interconnection metal sheet (93) is arranged above the ohmic metal column (92); the bottom surface of each ohmic metal column (92) forms an ohmic contact with the top surface of the back barrier layer (30), the side wall of each ohmic metal column (92) is in contact with the inner wall of the corresponding hole extraction hole, and the top surface of each ohmic metal column (92) is connected to the interconnection metal sheet (93) through a first metal connecting column (4).

2. The gallium nitride device with single event effect irradiation resistance according to claim 1, characterized in that: An isolation line (1) is provided on the top surface of the barrier layer (50), with the isolation line (1) serving as a boundary, an active region (2) within the isolation line (1), and an isolation region (3) outside the isolation line (1), and the gate (60), source (70) and drain (80) are all arranged in the active region (2).

3. The gallium nitride device with single event effect irradiation resistance according to claim 2, characterized in that: The source (70) comprises two source ohmic metal strips (71), two source interconnection metal sheets (75) located above the source ohmic metal strips (71), and two source top metal sheets (77) located above the source interconnection metal sheets (75), the two source ohmic metal strips (71) being connected to the two source interconnection metal sheets (75) in a one-to-one correspondence via a first metal connection column (4), and the two source interconnection metal sheets (75) being connected to the source top metal sheet (77) via a second metal connection column (5); The drain (80) comprises two drain ohmic metal strips (81), two drain interconnection metal sheets (85) located above the drain ohmic metal strips (81), and two drain top metal sheets (87) located above the drain interconnection metal sheets (85). The two drain ohmic metal strips (81) are connected to the two drain interconnection metal sheets (85) in a one-to-one correspondence via a first metal connection column (4), and the drain interconnection metal sheet (85) is connected to the drain top metal sheet (87) via a second metal connection column (5).

4. The gallium nitride device with single event effect irradiation resistance according to claim 3, characterized in that: The gate (60) comprises three p-type gallium nitride strips (61) arranged in parallel and at intervals, a gate metal strip (62) arranged on each p-type gallium nitride strip (61), and a metal connecting strip (63) used to connect the head ends of the three gate metal strips (62); two source ohmic metal strips (71) and two drain ohmic metal strips (81) and the three p-type gallium nitride strips (61) are arranged in parallel and at intervals along the width direction of the gallium nitride device; each gate metal strip (62) and the source ohmic metal strips (71) and the drain ohmic metal strips (81) adjacent to the gate metal strips (62) on both sides form a fork finger, forming three forks in total; the head ends of the gate metal strips (62) of the three forks extend outward and are connected through the metal connecting strip (63).

5. The gallium nitride device with single event effect irradiation resistance according to claim 3, characterized in that: The source ohmic metal strip (71) located on the outside of the source (70) is composed of a plurality of source ohmic metal blocks (72) evenly spaced and arranged along the length direction of the gallium nitride device, and a source spacing region (73) is formed between two adjacent source ohmic metal blocks (72); the drain ohmic metal strip (81) located on the outside of the drain (80) is composed of a plurality of drain ohmic metal blocks (82) evenly spaced and arranged along the length direction of the gallium nitride device, and a drain spacing region (83) is formed between two adjacent drain ohmic metal blocks (82).

6. The gallium nitride device with single event effect irradiation resistance according to claim 5, characterized in that: The multiple p-type gallium nitride blocks (91) of the single particle irradiation charge extraction electrode (90) are evenly arranged in the active area (2) and the isolation area (3); the multiple p-type gallium nitride blocks (91) located in the isolation area (3) are evenly spaced along the edge of the gallium nitride device; the multiple p-type gallium nitride blocks (91) located in the active area (2) are arranged at both ends of each source ohmic metal strip (71) and drain ohmic metal strip (81), and are arranged in the source spacing area (73) and the drain spacing area (83).

7. The gallium nitride device with single event effect irradiation resistance according to any one of claims 1 to 6, characterized in that: The p-type gallium nitride block (91) is in the shape of a Chinese character "U". The p-type gallium nitride block (91) has a rectangular outer contour and a rectangular middle hole (94).

8. The gallium nitride device with single event effect irradiation resistance according to any one of claims 1 to 6, characterized in that: The p-type gallium nitride block (91) is in a ring shape and has a circular outer contour and a circular middle hole (94).

9. A method for preparing a gallium nitride device having single event effect irradiation resistance according to any one of claims 1 to 6, characterized in that: Includes steps: S1: growing a substrate layer (10), a high resistance layer (20), a back barrier layer (30), a gallium nitride layer (40), and a barrier layer (50) on the epitaxial wafer in order from bottom to top, and growing a p-type gallium nitride layer (7) on the top surface of the barrier layer (50), and forming a plurality of p-type gallium nitride blocks (91) and a plurality of p-type gallium nitride strips (61) by etching; S2: growing a dielectric layer (6) on the epitaxial wafer, etching the dielectric layer (6) and the barrier layer (50) downward in the source and drain regions in sequence until reaching the top surface of the gallium nitride layer (40), depositing an ohmic metal layer on the epitaxial wafer, and forming a source ohmic metal strip (71) and a drain ohmic metal strip (81) by a photolithography lift-off method; S3: Formation of isolation zone (3): An isolation line (1) is defined, with the isolation line (1) as a boundary, the area within the isolation line (1) is an active area (2), and the area outside the isolation line (1) is an isolation area (3), and high-energy fluorine ions are injected into the area outside the isolation line (1) to form the isolation area (3); S4: Formation of gate (60): A dielectric layer (6) is grown on the epitaxial wafer, the dielectric layer is etched in the gate region by a photolithography lift-off method, and a metal material is deposited to obtain a gate metal strip (62) and a metal connecting strip (63), wherein the p-type gallium nitride strip (61), the gate metal strip (62) and the metal connecting strip (63) together form a gate (60) of a gallium nitride device; S5: Formation of Ohmic Metal Pillar (92): A dielectric layer (6) is grown on the epitaxial wafer, and a hole extraction hole is formed by etching downward along the middle hole (94) of the p-type gallium nitride block (91) to the interface between the back barrier layer (30) and the gallium nitride layer (40), and an ohmic metal layer is deposited on the surface of the epitaxial wafer, and the ohmic metal layer in the area outside the hole extraction hole is removed by photolithography stripping to form an ohmic metal column (92); S6: Formation of the first metal connection column (4): A dielectric layer (6) is grown on the epitaxial wafer, and then holes are etched and a tungsten metal layer is deposited on the source ohmic metal strip (71), the drain ohmic metal strip (81) and the ohmic metal column (92), and a first metal connection column (4) is formed on the source ohmic metal strip (71), the drain ohmic metal strip (81) and the ohmic metal column (92) by a photolithography lift-off method; S7: Formation of source interconnection metal sheet (75), drain interconnection metal sheet (85) and interconnection metal sheet (93): A dielectric layer (6) is grown on the epitaxial wafer, and then a source interconnection metal sheet (75), a drain interconnection metal sheet (85) and an interconnection metal sheet (93) are grown on the first metal connection column (4) using a photolithography lift-off method; A plurality of p-type gallium nitride blocks (91), an ohmic metal column (92) disposed in each of the p-type gallium nitride blocks (91), and an interconnecting metal sheet (93) for connecting each dispersed ohmic metal column (92) form a single particle irradiation charge extraction electrode (90); S8: Formation of source (70) and drain (80): A dielectric layer (6) is grown on the epitaxial wafer, a second metal connection column (5) is formed on a source interconnection metal sheet (75) and a drain interconnection metal sheet (85) by using a photolithography lift-off method, a source top metal sheet (77) and a drain top metal sheet (87) are deposited on the second metal connection column (5) by using a photolithography lift-off method, a source electrode (70) for electrical connection is led out through the source top metal sheet (77), and a drain electrode (80) for electrical connection is led out through the drain top metal sheet (87).

10. The method for preparing a gallium nitride device having single event effect irradiation resistance according to claim 9, characterized in that: The material of the dielectric layer (6) is at least one of silicon dioxide, silicon nitride and polyimide.

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