Phase shift circuit and radio frequency microwave system

Abstract

The invention discloses a phase shift circuit and a radio frequency microwave system. The phase shift circuit may include: a first node circuit; a second node circuit; the first signal channel and the second signal channel are coupled between the first node circuit and the second node circuit; wherein the first node circuit is configured to split an input signal to simultaneously output a first differential signal to the first signal channel and a second differential signal to the second signal channel; the first signal channel and the second signal channel are realized based on a framework of a differential circuit, and are configured to respectively perform signal attenuation and / or quadrant transformation on the first differential signal and the second differential signal to realize phase shift; the second node circuit is configured to synthesize a first phase shift signal output by the first signal channel and a second phase shift signal output by the second signal channel to obtain an output signal; and the phase difference between the output signal and the input signal is between 0 deg and 360 deg.

Description

Technical Field

[0001] The present application relates to the field of wireless communications, and in particular to a high-precision, ultra-wideband phase-shifting circuit, and a radio frequency microwave system having the phase-shifting circuit. Background Art

[0002] Modern communication systems (e.g., 5G MIMO communication, low-orbit satellite communication, etc.) have very high requirements for digitally controlled phase shifters. Digitally controlled phase shifters need to have a wide bandwidth, low insertion loss in the band, high shifting accuracy, and small size. The existing implementation methods of digitally controlled phase shifters cannot be compatible with the requirements of modern communication systems for these two devices at the same time. Summary of the invention

[0003] In order to solve the above problems, the present application discloses a phase shift circuit and a radio frequency microwave system having the phase shift circuit. The phase shift circuit has stable characteristics and can realize device miniaturization.

[0004] On the one hand, the present application discloses a phase-shifting circuit, which may include: a first node circuit; a second node circuit; and a first signal channel and a second signal channel coupled between the first node circuit and the second node circuit; wherein the first node circuit is configured to split the input signal to simultaneously output a first differential signal to the first signal channel, and a second differential signal to the second signal channel; the first signal channel and the second signal channel are implemented based on the architecture of a differential circuit, and are configured to perform signal attenuation and / or quadrant transformation on the first differential signal and the second differential signal respectively to achieve phase shift; the second node circuit is configured to synthesize a first phase-shifted signal output by the first signal channel and a second phase-shifted signal output by the second signal channel to obtain an output signal; the phase difference between the output signal and the input signal is between 0deg-360deg.

[0005] According to some embodiments of the present application, the first node circuit may include: a signal processor, and a first transformer and a second transformer respectively electrically connected to the two output ends of the orthogonal coupler; the signal processor is used to generate a pair of orthogonal signals based on the input signal, and input them to the first transformer and the second transformer from the two output ends respectively; the first transformer and the second transformer are used to generate the first differential signal and the second differential signal based on the input orthogonal signal.

[0006] According to some embodiments of the present application, the first signal channel and the second signal channel are respectively connected to the first transformer and the second transformer, and both include a signal attenuation circuit, and the signal attenuation circuit includes a plurality of first differential circuits electrically connected in sequence, and the electrical connection method between two adjacent first differential circuits includes a direct connection and / or a connection through an attenuator unit; the attenuator unit is used to achieve the signal attenuation, so as to achieve a phase shift within the range of 0-90deg by attenuating the amplitude of the first differential signal and / or the second differential signal.

[0007] According to some embodiments of the present application, the plurality of first differential circuits are the same and / or different.

[0008] According to some embodiments of the present application, the first differential circuit selects the electrical connection mode with the adjacent first differential circuit by turning on or off the positive and negative electrode interfaces of the first input end and the positive and negative electrode interfaces of the first output end.

[0009] According to some embodiments of the present application, the first signal channel and the second signal channel also include a quadrant conversion circuit electrically connected to the signal attenuation circuit; the quadrant conversion circuit includes a second differential circuit, and the second differential circuit realizes the quadrant conversion by turning on or off the positive and negative interfaces of the second input end and the positive and negative interfaces of the second output end to change the starting phase of the first differential signal and / or the second differential signal after phase shifting.

[0010] According to some embodiments of the present application, the second node circuit includes a third differential circuit for realizing vector synthesis, a third input terminal of the third differential circuit receives the first phase-shifted signal and the second phase-shifted signal respectively, and a third output terminal outputs a synthesized signal obtained by signal synthesis.

[0011] According to some embodiments of the present application, the third differential circuit includes: an input differential network, including: a first port and a second port; an input differential unit, including: an input differential coupling line; an output differential unit, including: a first coupling line and a second coupling line; and an output differential network, including: a first output differential port and a second output differential port; the positive electrode of the input end of the input differential coupling line is connected to the first port, and the negative electrode of the input end is connected to the second port; the positive electrode of the input end of the first coupling line is connected to the positive electrode of the output end of the input differential coupling line, and the negative electrode of the input end of the second coupling line is connected to the output end of the input differential coupling line. The first coupled line input terminal negative electrode is connected to the second coupled line input terminal positive electrode; the first output differential port positive electrode interface is connected to the first coupled line output terminal positive electrode, and the negative electrode interface is connected to the second coupled line output terminal negative electrode; the second output differential port positive electrode interface is connected to the second coupled line output terminal positive electrode, and the negative electrode interface is connected to the first coupled line output terminal negative electrode; the first output differential port and the second output differential port of the output differential network are used to receive the first phase shift signal and the second phase shift signal respectively, and the input differential network is used to output the synthesized signal.

[0012] According to some embodiments of the present application, the synthesized signal is a differential signal pair, which is designated as the output signal; or, the second node circuit also includes a third transformer; the third transformer is electrically connected to the third output port of the third differential circuit, or the output differential network, and is used to convert the differential signal pair into a single-ended signal as the output signal.

[0013] On the other hand, the present application provides a radio frequency microwave system, which may include the phase shift circuit as described above.

[0014] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present application will be further described in the form of exemplary embodiments, which will be described in detail by way of the accompanying drawings. These embodiments are not restrictive, and in these embodiments, the same number represents the same structure, wherein:

[0016] Figure 1 is an exemplary structural diagram of a phase shift circuit according to some embodiments of the present application;

[0017] Figure 2 is an exemplary structural diagram of a first node circuit according to some embodiments of the present application;

[0018] Figure 3is an exemplary structural diagram of a signal attenuation circuit according to some embodiments of the present application;

[0019] Figure 4 is an exemplary structural diagram of a differential circuit according to some embodiments of the present application;

[0020] Figure 5 is another exemplary structural diagram of a differential circuit according to some embodiments of the present application;

[0021] Figure 6 is another exemplary structural diagram of a signal attenuation circuit according to some embodiments of the present application;

[0022] Figure 7 is an exemplary structural diagram of a quadrant selection circuit according to some embodiments of the present application;

[0023] Figure 8 is an exemplary schematic diagram of a connection state of a differential circuit constituting a quadrant selection circuit according to some embodiments of the present application;

[0024] Fig. 9 is an exemplary schematic diagram of corresponding characteristics of the connectivity states of quadrants and differential circuits according to some embodiments of the present application;

[0025] Fig.10 is an exemplary schematic diagram of the starting phase characteristics of a quadrant according to some embodiments of the present application;

[0026] Fig.11 is an exemplary schematic diagram of S parameters of the starting phase of a quadrant according to some embodiments of the present application;

[0027] Fig.12 is an exemplary schematic diagram of the first quadrant phase distribution according to some embodiments of the present application;

[0028] Fig.13 is an exemplary structural diagram of a second node circuit according to some embodiments of the present application;

[0029] Fig.14 is another exemplary structural diagram of a differential circuit according to some embodiments of the present application;

[0030] Fig.15 is an exemplary schematic diagram of S parameters and phases of a phase shift circuit in a working state according to some embodiments of the present application;

[0031] Fig.16 is an exemplary schematic diagram of S parameters and phase of a phase shift circuit in an off state according to some embodiments of the present application;

[0032] Fig.17is an exemplary structural diagram of a radio frequency microwave transmission system according to some embodiments of the present application;

[0033] Fig.18 It is an exemplary structural diagram of a radio frequency microwave receiving system according to some embodiments of the present application. DETAILED DESCRIPTION

[0034] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0035] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as those commonly understood by technicians in the technical field of this application. The terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The words "including" or "comprising" and the like used in this application mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. The terms "and / or" or "and / or" used in this application include any and all combinations of one or more related listed items.

[0036] The terms "first", "second", etc. used in this application are used to distinguish similar objects, rather than to describe or indicate a specific order or sequence, and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "multiple" means two or more. In addition, unless otherwise clearly specified and limited, the terms "connected" and "connected" should be understood in a broad sense, for example, it can be directly connected, it can also be indirectly connected through an intermediate medium, and it can be the internal connection of two elements. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0037] Digitally controlled phase shifters are widely used in the field of wireless communications. Digitally controlled phase shifters perform phase modulation on transmitted or received signals. For example, 5G MIMO communications and low-orbit satellite communications. The shift range of digitally controlled phase shifters directly affects the phase modulation accuracy of wireless communication signals.

[0038] There are two ways to realize digital phase shifters. The first is to use a single-ended switch to switch the transmission line to shift the unit network. The performance of this type of digital phase shifter deteriorates significantly at high frequencies (frequencies greater than 8GHz), mainly because as the frequency increases (especially in the millimeter wave band), the switch insertion loss is too large, and the shift unit insertion loss is too large, especially when the phase is 180 degrees; the second is to use inductors to achieve the shift function. This form is also difficult to achieve at high frequencies, mainly because as the frequency increases (especially in the millimeter wave band), the inductor loss increases, and the parasitic capacitance has a significant impact on the performance.

[0039] The phase shift circuit of the phase shifter disclosed in the present application is realized by a differential circuit architecture, which can realize device miniaturization and have stable phase characteristics and stable insertion loss and return loss characteristics. At the same time, the phase shifting accuracy is high and the phase shifting range is wide.

[0040] Some preferred embodiments of the present application are described below. It should be noted that the following description is for the purpose of illustration and is not intended to limit the scope of protection of the present application. The steps involved in the present application can be performed accurately in sequence, or various steps can be processed in reverse order or simultaneously. At the same time, other operations can also be added to these processes, or one or more operations can be removed from these processes.

[0041] The present application discloses a phase shifting circuit, such as Figure 1 As shown, the phase shift circuit 100 may include a first node circuit 110, a second node circuit 140, and a first signal channel 120 and a second signal channel 130 coupled between the first node circuit 110 and the second node circuit 140. The input signal of the input phase shift circuit 100 enters from the first node circuit 110 and will be split into a pair of orthogonal signals, for example, an in-phase signal I (or I-path signal) and an orthogonal signal Q (or Q-path signal). The I / Q signals have the same frequency but a phase difference of 90°. The pair of orthogonal signals can be output to the first signal channel 120 and the second signal channel 130 at the same time to perform signal attenuation and / or quadrant conversion. For example, the I-path signal can be input to the first signal channel 120 for processing, and the Q-path signal can be input to the second signal channel 130 for processing.

[0042] The first signal channel 120 and the second signal channel 130 can be implemented based on the architecture of the differential circuit. Based on this, the above-mentioned orthogonal signals (that is, the I-channel signal and the Q-channel signal) will be processed to generate a pair of differential signals. For example, the first differential signal pair will be input to the first signal channel 120 for processing, and the second differential signal pair will be input to the second signal channel 130 for processing. In an achievable embodiment, the exemplary circuit structure of the differential circuit can be to connect the switch die between each positive and negative interface of the input port and the output port. The circuit structure can reduce insertion loss, enhance anti-interference ability, and can take into account the requirements of high performance and small size of the device through the switch die. In other words, the device of the first signal channel 120 and the second signal channel 130 constructed using the differential circuit can not only enable the device to achieve high isolation, but also reduce the size and insertion loss of the device. The first signal channel 120 and the second signal channel 130 can perform signal attenuation and / or quadrant transformation on the input differential signal pair to achieve phase shift of the input signal. For example, the first signal channel 120 and the second signal channel 130 may include a signal attenuation circuit and / or a quadrant conversion circuit, respectively. Exemplarily, the signal attenuation circuit can be implemented by an attenuator unit in combination with a differential circuit, and the amplitude control is implemented by the attenuation value of the attenuator unit to achieve phase shift control, and the ultra-wide frequency band of the phase shift is achieved by the high bandwidth and high isolation characteristics of the differential circuit. The quadrant conversion circuit realizes quadrant changes by turning on and off the positive and negative interfaces between the input and output ends of the differential circuit, for example, one of the four quadrants is selected, including the first quadrant (0deg~90deg), the second quadrant (90deg~180deg), the third quadrant (180deg~270deg) and the fourth quadrant (270deg~360deg). The phase shift achieved by the signal attenuation circuit is combined with the starting phase obtained by the quadrant selection of the quadrant conversion circuit, thereby achieving a phase shift of 0-360deg.

[0043] The second node circuit 140 can be used to vector synthesize the first phase-shifted signal output by the first signal channel 120 and the second phase-shifted signal output by the second signal channel 130. In an achievable implementation, the second node circuit 140 can be constructed by differential coupling, and the insertion loss can be reduced and the isolation can be improved by designing the electrical length of the coupling line and improving the input / output terminal connection method. The output signal output by the second node circuit 140 can be a differential signal pair or a single-ended signal. For example, the differential signal is converted into a single-ended signal and output by a device.

[0044] The following is an exemplary description of various components of the phase shift circuit 100. It should be noted that the following description is not restrictive.

[0045] like Figure 2The first node circuit 110 provided by the present application as shown in the figure may include a signal processor 210 and a first transformer 220 and a second transformer 230 electrically connected to the two output ends of the signal processor 210, respectively. The signal processor 210 may be any electronic component capable of realizing a signal splitting function of a 90° phase difference, such as a hybrid coupler, an orthogonal coupler, a 90° bridge, etc. Taking the signal processor 210 as a 90° bridge as an example, it includes a single-ended input port IN and two output ports. The port impedance of the single-ended input port may be 50 ohms. After the input signal enters the single-ended input port IN, it will be processed to output a pair of orthogonal signals, which are an I-way signal and a Q-way signal. The pair of orthogonal signals will be output from the two output ports to the first transformer 220 and the second transformer 230, respectively. The first transformer 220 and the second transformer 230 may utilize the coil induction characteristics (e.g., the middle section of the coil is drawn) to convert the orthogonal signal into a differential signal and then output it from the output ends OUT1 and OUT2. Exemplarily, the first transformer 220 may be used to process the I signal to output first differential signals I1+ and I1- at the output terminal OUT1. The second transformer 230 may be used to process the Q signal to output second differential signals Q1+ and Q1- at the output terminal OUT2.

[0046] Figure 3 The signal attenuation circuit 300 provided in the present application as shown in the figure may be a component of the first signal channel 120 and the second signal channel 130. For example, in the two signal channels, the circuit structure of the signal attenuation circuit 300 is the same. Figure 3 As shown, the signal attenuation circuit 300 may include a plurality of first differential circuits 310-1, 310-2, ..., and 310-n electrically connected in sequence. The differential signal output by the first transformer 220 and the second transformer 230 can be input from the first differential input terminal of the first first differential circuit 310-1. For example, the positive interface inputs I1+ or Q1+, and the negative interface inputs I1- or Q1-. Subsequently, the differential signal can be transmitted between two adjacent first differential circuits through a pass-through or attenuator unit (for example, attenuator unit 320-1, ..., 320-m). The differential signal passing through the attenuator unit will achieve amplitude attenuation, thereby causing phase shift.

[0047] The circuit structures of the first differential circuits above may be the same or different. Figure 4As shown in the first differential circuit 400 provided by the present application, the first input end may include a positive interface IN1+ and a negative interface IN1-, and the first output end may include two output ports, respectively consisting of a positive interface OUT1+ and a negative interface OUT1-, and a positive interface OUT2+ and a negative interface OUT2-. Switch die are connected between the positive and negative interfaces of the first input end and the positive and negative interfaces of the first output end, including the first switch die T1, the second switch die T2, the third switch die T3, the fourth switch die T4, the fifth switch die T5, the sixth switch die T6, the seventh switch die T7 and the eighth switch die T8. The input ends of the first switch die T1, the fourth switch die T4, the fifth switch die T5 and the eighth switch die T8 are coupled and connected to the interface IN1+; the input ends of the second switch die T2, the third switch die T3, the sixth switch die T6 and the seventh switch die T7 are coupled and connected to the interface IN1-. The output ends of the first switch die T1 and the second switch die T2 are coupled and connected to the interface OUT1+; the output ends of the third switch die T3 and the fourth switch die T4 are coupled and connected to the interface OUT1-; the output ends of the fifth switch die T5 and the sixth switch die T6 are coupled and connected to the interface OUT2+; the output ends of the seventh switch die T7 and the eighth switch die T8 are coupled and connected to the interface OUT2-.

[0048] In the above first differential circuit 400, by setting the power supply voltage of each switch core, the conduction or shutdown between the positive and negative interfaces of the first input terminal and the first output terminal can be realized, thereby selecting whether the electrical connection mode between adjacent differential circuits is direct or through the attenuator unit. Exemplarily, the power supply voltage of the first switch core T1 and the third switch core T3 is selected as V1, and the power supply voltage of the second switch core T2, the fourth switch core T4, the fifth switch core T5, the sixth switch core T6, the seventh switch core T7 and the eighth switch core T8 is -V1; then, when V1 is a positive voltage (V1>Vth, Vth is the gate threshold voltage), the interface IN1+ to the interface OUT1+ is turned on, the interface IN1- to the interface OUT1- is turned on, the interface IN1+ to the interface OUT2+ is turned off, and the interface IN1- to the interface OUT2- is turned off. Select the power supply voltage of the fifth switch die T5 and the seventh switch die T7 as V1, then the power supply voltage of the first switch die T1, the second switch die T2, the third switch die T3, the fourth switch die T4, the sixth switch die T6, and the eighth switch die T8 is -V1; then when V1 is a positive voltage (V1>Vth), the interface IN1+ to the interface OUT2+ is turned on, the interface IN1- to the interface OUT2- is turned on, the interface IN1+ to the interface OUT1+ is turned off, and the interface IN1- to the interface OUT11 is turned off.

[0049] Based on this, when the differential signal is input from the interfaces IN1+ and IN1-, respectively, the signal can be output from the interfaces OUT1+ and OUT1-, or OUT2+ and OUT2- by setting the power supply voltage of the switch core. Assuming that the first differential circuit 400 is the first differential circuit 310-1 of the signal attenuation circuit 300, the interfaces OUT1+ and OUT1- are followed by the attenuator unit 320-1, and the interfaces OUT2+ and OUT2- are followed by the second differential circuit 320-2, then providing the switch core with the aforementioned voltage can make the differential signal output from the interfaces OUT1+ and OUT1- to pass through the attenuator unit 320-1 so that the electrical connection between the first differential circuit 310-1 and the adjacent second first differential circuit 310-2 is through the attenuator unit, or output from the interfaces OUT2+ and OUT2- and directly input into the next differential circuit so that the electrical connection between the first differential circuit 310-1 and the adjacent second first differential circuit 310-2 is through connection.

[0050] The first differential circuit 400 can also adjust the insertion loss and isolation by adjusting the size of the switch core and the resistance of each pole. Adjusting the size of the switch core can be adjusting the R on After the switch core is turned on, the insertion loss of the switch core is R on Value and R ds (drain to source resistance) value is jointly determined, that is, R on Parallel R ds . R gs (gate-to-source resistance) affects the voltage of the switch field effect tube, that is, the insertion loss of the switch is different under different voltages. Therefore, the problem of insertion loss and device size can be taken into account by adjusting the size of the switch core and the resistance of each pole. At the same time, the smaller the switch off capacitance, the smaller the size, and the better the isolation. The isolation of the differential circuit can be adjusted by adjusting the size of the switch core. Therefore, the above first differential circuit 400 can be set to have the characteristics of high isolation and low insertion loss, so that the device can take into account the advantages of small size, high isolation and low insertion loss, thereby making the phase shift have higher accuracy.

[0051] The first differential circuit 400 can also reduce the return loss by connecting a matching circuit. Exemplarily, the matching circuit may include an input matching circuit and an output matching circuit, which can respectively connect the first input terminal and the first output terminal through coupling line matching. The return loss of the first input terminal and the first output terminal is adjusted by adjusting one or more of the even-mode impedance, odd-mode impedance or electrical length that characterizes the coupling line. Adjusting the even-mode impedance and the odd-mode impedance is essentially adjusting the differential impedance of the port. The port impedance affects the return loss, thereby achieving the effect of adjusting the return loss. At radio frequency and microwave frequencies, different electrical lengths exhibit different impedances, and the effect of adjusting the port impedance is achieved by changing the electrical length.

[0052] refer to Figure 5As shown in another first differential circuit 500 provided by the present application, the first input end may include two input ports, respectively consisting of a positive electrode interface IN2+ and a negative electrode interface IN2-, and a positive electrode interface IN3+ and a negative electrode interface IN3-. The first output end may include two output ports, respectively consisting of a positive electrode interface OUT3+ and a negative electrode interface OUT3-, and a positive electrode interface OUT4+ and a negative electrode interface OUT4-. Switch cores are connected between the positive and negative electrode interfaces of the first input end and the positive and negative electrode interfaces of the first output end, including a ninth switch core T9, a tenth switch core T10, an eleventh switch core T11, a twelfth switch core T12, a thirteenth switch core T13, a fourteenth switch core T14, a fifteenth switch core T15, a sixteenth switch core T16, a seventeenth switch core T17, an eighteenth switch core T18, a nineteenth switch core T19, a twentieth switch core T20, a twenty-first switch core T21, a twenty-second switch core T22, a twenty-third switch core T23 and a twenty-fourth switch core T24. The input ends of the ninth switch die T9, the twelfth switch die T12, the thirteenth switch die T13 and the sixteenth switch die T16 are coupled and connected to the interface IN2+; the input ends of the tenth switch die T10, the eleventh switch die T11, the fourteenth switch die T14 and the fifteenth switch die T15 are coupled and connected to the interface IN2-; the input ends of the seventeenth switch die T17, the twentieth switch die T20, the twenty-first switch die T21 and the twenty-fourth switch die T24 are coupled and connected to the interface IN3+; the input ends of the eighteenth switch die T18, the nineteenth switch die T19, the twenty-second switch die T22 and the twenty-third switch die T23 are coupled and connected to the interface IN3-; The output ends of the ninth switch die T9, the tenth switch die T10, the seventeenth switch die T17, and the eighteenth switch die T18 are coupled and connected to the interface OUT3+; the output ends of the eleventh switch die T11, the twelfth switch die T12, the nineteenth switch die T19, and the twentieth switch die T20 are coupled and connected to the interface OUT3-; the output ends of the thirteenth switch die T13, the fourteenth switch die T14, the twenty-first switch die T21, and the twenty-second switch die T22 are coupled and connected to the interface OUT4+; the output ends of the fifteenth switch die T15, the sixteenth switch die T16, the twenty-third switch die T23, and the twenty-fourth switch die T24 are coupled and connected to the interface OUT4-.

[0053] In the above first differential circuit 500, the power supply voltage of each switch core can be set to realize the conduction or shutdown between the positive and negative interfaces of the first input terminal and the first output terminal, thereby selecting whether the electrical connection between adjacent differential circuits is direct or through the attenuator unit. Exemplarily, the power supply voltage of the ninth switch die T9, the eleventh switch die T11, the twenty-first switch die T21, and the twenty-third switch die T23 is selected as V2, then the power supply voltage of the tenth switch die T10, the twelfth switch die T12 to the twentieth switch die T20, the twenty-second switch die T22, and the twenty-fourth switch die T24 is -V3; then, when V3 is a positive voltage (V3>Vth), the interface IN2+ to the interface OUT3+ is turned on, the interface IN2- to the interface OUT3- is turned on, the interface IN3+ to the interface OUT4+ is turned on, the interface IN3- to the interface OUT4- is turned on, the interface IN2+ to the interface OUT4+ is turned off, the interface IN2- to the interface OUT4- is turned off, the interface IN3+ to the interface OUT3+ is turned off, and the interface IN3- to the interface OUT3- is turned off; the thirteenth switch die T13, The power supply voltage of the fifteenth switch die T15, the seventeenth switch die T17, and the nineteenth switch die T19 is V3, and the power supply voltage of the tenth switch die T10, the eleventh switch die T11, the twelfth switch die T12, the fourteenth switch die T14, the sixteenth switch die T16, the eighteenth switch die T18, and the twentieth switch die T20 to the twenty-fourth switch die T24 is -V3; then, when V3 is a positive voltage (V3>Vth), the interface IN2+ to the interface OUT4+ is turned on, the interface IN2- to the interface OUT4- is turned on, the interface IN3+ to the interface OUT3+ is turned on, the interface IN3- to the interface OUT3- is turned on, the interface IN2+ to the interface OUT3+ is turned off, the interface IN2- to the interface OUT3- is turned off, the interface IN3+ to the interface OUT4+ is turned off, and the interface IN3- to the interface OUT4- is turned off.

[0054] Based on this, when the differential signal is input from interfaces IN2+ and IN2- or IN3+ and IN3- respectively (for example, after being input from the previous differential circuit through direct pass or after being attenuated by the attenuator unit), the signal can be output from interfaces OUT3+ and OUT3-, or OUT4+ and OUT4- by setting the power supply voltage of the switch die. Assuming that the first differential circuit 400 is the second differential circuit 310-2 of the signal attenuation circuit 300, interfaces IN2+ and IN2- can be connected to the attenuator unit 320-1, and interfaces IN3+ and IN3- can be connected to the first differential circuit 310-1 to receive the input differential signal. Which interface receives the differential signal is selected based on the output of the previous first differential circuit 310-1, and reference can be made to the previous description. The interfaces OUT3+ and OUT3- are connected to an attenuator unit, and the interfaces OUT4+ and OUT4- are connected to a third first differential circuit. Providing the aforementioned voltage to the switch die can allow the differential signal to be output from the interfaces OUT3+ and OUT3- to pass through the attenuator unit, or to be directly input from the interfaces OUT4+ and OUT4- to the next differential circuit.

[0055] The same or similar first differential circuit 500 can also adjust the isolation and insertion loss of the circuit by adjusting the size of the switch die and the resistance of each pole. The high isolation and low insertion loss of the first differential circuit 500 can also be achieved. The device using it can also take into account the advantages of small size, high isolation and low insertion loss, thereby making the phase shifting have higher accuracy.

[0056] In addition, the first differential circuit 500 can also be connected to a matching circuit to reduce the return loss. For details, please refer to the description of the first differential circuit 400, which will not be repeated here.

[0057] Figure 6 The signal attenuation circuit 600 provided according to some embodiments of the present application is shown. The signal attenuation circuit 600 can achieve 7-bit step attenuation with an attenuation range of 0-31.75 dB. Figure 6As shown, the signal attenuation circuit 600 may include two first differential circuits 400 and six first differential circuits 500. Among them, the six first differential circuits 500 are sequentially connected between the two first differential circuits 400. An attenuator unit will be arranged between two adjacent first differential circuits, with a total of seven attenuator units. According to the signal transmission direction, the attenuator unit D1 realizes 16dB attenuation, the attenuator unit D2 realizes 8dB attenuation, the attenuator unit D3 realizes 4dB attenuation, the attenuator unit D4 realizes 2dB attenuation, the attenuator unit D5 realizes 1dB attenuation, the attenuator unit D6 realizes 0.5dB attenuation, and the attenuator unit D7 realizes 0.25dB attenuation. The first differential signals I1+ and I1-, or the second differential signals Q1+ and Q1- outputted by the first node circuit 110 are inputted from the first differential circuit 400 located at the first position, and are outputted by the first differential circuit 400 located at the last position after being attenuated and / or passed through, so as to obtain differential signals I2+ and I2-, or Q2+ and Q2- with amplitude attenuation. The signal attenuation circuit 600 implements a phase shift within the range of 0-90° by attenuating the amplitude of the differential signal.

[0058] The signal attenuation circuit 300 / 600 disclosed in the present application realizes phase shifting by amplitude control. The attenuation value of the amplitude can be realized by multiple combinations, and the more combinations, the higher the phase shifting accuracy. At the same time, based on the high bandwidth and high isolation of the first differential circuit, the device using it can realize ultra-wide frequency band. In addition, the low insertion loss of the first differential circuit realizes the low insertion loss of the device using it.

[0059] Figure 7 The quadrant conversion circuit provided by the present application and composed of the second differential circuit 700 as shown in the figure can be a component of the first signal channel 120 and the second signal channel 130. For example, the circuit structure of the quadrant conversion circuit is the same in the two signal channels. The quadrant conversion circuit can be connected to the signal attenuation circuit 300 to form the first signal path 120 and the second signal channel 130 together. Figure 7As shown, the second differential circuit 700 may include a second input terminal composed of a positive electrode interface IN4+ and a negative electrode interface I4-, and a second output terminal composed of a positive electrode structure OUT5+ and a negative electrode interface OUT5-. Switch cores are connected between the positive and negative electrode interfaces of the second input terminal and the positive and negative electrode interfaces of the second output terminal, including the twenty-fifth switch core T25, the twenty-sixth switch core T26, the twenty-seventh switch core T27 and the twenty-eighth switch core T28. The input terminal of the twenty-fifth switch core T25 is coupled to the input terminal of the twenty-seventh switch core T27, and is commonly connected to the interface IN4+. The input terminal of the twenty-sixth switch core T26 is coupled to the input terminal of the twenty-eighth switch core T28, and is commonly connected to the interface IN4-. The output terminal of the twenty-fifth switch core T28 is coupled to the output terminal of the twenty-sixth switch core T26, and is commonly connected to the interface OUT5+. The output terminal of the twenty-seventh switch core T27 is coupled to the output terminal of the twenty-eighth switch core T28, and is commonly connected to the interface OUT5-.

[0060] Of course, the second differential circuit 700 can also adjust the isolation and insertion loss by adjusting the size of the switch core and the resistance of each pole, and reduce the return loss by connecting the matching circuit. For specific implementation, please refer to the above description of the first differential circuit.

[0061] In the above second differential circuit 700, the conduction or closing between the positive and negative interfaces of the second input terminal and the second output terminal can be realized by setting the supply voltage of each switch core, thereby realizing the state change of the second differential circuit 700. The combination of different states of the two second differential circuits 700 (for example, respectively included in the first signal channel 120 and the second channel signal 130) for processing the I-way signal and the Q-way signal can realize quadrant conversion, thereby changing the starting phase of the first differential signal and the second differential signal after the phase shift after being processed by the signal attenuation circuit 300. Combined with the phase shift in the range of 0-90° of the signal attenuation circuit 300 and the starting phase change of the quadrant conversion circuit, the phase shift circuit 100 realizes the phase shift in the range of 0-360°.

[0062] Exemplarily, the second differential circuit 700 may have four states, combining Figure 8 For explanation. Figure 8 The state diagram of the third differential circuit 700 provided by the present application is shown, including the through state thr( Figure 8 (a)), differential state diff ( Figure 8 (b)), open circuit state open ( Figure 8 (c)) and short circuit state short ( Figure 8As shown in (d)). In the through state thr, the interface IN4+ to the interface OUT5+ is turned on, the interface IN4- to the interface OUT5- is turned on, the interface IN4+ to the interface OUT5+ is turned off, and the interface IN4- to the interface OUT5+ is turned off. In the differential state diff, the interface IN4+ to the interface OUT5+ is turned off, the interface IN4- to the interface OUT5- is turned off, the interface IN4+ to the interface OUT5+ is turned on, and the interface IN4- to the interface OUT5+ is turned on. In the open state open, the interface IN4+ to the interface OUT5+ is turned off, the interface IN4- to the interface OUT5- is turned off, the interface IN4+ to the interface OUT5+ is turned off, and the interface IN4- to the interface OUT5+ is turned off. In the short state short, the interface IN4+ to the interface OUT5+ is turned on, the interface IN4- to the interface OUT5- is turned on, the interface IN4+ to the interface OUT5+ is turned on, and the interface IN4- to the interface OUT5+ is turned on.

[0063] The selection of four quadrants can be achieved by combining the states of the two second differential circuits 700 included in the first signal channel 120 and the second channel signal 130. Exemplarily, when the state of the second differential circuit 700 in the first signal channel 120 processing the I-channel signal is the through state thr, and the state of the second differential circuit in the second signal channel 130 processing the Q-channel signal is the through state thr, it is the first quadrant Q1 (0-90°). When the state of the second differential circuit 700 in the first signal channel 120 processing the I-channel signal is the through state thr, and the state of the second differential circuit in the second signal channel 130 processing the Q-channel signal is the differential state diff, it is the second quadrant Q2 (90°-180°). When the state of the second differential circuit 700 in the first signal channel 120 processing the I-channel signal is the differential state diff, and the state of the second differential circuit in the second signal channel 130 processing the Q-channel signal is the differential state diff, it is the third quadrant Q3 (180°-270°). The state of the second differential circuit 700 in the first signal channel 120 for processing the I signal is the differential state diff, and the state of the second differential circuit in the second signal channel 130 for processing the Q signal is the through state thr, which is the fourth quadrant Q4 (270°-360°). The open state open can be used to realize the disconnection of the device to which it is applied, such as a phase shifter, and the short state short can be used to realize the short circuit of the device to which it is applied, such as a phase shifter. Fig. 9 The above content can be more clearly understood by an example diagram showing the corresponding characteristics of the four quadrants provided by the present application and the connectivity status of the differential circuit.

[0064] Fig.10An exemplary schematic diagram of the starting phases of the four quadrants provided in the present application is shown. With 10 GHz (center frequency) as a reference, the starting phases corresponding to the four quadrants are -0.3deg, -90.6deg, 179.6deg, and 89.4deg, respectively. In this way, the switching of the four quadrants can be achieved by combining the states of the second differential circuit 700 related to the two-way (I-way / Q-way) signal.

[0065] Fig.11 An exemplary schematic diagram showing the S parameters of the starting phase of the four quadrants provided by the present application is shown. Fig.11 As shown, the S parameters corresponding to the starting phase in the four quadrants are within the frequency range of 5GHz to 15GHz, the return loss is less than -12dB, the insertion loss is greater than -6.1dB, and the amplitude balance in the four states is less than ±0.1dB, with good consistency, indicating that the insertion loss of the phase shift circuit will not deteriorate due to the increase in the phase shift phase, that is, the additional attenuation value of the phase shift circuit is very small (almost not close to 0). In the entire frequency band, the intra-band amplitude fluctuation is less than 0.2dB (the maximum insertion loss is -5.8dB, the minimum is -6dB), indicating that the phase shift circuit has very small parasitic parameters at high frequencies and can work in ultra-wide frequency bands, and can achieve a 3-fold bandwidth.

[0066] In the first signal channel 120 and the second signal channel 130, the interfaces IN4+ and IN4- of the second input end of the second differential circuit 700 constituting the quadrant conversion circuit can be used to receive the differential signal I2+ / Q2+ or I2- / Q2- output by the signal attenuation circuit 300 / 600, and the interfaces OUT5+ and OUT5- of the second output end will output the differential signal I3+ / Q3+ or I3- / Q3- after the quadrant conversion. After selecting the starting phase through the quadrant conversion, combined with the 0-90° phase shift achieved through amplitude attenuation, the phase shift within the range of 0-360° is achieved. After the above-mentioned processing, the first differential signals I1+ and I1- input to the first signal channel 120, and the second differential signals Q1+ and Q1- input to the second signal channel 130 will obtain the corresponding first phase shifted signals I3+ and I3-, and the second phase shifted signals O3+ and O3-.

[0067] refer to Fig.12 The phase simulation results in the first quadrant provided by the present application are shown. Fig.12As shown, the signal attenuation circuit (5-bit step attenuation) disclosed in the present application realizes a phase shift function of 45deg to -45deg. The phase shift function of 0deg to 90deg can be realized by using phase weighting, and the circuit structure can be directly applied to real scenarios. Among them, the specific attenuation values ​​of the attenuator unit of the 5-bit step attenuation are 1dB, 2dB, 4dB, 8dB, and 16dB, respectively, realizing an attenuation range of 1dB to 31dB, an attenuation step of 1dB, and a minimum phase step of 5.6deg. If a smaller attenuation step is used, such as a 7-bit step attenuation (increase of 0.5dB and 0.25dB), the attenuation range is 0.25dB to 31.75dB, and a minimum phase step of 2.8deg can be realized.

[0068] Fig.13 The second node circuit 140 provided by the present application is shown, which can be used to vector synthesize the input first phase-shifted signals I3+ and I3-, and the second phase-shifted signals O3+ and O3-. The second node circuit 140 may include a combiner 1310 constructed based on a differential circuit. The combiner 1310 includes two third input terminals, which are respectively composed of interfaces IN5+ and IN5-, and interfaces IN6+ and IN6-. It is used to receive the first phase-shifted signals I3+ and I3-, and the second phase-shifted signals O3+ and O3-, respectively. That is, the first phase-shifted signals I3+ and I3- will be input from interfaces IN5+ and IN5-, and the second phase-shifted signals O3+ and O3- will be input from interfaces IN6+ and IN6-. The combiner 1310 will vector synthesize the input signals and output a pair of synthesized differential signals from the third output terminal (composed of interfaces OUT6+ and OUT6-), which can be referred to as synthesized signals in the present application. If the phase shift circuit 100 is applied to a differential system (for example, to differentiate an input signal), the synthesized signal can be designated as an output signal after phase shifting. In some applications, the second node circuit 140 can also include a third transformer 1320. The third transformer 1320 can be electrically connected to the third output terminal of the synthesizer 1310, and convert the synthesized differential signal into a single-ended signal output and then output it from the single-ended output port OUT. The single-ended signal can be designated as an output signal after phase shifting.

[0069] Fig.14 As shown in the figure, the third differential circuit 1400 provided by the present application can be used as the combiner 1310. Fig.14As shown, the third differential circuit 1400 may include an input differential network, an input differential unit, an output differential unit, and an output differential network. The input differential network may include an input port consisting of a first port P+ and a second port P-. The input differential unit may include an input differential coupling line Ca. The positive input terminal of the input differential coupling line Ca is connected to the first port P+, and the negative input terminal is connected to the second port P-. The output differential unit may include a first coupling line C1 and a second coupling line C2. The positive input terminal of the first coupling line C1 is connected to the positive output terminal of the input differential coupling line Ca, and the negative input terminal of the second coupling line C2 is connected to the negative output terminal of the input differential coupling line Ca. At the same time, the negative input terminal of the first coupling line C1 is connected to the positive input terminal of the second coupling line C2. The output differential network may include a first output differential port and a second output differential port. The positive interface D1+ of the first output differential port is connected to the positive output terminal of the first coupling line C1, and the negative interface D1- is connected to the negative output terminal of the second coupling line C2. The positive electrode interface D2+ of the second output differential port is connected to the positive electrode of the output end of the second coupling line C2, and the negative electrode interface D2- is connected to the negative electrode of the output end of the first coupling line C1.

[0070] The third differential circuit 1400 has a first output differential port D1+ / D1- that can be used as a third input terminal IN5+ / IN5- of the synthesizer 1310, and a second output differential port D2+ / D2- that can be used for another third input terminal IN6+ / IN6- of the synthesizer 1310. Its input differential network P+ / P- can be used for a third output port OUT6+ / OUT6- of the synthesizer 1310. The first phase-shifted signals I3+ and I3- will be input from the first output differential port D1+ / D1-, and the second phase-shifted signals O3+ and O3- will be input from the second output differential port D2+ / D2-. The third differential circuit 1400 will realize a vector synthesis function, and output a pair of synthesized differential signals from the input differential network P+ / P-.

[0071] The combiner 1310 constructed using the third differential circuit 1400 disclosed in the present application can realize the differential / combining function. The isolation, broadband characteristics, insertion loss and return loss can be adjusted by adjusting the electrical length, odd-mode impedance and even-mode impedance of the coupling line. It is designed using differential coupling lines, and the electrical length of the coupling line is adjustable, which can be adjusted to a wavelength far less than 1 / 4 of the center frequency, so that a small size can be achieved, insertion loss can be reduced, and isolation can be improved. The use of differential coupling lines also makes it have strong anti-interference ability and high suppression performance for stray and noise.

[0072] The phase shift circuit using the differential circuit architecture disclosed in the present application can be used to form a phase shifter. It can achieve a 3-octave bandwidth. Fig.15The S parameters and phase simulation results of the phase shift circuit provided in the present application are shown. In the frequency band of 5 GHz to 40 GHz, the phase shifter function can also be realized with an 8-fold frequency bandwidth.

[0073] Phase shifters are one of the important components in phased array applications. It is necessary to consider the working conditions of multiple channels. A typical case is when one channel is working and other channels are not working, and the performance of the phase shifter in the open circuit condition. Fig.16 An exemplary schematic diagram showing the S parameters and phase performance of the phase shift circuit provided by the present application in the off state indicates that the phase shifter does not have phase continuity (i.e., no phase characteristic) in the off state, and the attenuation value of the phase shifter is very large at this time, realizing the phase shifter disconnection function. Among them, the circuit structure of the phase shifter in the off state can be as follows Figure 8 As shown in (c), the second differential circuit 700 is in an open state.

[0074] The phase shift circuit implemented by the differential circuit architecture disclosed in the present application can be miniaturized and improve the anti-interference ability. At the same time, it is combined with the characteristics of the differential circuit to make it have ultra-wideband characteristics. The passive vector synthesis modulation technology is used to make it have stable performance at ultra-wideband frequencies, including stable phase characteristics and stable insertion loss and return loss characteristics. Among them, the high-precision phase shift function can be achieved through high-precision signal amplitude attenuation, and the attenuator has band characteristics and high precision, which makes the phase shift circuit very easy to implement. In addition, the output of any phase in the range of 0-360° can be achieved through quadrant selection. This process only needs to switch the on / off state of the differential circuit to achieve it, and the insertion loss will not increase due to the increase in phase. And the vector synthesis is realized by using a high-isolation and high-bandwidth combiner. Because the combiner has a high phase accuracy characteristic, the phase shift circuit has a very high phase shift accuracy. The phase shift circuit disclosed in the present application can also be applied to single-ended interfaces and differential interfaces, and has high application flexibility.

[0075] The present application also discloses a radio frequency microwave transmission system. The radio frequency microwave transmission system may include the phase shift circuit as described above. For example, a digitally controlled phase shifter constructed by the phase shift circuit. Fig.17The exemplary structural diagram of the radio frequency microwave transmission system provided by the present application is shown, and the radio frequency microwave transmission system 1700 may include a one-to-four differential power divider for converting an input signal as a differential signal into four equal-amplitude and in-phase differential signals. Four digitally controlled attenuators, whose input ends are respectively connected to the four output differential ports of the one-to-four differential power divider, are used to attenuate the four differential signals output by the one-to-four differential power divider. Four digitally controlled phase shifters, whose input ends are respectively connected to the output ends of the four digitally controlled attenuators, are used to perform phase shifting on the four differential signals output by the digitally controlled attenuators. The digitally controlled phase shifter can be constructed based on the aforementioned phase shifting circuit of the present application. Four baluns, whose differential ports are respectively connected to the output ends of the four digitally controlled phase shifters, are used to convert the four differential signals output by the digitally controlled phase shifters into four single-ended signals. Four amplifiers, whose input ends are respectively connected to the matching ports of the four baluns, are used to amplify the four single-ended signals output by the baluns. The receiving ends of the four antennas are connected to the output ends of the four amplifiers respectively, and are used to transmit the four-way single-ended signals output by the amplifiers. The four-channel RF microwave transmission system can be used in multi-beam power division networks, 5G MIMO communications, low-orbit satellite communications and other systems. Of course, Fig.17 Just to give an example, the number of digitally controlled attenuators, digitally controlled phase shifters, baluns, amplifiers, and antennas included in the radio frequency microwave transmission system is the same as the number of output differential ports of the differential power divider. For example, when a one-to-two differential power divider is used, the number of the above devices can be two, and when a one-to-eight differential power divider is used, the number of the above devices can be eight. When no differentiation is performed, the number of the above devices can be single.

[0076] The present application also discloses a radio frequency microwave receiving system. The radio frequency microwave receiving system may include the phase shift circuit as described above. For example, a digitally controlled phase shifter constructed by the phase shift circuit. Fig.18The exemplary structural diagram of the radio frequency microwave receiving system provided by the present application is shown, and the radio frequency microwave receiving system 1800 may include four antennas for receiving four single-ended signals. Four low noise amplifiers, whose input ends are respectively connected to the four antennas, are used to amplify the four single-ended signals received by the antennas. Four baluns, whose matching ports are respectively connected to the output ends of the four low noise amplifiers, are used to convert the four single-ended signals output by the low noise amplifiers into four differential signals. Four digitally controlled phase shifters, whose input ends are respectively connected to the differential ports of the four baluns, are used to perform phase shifting on the four differential signals output by the baluns. Four digitally controlled attenuators, whose input ends are respectively connected to the output ends of the four digitally controlled phase shifters, are used to attenuate the four differential signals output by the digitally controlled phase shifters. A one-to-four differential power divider, whose four output differential ports are respectively connected to the output ends of the four digitally controlled attenuators, is used to convert the four differential signals output by the digitally controlled attenuators into one differential signal. The four-channel RF microwave receiving system can be used in multi-beam power division networks, 5G MIMO communications, low-orbit satellite communications and other systems. Fig.18 Just to give an example, the number of digitally controlled attenuators, digitally controlled phase shifters, baluns, amplifiers, and antennas included in the RF microwave receiving system is the same as the number of output differential ports of the differential power divider. For example, when a one-to-two differential power divider is used, the number of the above devices can be two, and when a one-to-eight differential power divider is used, the number of the above devices can be eight. When differential combining is not performed, the number of the above devices can be one.

[0077] The present application has described the basic concepts. Obviously, for those skilled in the art, the above detailed disclosure is only for example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0078] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or multiple times in different positions in the present application does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0079] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment or its description. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0080] Finally, it should be understood that the embodiments described in this application are only used to illustrate the principles of the embodiments of the present application. Other variations may also fall within the scope of the present application. Therefore, as an example and not a limitation, the alternative configurations of the embodiments of the present application may be considered to be consistent with the teachings of the present application. Accordingly, the embodiments of the present application are not limited to the embodiments explicitly introduced and described in the present application.

Claims

1. A phase shift circuit, characterized in that: The phase shift circuit comprises: a first node circuit; a second node circuit; and a first signal path and a second signal path coupled between the first node circuit and the second node circuit; wherein, The first node circuit is configured to split an input signal to simultaneously output a first differential signal to the first signal channel and a second differential signal to the second signal channel; The first signal channel and the second signal channel are implemented based on the architecture of a differential circuit and are configured to perform signal attenuation and / or quadrant transformation on the first differential signal and the second differential signal respectively to achieve phase shift; The second node circuit is configured to synthesize a first phase-shifted signal output by the first signal channel and a second phase-shifted signal output by the second signal channel to obtain an output signal; a phase difference between the output signal and the input signal is between 0 degrees and 360 degrees.

2. The phase shift circuit according to claim 1, characterized in that: The first node circuit comprises: A signal processor, and a first transformer and a second transformer electrically connected to two output ends of the orthogonal coupler respectively; The signal processor is used to generate a pair of orthogonal signals based on the input signal, and input the signals to the first transformer and the second transformer from two output terminals respectively; The first transformer and the second transformer are used to generate the first differential signal and the second differential signal based on an input quadrature signal.

3. The phase shift circuit according to claim 2, characterized in that: The first signal channel and the second signal channel are respectively connected to the first transformer and the second transformer, and both include a signal attenuation circuit. The signal attenuation circuit includes a plurality of first differential circuits electrically connected in sequence. The electrical connection between two adjacent first differential circuits includes a direct connection and / or a connection through an attenuator unit, so as to achieve a phase shift within a range of 0-90deg by attenuating the amplitude of the first differential signal and / or the second differential signal.

4. The phase shift circuit according to claim 3, characterized in that: The plurality of first differential circuits are the same and / or different.

5. The phase shift circuit according to claim 3, characterized in that: The first differential circuit selects an electrical connection mode with an adjacent first differential circuit by turning on or off the positive and negative electrode interfaces of the first input end and the positive and negative electrode interfaces of the first output end.

6. The phase shift circuit according to claim 3, characterized in that: The first signal channel and the second signal channel also include a quadrant conversion circuit electrically connected to the signal attenuation circuit; The quadrant conversion circuit includes a second differential circuit, which realizes the quadrant conversion by turning on or off the positive and negative interfaces of the second input end and the positive and negative interfaces of the second output end to change the starting phase of the first differential signal and / or the second differential signal after phase shifting.

7. The phase shift circuit according to claim 1, characterized in that: The second node circuit includes a third differential circuit for realizing vector synthesis, a third input terminal of the third differential circuit receives the first phase-shifted signal and the second phase-shifted signal respectively, and a third output terminal outputs a synthesized signal obtained through signal synthesis.

8. The phase shift circuit according to claim 7, characterized in that: The third differential circuit comprises: An input differential network includes: a first port and a second port; An input differential unit comprises: an input differential coupling line; An output differential unit comprises: a first coupling line and a second coupling line; and An output differential network, comprising: a first output differential port and a second output differential port; The positive electrode of the input terminal of the input differential coupling line is connected to the first port, and the negative electrode of the input terminal is connected to the second port; The positive electrode of the input end of the first coupling line is connected to the positive electrode of the output end of the input differential coupling line, and the negative electrode of the input end of the second coupling line is connected to the negative electrode of the output end of the input differential coupling line; The negative electrode of the input end of the first coupling line is connected to the positive electrode of the input end of the second coupling line; The positive electrode interface of the first output differential port is connected to the positive electrode of the output end of the first coupling line, and the negative electrode interface is connected to the negative electrode of the output end of the second coupling line; The positive electrode interface of the second output differential port is connected to the positive electrode of the output end of the second coupling line, and the negative electrode interface is connected to the negative electrode of the output end of the first coupling line; The first output differential port and the second output differential port of the output differential network are used to receive the first phase-shifted signal and the second phase-shifted signal respectively, and the input differential network is used to output the composite signal.

9. The phase shift circuit according to claim 7, characterized in that: The composite signal is a differential signal pair, which is designated as the output signal; or, The second node circuit further includes a third transformer; The third transformer is electrically connected to the third output port of the third differential circuit, or the output differential network, and is used to convert the differential signal pair into a single-ended signal as the output signal.

10. A radio frequency microwave system, characterized in that: The method comprises a phase shifting circuit as claimed in any one of claims 1 to 9.

Images