Global shutter CMOS image sensor pixel circuit and control method thereof
By using PMOS global reset tube and other NMOS pipelines in the 6T pixel circuit of the global shutter CMOS image sensor, combined with large-capacity sampling capacitors, the problem of small pixel dynamic range is solved, and more efficient signal storage and reading is achieved, improving dynamics Range and signal quality.
Patent Information
- Application Number
- CN202411148217.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-21
- Publication Date
- 2024-12-20
AI Technical Summary
The existing global shutter CMOS image sensor 6T pixel circuit has the problem of small pixel dynamic range, especially voltage loss caused by the second-stage source following the threshold voltage.
A global shutter CMOS image sensor 6T pixel circuit is designed, using PMOS global reset tube M1 and other NMOS pipelines, combined with the sampling capacitor CH of the flat PIP capacitor, and is carried out through the control signals such as PDrst, Vdd_PDrst, Pre, SH, mem and row_sel. The steps of exposure and signal reading increase the reset voltage of the PD photodiode and the sampling capacitor voltage, and compensate for the loss of the second-stage source following the threshold voltage.
The dynamic range of pixels is significantly improved, the photodiode reset voltage is enhanced, and through independent integration and readout processes, more efficient signal storage and readout is achieved, reducing noise.
Smart Images
Figure CN119172654A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of CMOS image sensors, and in particular relates to a global shutter CMOS image sensor pixel circuit and a control method thereof. Background Art
[0002] CMOS image sensors have two shutter modes: global shutter and rolling shutter. In order to obtain ultra-high-speed images, the global shutter must be used.
[0003] The core of the global shutter CMOS image sensor design is the global shutter CMOS image sensor 6T pixel circuit. For the global shutter CMOS image sensor 6T pixel circuit, a node is required to store the photogenerated signal.
[0004] like Figure 1 In the prior art shown in FIG. 1 , the global reset tube M1 is generally NMOS, and the reset voltage of the PD photodiode is reduced; the sampling capacitor C H The lower electrode plate is grounded. Since the second-level source follows the threshold voltage, the prior art has the problem of small pixel dynamic range. Summary of the invention
[0005] In order to overcome the shortcomings of the prior art, the present invention proposes a global shutter CMOS image sensor 6T pixel circuit, which is designed for a CMOS image sensor pixel with one storage node, realizes the global shutter of the CMOS image sensor, and improves the dynamic range of the pixel. The contents of the present invention are as follows: The first object of the present invention is to provide a global shutter CMOS image sensor 6T pixel circuit, the technical point of which is that it includes: a PD photodiode, a sampling capacitor CH, a global reset tube M1, a first-stage source follower tube M2, a first-stage source follower load tube M3, a global sampling tube M4, a second-stage source follower tube M5 and a pixel selection tube M6, seven input end control signals are control signal PDrst, control signal Vdd_PDrst, control signal Pre, SH, control signal mem, control signal Vdd_pixsf and control signal row_sel, and an output end control signal Vout_pix.
[0006] The anode of the PD photodiode is grounded, and the cathode is connected to the drain of the global reset tube M1; The gate of the global reset tube M1 is connected to the control signal PDrst, and the source is connected to the control signal Vdd_PDrst; The gate of the first-stage source follower tube M2 is connected to the drain of the global reset tube M1, the source is connected to the drain of the first-stage source follower load tube M3, and the drain is connected to the control signal Vdd_pixsf; The gate of the first-stage source follower load transistor M3 is connected to the control signal Pre, and the source is grounded; The gate of the global sampling tube M4 is connected to the control signal SH, and the source is connected to the upper plate of the sampling capacitor CH; The lower plate of the sampling capacitor CH is connected to the control signal mem; The gate of the second-stage source follower tube M5 is connected to the upper plate of the sampling capacitor CH, the drain is connected to the control signal Vdd_pixsf, and the source is connected to the drain of the pixel selection tube M6; The pixel selection tube M6 has a gate connected to a control signal row_sel, and a source connected to an output control signal Vout_pix.
[0007] In order to better implement the above technical solution, the first-stage source follower tube M2, the first-stage source follower load tube M3, the global sampling tube M4, the second-stage source follower tube M5 and the pixel selection tube M6 of the global shutter CMOS image sensor 6T pixel circuit of the present invention are all NMOS tubes.
[0008] In order to better implement the above technical solution, the global reset tube M1 of the pixel circuit of the global shutter CMOS image sensor 6T of the present invention is a PMOS tube, which can increase the reset voltage of the PD photodiode.
[0009] In order to better implement the above technical solution, the sampling capacitor CH value of the global shutter CMOS image sensor 6T pixel circuit of the present invention is composed of a planar PIP capacitor, and the capacitance value is greater than the PD photodiode junction capacitance value.
[0010] A second object of the present invention is to provide a method for controlling a 6T pixel circuit of a global shutter CMOS image sensor, characterized in that the method comprises the following steps: Step 1: before the pixel circuit of the CMOS image sensor starts to be exposed, the reset control signal PDrst of the global reset tube M1 is set to a low level, the global reset tube M1 is turned on, and the PD photodiode is reset; Step 2, start exposure, the potential at node A of the PD photodiode is pulled high during the reset period, the control signal PDrst of the global reset tube M1 is set to a high level, the global reset tube M1 is cut off, the PD photodiode is in a floating state, when light is incident on the pn junction of the PD photodiode, photoelectric conversion occurs, photogenerated charges are generated, and the potential at A begins to decrease; Step 3: Exposure is finished, the control signal SH is high, the control signal Pre is 1V, the control signal mem is 4V, the global sampling tube M4 is turned on, and the first-stage source follower tube M2 converts the charge accumulated on the PD photodiode into a voltage signal and stores it on the sampling capacitor CH, completing the exposure of the pixel; Step 4, signal readout, control signal SH is low level, global sampling tube M4 is cut off, control signal Pre is 0V, control signal mem is 5V, control signal row_sel is high level, pixel selection tube M6 is turned on, and the voltage signal stored on sampling capacitor CH is read out to the column bus, completing the pixel signal readout.
[0011] In order to better implement the above technical solution, the control signal mem in the control method of the global shutter CMOS image sensor 6T pixel circuit of the present invention has a high level of 5V and a low level of 3.5V~4V.
[0012] The global reset tube of the present invention adopts a PMOS tube, which increases the reset voltage of the PD photodiode; the sampling capacitor value is greater than the PD photodiode junction capacitance; especially in the sampling capacitor C H The lower plate introduces a mem control signal to increase the capacitor storage voltage by 1V~1.5V, compensating for the loss of the second-level source follower threshold voltage; greatly improving the dynamic range of the pixel. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 Structural diagram of the prior art global shutter 6T pixel readout circuit.
[0014] Figure 2 Structural diagram of the global shutter 6T pixel readout circuit of the present invention.
[0015] Figure 3 Working timing diagram of the global shutter 6T pixel readout circuit of the present invention. DETAILED DESCRIPTION
[0016] To make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the specific embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0017] like Figure 2 As shown, the global shutter 6T pixel structure of the present invention includes a PD type photodiode, a sampling and holding capacitor C H, global reset tube M1, first-stage source follower tube M2, first-stage source follower load tube M3, global sampling tube M4, second-stage source follower tube M5 and pixel selection tube M6; The control signals are respectively a control signal PDrst, a control signal Vdd_PDrst, a control signal Pre, a control signal SH, a control signal mem, a control signal Vdd_pixsf and a control signal row_sel; and an output end control signal Vout_pix.
[0018] Since the PD photodiode and voltage storage are isolated by the global sampling tube M4, integration and readout are independent of each other, realizing a global shutter working mode of integration while reading out. The integration time can be adjusted arbitrarily without affecting the signal readout.
[0019] The gate of the global reset tube M1 is connected to the control signal PDrst, and the source is connected to the control signal Vdd_PDrst; the gate of the first-stage source follower tube M2 is connected to the drain of the global reset tube M1, and the source is connected to the drain of the first-stage source follower load tube M3, and the drain is connected to the control signal Vdd_pixsf; the gate of the global sampling tube M4 is connected to the control signal SH, and the source is connected to the sampling capacitor C H Upper plate; sampling capacitor C H The lower plate is connected to the control signal mem; the gate of the second-stage source follower tube M5 is connected to the upper plate of the sampling capacitor, the drain is connected to the control signal Vdd_pixsf, and the source is connected to the output terminal Vout_pix.
[0020] The global reset tube M1 is selected as a PMOS tube, and the others are all NMOS tubes.
[0021] like Figure 3 As shown, the high level of the control signals PDrst, SH and row_sel is 5V, and the low level is 0V; the high level of the control signal mem is 5V, and the low level is 3.5V~4V; the high level of Pre is 1V, and the low level is 0V. The implementation process of the present invention is: (1) Before the CMOS image sensor pixel circuit starts to be exposed, the reset control signal PDrst of the global reset tube M1 is set to a low level, the global reset tube M1 is turned on, and the PD photodiode is reset; (2) Exposure begins. During the reset period, the potential at node A of the PD photodiode is pulled high, and the control signal PDrst of the global reset tube M1 is set to a high level. The global reset tube M1 is cut off, and the PD photodiode is in a floating state. When light is incident on the pn junction of the PD photodiode, photoelectric conversion occurs, generating photogenerated charges, and the potential at A begins to decrease. (3) When the exposure is finished, the control signal SH is at a high level, the control signal Pre is 1V, the control signal mem is 4V, the global sampling tube M4 is turned on, and the first-stage source follower tube M2 converts the charge accumulated on the PD photodiode into a voltage signal and stores it on the sampling capacitor CH, completing the exposure of the pixel; (4) Signal readout: the control signal SH is at a low level, the global sampling tube M4 is cut off, the control signal Pre is 0V, the control signal mem is 5V, the control signal row_sel is at a high level, the pixel selection tube M6 is turned on, and the voltage signal stored on the sampling capacitor CH is read out to the column bus, completing the pixel signal readout.
[0022] (5) Repeat the above steps for the next detection.
[0023] The global reset tube M1 of the present invention adopts PMOS to increase the reset voltage at A; at the same time, the global sampling capacitor C H The lower plate introduces the control signal mem port. The high and low levels of the control signal mem are 5V and 3.5V~4V respectively, thereby increasing the voltage at B by 1V~1.5V, compensating for the loss of the second-level source follower threshold voltage. In order to reduce noise, the sampling capacitor C H The value must be greater than the junction capacitance of the PD photodiode; based on the above three points, the dynamic range of the pixel is greatly improved.
[0024] The present invention has been described above by means of specific embodiments, and the embodiments described in the present invention are illustrative rather than restrictive. It should be understood by those skilled in the art that various modifications, equivalent substitutions, changes, etc. may be made to the present invention, and these changes should be within the scope of protection of the present invention as long as they do not deviate from the spirit of the present invention.
Claims
1. A global shutter CMOS image sensor 6T pixel circuit, characterized in that: include: PD photodiode, sampling capacitor C H , a global reset tube M1, a first-stage source follower tube M2, a first-stage source follower load tube M3, a global sampling tube M4, a second-stage source follower tube M5 and a pixel selection tube M6, seven input control signals are control signal PDrst, control signal Vdd_PDrst, control signal Pre, SH, control signal mem, control signal Vdd_pixsf and control signal row_sel, and an output control signal Vout_pix; The anode of the PD photodiode is grounded, and the cathode is connected to the drain of the global reset tube M1; The gate of the global reset tube M1 is connected to the control signal PDrst, and the source is connected to the control signal Vdd_PDrst; The gate of the first-stage source follower tube M2 is connected to the drain of the global reset tube M1, the source is connected to the drain of the first-stage source follower load tube M3, and the drain is connected to the control signal Vdd_pixsf; The gate of the first-stage source follower load transistor M3 is connected to the control signal Pre, and the source is grounded; The gate of the global sampling tube M4 is connected to the control signal SH, and the source is connected to the sampling capacitor C H Upper plate; The sampling capacitor C H The lower plate is connected to the control signal mem; The gate of the second-stage source follower tube M5 is connected to the sampling capacitor C H The upper plate has a drain connected to the control signal Vdd_pixsf and a source connected to the drain of the pixel gate tube M6; The pixel selection tube M6 has a gate connected to a control signal row_sel, and a source connected to an output control signal Vout_pix.
2. The global shutter CMOS image sensor 6T pixel circuit according to claim 1, characterized in that: The first-stage source follower tube M2, the first-stage source follower load tube M3, the global sampling tube M4, the second-stage source follower tube M5 and the pixel gate tube M6 are all NMOS tubes.
3. The global shutter CMOS image sensor 6T pixel circuit according to claim 1, characterized in that: The global reset tube M1 is a PMOS tube, which can increase the reset voltage of the PD photodiode.
4. The global shutter CMOS image sensor 6T pixel circuit according to claim 1, characterized in that: The sampling capacitor C H The value is composed of a flat PIP capacitor, and the capacitance value is greater than the PD photodiode junction capacitance value.
5. A method for controlling a 6T pixel circuit of a global shutter CMOS image sensor, characterized in that: The following steps are involved: Step 1: before the pixel circuit of the CMOS image sensor starts to be exposed, the reset control signal PDrst of the global reset tube M1 is set to a low level, the global reset tube M1 is turned on, and the PD photodiode is reset; Step 2, start exposure, the potential at node A of the PD photodiode is pulled high during the reset period, the control signal PDrst of the global reset tube M1 is set to a high level, the global reset tube M1 is cut off, the PD photodiode is in a floating state, when light is incident on the pn junction of the PD photodiode, photoelectric conversion occurs, photogenerated charges are generated, and the potential at A begins to decrease; Step 3: Exposure is finished, the control signal SH is high, the control signal Pre is 1V, the control signal mem is 4V, the global sampling tube M4 is turned on, and the first-stage source follower tube M2 converts the charge accumulated on the PD photodiode into a voltage signal and stores it on the sampling capacitor CH, completing the exposure of the pixel; Step 4: Signal readout, control signal SH is low level, global sampling tube M4 is cut off, control signal Pre is 0V, control signal mem is 5V, control signal row_sel is high level, pixel selection tube M6 is turned on, and the signal is stored in sampling capacitor C. H The voltage signal on the pixel is read out to the column bus, completing the signal readout of the pixel.
6. The method for controlling a pixel circuit of a global shutter CMOS image sensor 6T according to claim 5, characterized in that: The high level of the control signal mem is 5V, and the low level is 3.5V~4V.