Avalanche energy test circuit and test method of power device

Abstract

The invention discloses an avalanche energy test circuit and a test method for a power device, and the test circuit can inhibit the avalanche energy from being tested after the avalanche of a to-be-tested device is finished on the premise that the avalanche energy test of an existing non-clamping inductive switch test circuit is realized. Current and voltage oscillation is caused by charging and discharging between an inductor and a stray capacitor of a to-be-tested device. Imprecise avalanche energy testing caused by loss of the to-be-tested device due to current and voltage oscillation is avoided, and the phenomenon that the to-be-tested device is mistakenly switched on due to gate-source oscillation caused by drain-source oscillation of the to-be-tested device is avoided. Through the constant current source circuit, after avalanche of the to-be-tested device is finished, a temperature-sensitive electrical parameter method is adopted to test a cooling curve and heat dissipation time of the to-be-tested device. According to the avalanche energy test circuit and test method of the power device, on the basis of realizing accurate measurement of monopulse avalanche energy, the optimal duty ratio required during repeated pulse avalanche energy test can be calculated, and the accuracy of the repeated pulse avalanche energy test is improved.

Description

Technical Field

[0001] The invention relates to the technical field of avalanche energy testing, in particular to an avalanche energy testing circuit and a testing method for a power device. Background Art

[0002] Wide bandgap semiconductor devices (such as SiC MOSFET) are often used in new energy power generation, electric vehicles, aerospace, communication power supplies and smart grids due to their excellent electrical properties such as high switching speed, low conduction loss, high temperature and high voltage resistance. As a voltage-controlled switching device, SiC MOSFET is widely used in inductive, capacitive and resistive load systems: in inductive load power electronic systems, when the device is suddenly turned off, its inductor voltage will generate overvoltage due to the rapid change of current, causing the device to enter an avalanche state; while in capacitive or resistive load power electronic systems, no overvoltage will be generated at both ends of the load after the device is suddenly turned off. Testing the maximum avalanche energy and number of repeated avalanches that the power device can withstand has a guiding role in how to select power devices with appropriate rated voltages in inductive load systems of different voltage levels. After the device starts avalanche, the junction temperature will rise to 500K~700K. In order to accurately test the number of repeated pulse avalanche uses, it is necessary to wait for the device to return to normal temperature after each pulse cycle before the next test to eliminate the influence of temperature factors on the repeated pulse avalanche energy test. However, after the device avalanche ends, due to the influence of inductance and parasitic capacitance, its avalanche voltage and avalanche current will oscillate for hundreds of microseconds, and the device cooling curve cannot be measured by the temperature-sensitive electrical parameter method, which results in the inability to accurately set the time interval between each cycle: if the interval time is too short, the device will not dissipate enough heat, and heat accumulation will occur during the repeated pulse avalanche energy test, causing damage to the device; if the interval time is too long, the repeated pulse avalanche energy test will be as high as hundreds of thousands times, resulting in several times longer repeated pulse avalanche energy test time, and the number of avalanches the device has experienced in the repeated pulse avalanche test cannot be accurately tested, resulting in extremely low efficiency.

[0003] The academic and industrial circles often use the unclamped inductive switch test (UIS) circuit to test the avalanche energy. The UIS test circuit is a test method used to simulate the operation of power devices under extreme conditions, especially to simulate the voltage spike generated when a high inductive load is suddenly disconnected. This test method is simple and low-cost, and its simplest circuit consists of only a voltage source, an inductor, a drive circuit, and a device under test. The avalanche process of a power device only lasts for a few microseconds, so it is difficult to observe the device avalanche process and the junction temperature change after the end through a thermal imager; and because its withstand voltage value drops significantly after opening, it is impossible to test the device avalanche process and the junction temperature change after the end through a fiber optic probe; at the same time, there are large inductors and device parasitic capacitances in the test circuit. Even if the avalanche ends, the power device still has current and voltage oscillations for hundreds of microseconds. It is not accurate to measure the junction temperature change of the power device after the avalanche ends by the temperature-sensitive electrical parameter method. Therefore, it is difficult to determine whether the device under test has returned to normal temperature after the avalanche ends, and it is impossible to accurately set the time interval between each pulse cycle during the repeated pulse avalanche test. Summary of the invention

[0004] In view of the deficiencies of the prior art, the present invention proposes an avalanche energy test circuit and test method for power devices. The test circuit designed by the present invention can suppress the current and voltage oscillations caused by the charging and discharging between the inductor and the parasitic capacitance of the device under test, avoid the inaccurate avalanche energy test caused by the loss of the device under test due to the current and voltage oscillations, avoid the phenomenon of the device being turned on incorrectly due to the gate-source oscillation caused by the drain-source oscillation of the device under test, and make it possible to monitor the temperature change of the power device after the avalanche ends by using the temperature-sensitive electrical parameter test method. At the same time, the time interval between each pulse cycle during the repeated pulse avalanche energy test, that is, the repeated pulse duty cycle, is determined to accurately test the test accuracy, greatly reducing the test time and improving the test efficiency.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows: an avalanche energy test circuit for a power device, characterized in that the circuit includes a current oscillation suppression circuit and a constant current source circuit, wherein the current oscillation suppression circuit includes a DC power supply (VDD), a normally open switch (Q1), an inductor (L), a normally closed switch (Q2), a diode (D1), a device under test (DUT1), a first pulse signal generator (V G ), gate resistance (R G); the positive output terminal of the DC power supply (VDD) is connected to the collector of the normally open switch, the emitter of the normally open switch is connected to one end of the inductor (L); the other end of the inductor (L) is connected to the drain of the device under test, and the source of the device under test is connected to the negative input terminal of the DC power supply (VDD); the cathode of the diode (D1) is connected to the connection point between the emitter of the normally open switch (Q1) and the inductor (L), the anode of the diode (D1) is connected to the emitter of the normally closed switch (Q2), and the collector of the normally closed switch (Q2) is connected to the connection point between the inductor (L) and the drain of the device under test; the first pulse signal generator (V G ) is connected to the negative input terminal of the DC power supply (VDD), and its positive terminal is connected to the gate resistor (R G ) is connected to one end of the gate resistor (R G ) is connected to the gate of the device under test (DUT1);

[0006] The constant current source circuit comprises a second pulse signal generator, a current source chip (U1), a voltage stabilizing diode (D2), and a high-precision resistor (R2); the negative output end of the second pulse signal generator is connected to the drain of the device under test (DUT1), and the positive output end is connected to the IN end of the current source chip (U1); the SET end of the current source chip (U1) is connected to the cathode of the voltage stabilizing diode (D2), and the anode of the voltage stabilizing diode (D2) is connected to the source of the device under test (DUT1); the OUT end of the current source chip (U1) is connected to one end of the high-precision resistor (R2), and the other end of the high-precision resistor (R2) is connected to the connection point between the voltage stabilizing diode (D2) and the source of the device under test (DUT1).

[0007] Furthermore, the present invention provides a method for testing the avalanche energy of a power device, characterized in that the method is based on the avalanche energy testing circuit of the power device as described above, and the method comprises the following steps:

[0008] Step 1: Set the value of the on-time t1 of the device under test (DUT1), and set the pulse width and duty cycle of the pulse driving signal of the first pulse signal generator during the first single-pulse avalanche energy test;

[0009] Step 2: Turn on the current oscillation suppression circuit and turn off the constant current source circuit; the first pulse signal generator (V G ) is sent out, and the device under test (DUT1) is turned on; the current flowing through the device under test (DUT1) gradually increases to the set value at a constant rate and charges the inductor (L);

[0010] Step 3: First pulse signal generator (V G) reaches t1, the pulse drive signal stops, the device under test (DUT1) is turned off, and the device under test (DUT1) enters the avalanche state. The avalanche duration is t av ;

[0011] Step 4: After the avalanche of the device under test (DUT1) ends, the normally closed switch (Q2) opens and the normally open switch (Q1) opens;

[0012] Step 5: 10 μs after the avalanche of the device under test (DUT1) ends, turn on the second pulse signal generator to output a pulse drive signal, so that the constant current source circuit emits a constant current of 10 mA, and tests the parasitic diode voltage drop inside the device under test (DUT1); use the parasitic diode voltage drop inside the device under test (DUT1) as a temperature-sensitive parameter, and monitor the time t for the junction temperature of the device under test (DUT1) to recover to room temperature after the avalanche ends by using the temperature-sensitive electrical parameter method. i ;

[0013] Step 6: The process from step 2 to step 5 is a single pulse avalanche energy test process. The duration of a single pulse avalanche energy test is T S :

[0014] T S =t1+t av +t i +10

[0015] Where t1 is the turn-on time of the device under test (DUT1), t av is the avalanche duration of the device under test (DUT1), t i It is the time it takes for the junction temperature of the device under test (DUT1) to recover to normal temperature after the avalanche energy test is completed;

[0016] Elapsed time T S After that, the device under test (DUT1) has returned to normal temperature. S As the pulse period of repetitive pulse avalanche energy test; t1 / T S As the optimal duty cycle D of the repetitive pulse, the first pulse signal generator (V G ) sends out a pulse drive signal with an optimal duty cycle D, and takes 80% of the maximum avalanche energy value of the device under test (DUT1) as the test condition for repeated pulse avalanche energy test, and continuously repeats the process of single pulse avalanche energy test until the device under test (DUT1) is damaged; the number of repeated pulse avalanche tests that the device under test (DUT1) withstands when it is damaged is the service life of the device under test (DUT1) under the current test conditions.

[0017] Compared with the prior art, the beneficial effect of the technical solution of the present invention is that the avalanche energy test circuit of the power device designed by the present invention can suppress the current and voltage oscillations caused by the charging and discharging between the inductor and the parasitic capacitance of the device under test after the avalanche of the device under test ends, under the premise of realizing the avalanche energy test of the existing non-clamped inductive switch test circuit. It avoids the inaccurate avalanche energy test caused by the loss of the device under test due to the current and voltage oscillation, and avoids the phenomenon of the device being turned on incorrectly due to the gate-source oscillation caused by the drain-source oscillation of the device under test. In addition, through the constant current source circuit, it is possible to use the temperature-sensitive electrical parameter method to test the cooling curve and heat dissipation time of the device under test after the avalanche of the device under test ends. The avalanche energy test circuit and test method of the power device designed by the present invention can calculate the optimal duty cycle required for the repeated pulse avalanche energy test on the basis of realizing the accurate measurement of the single pulse avalanche energy, thereby improving the accuracy of the number of times the device withstands avalanches during the repeated pulse avalanche energy test. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of the structure of a conventional unclamped inductive switch test circuit.

[0019] Figure 2 For through Figure 1 Schematic diagram of signal curves during single pulse avalanche energy test of the non-clamped inductive switch test circuit shown in FIG. G Represents the first pulse signal generator V G Schematic diagram of the triggered pulse signal curve, I DS Represents the current signal curve through the device under test DUT1, V DS Schematic diagram representing the drain-source voltage signal curve of the device under test DUT1.

[0020] Figure 3 The present invention is a schematic diagram of the structure of a current oscillation suppression circuit of an embodiment of an avalanche energy test circuit for a power device.

[0021] Figure 4 For through Figure 3 Schematic diagram of signal curves during single pulse avalanche energy test of the current oscillation suppression circuit shown in FIG. G ,I DS 、V DS The curve shown is Figure 2 As shown in FIG. 1 , Q1 represents the schematic diagram of the driving signal curve when the normally open switch is in operation, and Q2 represents the schematic diagram of the driving signal curve when the normally closed switch is in operation.

[0022] Figure 5 The present invention is a schematic structural diagram of an avalanche energy test circuit for a power device according to an embodiment of the present invention.

[0023] Figure 6 For through Figure 5 Schematic diagram of signal curves during a single pulse avalanche energy test of the avalanche energy test circuit of the power device shown in FIG. G ,I DS 、V DS , Q1, Q2 shown in the curve and Figure 4 The consistency expressed in I SD Schematic diagram representing the current signal curve emitted by the constant current source circuit, V SD The schematic diagram represents the diode voltage drop signal curve of the device under test DUT1, and the cooling curve represents the junction temperature change curve of the device under test DUT1 after the avalanche ends measured by the thermal electrical parameter method. DETAILED DESCRIPTION

[0024] In order to make the present invention more understandable, the technical solution of the present invention will be further described below in conjunction with specific implementation methods and drawings, which are not intended to limit the protection scope of the present application.

[0025] Figure 1 The conventional non-clamped inductive switch test circuit diagram includes a DC power supply VDD, a bus inductor L, a device under test DUT1, a first pulse signal generator V G , Gate resistance R G The positive output terminal of the DC power supply VDD is connected to one end of the inductor L, and the other end of the inductor L is connected to the drain of the device under test DUT1; the source of the device under test DUT1 is connected to the negative output terminal of the DC power supply VDD and grounded; the first pulse signal generator V G The negative pole is connected to the ground, and the positive pole at the other end is connected to the gate resistor R G One end of the gate resistor R G The other end is connected to the gate of the device under test DUT1.

[0026] When the device under test DUT1 is turned on, the voltage drop of the device is very small, and the voltage value of the DC power supply VDD can be approximately regarded as being completely borne by the inductor L. Therefore, the inductor voltage can be calculated according to the formula:

[0027]

[0028] Get the required avalanche current I ds :

[0029]

[0030] t1 is the pulse period T×D of the pulse drive signal (D is the duty cycle of the pulse drive signal). t1 can be independently debugged and designed by the tester according to the test requirements. L0 is the inductance value of the inductor L.

[0031] Before the test, after adjusting t1 appropriately according to the test requirements, the single pulse avalanche energy test can be performed. First, the pulse drive signal sends a drive signal with appropriate pulse width and duty cycle, and the device under test DUT1 is turned on. Due to the existence of inductance L, the current I ds The inductor L is charged with a constant di / dt. At this time, the voltage of the device under test DUT1 is the device conduction voltage drop V ds , the voltage value of the DC power supply VDD is borne by the inductor L; after the drive signal ends, the device under test is turned off. Since the inductor L still stores a large amount of energy, when the inductor L releases energy, the inductor L is equivalent to a power supply, generating an approximately constant di / dt rate I av ; Since the DUT1 is turned off, its resistance is very high, which causes the energy consumption of the inductor L to be very fast. Therefore, the di / dt value generated is very large, so that the DUT1 will be subjected to a very large voltage, namely, the avalanche voltage V BR(DS) , the device under test enters the avalanche state; after the energy of the inductor L is released, the device under test DUT1 ends the avalanche, and the voltage of DUT1 becomes the voltage value of the DC power supply VDD.

[0032] In order to measure the maximum avalanche energy value of the device under test DUT1, during the avalanche energy test, the on-time t1 of the device under test DUT1 is increased at a fixed time (usually with a gradient of 10us), and the on-time t1 is gradually increased until the device is damaged. The single pulse avalanche energy before the device is damaged is taken as the maximum avalanche energy value of the device under test.

[0033] by Figure 1 The avalanche energy calculation formula for the conventional unclamped inductive switch test circuit for avalanche energy testing is:

[0034]

[0035] exist Figure 1 The avalanche voltage in the circuit can be expressed as:

[0036]

[0037] Combining the two equations, we can get:

[0038]

[0039] Figure 2 This is a curve diagram of a single pulse avalanche energy test using the above method. The avalanche energy of the device under test can be calculated from the voltage and current in the figure.

[0040] However, the test curve shows the shortcomings of the above method: during the avalanche process, the inductor L keeps discharging to the device under test. After the avalanche ends, the device under test is turned off. ds , during the avalanche process of the device under test, the parasitic capacitance C ds It also stores some energy. When the energy of the inductor L is released, due to the parasitic capacitance C ds There is still some energy, the parasitic capacitance C ds Start to discharge to the inductor L, between the inductor L and the parasitic capacitor C ds During the mutual charging and discharging process, even if the avalanche of the device under test ends, the device will still be subjected to long-term current and voltage fluctuations, causing damage to the device life.

[0041] like Figure 2 As shown, since there are still long-term current and voltage oscillations after the end of the avalanche, it is impossible to use the thermistor parameter method to monitor the junction temperature of the device, and thus it is impossible to verify whether the device has returned to normal temperature after the end of the avalanche. As a result, when performing repeated pulse avalanche energy testing, it is impossible to properly set the interval between two adjacent pulse cycles. As a result, when performing repeated pulse avalanche energy testing, it is easy for the junction temperature of the device to be tested to fail to drop to normal temperature after each pulse due to unreasonable pulse interval design; during multiple repeated pulse avalanche energy tests, heat accumulation is likely to occur, resulting in inaccurate testing of the repeated pulse avalanche energy and the number of avalanches the device has to endure, and a greatly shortened device life.

[0042] The present invention provides a power device avalanche energy test circuit (see Figure 5 ), the circuit includes a current oscillation suppression circuit and a constant current source circuit, wherein the current oscillation suppression circuit (such as Figure 3 ) includes a DC power supply VDD, a normally open switch Q1, an inductor L, a normally closed switch Q2, a diode D1, a device under test DUT1, a first pulse signal generator V G , Gate resistance R G The positive output terminal of the DC power supply VDD is connected to the collector of the normally open switch, and the emitter of the normally open switch is connected to one end of the inductor L; the other end of the inductor L is connected to the drain of the device under test, and the source of the device under test is connected to the negative input terminal of the DC power supply VDD; the cathode of the diode D1 is connected to the connection point between the emitter of the normally open switch Q1 and the inductor L, the anode of the diode D1 is connected to the emitter of the normally closed switch Q2, and the collector of the normally closed switch Q2 is connected to the connection point between the inductor L and the drain of the device under test. The first pulse signal generator V G The negative electrode is connected to the negative input terminal of the DC power supply VDD, and the positive electrode is connected to the gate resistor R G One end of the gate resistor R G The other end is connected to the gate of the device under test DUT1.

[0043] The constant current source circuit includes a second pulse signal generator, a current source chip U1, a voltage stabilizing diode D2, and a high-precision resistor R2. The negative output terminal of the second pulse signal generator is connected to the drain of the device under test DUT1, and the positive output terminal is connected to the IN terminal of the current source chip; the SET terminal of the current source chip is connected to the cathode of the voltage stabilizing diode D2, and the anode of the voltage stabilizing diode D2 is connected to the source of the device under test DUT1; the OUT terminal of the current source chip is connected to one end of the high-precision resistor R2, and the other end of the high-precision resistor R2 is connected to the connection point between the voltage stabilizing diode D2 and the source of the device under test DUT1.

[0044] The avalanche energy test circuit can not only ensure the original function of the non-clamped inductive switch test circuit, but also suppress the current oscillation caused by the mutual charging and discharging of the inductor L and the parasitic capacitance after the avalanche of the device under test ends, so that the junction temperature of the device after the avalanche ends can be measured by the temperature-sensitive electrical parameter method.

[0045] Furthermore, the present invention provides a method for testing the avalanche energy of a power device. The method is based on the avalanche energy testing circuit of the power device as described above, and the method comprises the following steps:

[0046] Step 1: Set the value of the DUT conduction time t1 and the first pulse signal generator V G The pulse width (i.e., the duration of the high level, which is equal to the conduction time of the device under test) and the duty cycle of the pulse driving signal Vg during the first single-pulse avalanche energy test.

[0047] The setting of the on-time t1 of the device under test is:

[0048]

[0049] Among them, I p is the current value passing through the device under test, I p The value range of V is between the rated continuous drain current value in the device manual of the device under test and the maximum avalanche current value of its single pulse avalanche energy test; DD is the output voltage of the DC power supply VDD, V DDThe value can be set to 50V according to the common test conditions of SiCMOSFET manufacturers in the market; L0 is the inductance value of the inductor L. Among them, the method for determining the maximum avalanche current of the single pulse avalanche energy test is as follows: first, use the rated continuous drain current value in the device manual of the device to be tested to calculate the device conduction time during the first single pulse avalanche energy test, that is, the pulse width of the pulse signal; during the second single pulse avalanche energy test, the conduction time of the device to be tested is increased by 10μs; and so on, the conduction time of the device to be tested is gradually increased by 10μs until it is damaged, and the maximum avalanche current value is obtained. Take the single pulse avalanche energy before the device to be tested is damaged as the maximum avalanche energy value of the device to be tested.

[0050] Step 2: Turn on the current oscillation suppression circuit and turn off the constant current source circuit; the first pulse signal generator V G The pulse drive signal is sent, and the device under test is turned on; the current I flowing through the device under test ds Gradually increase to the set value at a constant rate and charge the inductor L;

[0051] Step 3: First pulse signal generator V G After the pulse drive signal is sent for a time of t1, the pulse drive signal Vg stops, the device under test is turned off, and the device under test enters the avalanche state. The avalanche duration is t av ;

[0052] Step 4: After the avalanche of the device under test ends, the normally closed switch Q2 is turned on and the normally open switch Q1 is turned off, so that the oscillating current continues to flow between the inductor L, the diode D1, and the normally closed switch Q2; at the same time, the oscillating current is prevented from causing unnecessary oscillations when flowing between the freewheeling circuits, so as to achieve the purpose of suppressing the current and voltage oscillations after the avalanche energy test is completed.

[0053] By using the test method of the oscillation suppression circuit, the current and voltage oscillations after the single pulse avalanche energy test can be well suppressed, and then the cooling time after the avalanche of the device under test ends can be measured by the temperature-sensitive electrical parameter method.

[0054] In order to accurately suppress current and voltage oscillations, it is necessary to accurately control the turn-off time of the normally open switch Q1 and the turn-on time of the normally closed switch Q2. Figure 1 The conventional non-clamped inductive switch test circuit shown in the figure is used for transient analysis in the on state. Figure 1 The transient analysis equations for the circuit shown in the on-state are as follows:

[0055]

[0056] In this formula, V DD is the output voltage of the DC power supply VDD, L0 is the inductance value of the inductor L, V BR(DS) is the avalanche voltage, RL is the parasitic resistance value of the inductor L, i (t) is the current value flowing through the device under test. (t) =I L =I ds Solving the state equation for the boundary conditions yields:

[0057]

[0058] By solving the above formula, the avalanche duration is obtained as:

[0059]

[0060] Through the device under test conduction time t1, the device under test avalanche duration t av The opening time of the normally closed switch Q2 and the closing time of the normally open switch Q1 can be obtained as t=t1+t av The signal delay is set by software control, so that the normally open switch Q1 and the normally closed switch Q2 change state after t time, that is, after the avalanche of the device under test ends. The test circuit diagram is as follows Figure 4 As shown, it can be seen that after the normally open switch Q1 is turned off and the normally closed switch Q2 is turned on, the voltage and current oscillations after the avalanche energy test are well suppressed. The dotted line part in the figure is the suppressed part. The purpose of suppressing the voltage and current oscillations after the avalanche energy test is achieved by the current oscillation suppression circuit, so that the subsequent use of the temperature-sensitive electrical parameter method to monitor the time for the junction temperature of the device under test to return to normal temperature can be realized.

[0061] In the repetitive pulse avalanche energy test, if the time interval between adjacent pulses is too short, it will cause insufficient heat dissipation of the device, and heat accumulation will occur during the repetitive pulse avalanche energy test, reducing the service life of the power device; if the time is too long, it will greatly extend the time of the repetitive pulse avalanche energy test. Since the repetitive pulse avalanche energy test may require hundreds of thousands of times, a long interval time will often increase the test time by several times, which is extremely inefficient. In order to set an appropriate time interval between adjacent pulses during the repetitive pulse avalanche energy test, that is, the duty cycle of the pulse drive signal of the repetitive pulse avalanche energy test, it is necessary to use the temperature-sensitive electrical parameter method to monitor the time it takes for the junction temperature of the device under test to recover to normal temperature after the avalanche energy test of the device under test.

[0062] Step 5: 10 μs after the avalanche of the device under test ends, turn on the second pulse signal generator to output the pulse drive signal V i , so that the constant current source circuit emits a constant current I of 10mA sd, and test the parasitic diode voltage drop Vsd inside the device under test DUT1. Taking the parasitic diode voltage drop Vsd inside the device under test DUT1 as the temperature-sensitive parameter, the time t for the junction temperature of the device under test to recover to room temperature after the avalanche ends is monitored by the temperature-sensitive electrical parameter method. i .

[0063] The curve diagram of the junction temperature recovery to normal temperature after the avalanche energy test of the power device is monitored by using the temperature-sensitive electrical parameter method through a constant current source circuit is as follows Figure 6 As shown, by monitoring the change of the parasitic diode voltage drop inside the device under test, the time it takes for the junction temperature of the device under test to recover to room temperature is monitored.

[0064] Due to the pulse driving signal of the second pulse signal generator, that is, the current source chip itself, there is a delay in the pulse current triggering. At the same time, in order to completely eliminate the influence of current and voltage oscillations, the triggering of the second pulse signal generator is set 10μs after the state conversion of switches Q1 and Q2.

[0065] Step 6: The process from step 2 to step 5 is a single pulse avalanche energy test process. The duration of a single pulse avalanche energy test is T S :

[0066] T S =t1+t av +t i +10

[0067] Where t1 is the conduction time of the device under test, t av is the avalanche duration of the device under test, t i It is the time it takes for the junction temperature of the device under test to return to normal temperature after the avalanche energy test is completed;

[0068] Elapsed time T S After that, the device under test has returned to normal temperature, and T S As the pulse period of repetitive pulse avalanche energy test; t1 / T S As the optimal duty cycle D of the repetitive pulse, the influence of temperature during the repetitive pulse avalanche energy test can be fully eliminated, making the test results more accurate. G Send out a pulse drive signal with the optimal duty cycle D, take 80% of the maximum avalanche energy value of the device under test as the test condition for repeated pulse avalanche energy test, and repeat the process of single pulse avalanche energy test until the device under test is damaged. The number of repeated pulse avalanche tests that the device under test withstands when it is damaged is the service life of the device under the current test conditions.

[0069] The optimal duty cycle D of the driving signal during the repetitive pulse avalanche energy test is:

[0070]

[0071] The above method can be used to set the optimal duty cycle for the repetitive pulse avalanche energy test. If the time cost is not considered, when setting the duty cycle d during the repetitive pulse avalanche energy test, ensure that d is less than the optimal duty cycle D to avoid heat accumulation in the device under test during the repetitive pulse avalanche energy test.

[0072] The "avalanche energy test of power devices" in the present invention refers to obtaining the number of repeated avalanches, i.e., the life of the power device, using the avalanche energy test method. For power devices, the maximum avalanche energy value is of reference significance, which can be obtained using a general single-pulse avalanche energy test method, and this process is a prior art in the art.

[0073] Any matters not described in the present invention are applicable to the prior art.

Claims

1. An avalanche energy test circuit for a power device, characterized in that: The circuit includes a current oscillation suppression circuit and a constant current source circuit, wherein the current oscillation suppression circuit includes a DC power supply (VDD), a normally open switch (Q1), an inductor (L), a normally closed switch (Q2), a diode (D1), a device under test (DUT1), a first pulse signal generator (V G ), gate resistance (R G ); the positive output terminal of the DC power supply (VDD) is connected to the collector of the normally open switch, the emitter of the normally open switch is connected to one end of the inductor (L); the other end of the inductor (L) is connected to the drain of the device under test, and the source of the device under test is connected to the negative input terminal of the DC power supply (VDD); the cathode of the diode (D1) is connected to the connection point between the emitter of the normally open switch (Q1) and the inductor (L), the anode of the diode (D1) is connected to the emitter of the normally closed switch (Q2), and the collector of the normally closed switch (Q2) is connected to the connection point between the inductor (L) and the drain of the device under test; the first pulse signal generator (V G ) is connected to the negative input terminal of the DC power supply (VDD), and its positive terminal is connected to the gate resistor (R G ) is connected to one end of the gate resistor (R G ) is connected to the gate of the device under test (DUT1); The constant current source circuit comprises a second pulse signal generator, a current source chip (U1), a voltage stabilizing diode (D2), and a high-precision resistor (R2); the negative output end of the second pulse signal generator is connected to the drain of the device under test (DUT1), and the positive output end is connected to the IN end of the current source chip (U1); the SET end of the current source chip (U1) is connected to the cathode of the voltage stabilizing diode (D2), and the anode of the voltage stabilizing diode (D2) is connected to the source of the device under test (DUT1); the OUT end of the current source chip (U1) is connected to one end of the high-precision resistor (R2), and the other end of the high-precision resistor (R2) is connected to the connection point between the voltage stabilizing diode (D2) and the source of the device under test (DUT1).

2. A method for testing the avalanche energy of a power device, characterized in that: The method is based on the avalanche energy test circuit of the power device as claimed in claim 1, and the method comprises the following steps: Step 1: Set the value of the on-time t1 of the device under test (DUT1), and set the pulse width and duty cycle of the pulse driving signal of the first pulse signal generator during the first single-pulse avalanche energy test; Step 2: Turn on the current oscillation suppression circuit and turn off the constant current source circuit; the first pulse signal generator (V G ) is sent out, and the device under test (DUT1) is turned on; the current flowing through the device under test (DUT1) gradually increases to the set value at a constant rate and charges the inductor (L); Step 3: First pulse signal generator (V G ) reaches t1, the pulse drive signal stops, the device under test (DUT1) is turned off, and the device under test (DUT1) enters the avalanche state. The avalanche duration is t av ; Step 4: After the avalanche of the device under test (DUT1) ends, the normally closed switch (Q2) opens and the normally open switch (Q1) opens; Step 5: 10 μs after the avalanche of the device under test (DUT1) ends, turn on the second pulse signal generator to output a pulse drive signal, so that the constant current source circuit emits a constant current of 10 mA, and tests the parasitic diode voltage drop inside the device under test (DUT1); use the parasitic diode voltage drop inside the device under test (DUT1) as a temperature-sensitive parameter, and monitor the time t for the junction temperature of the device under test (DUT1) to recover to room temperature after the avalanche ends by using the temperature-sensitive electrical parameter method. i ; Step 6: The process from step 2 to step 5 is a single pulse avalanche energy test process. The duration of a single pulse avalanche energy test is T S : T S =t1+t av +t i +10 Where t1 is the turn-on time of the device under test (DUT1), t av is the avalanche duration of the device under test (DUT1), t i It is the time it takes for the junction temperature of the device under test (DUT1) to recover to normal temperature after the avalanche energy test is completed; Elapsed time T S After that, the device under test (DUT1) has returned to normal temperature. S As the pulse period of repetitive pulse avalanche energy test; t1 / T S As the optimal duty cycle D of the repetitive pulse, the first pulse signal generator (V G ) a pulse driving signal is sent out with an optimal duty cycle D, 80% of the maximum avalanche energy value of the device under test (DUT1) is used as the test condition for repeated pulse avalanche energy test, and the process of single pulse avalanche energy test is repeated continuously until the device under test (DUT1) is damaged; The number of repeated pulse avalanche tests that the device under test withstands when it is damaged is the service life of the device under the current test conditions.

3. The avalanche energy testing method for a power device according to claim 2, characterized in that: The on-time t1 of the device under test (DUT1) is set as: Among them, I p is the current value passing through the device under test, I p The value range of V is between the rated continuous drain current value in the device manual of the device under test and the maximum avalanche current value of its single pulse avalanche energy test; DD is the output voltage of the DC power supply VDD, V DD The value can be set to 50V according to the common test conditions of SiC MOSFET manufacturers on the market; L0 is the inductance value of the inductor L; wherein, the method for determining the maximum avalanche current of the single-pulse avalanche energy test is as follows: first, the rated continuous drain current value in the device manual of the device to be tested is used to calculate the device conduction time during the first single-pulse avalanche energy test, that is, the pulse width of the pulse signal; during the second single-pulse avalanche energy test, the device conduction time is increased by 10μs; and so on, the device conduction time is gradually increased with a gradient of 10μs until it is damaged, and the maximum avalanche current value is obtained; the single-pulse avalanche energy before the device to be tested is damaged is taken as the maximum avalanche energy value of the device to be tested.

4. The avalanche energy testing method for a power device according to claim 2, characterized in that: Avalanche duration t av The solution is to perform transient analysis on the conventional non-clamped inductive switch test circuit in the on state, and the equations are as follows: In this formula, V DD is the output voltage of the DC power supply (VDD), L0 is the inductance value of the inductor (L), V BR(DS) is the avalanche voltage, R L is the parasitic resistance value of the inductor (L), i (t) is the current value flowing through the device under test (DUT1); the initial value t = 0 when the device under test (DUT1) enters the avalanche state and i (t) =I L =I ds Solving the state equation for the boundary conditions yields: By solving the above formula, the avalanche duration is obtained as:

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