Rapid on-chip self-monitoring method for intermediate frequency baseband amplitude-frequency response of FMCW radar receiver
By using bitstream test signals containing multiple frequency components in the FMCW radar receiver for fast on-chip self-monitoring of the intermediate frequency baseband amplitude and frequency response, the problem of limited monitoring time and frequency points in the prior art is solved, and the problem of the monitoring is limited, thus realizing that Fast and flexible response characteristic monitoring and calibration, improving chip performance stability.
Patent Information
- Application Number
- CN202411654415.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2024-12-27
AI Technical Summary
In existing FMCW radar receivers, the monitoring and calibration process of the mid-frequency baseband amplitude and frequency response is long, resulting in insufficient chip performance stability and high calibration costs, and the number of test frequency points is limited.
A fast on-chip self-monitoring method is adopted to generate a bitstream test signal containing multiple frequency components, inject an intermediate frequency/analog baseband processing module, and obtain the fundamental frequency amplitude value of multiple frequency points by using the primary frequency domain conversion, and directly use the on-chip clock. Signal and single-bit digital-to-analog converters reduce hardware resource requirements and enable fast response feature monitoring.
Achieve rapid response characteristic monitoring of the intermediate frequency/analog baseband processing module, reducing overall time-consuming, reducing hardware resource requirements, improving flexibility and adjustability, and enabling testing more frequencies within limited on-chip self-monitoring time point.
Smart Images
Figure CN119199778A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of FMCW radars, and in particular to a fast on-chip self-monitoring method for an intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver. Background Art
[0002] FMCW radar technology is an important radar system, which is widely used in various distance and speed measurement scenarios, such as automobile anti-collision systems and drone ranging. Its specific working process is as follows: the transmitting part amplifies the chirp signal generated by the frequency synthesizer to the appropriate power through the power amplifier, and then transmits the signal into space through the antenna; the antenna receives the signal reflected from the target and enhances the signal through the low-noise amplifier, and then mixes it with the current transmitting signal through the mixer. After mixing, the high-frequency component is filtered out through the intermediate frequency / analog baseband processing to obtain the beat frequency signal, and after appropriate signal strength adjustment, it is converted into a digital beat frequency signal through the analog-to-digital converter and sent to the subsequent signal processing module for analysis and extraction of target information.
[0003] However, due to defects and errors in chip manufacturing, ambient temperature during operation and other factors, the actual response characteristics of the circuit processing module (such as filter passband gain, cutoff frequency, etc.) deviate from the design expectations, reducing the quality of the beat frequency signal. In order to ensure the quality of the obtained beat frequency signal, it is necessary to ensure the accuracy of the filter response characteristics. Therefore, it is necessary to monitor and regularly calibrate the amplitude-frequency response of the intermediate frequency / analog baseband processing module.
[0004] In order to improve the stability of chip performance and shorten the calibration cost and time, the on-chip self-monitoring and calibration functions are usually integrated inside the radar chip, such as: using the existing on-chip clock signal as the test square wave signal source to generate a square wave signal with a specific frequency and a known amplitude as a test signal, injecting it into the intermediate frequency / analog baseband processing module to obtain the digital response signal after the response signal output by the analog-to-digital converter is converted, and then converting the digital response signal into the frequency domain through digital signal processing to obtain the fundamental frequency amplitude value of the response signal; changing the frequency division ratio in turn to generate square wave test signals of different frequencies and injecting them into the intermediate frequency / analog baseband processing module to obtain the fundamental frequency amplitude values of the response signals at different frequency points; however, this method requires scanning the frequency points one by one, and when scanning the frequency points, the frequency domain conversion processing needs to be performed on each response signal obtained to obtain the fundamental frequency amplitude value corresponding to each frequency point, resulting in a long overall time consumption. Due to the limited time allowed for on-chip self-monitoring, the number of frequency points that can actually be tested is also limited. Summary of the invention
[0005] The object of the present invention is to provide a fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver to solve the above technical problems.
[0006] The purpose of the present invention can be achieved through the following technical solutions: A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver comprises the following steps: S1: Determine the frequency range of the beat frequency signal processed by the intermediate frequency / analog baseband processing module, and set the expected parameters of the intermediate frequency / analog baseband processing module, wherein the expected parameters include passband gain, high-pass cutoff frequency, low-pass cutoff frequency, and low-pass filter stopband attenuation; S2: Determine a preset number of test frequency points, wherein the test frequency points include a passband frequency point, a high-pass cutoff frequency point, a low-pass cutoff frequency point, and a frequency point twice the low-pass cutoff frequency; Setting the frequency division ratios corresponding to the test frequency points, dividing the frequency of an existing clock signal on a chip to obtain square wave signals with known amplitudes corresponding to the test frequency points, and generating a bit stream test signal with known amplitudes that simultaneously includes frequency components corresponding to all the test frequency points based on the square wave signals with known amplitudes; During on-chip self-monitoring, injecting the bit stream test signal into the intermediate frequency / analog baseband processing module to obtain a response signal output by the intermediate frequency / analog baseband processing module, converting the response signal into a digital response signal, and converting the digital response signal into the frequency domain to obtain a fundamental frequency amplitude value of the response signal corresponding to the test frequency point; S3: Determine whether the intermediate frequency / analog baseband processing module meets expectations based on the baseband amplitude value.
[0007] As a further solution of the present invention: in the step S3, the process of determining whether the intermediate frequency / analog baseband processing module meets the expectations based on the baseband amplitude value specifically includes: Determine the actual passband gain based on the fundamental frequency amplitude value of the passband frequency point, and when the difference between the actual passband gain and the passband gain in the expected parameter is greater than a preset first threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; Determine the fundamental frequency amplitude value of the high-pass cutoff frequency point based on the fundamental frequency amplitude value of the passband frequency point and the preset amplitude attenuation value, determine the difference between the actual fundamental frequency amplitude value of the high-pass cutoff frequency point and the expected fundamental frequency amplitude value of the high-pass cutoff frequency point, and when the difference is greater than or equal to a preset second threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; Determine the fundamental frequency amplitude value of the low-pass cut-off frequency point based on the fundamental frequency amplitude value of the passband frequency point and the preset amplitude attenuation value, determine the difference between the actual fundamental frequency amplitude value of the low-pass cut-off frequency point and the expected fundamental frequency amplitude value of the low-pass cut-off frequency point, and when the difference is greater than or equal to a preset third threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; The actual low-pass filter stopband attenuation is determined based on the difference between the fundamental frequency amplitude value at the low-pass cutoff frequency point and the fundamental frequency amplitude value at the double frequency point of the low-pass cutoff frequency. When the difference between the actual low-pass filter stopband attenuation and the expected low-pass filter stopband attenuation is greater than a preset fourth threshold, an error signal is fed back and the circuit is calibrated within a preset calibration period.
[0008] As a further solution of the present invention: the amplitude attenuation value is determined based on the intermediate frequency / analog baseband processing module.
[0009] As a further solution of the present invention: in the step S2, the test frequency points are not odd harmonic frequencies of each other.
[0010] As a further solution of the present invention: in the step S2, the number of the frequency division ratios is the same as the number of the test frequency points.
[0011] As a further solution of the present invention: in the step S2, a clock signal already on a chip is divided based on a frequency divider.
[0012] As a further solution of the present invention: in step S2, the process of obtaining the bit stream test signal based on the square wave signal with known amplitude specifically includes: A square wave signal with known amplitude is interleaved based on a multiplexer and sent to a single-bit digital-to-analog converter, which obtains a bit stream test signal.
[0013] As a further solution of the present invention: in the step S3, another method for determining whether the intermediate frequency / analog baseband processing module meets expectations based on the fundamental frequency amplitude value specifically includes: A clock signal already on the chip is passed through a frequency divider and a single-bit digital-to-analog converter to generate a square wave signal with a preset frequency and a known amplitude as a test signal A, wherein the frequency value of the test signal A is a passband frequency point; During on-chip self-monitoring, the test signal A is injected into the intermediate frequency / analog baseband processing module to obtain a digital response signal C after the response signal B output by the intermediate frequency / analog baseband processing module is converted by an analog-to-digital converter, and then the digital response signal C is converted into the frequency domain by digital signal processing, and the fundamental frequency amplitude value and multiple odd harmonic amplitude values of the passband frequency point of the digital response signal C are obtained, and the fundamental frequency amplitude value of the test frequency point is determined according to the multiple odd harmonic amplitude values; Based on the baseband amplitude value, it is determined whether the intermediate frequency / analog baseband processing module meets expectations.
[0014] Beneficial effects of the present invention: In the present invention, 1) the test signal contains multiple frequency components at the same time, so there is no need to scan the frequency points one by one, and there is no need to perform frequency domain conversion of the response signal one by one. The amplitude-frequency response of multiple frequency points can be obtained at one time, and the rapid on-chip self-monitoring of the response characteristics of the module can be realized; the rapid on-chip self-monitoring of the intermediate frequency / analog baseband processing module is realized, because a bit stream test signal containing multiple specific frequency components is injected into the module to be monitored, and the baseband amplitude values of multiple frequency points can be obtained at the same time through only one frequency domain conversion process, and the amplitude-frequency response of the intermediate frequency / analog baseband processing module can be obtained at one time; There is no need to scan the frequency points one by one, and there is no need to perform frequency domain conversion processing on the response signal of each frequency point separately, so it takes less time; 2) The on-chip clock signal is directly used to generate the required test signal, so there is no need to add an additional test signal source on the chip, and the on-chip clock signal can be directly used to avoid additional hardware resource requirements; 3) And because the injected test signal is a bit stream signal, there is no need for a multi-bit digital-to-analog converter, and only a single-bit digital-to-analog converter can be used, reducing additional hardware resource requirements; 4) Based on the interleaved transmission method and other methods to generate the above-mentioned bit stream test signal, it only needs to add a multiplexer to achieve it, without the need for Δ∑ Modulation has low implementation complexity and small requirements for additional hardware resources. Moreover, the number and frequency values of the required monitoring frequency points can be flexibly adjusted according to actual monitoring requirements, and the fundamental frequency amplitude values of all required monitoring frequency points can be flexibly obtained. Specifically, the required test signal is directly generated by using the on-chip clock signal, and there is no need to add an additional test signal source on the chip. Moreover, the injected test signal is a bit stream signal, which only requires a single-bit analog-to-digital converter and no multi-bit analog-to-digital converter. Furthermore, the use of methods such as the interleaved transmission method to generate the above-mentioned bit stream test signal only requires the addition of a multiplexer, without the need for Δ∑ Modulation; and generally only the amplitude response of four frequency points is needed to evaluate whether the response characteristics of the intermediate frequency / analog baseband processing module meet the expected design (the specific selection can be made according to the actual situation). If the interleaved transmission method is used to implement it, only four frequency dividers and one 4-way multiplexer are added, so it will not increase the hardware resource requirements too much; according to the actual monitoring needs, the number of frequency points and frequency values contained in the bit stream test signal injected into the module to be monitored can be flexibly adjusted, and the fundamental frequency amplitude values of all required frequency points of the response signal can be directly obtained at the same time. The number of frequency points is related to the number of channels for interleaved transmission, and more frequency points can also be tested at one time. Therefore, compared with the method of scanning frequency points one by one, the number of frequency points that can be tested is not constrained by the on-chip self-monitoring time, which is relatively more flexible; the frequency value is obtained according to the set division ratio, and can be flexibly set to the required test frequency value.
[0015] The present invention can obtain the fundamental frequency amplitude values of multiple frequency points at the same time, reduce the overall time consumption, require little additional hardware resources, and has high flexibility. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The present invention will be further described below in conjunction with the accompanying drawings.
[0017] Figure 1 The invention is a flow chart of a fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver. DETAILED DESCRIPTION
[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0019] See also Figure 1 As shown, the present invention is a fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver, comprising the following steps: S1: Determine the frequency range of the beat frequency signal processed by the intermediate frequency / analog baseband processing module, and set the expected parameters of the intermediate frequency / analog baseband processing module, wherein the expected parameters include passband gain, high-pass cutoff frequency, low-pass cutoff frequency, and low-pass filter stopband attenuation; S2: Determine a preset number of test frequency points, wherein the test frequency points include a passband frequency point, a high-pass cutoff frequency point, a low-pass cutoff frequency point, and a frequency point twice the low-pass cutoff frequency; Setting the frequency division ratios corresponding to the test frequency points, dividing the frequency of an existing clock signal on a chip to obtain square wave signals with known amplitudes corresponding to the test frequency points, and generating a bit stream test signal with known amplitudes that simultaneously includes frequency components corresponding to all the test frequency points based on the square wave signals with known amplitudes; During on-chip self-monitoring, injecting the bit stream test signal into the intermediate frequency / analog baseband processing module to obtain a response signal output by the intermediate frequency / analog baseband processing module, converting the response signal into a digital response signal, and converting the digital response signal into the frequency domain to obtain a fundamental frequency amplitude value of the response signal corresponding to the test frequency point; S3: Determine whether the intermediate frequency / analog baseband processing module meets expectations based on the baseband amplitude value.
[0020] It should be noted that 1) the test signal contains multiple frequency components at the same time, so there is no need to scan the frequency points one by one, and there is no need to perform frequency domain conversion of the response signal one by one. The amplitude-frequency response of multiple frequency points can be obtained at one time, realizing fast on-chip self-monitoring of the response characteristics of the module; fast on-chip self-monitoring of the intermediate frequency / analog baseband processing module is realized, because a bit stream test signal containing multiple specific frequency components is injected into the module to be monitored. Only one frequency domain conversion process is needed to obtain the baseband amplitude values of multiple frequency points at the same time, and the amplitude-frequency response of the intermediate frequency / analog baseband processing module is obtained at one time; no need Scanning frequency points one by one, there is no need to perform frequency domain conversion processing on the response signal of each frequency point separately, so it takes less time; 2) Directly use the on-chip clock signal to generate the required test signal, so there is no need to add an additional test signal source on the chip, and the on-chip clock signal can be directly used to avoid additional hardware resource requirements; and because the injected test signal is a bit stream signal, there is no need for a multi-bit digital-to-analog converter, and only a single-bit digital-to-analog converter can be used, reducing additional hardware resource requirements; 4) Based on the interleaved transmission method and other methods to generate the above-mentioned bit stream test signal, it only needs to add a multiplexer to achieve it, without the need for Δ∑ Modulation has low implementation complexity and small requirements for additional hardware resources. Moreover, the number and frequency values of the required monitoring frequency points can be flexibly adjusted according to actual monitoring requirements, and the fundamental frequency amplitude values of all required monitoring frequency points can be flexibly obtained. Specifically, the required test signal is directly generated by using the on-chip clock signal, and there is no need to add an additional test signal source on the chip. Moreover, the injected test signal is a bit stream signal, which only requires a single-bit analog-to-digital converter and no multi-bit analog-to-digital converter. Furthermore, the use of methods such as the interleaved transmission method to generate the above-mentioned bit stream test signal only requires the addition of a multiplexer, without the need for Δ∑ Modulation; and generally only the amplitude response of four frequency points is needed to evaluate whether the response characteristics of the intermediate frequency / analog baseband processing module meet the expected design (the specific selection can be made according to the actual situation). If the interleaved transmission method is used to implement it, only four frequency dividers and one 4-way multiplexer are added, so it will not increase the hardware resource requirements too much; according to the actual monitoring needs, the number of frequency points and frequency values contained in the bit stream test signal injected into the module to be monitored can be flexibly adjusted, and the fundamental frequency amplitude values of all required frequency points of the response signal can be directly obtained at the same time. The number of frequency points is related to the number of channels for interleaved transmission, and more frequency points can also be tested at one time. Therefore, compared with the method of scanning frequency points one by one, the number of frequency points that can be tested is not restricted by the test time, which is relatively more flexible; the frequency value is obtained according to the set division ratio, and can be flexibly set to the required test frequency value; The passband frequency point can be selected as a frequency within the expected passband, the high-pass cutoff frequency point is the high-pass cutoff frequency of the expected parameter, and the low-pass cutoff frequency point is the low-pass cutoff frequency of the expected parameter. The high-pass cutoff frequency point or the low-pass cutoff frequency point in the expected response signal will have a 3dB amplitude attenuation compared to the passband frequency point (if the design is not a 3dB amplitude attenuation, it can also be other values as long as it is consistent with the design expectations); For different actual monitoring needs, the requirements for test frequency points are different. For example, (1) if you only need to monitor the passband gain and high-pass filtering characteristics of the above-mentioned intermediate frequency / analog baseband processing module, generally only two test frequency points are required: a) passband frequency point; b) high-pass cutoff frequency point; by comparing the fundamental frequency amplitude values of these two frequency points in the response signal, it can be determined whether the actual response characteristics are consistent with the design expectations; (2) if you only need to monitor the passband gain and low-pass filtering characteristics of the above-mentioned intermediate frequency / analog baseband processing module, generally only two test frequency points are required: a) passband frequency point; b) low-pass cutoff frequency point; by comparing the fundamental frequency amplitude values of these two frequency points in the response signal, it can be determined whether the actual response characteristics are consistent with the design expectations; (3) if you want to monitor the passband gain and high-pass and low-pass filtering characteristics of the above-mentioned intermediate frequency / analog baseband processing module at the same time, generally three test frequency points are required: a) passband frequency point; b) high-pass cutoff frequency point; c) low-pass cutoff frequency point ; By comparing the fundamental frequency amplitude values of the passband frequency point and the high-pass cutoff frequency point in the response signal, and the fundamental frequency amplitude values of the passband frequency point and the low-pass cutoff frequency point, it can be determined whether the actual response characteristics are consistent with the design expectations; (4) If it is also necessary to monitor the low-pass filter stopband attenuation of the above-mentioned intermediate frequency / analog baseband processing module, an additional frequency point needs to be added, so generally four frequency points need to be monitored: a) passband frequency point; b) high-pass cutoff frequency point; c) low-pass cutoff frequency point; d) twice the low-pass cutoff frequency point; By comparing the fundamental frequency amplitude values of the passband frequency point and the high-pass cutoff frequency point in the response signal, and the fundamental frequency amplitude values of the passband frequency point and the low-pass cutoff frequency point and twice the low-pass cutoff frequency point, it can be determined whether the actual response characteristics are consistent with the design expectations; (5) If a more accurate passband gain is required, multiple passband frequency points can also be tested, and the average value of the fundamental frequency amplitude values of these passband frequency points in the response signal is calculated as the passband gain value.
[0021] In another preferred embodiment of the present invention, in step S3, the process of determining whether the intermediate frequency / analog baseband processing module meets expectations based on the baseband amplitude value specifically includes: Determine the actual passband gain based on the fundamental frequency amplitude value of the passband frequency point, and when the difference between the actual passband gain and the passband gain in the expected parameter is greater than a preset first threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; Determine the fundamental frequency amplitude value of the high-pass cutoff frequency point based on the fundamental frequency amplitude value of the passband frequency point and the preset amplitude attenuation value, determine the difference between the actual fundamental frequency amplitude value of the high-pass cutoff frequency point and the expected fundamental frequency amplitude value of the high-pass cutoff frequency point, and when the difference is greater than or equal to a preset second threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; Determine the fundamental frequency amplitude value of the low-pass cut-off frequency point based on the fundamental frequency amplitude value of the passband frequency point and the preset amplitude attenuation value, determine the difference between the actual fundamental frequency amplitude value of the low-pass cut-off frequency point and the expected fundamental frequency amplitude value of the low-pass cut-off frequency point, and when the difference is greater than or equal to a preset third threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; The actual low-pass filter stopband attenuation is determined based on the difference between the fundamental frequency amplitude value at the low-pass cutoff frequency point and the fundamental frequency amplitude value at the double frequency point of the low-pass cutoff frequency. When the difference between the actual low-pass filter stopband attenuation and the expected low-pass filter stopband attenuation is greater than a preset fourth threshold, an error signal is fed back and the circuit is calibrated within a preset calibration period.
[0022] In another preferred embodiment of the present invention, the amplitude attenuation value is determined based on an intermediate frequency / analog baseband processing module.
[0023] It should be noted that if the design is not an amplitude attenuation of 3dB, it can also be other values as long as it is consistent with the design expectations.
[0024] In another preferred embodiment of the present invention, in the step S2, the test frequency points are not odd harmonic frequencies of each other.
[0025] In another preferred embodiment of the present invention, in step S2, the number of the frequency division ratios is the same as the number of the test frequency points.
[0026] In another preferred embodiment of the present invention, in step S2, a clock signal already on a chip is divided based on a frequency divider.
[0027] In another preferred embodiment of the present invention, in step S2, the process of obtaining a bit stream test signal based on a square wave signal with a known amplitude specifically includes: A square wave signal with known amplitude is interleaved based on a multiplexer and sent to a single-bit digital-to-analog converter, which obtains a bit stream test signal.
[0028] In another preferred embodiment of the present invention, in step S3, another method for determining whether the intermediate frequency / analog baseband processing module meets expectations based on the baseband amplitude value specifically includes: A clock signal already on the chip is passed through a frequency divider and a single-bit digital-to-analog converter to generate a square wave signal with a preset frequency and a known amplitude as a test signal A, wherein the frequency value of the test signal A is a passband frequency point; During the self-monitoring period, the test signal A is injected into the intermediate frequency / analog baseband processing module to obtain a digital response signal C after the response signal B output by the intermediate frequency / analog baseband processing module is converted by an analog-to-digital converter, and then the digital response signal C is converted into the frequency domain by digital signal processing, and the fundamental frequency amplitude value and multiple odd harmonic amplitude values of the passband frequency point of the digital response signal C are obtained, and the fundamental frequency amplitude value of the test frequency point is determined according to the multiple odd harmonic amplitude values; Based on the baseband amplitude value, it is determined whether the intermediate frequency / analog baseband processing module meets expectations.
[0029] It is worth noting that this method, by injecting a single-frequency square wave test signal, only needs to analyze the fundamental frequency amplitude value and its odd harmonic amplitude value of the response signal corresponding to one frequency point, and then infer the fundamental frequency amplitude value of the corresponding frequency point based on the odd harmonic amplitude value, so that only one frequency domain conversion process is required to obtain the amplitude-frequency response of the intermediate frequency / analog baseband processing module at one time, which can also reduce time consumption and realize fast on-chip self-monitoring of the amplitude-frequency response of the module. However, the fundamental frequency amplitude value of the corresponding frequency point obtained by inferring the odd harmonic amplitude value has low accuracy, and it is not flexible to obtain the fundamental frequency amplitude value of the frequency point other than the odd harmonic frequency. This method is suitable for occasions with low requirements for accuracy and flexibility in selecting test frequency points, and can further reduce the implementation complexity. Another method is to directly obtain the fundamental frequency amplitude value of each frequency point, without having to infer the fundamental frequency amplitude value of the corresponding frequency point through the odd harmonic amplitude value. The fundamental frequency amplitude values of all frequency points that need to be tested can be obtained more accurately and flexibly, which is suitable for occasions with high requirements for accuracy and flexibility. In addition, the other method can flexibly set the required test frequency value. Therefore, compared with the method of using the odd harmonic amplitude value of one frequency point to infer the fundamental frequency amplitude value of the remaining frequency points in the variant scheme, the frequency value of the frequency point that can be tested by the other method is not constrained by the specific frequency value of the odd harmonic, and is relatively flexible. If the actual monitoring needs have lower requirements on accuracy and flexibility in selecting test frequency points, the above method can be used to achieve fast on-chip self-monitoring of the amplitude-frequency response of the module with lower implementation complexity.
[0030] The above is a detailed description of an embodiment of the present invention, but the content is only a preferred embodiment of the present invention and cannot be considered to limit the scope of implementation of the present invention. All equivalent changes and improvements made within the scope of the present invention should still fall within the scope of the patent coverage of the present invention.
Claims
1. A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver, comprising an intermediate frequency / analog baseband processing module, characterized in that: The following steps are involved: S1: Determine the frequency range of the beat frequency signal processed by the intermediate frequency / analog baseband processing module, and set the expected parameters of the intermediate frequency / analog baseband processing module, wherein the expected parameters include passband gain, high-pass cutoff frequency, low-pass cutoff frequency, and low-pass filter stopband attenuation; S2: Determine a preset number of test frequency points, wherein the test frequency points include a passband frequency point, a high-pass cutoff frequency point, a low-pass cutoff frequency point, and a frequency point twice the low-pass cutoff frequency; Setting the frequency division ratios corresponding to the test frequency points, dividing the frequency of an existing clock signal on a chip to obtain square wave signals with known amplitudes corresponding to the test frequency points, and generating a bit stream test signal with known amplitudes that simultaneously includes frequency components corresponding to all the test frequency points based on the square wave signals with known amplitudes; During on-chip self-monitoring, injecting the bit stream test signal into the intermediate frequency / analog baseband processing module to obtain a response signal output by the intermediate frequency / analog baseband processing module, converting the response signal into a digital response signal, and converting the digital response signal into the frequency domain to obtain a fundamental frequency amplitude value of the response signal corresponding to the test frequency point; S3: Determine whether the intermediate frequency / analog baseband processing module meets expectations based on the baseband amplitude value.
2. A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver according to claim 1, characterized in that: In step S3, the process of determining whether the intermediate frequency / analog baseband processing module meets expectations based on the baseband amplitude value specifically includes: Determine the actual passband gain based on the fundamental frequency amplitude value of the passband frequency point, and when the difference between the actual passband gain and the passband gain in the expected parameter is greater than a preset first threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; Determine the fundamental frequency amplitude value of the high-pass cutoff frequency point based on the fundamental frequency amplitude value of the passband frequency point and the preset amplitude attenuation value, determine the difference between the actual fundamental frequency amplitude value of the high-pass cutoff frequency point and the expected fundamental frequency amplitude value of the high-pass cutoff frequency point, and when the difference is greater than or equal to a preset second threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; Determine the fundamental frequency amplitude value of the low-pass cut-off frequency point based on the fundamental frequency amplitude value of the passband frequency point and the preset amplitude attenuation value, determine the difference between the actual fundamental frequency amplitude value of the low-pass cut-off frequency point and the expected fundamental frequency amplitude value of the low-pass cut-off frequency point, and when the difference is greater than or equal to a preset third threshold, feed back an error signal, and calibrate the circuit within a preset calibration period; The actual low-pass filter stopband attenuation is determined based on the difference between the fundamental frequency amplitude value at the low-pass cutoff frequency point and the fundamental frequency amplitude value at the double frequency point of the low-pass cutoff frequency. When the difference between the actual low-pass filter stopband attenuation and the expected low-pass filter stopband attenuation is greater than a preset fourth threshold, an error signal is fed back and the circuit is calibrated within a preset calibration period.
3. A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver according to claim 1, characterized in that: The amplitude attenuation value is determined based on the intermediate frequency / analog baseband processing module.
4. A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver according to claim 1, characterized in that: In the step S2, the test frequency points are not odd harmonic frequencies of each other.
5. A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver according to claim 1, characterized in that: In the step S2, the number of the frequency division ratios is the same as the number of the test frequency points.
6. A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver according to claim 1, characterized in that: In the step S2, a clock signal already on a chip is divided based on a frequency divider.
7. A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver according to claim 1, characterized in that: In step S2, the process of obtaining a bit stream test signal based on a square wave signal with a known amplitude specifically includes: A square wave signal with known amplitude is interleaved based on a multiplexer and sent to a single-bit digital-to-analog converter, which obtains a bit stream test signal.
8. A fast on-chip self-monitoring method for the intermediate frequency baseband amplitude-frequency response of an FMCW radar receiver according to claim 1, characterized in that: In step S3, another method for determining whether the intermediate frequency / analog baseband processing module meets expectations based on the baseband amplitude value specifically includes: A clock signal already on the chip is passed through a frequency divider and a single-bit digital-to-analog converter to generate a square wave signal with a preset frequency and a known amplitude as a test signal A, wherein the frequency value of the test signal A is a passband frequency point; During on-chip self-monitoring, the test signal A is injected into the intermediate frequency / analog baseband processing module to obtain a digital response signal C after the response signal B output by the intermediate frequency / analog baseband processing module is converted by an analog-to-digital converter, and then the digital response signal C is converted into the frequency domain by digital signal processing, and the fundamental frequency amplitude value and multiple odd harmonic amplitude values of the passband frequency point of the digital response signal C are obtained, and the fundamental frequency amplitude value of the test frequency point is determined according to the multiple odd harmonic amplitude values; Based on the baseband amplitude value, it is determined whether the intermediate frequency / analog baseband processing module meets expectations.