Test data access method, test data storage method and test device

Abstract

The invention relates to a test data access method, a test data storage method and a test device.The test data access method comprises the steps that a first storage unit is read, a data storage distribution view is obtained, the data storage distribution view comprises a plurality of point locations, and the point locations correspond to storage addresses of the first storage unit one to one; the test data stored in each storage address in the first storage unit is associated with the data stored in a part of multiple storage addresses in the tested equipment; determining a target storage address range of the second storage unit according to the distribution condition of target point locations in the data storage distribution view; according to the target storage address range of the second storage unit, the test data stored in the second storage unit is read, and the test data stored in each storage address in the second storage unit is associated with the data stored in each storage address in the tested device. The problem of low access efficiency of the test data of the tested equipment is solved, and the access efficiency of the test data is improved.

Description

Technical Field

[0001] The present application relates to the field of test data processing, and in particular to a test data access method, a test data storage method and a test device. Background Art

[0002] In the traditional device testing method, when testing the storage performance of the device under test, the device under test is first tested to obtain the test data of the device under test, and then the test data is stored in a storage unit for post-processing. The test data may contain fault data. However, when accessing the fault data of the device under test, it is necessary to read all the data stored in the storage unit, which has low access efficiency.

[0003] With regard to the problem of low test data access efficiency of the device under test in the related art, no effective solution has been proposed yet. Summary of the invention

[0004] In this embodiment, a test data access method, a test data storage method and a test device are provided to solve the problem of low test data access efficiency of a device under test in the related art.

[0005] In a first aspect, a test data access method is provided in this embodiment, including:

[0006] Reading the first storage unit to obtain a data storage distribution view, wherein the data storage distribution view includes a plurality of points, the points correspond to storage addresses of the first storage unit one by one, and the test data stored in each storage address in the first storage unit is associated with the data stored in some of the plurality of storage addresses in the device under test;

[0007] Determining a target storage address range of a second storage unit according to a distribution of target points in the data storage distribution view;

[0008] The test data stored in the second storage unit is read according to the target storage address range of the second storage unit, wherein the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are correlated with each other.

[0009] In some of the embodiments, determining the target storage address range of the second storage unit according to the distribution of the target points in the data storage distribution view includes:

[0010] Determining a storage address of target test data in the first storage unit according to the distribution of target points in the data storage distribution view;

[0011] According to the storage address mapping relationship between the first storage unit and the second storage unit, the storage address of the target test data in the first storage unit is mapped to the second storage unit to obtain the target storage address range of the second storage unit.

[0012] In some of the embodiments, reading the first storage unit to obtain the data storage distribution view includes:

[0013] Obtaining access parameters, wherein the access parameters include a first access address mapping and a first access address range;

[0014] According to the first access address mapping, mapping the storage address of the device under test specified in the first access address range to the first storage unit to obtain a target storage address of the first storage unit;

[0015] The test data stored in the first storage unit is read according to the target storage address of the first storage unit to obtain the data storage distribution view.

[0016] In some embodiments, reading the test data stored in the second storage unit according to the target storage address range of the second storage unit includes:

[0017] Obtaining access parameters, wherein the access parameters include access data bits;

[0018] The test data stored at the target storage address in the second storage unit is read according to the access data bit.

[0019] In some embodiments, after reading the test data stored in the second storage unit according to the target storage address range of the second storage unit, the method further includes:

[0020] Obtaining access parameters, wherein the access parameters include a regular access mode or a special access mode, the regular access mode includes outputting the original test data read, and the special access mode includes outputting the original test data read after performing a logical operation;

[0021] The test data read from the second storage unit is output according to the normal access mode or the special access mode.

[0022] In some of the embodiments, the device under test includes a storage semiconductor, the storage semiconductor is used to store data, and the test data stored in the first storage unit or the second storage unit includes data obtained by testing the storage semiconductor.

[0023] In a second aspect, a test data storage method is provided in this embodiment, including:

[0024] Obtain test data of the device under test;

[0025] Storing the test data in a first storage unit, wherein the first storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the first storage unit is associated with the data stored in some of the plurality of storage addresses in the device under test;

[0026] The test data is stored in a second storage unit, wherein the second storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are associated with each other.

[0027] In some embodiments, storing the test data in a first storage unit includes:

[0028] Acquire configuration parameters, wherein the configuration parameters include a first storage address mapping and a first storage data mapping;

[0029] Mapping the storage address of the data of the device under test to the storage address of the first storage unit according to the first storage address mapping;

[0030] According to the first storage data mapping, mapping the data bits of the device under test to the data bits of the first storage unit; or,

[0031] Storing the test data in a first storage unit includes:

[0032] Acquire configuration parameters, wherein the configuration parameters include a regular processing mode or a flag processing mode, the regular processing mode includes accumulating the test data, and the flag processing mode includes accumulating the test data with valid flags;

[0033] The test data is processed according to the conventional processing mode or the flag processing mode to obtain an accumulation result, and the accumulated result obtained by the processing is stored in the first storage unit.

[0034] In some embodiments, storing the test data in a first storage unit includes:

[0035] Reading, in the first storage unit, historical data stored at a storage address corresponding to the test data;

[0036] Comparing the accumulated result with the historical data;

[0037] If the accumulated result is different from the historical data, the accumulated result is stored in the first storage unit; if the accumulated result is the same as the historical data, the accumulated result is not stored in the first storage unit.

[0038] In some embodiments, storing the test data in a second storage unit includes:

[0039] Acquire configuration parameters, wherein the configuration parameters include a second storage address mapping and a second storage data mapping;

[0040] According to the second storage address mapping, mapping the storage address of the data of the device under test to the storage address of the second storage unit;

[0041] According to the second storage data mapping, mapping the data bits of the device under test to the data bits of the second storage unit; or,

[0042] Acquire configuration parameters, wherein the configuration parameters include a regular processing mode, a mask processing mode, or a flag processing mode, the regular processing mode includes accumulating the test data, the mask processing mode includes performing logical processing on the test data and mask data corresponding to the storage address before accumulating, and the flag processing mode includes accumulating test data with valid flag bits;

[0043] The test data is processed according to the conventional processing mode, the mask processing mode or the flag processing mode to obtain an accumulation result, and the accumulated result obtained by the processing is stored in the second storage unit.

[0044] In some embodiments, storing the test data in a second storage unit includes:

[0045] reading, in the second storage unit, historical data stored at a storage address corresponding to the test data;

[0046] Comparing the accumulated result with the historical data;

[0047] If the accumulated result is different from the historical data, the accumulated result is stored in the second storage unit; if the accumulated result is the same as the historical data, the accumulated result is not stored in the second storage unit.

[0048] In a third aspect, a test device is provided in this embodiment, including: a control module, a first storage unit and a second storage unit, wherein the first storage unit and the second storage unit are respectively connected to the control module; wherein:

[0049] The first storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the first storage unit and the data stored in some of the plurality of storage addresses in the device under test are mutually associated;

[0050] The second storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are associated with each other;

[0051] The control module is used to execute the method according to any one of claims 1 to 10.

[0052] In some embodiments, the control module includes: a control unit, a first processing unit and a second processing unit, wherein the first processing unit and the second processing unit are respectively connected to the control unit, the first processing unit and the second processing unit are respectively connected to the first storage unit, and the first processing unit and the second processing unit are respectively connected to the second storage unit; wherein,

[0053] The control unit is used to send access parameters and / or access instructions to the first processing unit, and the first processing unit is used to receive the access parameters and / or access instructions and execute the test data access method described in the first aspect above;

[0054] The control unit is used to send configuration parameters and / or configuration instructions to the second processing unit, and the second processing unit is used to receive the configuration parameters and / or configuration instructions and execute the test data storage method described in the second aspect above.

[0055] Compared with the related art, the test data access method, test data storage method and test device provided in this embodiment, wherein the test data access method includes: reading the first storage unit to obtain a data storage distribution view, wherein the data storage distribution view includes multiple points, the points correspond to the storage addresses of the first storage unit one by one, and the test data stored in each storage address in the first storage unit and the data stored in some of the multiple storage addresses in the device under test are mutually related; according to the distribution of the target points in the data storage distribution view, the target storage address range of the second storage unit is determined; according to the target storage address range of the second storage unit, the test data stored in the second storage unit is read, wherein the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are mutually related. Through this application, the problem of low test data access efficiency of the device under test in the related art is solved, and the access efficiency of test data is improved.

[0056] Details of one or more embodiments of the present application are set forth in the following drawings and description to make other features, objects, and advantages of the present application more readily apparent. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0058] Figure 1 is a schematic diagram of the structure of a testing device in an embodiment;

[0059] Figure 2 is a flowchart of a test data access method in an embodiment;

[0060] Figure 3 is a flow chart of a method for testing data storage in an embodiment;

[0061] Figure 4 is a schematic structural diagram of a testing device in another embodiment;

[0062] Figure 5 is a flowchart of a test data access method in another embodiment;

[0063] Figure 6 is a flow chart of a test data storage method according to another embodiment. DETAILED DESCRIPTION

[0064] In order to more clearly understand the purpose, technical solutions and advantages of the present application, the present application is described and illustrated below in conjunction with the accompanying drawings and embodiments.

[0065] Unless otherwise defined, the technical terms or scientific terms involved in this application shall have the general meaning understood by people with ordinary skills in the technical field to which this application belongs. The words "one", "a", "a", "the", "these" and the like in this application do not represent quantitative restrictions, and they can be singular or plural. The terms "include", "comprise", "have" and any variants thereof involved in this application are intended to cover non-exclusive inclusions; for example, a process, method and system, product or device comprising a series of steps or modules (units) is not limited to the listed steps or modules (units), but may include unlisted steps or modules (units), or may include other steps or modules (units) inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like involved in this application are not limited to physical or mechanical connections, but may include electrical connections, whether directly or indirectly. The "multiple" involved in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, "A and / or B" can mean: A exists alone, A and B exist at the same time, and B exists alone. Usually, the character " / " indicates that the objects associated with each other are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific ordering of the objects.

[0066] In one embodiment, a testing device is provided. Figure 1 Schematic diagram of the structure of the test device in this embodiment. Figure 1 As shown, the test device includes: a control module, a first storage unit and a second storage unit, the first storage unit and the second storage unit are respectively connected to the control module; wherein the first storage unit includes multiple storage addresses, and the test data stored in each storage address in the first storage unit and the data stored in some of the multiple storage addresses in the device under test are mutually related; the second storage unit includes multiple storage addresses, and the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are mutually related; the control module is used to execute the test data access method and / or the test data storage method.

[0067] This embodiment also provides a test data access method, which is run on Figure 1 Take the test device in as an example, Figure 2 A flow chart of the test data access method in this embodiment is shown. Figure 2 As shown, the process includes the following steps:

[0068] Step S101, reading a first storage unit to obtain a data storage distribution view, wherein the data storage distribution view includes a plurality of points, the points correspond to storage addresses of the first storage unit one by one, and the test data stored in each storage address in the first storage unit and the data stored in some of the plurality of storage addresses in the device under test are correlated with each other;

[0069] Step S102, determining a target storage address range of the second storage unit according to the distribution of the target points in the data storage distribution view;

[0070] Step S103, reading the test data stored in the second storage unit according to the target storage address range of the second storage unit, wherein the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are correlated with each other.

[0071] In this embodiment, the device under test (DUT) includes a storage semiconductor, which is used to store data. The test data stored in the first storage unit or the second storage unit includes data obtained by testing the storage semiconductor. The test data is stored in the first storage unit and the second storage unit at the same time. The first storage unit stores compressed test data with a smaller storage capacity, and the second storage unit stores uncompressed test data with a larger storage capacity. The target point is determined based on whether there is a fault or a fault ratio in the test data in the second storage unit. For example, point A corresponds to 30 consecutive storage addresses of the second storage unit. If the test data of any one of the 30 storage addresses has a fault, point A is determined to be the target point and the point is marked as 1. It can also be that the test data of more than a certain proportion (for example, 50%) of the 30 storage addresses has a fault, then point A is determined to be the target point and the point is marked as 1. When accessing test data, first read the first storage unit with a smaller capacity to obtain a data storage distribution view, and then read the second storage unit with a larger capacity. Since each point on the data storage distribution view corresponds to a number of test data in the second storage unit, when reading the second storage unit with a larger capacity, what is read is the storage address corresponding to the target point in the second storage unit, that is, only part of the storage address of the second storage unit is read, and there is no need to read all the storage addresses of the second storage unit, thereby improving the access efficiency of the test data.

[0072] In one embodiment, the control module determines the target storage address range of the second storage unit according to the distribution of the target points in the data storage distribution view, which can be achieved in the following way: the control module determines the storage address of the target test data in the first storage unit according to the distribution of the target points in the data storage distribution view; the control module maps the storage address of the target test data in the first storage unit to the second storage unit according to the storage address mapping relationship between the first storage unit and the second storage unit, so as to obtain the target storage address range of the second storage unit.

[0073] In this embodiment, the storage address mapping relationship between the first storage unit and the second storage unit can be pre-configured in the control module, and after the control module reads and obtains the data storage distribution view, the target test data is determined. The target test data includes fault data. For example, the assignment state of each point in the first storage unit can be 0 or 1, where 0 represents that the test data of the point is normal, and 1 represents that the test data of the point is faulty. Then, it is determined that all points with a value of 1 in the first storage unit have target test data, and the corresponding storage address is determined. According to the storage address mapping relationship between the first storage unit and the second storage unit, the storage address with a value of 1 in the first storage unit is mapped to the second storage unit to obtain the target storage address range of the second storage unit.

[0074] In one embodiment, the testing device includes a user operation module, which is at the software layer. The control module is connected to the user operation module. The control module determines the target storage address range of the second storage unit according to the distribution of target points in the data storage distribution view. This can be achieved in the following way: the control module sends the data storage distribution view to the user operation module, the user operation module displays the data storage distribution view, and after the user sees the data storage distribution view, the user sends an instruction to the user operation module, the user operation module sends the user instruction to the control module, and the control module determines the target storage address range of the second storage unit based on the user instruction.

[0075] In one embodiment, the control module reads the first storage unit to obtain the data storage distribution view, which can be implemented in the following manner: the control module obtains access parameters, wherein the access parameters include the first access address mapping and the first access address range; the control module maps the storage address of the device under test specified in the first access address range to the first storage unit according to the first access address mapping, and obtains the target storage address of the first storage unit; the control module reads the test data stored in the first storage unit according to the target storage address of the first storage unit, and obtains the data storage distribution view. In this embodiment, the control module can interact with the user operation module. The first access address mapping refers to the address mapping relationship between the device under test and the first storage unit. When testing the device under test, the user operation module only needs to perceive the storage address of the device under test, that is, the number of row addresses and column addresses of the device under test, without knowing the row and column conditions of the first storage unit, that is, the storage details of the test data in the first storage unit are transparent to the user operation module. When accessing the test data, the user operation module only needs to configure the first access address mapping and the first access address range of the device under test, and the control module will calculate the corresponding target storage address in the first storage unit according to the specific storage address of the device under test and the first access address mapping. The first access address range refers to the address range of the device under test, that is, the storage address range to be accessed is specified from the perspective of the device under test.

[0076] In one embodiment, the control module reads the test data stored in the second storage unit according to the target storage address range of the second storage unit, which can be achieved in the following manner: the control module obtains access parameters, wherein the access parameters include access data bits; the control module reads the test data stored at the target storage address in the second storage unit according to the access data bits. In this embodiment, the access data bits specify which data at which positions in the second storage unit need to be processed and which data at which positions need to be ignored. With such a setting, the test data to be accessed can be accurately located.

[0077] In one embodiment, after the control module reads the test data stored in the second storage unit according to the target storage address range of the second storage unit, the control module will also obtain access parameters, wherein the access parameters include a regular access mode or a special access mode, the regular access mode includes outputting the original test data read, and the special access mode includes outputting the original test data read after logical operation processing; the control module outputs the test data read from the second storage unit according to the regular access mode or the special access mode. In this embodiment, the access mode specifies what kind of processing is done on the test data to be accessed, and the access mode includes a regular access mode and a special access mode. In the regular access mode, the original test data is not processed, and what is read is output, which is suitable for business scenarios in which each data bit information is obtained. In the special access mode, the original test data can be bit-OR processed, that is, the original test data with multiple bits of width is bit-ORed to generate unit-width test data, which is suitable for business scenarios in which the corresponding storage address is obtained without caring about which data bit of the test data is faulty.

[0078] In one embodiment, the control module further acquires access parameters, wherein the access parameters include a second access address mapping and a second access address range; the control module maps the storage address of the device under test specified in the second access address range to the second storage unit according to the second access address mapping, and obtains the target storage address of the second storage unit; the control module reads the test data stored in the second storage unit according to the target storage address of the second storage unit. In this embodiment, in addition to Figure 2 The test data access method shown can also directly read the second storage unit. Figure 2 The test data access method shown, the test data access method of this embodiment, has a low access efficiency.

[0079] In one embodiment, a test data storage method is provided, wherein the method is run on Figure 1 Take the test device in as an example, Figure 3 A flow chart of the test data storage method in this embodiment is shown. Figure 3 As shown, the process includes the following steps:

[0080] Step S201, obtaining test data of the device under test;

[0081] Step S202, storing the test data in a first storage unit, wherein the first storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the first storage unit is associated with the data stored in some of the plurality of storage addresses in the device under test;

[0082] Step S203, storing the test data in a second storage unit, wherein the second storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are correlated with each other.

[0083] In this embodiment, step S202 and step S203 have no order relationship, and both can be performed simultaneously or successively. The device under test (DUT) includes a storage semiconductor, and the storage semiconductor is used to store data. The test data stored in the first storage unit or the second storage unit includes data obtained by testing the storage semiconductor. The test data storage method of this embodiment corresponds to the test data access method of the above embodiment. The test data is stored in the first storage unit and the second storage unit at the same time. The first storage unit stores compressed test data with a small storage capacity, and the second storage unit stores uncompressed test data with a large storage capacity. In this way, when accessing the test data, the first storage unit with a smaller capacity can be read first to obtain a data storage distribution view, and then the second storage unit with a larger capacity can be read. Since each point on the data storage distribution view corresponds to a number of test data in the second storage unit, when reading the second storage unit with a larger capacity, the storage address corresponding to the target point in the second storage unit is read, that is, only part of the storage address of the second storage unit is read, and it is not necessary to read all the storage addresses of the second storage unit, thereby improving the access efficiency of the test data.

[0084] In one embodiment, the control module stores the test data in the first storage unit, which can be achieved in the following manner: the control module obtains configuration parameters, wherein the configuration parameters include a first storage address mapping and a first storage data mapping; the control module maps the storage address of the data of the device under test to the storage address of the first storage unit according to the first storage address mapping; the control module maps the data bits of the device under test to the data bits of the first storage unit according to the first storage data mapping. In this embodiment, the first storage address mapping refers to the address mapping relationship between the device under test and the first storage unit. Through the first storage address mapping, each storage address in the device under test can be uniquely mapped to the unique address of the first storage unit. The first storage unit and the second storage unit have their own address mappings. The first storage data mapping refers to the conversion relationship between the data of the device under test and the test data of the first storage unit. Through the first storage data mapping, each data bit of the device under test can be stored in the designated data bit of the first storage unit, including storing the data bits of multiple devices under test in the data bits of the same storage address in the first storage unit. The storage data mapping relationship between the first storage unit and the second storage unit can be the same.

[0085] In one embodiment, the control module stores the test data in the first storage unit, which can be achieved in the following way: the control module obtains configuration parameters, wherein the configuration parameters include a conventional processing mode or a flag processing mode, the conventional processing mode includes accumulating the test data, and the flag processing mode includes accumulating the test data with valid flags; the control module processes the test data according to the conventional processing mode or the flag processing mode to obtain the accumulation result, and stores the accumulated result obtained by processing in the first storage unit. In this embodiment, the conventional processing mode, specifically, performs a bitwise OR operation on each test data and historical data, that is, the final test data is the cumulative sum of each test data, which is applicable to the business scenario of general testing, and the final test data is the historical accumulation of each test data. The flag processing mode, specifically, performs an AND operation on the test data and the flag data, and then performs an OR operation on the historical data, that is, the data with valid flags is accumulated and processed, and the data with invalid flags is discarded, which is applicable to the business scenario of specific condition testing, and the final test data only contains the fault data under the specific conditions, and all the fault data outside the conditions are discarded.

[0086] In one embodiment, the control module stores the test data in the first storage unit, which can be achieved in the following way: the control module reads the historical data stored at the storage address corresponding to the test data in the first storage unit; the control module compares the accumulated result with the historical data; if the accumulated result is different from the historical data, the accumulated result is stored in the first storage unit, and if the accumulated result is the same as the historical data, the accumulated result is not stored in the first storage unit. The accumulated result can be the accumulated result obtained by processing the test data according to the conventional processing mode or the flag processing mode. Such a setting can avoid storing the same test data, reduce the storage redundancy of the first storage unit, and save storage space.

[0087] In one embodiment, the control module stores the test data in the second storage unit, which can be achieved in the following manner: the control module obtains configuration parameters, wherein the configuration parameters include a second storage address mapping and a second storage data mapping; the control module maps the storage address of the data of the device under test to the storage address of the second storage unit according to the second storage address mapping; the control module maps the data bit of the device under test to the data bit of the second storage unit according to the second storage data mapping. In this embodiment, the second storage address mapping refers to the address mapping relationship between the device under test and the second storage unit, and each storage address in the device under test can be uniquely mapped to the unique address of the second storage unit through the second storage address mapping. The first storage unit and the second storage unit have their own address mappings. The second storage data mapping refers to the conversion relationship between the data of the device under test and the test data of the second storage unit, and each data bit of the device under test can be stored in the designated data bit of the second storage unit through the second storage data mapping. The storage data mapping relationship between the first storage unit and the second storage unit can be the same.

[0088] In one embodiment, the control module stores the test data in the second storage unit, which can be achieved in this way: the control module obtains configuration parameters, wherein the configuration parameters include a conventional processing mode, a mask processing mode or a flag processing mode, the conventional processing mode includes accumulating the test data, the mask processing mode includes logically processing the test data with the mask data of the corresponding storage address (for example, XOR), and then accumulating the processed data with the historical data, and the flag processing mode includes accumulating the test data with valid flags and the corresponding historical data; the control module processes the test data according to the conventional processing mode, the mask processing mode or the flag processing mode to obtain the accumulated result, and stores the accumulated result obtained by the processing in the second storage unit. In this embodiment, the conventional processing mode, specifically, performs a bitwise OR operation on each test data and the historical data, that is, the final test data is the cumulative sum of each test data, which is suitable for the business scenario of general testing, and the final test data is the historical accumulation of each test data. Mask processing mode, specifically, the test data is ANDed with the inverted mask data (i.e., the test data is XORed with the mask data), and then ORed with the historical data, that is, each test data is first logically processed with the mask data of the corresponding address and then accumulated. It is suitable for business scenarios of incremental testing of fault data. The final test data is the historical accumulation of each test relative to the mask data increment. Flag processing mode, specifically, the test data is ANDed with the flag data, and then ORed with the historical data, that is, the data with valid flag bits are accumulated and processed, and the data with invalid flag bits are discarded. It is suitable for business scenarios of testing under specific conditions. The final test data only contains fault data under specific conditions, and all fault data outside the conditions are discarded.

[0089] In one embodiment, the control module stores the test data in the second storage unit, which can be achieved in the following manner: the control module reads the historical data stored at the storage address corresponding to the test data in the second storage unit; the control module compares the accumulated result with the historical data; if the accumulated result is different from the historical data, the accumulated result is stored in the second storage unit, and if the accumulated result is the same as the historical data, the accumulated result is not stored in the second storage unit. The accumulated result can be the accumulated result obtained by processing the test data according to the conventional processing mode, the mask processing mode or the flag processing mode. Such a setting can avoid storing the same test data, reduce the storage redundancy of the second storage unit, and save storage space.

[0090] In one embodiment, Figure 4 A schematic diagram of the structure of another test device is shown. Figure 4 As shown, in Figure 1 On the basis of the test device shown, the control module includes: a control unit, a first processing unit and a second processing unit, the first processing unit and the second processing unit are respectively connected to the control unit, the first processing unit and the second processing unit are respectively connected to the first storage unit, and the first processing unit and the second processing unit are respectively connected to the second storage unit; wherein the control unit is used to send access parameters and / or access instructions to the first processing unit, and the first processing unit is used to receive access parameters and / or access instructions to execute the test data access method of the above embodiment; the control unit is used to send configuration parameters and / or configuration instructions to the second processing unit, and the second processing unit is used to receive configuration parameters and / or configuration instructions to execute the test data storage method of the above embodiment.

[0091] In this embodiment, the test device may include a user operation module, which is in the software layer. The user operation module can receive operations input by the user and generate parameters and instructions. The control unit is responsible for receiving and parsing parameters and instructions, sending access parameters and access instructions to the first processing unit, and sending configuration parameters and configuration instructions to the second processing unit. The control unit is also responsible for sending the data returned by the first processing unit back to the user operation module. The first processing unit is responsible for reading out and processing the test data of the first storage unit and the second storage unit according to the access parameters and access instructions. The second processing unit is responsible for receiving test data from the device under test, and processing the test data according to the configuration parameters and configuration instructions. The first storage unit is used to store the logical sum of the test data corresponding to the storage addresses of multiple devices under test, that is, compressing the test data corresponding to the multiple addresses of the device under test into one data. The second storage unit is used to store the full address test data of the device under test, and the second storage unit corresponds to the storage address of the device under test one by one.

[0092] In this embodiment, the fault data of the device under test is stored in the first storage unit and the second storage unit at the same time according to the corresponding configuration mode and the corresponding storage address. After the test is completed, the test data of the first storage unit and the second storage unit can be read out for further analysis. When accessing the test data, the first storage unit with a smaller capacity is read first to obtain the data storage distribution view, and then the second storage unit with a larger capacity is read. Since each point on the data storage distribution view corresponds to a number of test data in the second storage unit, when reading the second storage unit with a larger capacity, the storage address corresponding to the target point in the second storage unit is read, that is, only part of the storage address of the second storage unit is read, and it is not necessary to read all the storage addresses of the second storage unit, thereby improving the access efficiency of the test data.

[0093] The following will further introduce each unit in the test device.

[0094] The first storage unit uses the BRAM (Block RAM (Random Access Memory)) inside the FPGA (Field Programmable Gate Array, programmable array logic) as a carrier to receive read and write requests from the first processing unit and the second processing unit, and read or write corresponding data.

[0095] The second storage unit uses a DDR (Double Data Rate) memory as a carrier, receives read and write requests from the first processing unit and the second processing unit, and reads or writes corresponding data.

[0096] The control unit is responsible for communicating with the user operation module and realizing two functions: parsing the parameters and instructions sent by the user operation module and sending them to the first processing unit and the second processing unit, and uploading the return data of the first processing unit to the user operation module.

[0097] The first processing unit is responsible for accessing the test data. The first processing unit can access the two storage units independently and further process the accessed test data according to business needs, including but not limited to: data reading, fault number statistics, and fault address screening. When accessing the test data, the first processing unit first receives the access parameters issued by the control unit. The access parameters vary slightly depending on the different access services. The access parameters include: access data bits, access modes, access address mapping, and access address ranges.

[0098] The access data bit specifies which data positions in the second storage unit need to be processed and which data positions need to be ignored.

[0099] The access mode specifies what kind of processing is done on the test data to be accessed. The access mode includes regular access mode and special access mode. In regular access mode, the original test data is not processed and what is read is output. This is suitable for business scenarios that require obtaining information on each data bit. In special access mode, the original test data can be bitwise ORed, that is, the original test data with multiple bits of width is bitwise ORed to generate single-bit test data. This is suitable for business scenarios that require obtaining whether the corresponding storage address has faulty data without caring which test data bit has faults.

[0100] Access address mapping refers to the address mapping relationship between the device under test and the storage unit. When testing the device under test, the user operation module only needs to perceive the storage address situation of the device under test, that is, how many bits of the row address and column address of the device under test are there, without knowing the row and column situation of the storage unit, that is, the storage details of the test data in the storage unit are transparent to the user operation module. When accessing test data, the user operation module only needs to configure the access address mapping and the access address range of the device under test, and the control module will calculate the corresponding target storage address in the storage unit based on the specific storage address of the device under test and the access address mapping. The access address mapping includes a first access address mapping and a second access address mapping.

[0101] The access address range refers to the address range of the device under test, that is, the storage address range to be accessed is specified from the perspective of the device under test. The access address range includes a first access address range and a second access address range.

[0102] The first processing unit processes the access test data according to the service. The data reading service processes the returned test data according to the access data bit and access mode and uploads it to the user operation module. The fault data statistics service counts the number of faults on the returned data bit by bit, and the number of fault data of the data bit masked by the access data bit is 0. The fault address screening service judges the returned test data. If it is fault data, the test data and the corresponding storage address of the device under test are stored in the cache, otherwise the test data is discarded.

[0103] The second processing unit is responsible for the storage of test data. The second processing unit receives the test results from the device under test, the test results include the storage address and test data of the device under test, and the test data includes the test data, flag information and burst information. The second processing unit receives various configuration parameters transmitted from the control unit, the configuration parameters include: data processing mode, storage address mapping, storage data mapping.

[0104] Data processing mode refers to how the test data is processed, including: conventional processing mode, that is, the final test data is the cumulative sum of each test data, which is suitable for general test business scenarios. The final test data is the historical accumulation of each test data. Mask processing mode, that is, each test data is first logically processed with the mask data of the corresponding address and then accumulated. It is suitable for the business scenario of incremental testing of fault data. The final test data is the historical accumulation of each test relative to the mask data increment. Flag processing mode, that is, data with valid flag bits are accumulated and processed, and data with invalid flag bits are discarded. It is suitable for business scenarios of specific condition testing. The final test data only contains fault data under specific conditions, and all fault data outside the conditions are discarded.

[0105] Storage address mapping refers to the address mapping relationship between the device under test and the storage unit. Through storage address mapping, each storage address in the device under test can be uniquely mapped to the unique address of the storage unit. The first storage unit and the second storage unit have their own address mappings. The storage address mapping includes a first storage address mapping and a second storage address mapping.

[0106] Storage data mapping refers to the conversion relationship between the data of the device under test and the test data of the storage unit. Through storage data mapping, each data bit of the device under test can be stored in a specified data bit of the storage unit. The storage data mapping relationship of the first storage unit and the second storage unit can be the same. The storage data mapping includes a first storage data mapping and a second storage data mapping.

[0107] Figure 5 A flow chart of the test data access method in this embodiment is given, and the flow chart includes the following steps:

[0108] Step S301, the control unit sends access parameters and access instructions to the first processing unit;

[0109] Step S302, the first processing unit responds to the access parameter and the access instruction, reads the first storage unit, obtains the data storage distribution view, and uploads the data storage distribution view to the control unit;

[0110] Step S303, the control unit determines a target storage address range of the second storage unit according to the distribution of the target points in the data storage distribution view;

[0111] Step S304, the control unit generates access parameters and access instructions according to the target storage address range of the second storage unit, and sends the access parameters and access instructions to the second processing unit;

[0112] Step S305, the first processing unit responds to the access parameter and the access instruction, and reads the test data stored in the second storage unit according to the target storage address range of the second storage unit;

[0113] Step S306, the first processing unit uploads the read test data to the control unit;

[0114] Step S307: The control unit uploads the test data to the software layer.

[0115] In this embodiment, the access parameters include access data bits, access modes, access address mapping, and access address ranges. After the control unit issues an access instruction, the first processing unit generates an access address and an access termination condition of the storage unit according to the access parameters. The first processing unit reads the test data according to the access address. The first processing unit processes the test data accordingly according to business needs. The control unit uploads the processed test data to the software layer.

[0116] Figure 6 A flow chart of the test data storage method of this embodiment is given, and the flow chart includes the following steps:

[0117] Step S401, the second processing unit obtains the test result of the device under test;

[0118] Step S402, the second processing unit separates the storage address and the test data of the test result;

[0119] Step S403, the second processing unit performs address mapping on the test data to obtain the storage address of the corresponding storage unit;

[0120] Step S404, the second processing unit reads historical data from the corresponding storage unit;

[0121] Step S405, the second processing unit accumulates the historical data and the current test data to obtain an accumulation result;

[0122] Step S406, the second processing unit determines whether the accumulated result is the same as the historical data; if different, execute step S407; if the same, end the process.

[0123] Step S407: the second processing unit stores the accumulation result in a corresponding storage unit.

[0124] In this embodiment, the configuration parameters include data processing mode, storage address mapping, and storage data mapping. After obtaining the test result of the device under test, the test result can be cached to a FIFO (First Input First Output), wherein the test result includes the storage address and test data of the device under test, and the test data includes the test data, flag information, and burst information. The second processing unit obtains the test result of the device under test from the cache. The second processing unit separates and classifies the storage address and test data of the test result according to the type. The second processing unit performs address mapping on the separated DUT storage address to obtain the storage address corresponding to the first storage unit and the second storage unit. After step S403, the second processing unit reads the historical data of the storage unit corresponding to the mapped storage address, and the second processing unit performs corresponding accumulation processing on the historical data and the current test data according to different mode types, that is, the test data is processed by normal / mask / flag mode to obtain the accumulation result. If the accumulation result is different from the historical data, the second processing unit updates the accumulation result to the same storage address of the storage unit, and if the accumulation result is the same as the historical data, the storage unit is not updated.

[0125] It should be understood that the specific embodiments described herein are only used to explain the application, rather than to limit it. Based on the embodiments provided in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the protection scope of this application.

[0126] Obviously, the drawings are only some examples or embodiments of the present application. For ordinary technicians in the field, the present application can also be applied to other similar situations based on these drawings without creative work. In addition, it is understandable that although the work done in this development process may be complicated and lengthy, for ordinary technicians in the field, certain changes in design, manufacturing or production based on the technical content disclosed in this application are only conventional technical means and should not be regarded as insufficient content disclosed in this application.

[0127] The term "embodiment" in this application refers to a specific feature, structure or characteristic described in conjunction with the embodiment that can be included in at least one embodiment of the present application. The appearance of this phrase in various locations in the specification does not necessarily mean the same embodiment, nor does it mean that it is mutually exclusive with other embodiments and is independent or optional. It is clearly or implicitly understood by those of ordinary skill in the art that the embodiments described in this application can be combined with other embodiments without conflict.

[0128] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. The acquisition, storage, use, and processing of data involved in the embodiments of this application are in compliance with the relevant provisions of national laws and regulations.

[0129] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.

[0130] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of patent protection. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the scope of protection of the present application. Therefore, the scope of protection of the present application shall be subject to the attached claims.

Claims

1. A test data access method, characterized in that: include: Reading the first storage unit to obtain a data storage distribution view, wherein the data storage distribution view includes a plurality of points, the points correspond to storage addresses of the first storage unit one by one, and the test data stored in each storage address in the first storage unit is associated with the data stored in some of the plurality of storage addresses in the device under test; Determining a target storage address range of a second storage unit according to a distribution of target points in the data storage distribution view; The test data stored in the second storage unit is read according to the target storage address range of the second storage unit, wherein the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are correlated with each other.

2. The test data access method according to claim 1, characterized in that: Determining a target storage address range of a second storage unit according to the distribution of target points in the data storage distribution view includes: Determining a storage address of target test data in the first storage unit according to a distribution of target points in the data storage distribution view; According to the storage address mapping relationship between the first storage unit and the second storage unit, the storage address of the target test data in the first storage unit is mapped to the second storage unit to obtain the target storage address range of the second storage unit.

3. The test data access method according to claim 1, characterized in that: Reading the first storage unit to obtain a data storage distribution view includes: Obtaining access parameters, wherein the access parameters include a first access address mapping and a first access address range; According to the first access address mapping, mapping the storage address of the device under test specified in the first access address range to the first storage unit to obtain a target storage address of the first storage unit; The test data stored in the first storage unit is read according to the target storage address of the first storage unit to obtain the data storage distribution view.

4. The test data access method according to claim 1, characterized in that: Reading the test data stored in the second storage unit according to the target storage address range of the second storage unit includes: Obtaining access parameters, wherein the access parameters include access data bits; The test data stored at the target storage address in the second storage unit is read according to the access data bit.

5. The test data access method according to claim 1, characterized in that: After reading the test data stored in the second storage unit according to the target storage address range of the second storage unit, the method further includes: Obtaining access parameters, wherein the access parameters include a regular access mode or a special access mode, the regular access mode includes outputting the original test data read, and the special access mode includes outputting the original test data read after performing a logical operation; The test data read from the second storage unit is output according to the normal access mode or the special access mode.

6. The test data access method according to claim 1, characterized in that: The device under test includes a storage semiconductor, the storage semiconductor is used to store data, and the test data stored in the first storage unit or the second storage unit includes data obtained by testing the storage semiconductor.

7. A test data storage method, characterized in that: include: Obtain test data of the device under test; Storing the test data in a first storage unit, wherein the first storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the first storage unit is associated with the data stored in some of the plurality of storage addresses in the device under test; The test data is stored in a second storage unit, wherein the second storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are associated with each other.

8. The test data storage method according to claim 7, characterized in that: Storing the test data in a first storage unit includes: Acquire configuration parameters, wherein the configuration parameters include a first storage address mapping and a first storage data mapping; Mapping the storage address of the data of the device under test to the storage address of the first storage unit according to the first storage address mapping; According to the first storage data mapping, mapping the data bits of the device under test to the data bits of the first storage unit; or, Storing the test data in a first storage unit includes: Acquire configuration parameters, wherein the configuration parameters include a regular processing mode or a flag processing mode, the regular processing mode includes accumulating the test data, and the flag processing mode includes accumulating the test data with valid flags; The test data is processed according to the conventional processing mode or the flag processing mode to obtain an accumulation result, and the accumulated result obtained by the processing is stored in the first storage unit.

9. The test data storage method according to claim 8, characterized in that: Storing the test data in a first storage unit includes: Reading, in the first storage unit, historical data stored at a storage address corresponding to the test data; Comparing the accumulated result with the historical data; If the accumulated result is different from the historical data, the accumulated result is stored in the first storage unit; if the accumulated result is the same as the historical data, the accumulated result is not stored in the first storage unit.

10. The test data storage method according to claim 7, characterized in that: Storing the test data in a second storage unit includes: Acquire configuration parameters, wherein the configuration parameters include a second storage address mapping and a second storage data mapping; According to the second storage address mapping, mapping the storage address of the data of the device under test to the storage address of the second storage unit; According to the second storage data mapping, mapping the data bits of the device under test to the data bits of the second storage unit; or, Acquire configuration parameters, wherein the configuration parameters include a regular processing mode, a mask processing mode, or a flag processing mode, the regular processing mode includes accumulating the test data, the mask processing mode includes performing logical processing on the test data and mask data corresponding to the storage address before accumulating, and the flag processing mode includes accumulating test data with valid flag bits; The test data is processed according to the conventional processing mode, the mask processing mode or the flag processing mode to obtain an accumulation result, and the accumulated result obtained by the processing is stored in the second storage unit.

11. The test data storage method according to claim 10, characterized in that: Storing the test data in a second storage unit includes: reading, in the second storage unit, historical data stored at a storage address corresponding to the test data; Comparing the accumulated result with the historical data; If the accumulated result is different from the historical data, the accumulated result is stored in the second storage unit; if the accumulated result is the same as the historical data, the accumulated result is not stored in the second storage unit.

12. A testing device, characterized in that: include: A control module, a first storage unit and a second storage unit, wherein the first storage unit and the second storage unit are respectively connected to the control module; wherein, The first storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the first storage unit and the data stored in some of the plurality of storage addresses in the device under test are mutually associated; The second storage unit includes a plurality of storage addresses, and the test data stored in each storage address in the second storage unit and the data stored in each storage address in the device under test are associated with each other; The control module is used to execute the method according to any one of claims 1 to 9.

13. The testing device according to claim 12, characterized in that: The control module includes: a control unit, a first processing unit and a second processing unit, wherein the first processing unit and the second processing unit are respectively connected to the control unit, the first processing unit and the second processing unit are respectively connected to the first storage unit, and the first processing unit and the second processing unit are respectively connected to the second storage unit; wherein, The control unit is used to send access parameters and / or access instructions to the first processing unit, and the first processing unit is used to receive the access parameters and / or access instructions and execute the test data access method described in any one of claims 1 to 6; The control unit is used to send configuration parameters and / or configuration instructions to the second processing unit, and the second processing unit is used to receive the configuration parameters and / or configuration instructions and execute the test data storage method described in any one of claims 7 to 11.

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