Light emitting diode capable of reducing current conduction resistance and preparation method thereof

Abstract

The invention provides a light emitting diode capable of reducing current conduction resistance and a preparation method thereof, and belongs to the technical field of photoelectron manufacturing. The light emitting diode comprises an epitaxial layer, a first electrode and a second electrode, the epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer which are stacked in sequence, the second semiconductor layer is provided with a groove exposing the first semiconductor layer, and the second electrode is located on the surface, away from the first semiconductor layer, of the second semiconductor layer; the first electrode is located in the groove, and at least part of the first electrode is embedded in the first semiconductor layer exposed out of the groove. According to the embodiment of the invention, the current conduction resistance can be reduced, and the photoelectric conversion efficiency of the light-emitting diode is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light emitting diode with reduced current conduction resistance and a preparation method thereof. Background Art

[0002] Light Emitting Diode (LED) is an extremely influential new product in the optoelectronics industry. It has the characteristics of small size, long service life, rich colors and low energy consumption. It is widely used in lighting, display screens, signal lights, backlight sources, toys and other fields.

[0003] In the related art, a light-emitting diode includes: an epitaxial layer, an n-electrode and a p-electrode. The epitaxial layer generally includes a u-type layer, an n-type layer, an active layer and a p-type layer stacked in sequence. The p-type layer has a groove exposing the n-type layer. The n-electrode is located in the groove and is electrically connected to the n-type layer. The p-electrode is located on the surface of the p-type layer and is electrically connected to the p-type layer.

[0004] When depositing the n-type layer, the lightly doped semiconductor layer is deposited first, and then the heavily doped semiconductor layer. When the current of the light-emitting diode increases, the current will gradually fall from the heavily doped and low-resistance semiconductor layer to the lightly doped and high-resistance semiconductor layer, and the resistance of the undoped u-type layer is also relatively large. This causes the resistance of the semiconductor layer to gradually increase during the process of current injection from the n-electrode downward, causing the voltage to deviate from the ideal value, causing the voltage to rise rapidly, and reducing the photoelectric conversion efficiency of the light-emitting diode. Summary of the invention

[0005] The embodiment of the present disclosure provides a light-emitting diode with reduced current conduction resistance and a method for manufacturing the same, which can reduce the current conduction resistance and improve the photoelectric conversion efficiency of the light-emitting diode. The technical solution is as follows:

[0006] On the one hand, an embodiment of the present disclosure provides a light-emitting diode, which includes: an epitaxial layer, a first electrode, and a second electrode, the epitaxial layer includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence, the second semiconductor layer has a groove exposing the first semiconductor layer, and the second electrode is located on a surface of the second semiconductor layer away from the first semiconductor layer; the first electrode is located in the groove, and at least a portion of the first electrode is embedded in the first semiconductor layer exposed by the groove.

[0007] Optionally, the first electrode is embedded in the first semiconductor layer to a depth greater than or equal to 200 nm.

[0008] Optionally, the first electrode includes a finger strip and an electrode block, one end of the finger strip is connected to the electrode block; in a first cross-section of the finger strip, the depth of the finger strip embedded in the first semiconductor layer gradually increases from close to the second electrode to away from the second electrode, and the first cross-section is a cross-section of the finger strip in the length direction.

[0009] Optionally, in a second cross section of the finger, a depth of the finger embedded in the first semiconductor layer gradually increases from a direction close to the second electrode to a direction away from the second electrode, and the second cross section is a cross section of the finger in a width direction.

[0010] Optionally, the shape of the second cross-section includes a triangle, and the angle between the side of the triangle away from the second semiconductor layer and the bottom surface of the groove is 45° to 135°; or, the shape of the second cross-section includes an inverted trapezoid, and the angle between the waist of the inverted trapezoid and the bottom surface of the groove is 45° to 135°.

[0011] Optionally, in the first cross section, the thickness of the finger strips is constant in a direction from close to the second electrode to far away from the second electrode.

[0012] Optionally, the thickness of the first semiconductor layer is 1 μm to 2.5 μm, and the Si doping concentration of the first semiconductor layer is 1×10 18 / cm 3 Up to 1×10 20 / cm 3 The thickness of the second semiconductor layer is greater than 20 nm, and the Mg doping concentration of the second semiconductor layer is greater than 1×10 20 / cm 3 .

[0013] Optionally, the epitaxial layer further includes a u-type layer, and the u-type layer, the first semiconductor layer, the active layer and the second semiconductor layer are stacked in sequence; the thickness of the u-type layer is 1 μm to 3 μm.

[0014] On the other hand, an embodiment of the present disclosure also provides a method for preparing a light-emitting diode, the preparation method comprising: forming an epitaxial layer, the epitaxial layer comprising a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence, the second semiconductor layer having a groove exposing the first semiconductor layer; preparing a second electrode and a first electrode, the second electrode being located on a surface of the second semiconductor layer away from the first semiconductor layer, the first electrode being located in the groove, and at least a portion of the first electrode being embedded in the first semiconductor layer exposed by the groove.

[0015] Optionally, preparing the first electrode includes: forming an embedded groove on the bottom surface of the groove extending away from the second semiconductor layer, the depth of the embedded groove being greater than or equal to 200 nm; forming the first electrode on the bottom surface of the groove so that the first electrode extends into the embedded groove.

[0016] The beneficial effects brought by the technical solution provided by the embodiments of the present disclosure include at least:

[0017] In the light-emitting diode provided by the embodiment of the present disclosure, there is a groove on the surface of the second semiconductor layer that exposes the first semiconductor layer, and at least part of the first electrode located in the groove is embedded in the first semiconductor layer exposed by the groove, that is, at least part of the first electrode extends into the first semiconductor layer. The first electrode embedded in the first semiconductor layer is equivalent to replacing part of the first semiconductor layer. Since the first electrode is made of metal material, and the conductivity of the metal material is better than that of the semiconductor material, the resistance on the current conduction path in the first semiconductor layer can be significantly reduced, so that the current can be distributed more evenly in the first semiconductor layer, and the voltage is also lower, thereby improving the photoelectric conversion efficiency of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 is a structural schematic diagram of a light emitting diode provided by an embodiment of the present disclosure;

[0020] Figure 2 is a top view of a light emitting diode provided by an embodiment of the present disclosure;

[0021] Figure 3 yes Figure 2 An AA cross-sectional view is provided;

[0022] Figure 4 yes Figure 2 A MM cross-section diagram is provided;

[0023] Figure 5 yes Figure 2 A NN cross-section diagram provided;

[0024] Figure 6 It is a flow chart of a method for preparing a light emitting diode provided in an embodiment of the present disclosure.

[0025] The descriptions of the marks in the figure are as follows:

[0026] 10. Substrate;

[0027] 20. epitaxial layer; 21. first semiconductor layer; 22. active layer; 23. second semiconductor layer; 24. groove; 241. embedded groove;

[0028] 31. first electrode; 311. finger strip; 312. electrode block;

[0029] 32. The second electrode. DETAILED DESCRIPTION

[0030] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0031] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons with ordinary skills in the field to which the present disclosure belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limitation, but indicate the existence of at least one. Words such as "include" or "comprise" and similar words mean that the elements or objects appearing before "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", "top", "bottom" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0032] In the related art, the manufacturing process of GaN-based light-emitting diodes is usually as follows: first, an n-type GaN layer, an active layer, and a p-type GaN layer are grown in sequence on a sapphire substrate, and then a portion of the p-type GaN layer is etched using photolithography technology to the extent that the n-type GaN layer is exposed on the surface, and finally a conductive material is deposited on the surface of the p-type GaN layer and the n-type GaN layer as electrodes. The GaN layer will form an ohmic contact with the electrode on the corresponding surface, greatly reducing the contact resistance between the electrode and the epitaxial layer, and improving the photoelectric conversion efficiency of the diode.

[0033] Since the exposed part of the n-type GaN layer does not contain the active layer and the p-type GaN layer, in order to ensure a larger effective light-emitting area, the etching area of ​​the p-type GaN layer needs to be as small as possible. As the current of the light-emitting diode gradually increases, the depth of the current penetrating the epitaxial layer will also gradually increase. According to the design principle of the epitaxial structure, from the substrate upward, it is necessary to first deposit an undoped or lightly doped GaN layer, and then deposit a heavily doped high-temperature GaN. Therefore, when the chip current increases, the current path will gradually fall from the heavily doped, low-resistance GaN layer to the low-doped, high-resistance GaN layer, causing the voltage to deviate from the ideal IV curve and rise rapidly, thereby causing the chip's photoelectric conversion efficiency to decrease.

[0034] To this end, an embodiment of the present disclosure provides a light emitting diode. Figure 1 Schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. Figure 1 As shown, the light-emitting diode includes: an epitaxial layer 20, a first electrode 31 and a second electrode 32. The epitaxial layer 20 includes a first semiconductor layer 21, an active layer 22, and a second semiconductor layer 23 stacked in sequence. The second semiconductor layer 23 has a groove 24 exposing the first semiconductor layer 21. The second electrode 32 is located on the surface of the second semiconductor layer 23 away from the first semiconductor layer 21.

[0035] like Figure 1 As shown, the first electrode 31 is located in the groove 24 , and at least a portion of the first electrode 31 is embedded in the first semiconductor layer 21 exposed by the groove 24 .

[0036] In the light-emitting diode provided by the embodiment of the present disclosure, a groove 24 exposing the first semiconductor layer 21 is provided on the surface of the second semiconductor layer 23, and at least a portion of the first electrode 31 located in the groove 24 is embedded in the first semiconductor layer 21 exposed by the groove 24, that is, at least a portion of the first electrode 31 extends into the first semiconductor layer 21. The first electrode 31 embedded in the first semiconductor layer 21 is equivalent to replacing a portion of the first semiconductor layer 21. Since the first electrode 31 is made of a metal material, and the conductivity of the metal material is better than that of the semiconductor material, the resistance on the current conduction path in the first semiconductor layer 21 can be significantly reduced, so that the current can be distributed more evenly in the first semiconductor layer 21, and the voltage is also lower, thereby improving the photoelectric conversion efficiency of the light-emitting diode.

[0037] Optionally, one of the first semiconductor layer and the second semiconductor layer is an n-type layer, and the other is a p-type layer.

[0038] Exemplarily, the first semiconductor layer is an n-type layer, and the second semiconductor layer is a p-type layer. Accordingly, the first electrode is an n-electrode, and the second electrode is a p-electrode.

[0039] Optionally, the first electrode 31 is embedded in the first semiconductor layer 21 to a depth greater than or equal to 200 nm.

[0040] By controlling the depth of the first electrode 31 embedded in the first semiconductor layer 21 within the above range, the embedding depth of the first electrode 31 is prevented from being too small. Since the doping concentration of the semiconductor material on the side of the first semiconductor layer 21 close to the second semiconductor layer 23 is higher than the doping concentration of the semiconductor material on the side of the first semiconductor layer 21 away from the second semiconductor layer 23, the current resistance of the semiconductor material on the side of the first semiconductor layer 21 close to the second semiconductor layer 23 is lower than the semiconductor material on the side of the first semiconductor layer 21 away from the second semiconductor layer 23. Therefore, if the embedding depth of the first electrode 31 is too small, the effect on the resistance change of the first semiconductor layer 21 is small, and the purpose of reducing the resistance on the current conduction path in the first semiconductor layer 21 cannot be achieved.

[0041] Exemplarily, the depth of the first electrode 31 embedded in the first semiconductor layer 21 may be 250 nm.

[0042] Optionally, the first electrode 31 and the second electrode 32 include at least one of an Al layer, a Ti layer, and an Au layer.

[0043] Illustratively, each of the first electrode 31 and the second electrode 32 includes a first Al layer, a first Ti layer, a second Al layer, a second Ti layer, and an Au layer stacked in sequence.

[0044] Figure 2 FIG. 1 is a top view of a light emitting diode provided by an embodiment of the present disclosure. Figure 2 As shown, the first electrode 31 includes a finger strip 311 and an electrode block 312 , and one end of the finger strip 311 is connected to the electrode block 312 .

[0045] Exemplarily, the electrode block 312 is used to be connected to an external power source so that the external power source can inject current into the electrode block 312. The finger strips 311 are used to allow the current in the electrode block 312 to expand laterally along the finger strips 311.

[0046] Figure 3 yes Figure 2 An AA cross-section diagram is provided. Figure 3 As shown, in the first cross section of the finger stripe 311 , the depth of the finger stripe 311 embedded in the first semiconductor layer 21 gradually increases from the direction close to the second electrode 32 to the direction away from the second electrode 32 .

[0047] Exemplarily, the first cross section is a cross section of the finger strip 311 in the length direction.

[0048] For example, Figure 4 yes Figure 2A MM cross-sectional view is provided. Figure 4 As shown, the portion of the finger strip 311 farthest from the second electrode 32 is embedded the deepest in the first semiconductor layer 21 .

[0049] For example, Figure 5 yes Figure 2 A NN cross-section diagram is provided. Figure 5 As shown, the portion of the finger strip 311 closest to the second electrode 32 is embedded in the first semiconductor layer 21 to the smallest depth, and the portion of the finger strip 311 closest to the second electrode 32 is not embedded in the first semiconductor layer 21 .

[0050] In the first semiconductor layer 21, electrons in the region close to the second semiconductor layer 23 are usually transferred along the film layer of the first semiconductor layer 21 close to the second semiconductor layer 23 when flowing to the active layer 22; while electrons in the region far from the second semiconductor layer 23 are first transferred downward to the film layer of the first semiconductor layer 21 far from the second semiconductor layer 23 when flowing to the active layer 22, and then transferred horizontally to the active layer 22 on the film layer of the first semiconductor layer 21 far from the second semiconductor layer 23. Therefore, the farther the region on the first semiconductor layer 21 is from the second semiconductor layer 23, the longer the path for electrons to be transferred to the active layer 22. That is, the greater the resistance during the current transfer process.

[0051] In the above implementation, the deeper the finger bar 311 is embedded in the second semiconductor layer 23 for the area far from the second electrode 32, not only shortening the path of electron flow, but also eliminating the need for electrons to extend downward across multiple semiconductor layers with different doping concentrations. Therefore, the resistance of the area far from the second electrode 32 in the second semiconductor layer 23 can be effectively reduced, so that the resistance of each area from close to the second electrode 32 to far from the second electrode 32 can be made consistent. That is, the current can be distributed more evenly in the first semiconductor layer 21, and the voltage can be lower, thereby improving the photoelectric conversion efficiency of the light-emitting diode.

[0052] Alternatively, if Figure 3 As shown, in the first cross section, the thickness of the finger strip 311 is constant from the direction close to the second electrode 32 to the direction away from the second electrode 32 .

[0053] The thickness of the finger strip 311 is constant from the direction close to the second electrode 32 to the direction far from the second electrode 32, so that after the current is injected into the first electrode 31, the current is horizontally transmitted to each region of the finger strip 311, and then the distance of the current being transmitted downward to the epitaxial layer 20 is the same. In addition, the thickness of the finger strip 311 is constant, so when depositing the finger strip 311, the preparation of the finger strip 311 is completed in one process, without the need for repeated deposition to form finger strips 311 with different thicknesses.

[0054] Alternatively, if Figure 4 As shown, in the second cross section of the finger stripe 311 , the depth of the finger stripe 311 embedded in the first semiconductor layer 21 gradually increases from the direction close to the second electrode 32 to the direction away from the second electrode 32 .

[0055] Exemplarily, the second cross section is a cross section of the finger strip 311 in the width direction.

[0056] like Figure 2 , 4 As shown, the second electrode 32 includes a block structure and two strip structures, the ends of the two strip structures are connected to the block structure, and the two strip structures and the block structure form a U-shaped second electrode 32.

[0057] like Figure 4 As shown, the finger strip 311 of the first electrode 31 is located between the two strip structures. Therefore, on the second cross section of the finger strip 311, the two sides of the finger strip 311 are closer to the second electrode 32, while the middle of the finger strip 311 is farther from the second electrode 32, so the depth of the middle part of the finger strip 311 embedded in the first semiconductor layer 21 is greater than the depth of the two sides of the finger strip 311 embedded in the first semiconductor layer 21.

[0058] With this design, the finger strips 311 are embedded deeper in the second semiconductor layer 23 for areas far from the second electrode 32, which not only shortens the path of electron flow, but also eliminates the need for electrons to extend downward across multiple semiconductor layers with different doping concentrations. Therefore, the resistance of the second semiconductor layer 23 for areas far from the second electrode 32 can be effectively reduced, allowing the current to be more evenly distributed in the first semiconductor layer 21 and lowering the voltage.

[0059] For example, Figure 4 As shown, the shape of the second cross section includes an inverted trapezoid, and the angle between the waist of the inverted trapezoid and the bottom surface of the groove 24 is 45° to 135°. In this way, the depth of the finger bar 311 embedded in the first semiconductor layer 21 increases uniformly from the direction close to the second electrode 32 to the direction away from the second electrode 32. It is prevented that the depth of the finger bar 311 embedded in the first semiconductor layer 21 drops or rises sharply, so that when the current is transmitted downward from different areas of the finger bar 311, the resistance of each transmission path tends to be consistent.

[0060] For example, Figure 2 As shown, for a light-emitting diode in which both the second electrode 32 and the first electrode 31 are block-shaped, the second electrode 32 and the first electrode 31 are arranged alternately. At this time, the shape of the second cross section of the first electrode 31 includes a triangle. In this way, the portion of the first electrode 31 away from the second electrode 32 is embedded in the first semiconductor layer 21 to a greater depth.

[0061] Exemplarily, the angle between the side of the triangle away from the second semiconductor layer 23 and the bottom surface of the groove 24 is 45° to 135°. In this way, the depth of the first electrode 31 embedded in the first semiconductor layer 21 increases uniformly from the direction close to the second electrode 32 to the direction away from the second electrode 32. The depth of the first electrode 31 embedded in the first semiconductor layer 21 is prevented from dropping or rising sharply, so that when the current is transmitted downward from different areas of the first electrode 31, the resistance of each transmission path tends to be consistent.

[0062] Alternatively, if Figure 2 As shown, the light emitting diode further includes a substrate 10 , and an epitaxial layer 20 is located on the surface of the substrate 10 .

[0063] For example, the substrate may be a sapphire substrate. The sapphire substrate has a relatively high light transmittance, that is, the substrate is a transparent substrate. In addition, the sapphire material is relatively hard and has relatively stable chemical properties, so that the light-emitting diode has good light-emitting effect and stability.

[0064] Optionally, the surface of the substrate on which the epitaxial layer 20 is deposited may be patterned, so that the epitaxial layer 20 deposited on the substrate is more stable and less likely to fall off.

[0065] Alternatively, if Figure 2 As shown, the epitaxial layer 20 includes a first semiconductor layer 21, an active layer 22, and a second semiconductor layer 23 which are sequentially stacked on the substrate.

[0066] Optionally, the first semiconductor layer 21 is a silicon-doped n-type GaN layer, and the thickness of the n-type GaN layer may be 1 μm to 2.5 μm.

[0067] For example, the Si doping concentration of the first semiconductor layer 21 is 1×10 18 / cm 3 Up to 1×10 20 / cm 3 .

[0068] Optionally, the active layer 22 includes alternately grown InGaN quantum well layers and GaN quantum barrier layers, wherein the active layer 22 may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0069] As an example, in the embodiment of the present disclosure, the active layer 22 includes five periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0070] Optionally, the thickness of the quantum well layer is 1 nm to 5 nm, and the thickness of the quantum barrier layer is 4 nm to 10 nm.

[0071] Optionally, the second semiconductor layer 23 is a magnesium-doped p-type GaN layer, and the thickness of the p-type GaN layer is greater than 20 nm.

[0072] For example, the Mg doping concentration of the second semiconductor layer 23 is greater than 1×10 20 / cm 3 .

[0073] Optionally, the epitaxial layer 20 further includes a u-type layer, and the u-type layer, the first semiconductor layer 21 , the active layer 22 and the second semiconductor layer 23 are stacked in sequence.

[0074] Exemplarily, the u-type layer is a u-type GaN layer, and the thickness of the u-type layer is 1 μm to 3 μm.

[0075] Optionally, the light emitting diode further includes an AlN buffer layer, the AlN buffer layer and the u-type GaN layer are sequentially stacked on the substrate, and the epitaxial layer 20 is located on the u-type GaN layer.

[0076] Optionally, the light-emitting diode may further include a current blocking layer, which is located on the surface of the second semiconductor layer 23 and between the second electrode 32 and the second semiconductor layer 23. The current blocking layer can prevent the current injected by the second electrode 32 from being directly transmitted downward to the second semiconductor layer 23 and causing the problem of excessive local current.

[0077] Exemplarily, the current blocking layer may be a silicon oxide layer.

[0078] Optionally, the light emitting diode further includes a transparent conductive layer, which is located on the surface of the second semiconductor layer 23 , and at least a portion of the second electrode 32 is located on the transparent conductive layer.

[0079] Optionally, the transparent conductive layer may be an indium tin oxide (ITO) layer. The ITO layer has good transmittance and low resistivity. Using the ITO layer as the transparent conductive layer can allow more light to be transmitted from the transparent conductive layer, thereby ensuring the light output effect; at the same time, due to the low resistivity, it is also convenient for carrier conduction and improves injection efficiency.

[0080] For example, the transparent conductive layer may be an indium zinc oxide (IZO) layer. The IZO layer has good transmittance and low resistivity. Using the IZO layer as the transparent conductive layer can allow more light to be transmitted from the transparent conductive layer, thereby ensuring the light output effect; at the same time, due to the low resistivity, it is also convenient for carrier conduction and improves injection efficiency.

[0081] As an example, the thickness of the transparent conductive layer may be 200 angstroms to 5000 angstroms. For example, the thickness of the transparent conductive layer is 2000 angstroms.

[0082] Optionally, the light emitting diode may further include a reflective layer, and the reflective layer may be located on the surface of the second semiconductor layer 23 .

[0083] Providing a reflective layer can increase the amount of light reflected by the light-emitting diode, allowing more light to be emitted from the light-emitting surface, thereby increasing the light brightness.

[0084] Exemplarily, the reflective layer includes at least one of an Al layer and an Ag layer.

[0085] Exemplarily, the reflective layer includes a DBR (Distributed Bragg Reflector) layer formed by alternately stacking material layers with different refractive indices.

[0086] For example, the reflective layer includes a plurality of silicon oxide layers and a plurality of titanium oxide layers which are alternately stacked.

[0087] Optionally, the light emitting diode further includes a passivation layer, which is located on the surface of the second semiconductor layer 23 and in the groove 24 , and has via holes respectively exposing the second electrode 32 and the first electrode 31 .

[0088] Optionally, the passivation layer may be at least one of a silicon oxide layer, an aluminum oxide layer and a silicon nitride layer.

[0089] Optionally, the thickness of the passivation layer may be 800 angstroms to 3000 angstroms.

[0090] Figure 6 FIG. 1 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 6 As shown, the preparation method comprises:

[0091] S11: forming an epitaxial layer 20.

[0092] The epitaxial layer 20 includes a first semiconductor layer 21 , an active layer 22 , and a second semiconductor layer 23 which are stacked in sequence. The second semiconductor layer 23 has a groove 24 which exposes the first semiconductor layer 21 .

[0093] S12: preparing the second electrode 32 and the first electrode 31 .

[0094] The second electrode 32 is located on the surface of the second semiconductor layer 23 away from the first semiconductor layer 21 , the first electrode 31 is located in the groove 24 , and at least a portion of the first electrode 31 is embedded in the first semiconductor layer 21 exposed by the groove 24 .

[0095] In the light-emitting diode prepared by the preparation method, a groove 24 exposing the first semiconductor layer 21 is provided on the surface of the second semiconductor layer 23, and at least a portion of the first electrode 31 located in the groove 24 is embedded in the first semiconductor layer 21 exposed by the groove 24, that is, at least a portion of the first electrode 31 extends into the first semiconductor layer 21. The first electrode 31 embedded in the first semiconductor layer 21 is equivalent to replacing a portion of the first semiconductor layer 21. Since the first electrode 31 is made of a metal material, and the conductivity of the metal material is better than that of the semiconductor material, the resistance on the current conduction path in the first semiconductor layer 21 can be significantly reduced, so that the current can be distributed more evenly in the first semiconductor layer 21, and the voltage is also lower, thereby improving the photoelectric conversion efficiency of the light-emitting diode.

[0096] The epitaxial layer 20 formed in step S11 is located on the substrate.

[0097] The substrate is a sapphire substrate, a silicon substrate or a silicon carbide substrate. The substrate can be a flat substrate or a patterned substrate.

[0098] As an example, in the embodiment of the present disclosure, the substrate is a sapphire substrate. The sapphire substrate is a commonly used substrate with mature technology and low cost. Specifically, it can be a patterned sapphire substrate or a sapphire flat sheet substrate.

[0099] The sapphire substrate may be pre-treated, placed in a MOCVD (Metal-organic Chemical Vapor Deposition) reaction chamber, and baked for 12 to 18 minutes. As an example, in the embodiment of the present disclosure, the sapphire substrate is baked for 15 minutes.

[0100] Specifically, the baking temperature may be 1000° C. to 1200° C., and the pressure in the MOCVD reaction chamber during baking may be 100 mbar to 200 mbar.

[0101] Before step S11 , the method may include: sequentially forming an AlN buffer layer and a u-type GaN layer on the sapphire substrate by using MOCVD technology.

[0102] Growing the epitaxial layer 20 on the substrate in step S11 may include: sequentially forming a first semiconductor layer 21 , an active layer 22 , and a second semiconductor layer 23 on the sapphire substrate by MOCVD technology.

[0103] Exemplarily, the first semiconductor layer 21 is an n-type GaN layer.

[0104] Optionally, the thickness of the n-type GaN layer may be 1 μm to 2.5 μm.

[0105] The growth temperature of the n-type GaN layer may be 1000° C. to 1100° C., and the growth pressure of the n-type GaN layer may be 100 torr to 300 torr.

[0106] Optionally, the active layer 22 includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. In particular, the active layer 22 may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0107] When growing the active layer 22, the pressure of the MOCVD reaction chamber is controlled at 200 torr. When growing the InGaN quantum well layer, the temperature of the reaction chamber is 760° C. to 780° C. When growing the GaN quantum barrier layer, the temperature of the reaction chamber is 860° C. to 890° C.

[0108] As an example, in the embodiment of the present disclosure, the active layer 22 includes five periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0109] Optionally, the thickness of the quantum well layer is 1 nm to 5 nm, and the thickness of the quantum barrier layer is 4 nm to 10 nm.

[0110] Exemplarily, the second semiconductor layer 23 is a p-type GaN layer.

[0111] Optionally, the thickness of the p-type GaN layer is greater than 20 nm.

[0112] When growing the p-type GaN layer, the growth pressure of the p-type GaN layer may be 200 Torr to 600 Torr, and the growth temperature of the p-type GaN layer may be 800° C. to 1000° C.

[0113] Step S11 may further include the following steps:

[0114] First, a transparent conductive layer is formed on the surface of the p-type GaN layer.

[0115] Exemplarily, the transparent conductive layer is an indium tin oxide layer or an indium zinc oxide layer.

[0116] Exemplarily, the thickness of the transparent conductive layer may be 200 angstroms to 5000 angstroms. For example, the thickness of the transparent conductive layer is 2000 angstroms.

[0117] Then, a passivation layer is formed on the surface of the p-type GaN layer away from the n-type GaN layer and in the groove 24 .

[0118] Specifically, it may include: forming a passivation layer on the surface of the p-type GaN layer, the surface of the transparent conductive layer, and in the groove 24 .

[0119] Exemplarily, the passivation layer may be a silicon oxide layer, and the thickness of the passivation layer may be 800 angstroms to 3000 angstroms.

[0120] Step S12 may include the following steps:

[0121] First, an embedded groove 241 extending in a direction away from the second semiconductor layer 23 is formed on the bottom surface of the recess 24 .

[0122] The depth of the embedded groove 241 is greater than or equal to 200 nm.

[0123] Then, a first electrode 31 is formed on the bottom surface of the groove 24 , so that the first electrode 31 extends into the embedded groove 241 ; meanwhile, a second electrode 32 is formed on the surface of the second semiconductor layer 23 .

[0124] Illustratively, the first electrode 31 and the second electrode 32 may each be a first Al layer, a first Ti layer, a second Al layer, a second Ti layer, and an Au layer stacked in sequence.

[0125] Finally, the sapphire substrate can be cut and scratched by invisible cutting, which can effectively reduce the loss of brightness. Then, the light-emitting diode is obtained by testing.

[0126] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A light emitting diode, characterized in that: The light emitting diode comprises: an epitaxial layer (20), a first electrode (31) and a second electrode (32); the epitaxial layer (20) comprises a first semiconductor layer (21), an active layer (22) and a second semiconductor layer (23) stacked in sequence; the second semiconductor layer (23) has a groove (24) exposing the first semiconductor layer (21); and the second electrode (32) is located on a surface of the second semiconductor layer (23) away from the first semiconductor layer (21); The first electrode (31) is located in the groove (24), and at least a portion of the first electrode (31) is embedded in the first semiconductor layer (21) exposed by the groove (24).

2. The light emitting diode according to claim 1, characterized in that: The first electrode (31) is embedded in the first semiconductor layer (21) to a depth greater than or equal to 200 nm.

3. The light emitting diode according to claim 1, characterized in that: The first electrode (31) comprises a finger strip (311) and an electrode block (312), and one end of the finger strip (311) is connected to the electrode block (312); In a first cross section of the finger strip (311), the depth of the finger strip (311) embedded in the first semiconductor layer (21) gradually increases from a direction close to the second electrode (32) to a direction away from the second electrode (32), and the first cross section is a cross section of the finger strip (311) in the length direction.

4. The light emitting diode according to claim 3, characterized in that: In a second cross section of the finger strip (311), the depth of the finger strip (311) embedded in the first semiconductor layer (21) gradually increases from a direction close to the second electrode (32) to a direction away from the second electrode (32), and the second cross section is a cross section of the finger strip (311) in a width direction.

5. The light emitting diode according to claim 4, characterized in that: The shape of the second cross section comprises a triangle, and the angle between the side of the triangle away from the second semiconductor layer (23) and the bottom surface of the groove (24) is 45° to 135°; or, The shape of the second cross section comprises an inverted trapezoid, and the angle between the waist of the inverted trapezoid and the bottom surface of the groove (24) is 45° to 135°.

6. The light emitting diode according to claim 3, characterized in that: In the first cross section, the thickness of the finger strip (311) is constant in a direction from close to the second electrode (32) to far from the second electrode (32).

7. The light emitting diode according to any one of claims 1 to 6, characterized in that: The thickness of the first semiconductor layer (21) is 1 μm to 2.5 μm, and the Si doping concentration of the first semiconductor layer (21) is 1×10 18 / cm 3 Up to 1×10 20 / cm 3 ; The thickness of the second semiconductor layer (23) is greater than 20 nm, and the Mg doping concentration of the second semiconductor layer (23) is greater than 1×10 20 / cm 3 .

8. The light emitting diode according to any one of claims 1 to 6, characterized in that: The epitaxial layer (20) further comprises a u-type layer, wherein the u-type layer, the first semiconductor layer (21), the active layer (22) and the second semiconductor layer (23) are stacked in sequence; The thickness of the u-shaped layer is 1 μm to 3 μm.

9. A method for preparing a light emitting diode, characterized in that: The preparation method comprises: forming an epitaxial layer, wherein the epitaxial layer comprises a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence, wherein the second semiconductor layer has a groove exposing the first semiconductor layer; A second electrode and a first electrode are prepared, wherein the second electrode is located on a surface of the second semiconductor layer away from the first semiconductor layer, the first electrode is located in the groove, and at least a portion of the first electrode is embedded in the first semiconductor layer exposed by the groove.

10. The preparation method according to claim 9, characterized in that: Preparing the first electrode comprises: forming an embedded groove extending in a direction away from the second semiconductor layer on the bottom surface of the groove, wherein the depth of the embedded groove is greater than or equal to 200 nm; The first electrode is formed on the bottom surface of the groove so that the first electrode extends into the embedding groove.

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