Elastic wave device

Abstract

An elastic wave device is provided with: a package substrate; the device chip is mounted on the packaging substrate; a sealing portion including: a first portion covering a non-functional surface of the device chip, the non-functional surface facing a functional surface of the device chip; and a second portion extending from the first portion, covering a side surface of the device chip in a thickness direction, the side surface being between the functional surface and the non-functional surface, and extending to one surface of the package substrate, the sealing portion forming an internal space between the functional surface of the device chip and the one surface of the package substrate, a blind hole extending from the non-functional surface to the functional surface and / or a through hole extending along the thickness direction of the device chip are formed in the device chip, and a heat dissipation path structure is arranged in the device chip; the heat dissipation path structure is filled in the blind hole and / or the through hole, and heat generated by the device chip can be efficiently conducted to the sealing part through the heat dissipation path structure and is released to the outside.

Description

Technical Field

[0001] The present invention relates to an improvement of an elastic wave device suitable for use as a frequency filter or the like in mobile communication equipment or the like. Background Art

[0002] As disclosed in Patent Document 1 (Japanese Patent Application Laid-Open No. 2022-112576), there is an elastic wave device used as a frequency filter or the like in mobile communication equipment or the like.

[0003] The elastic wave device in Patent Document 1 mounts the device chip on a package substrate via bumps, and uses a resin layer to hermetically seal the gap between the package substrate and the device chip formed by the bumps, thereby forming a hollow structure (internal space or air cavity).

[0004] Although heat is generated by insertion loss in elastic wave devices, the piezoelectric body constituting the device chip has low thermal conductivity and poor heat dissipation. The thermal conductivity of lithium tantalate or lithium niobate used as the piezoelectric body is about 4W / mK to 6W / mK.

[0005] In the elastic wave device described in Patent Document 1, a non-covered portion is formed on the resin layer on the other side of the device chip opposite to the side facing the hollow structure portion, so that the other side of the device chip is exposed, and a metal layer formed on the resin layer is connected to the other side of the device chip at the non-covered portion, so that the heat generated by the device chip can be dissipated through the metal layer. Summary of the invention

[0006] The main problem to be solved by the present invention is to provide a new structure that can reasonably improve the heat dissipation of such an elastic wave device. The present invention provides the following scheme: an elastic wave device, comprising: a packaging substrate; a device chip, the device chip including a functional surface of a functional element of an IDT electrode, the functional surface facing one side of the packaging substrate and mounted on the packaging substrate; a sealing portion, the sealing portion comprising: a first portion, the first portion covering a non-functional surface of the device chip facing the functional surface of the device chip; and a second portion, the second portion extending from the first portion, covering a side surface in a thickness direction of the device chip, the side surface being between the functional surface and the non-functional surface, and the second portion extending to the one side of the packaging substrate, the sealing portion forming an internal space between the functional surface of the device chip and the one side of the packaging substrate, a blind hole extending from the non-functional surface to the functional surface and / or a through hole extending in the thickness direction of the device chip being formed on the device chip, and a heat dissipation path structure being provided in the device chip; the heat dissipation path structure extending toward the functional surface side following the first portion of the sealing portion using a material having a high thermal conductivity filled in the blind hole and / or the through hole.

[0007] Furthermore, the heat dissipation path structure formed in the through hole is connected to a ground wiring of a circuit structure formed on the functional surface of the device chip.

[0008] Furthermore, the bottom of the blind hole is located in a formation area corresponding to the functional element on the functional surface of the device chip.

[0009] Furthermore, the distance between the bottom of the blind hole and the functional surface of the device chip is more than 5 times the wavelength of the body wave generated in the device chip.

[0010] Furthermore, the sealing portion is composed of an inner layer and an outer layer, and a non-formed portion not containing the inner layer is provided in the first portion, and the heat dissipation path structure is connected to the outer layer through the non-formed portion in the first portion.

[0011] Furthermore, the sealing portion is composed of a structure having an inner layer formed of a resin material and an outer layer formed of a metal material, and a non-forming portion that does not contain the inner layer is provided in the first portion, and the heat dissipation path structure is connected to the outer layer through the non-forming portion in the first portion.

[0012] In a specific embodiment, the inner layer is made of a resin material.

[0013] In a specific embodiment, the outer layer is made of a metal material; the heat dissipation path structure is integrally connected to the outer layer, and the heat dissipation path structure extends toward the functional surface side from the first portion of the sealing portion.

[0014] In a specific embodiment, the material of the heat dissipation path structure is the same as the material of the outer layer.

[0015] Furthermore, the through hole is formed at a position outside a formation region of the functional element when the device chip is viewed from a direction perpendicular to the non-functional surface and the functional surface.

[0016] Furthermore, the elastic wave device is a transmit filter (Tx).

[0017] In the elastic wave device according to the present invention, heat generated in the device chip can be efficiently conducted to the sealing portion through the heat dissipation path structure and released to the outside. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a cross-sectional view of an elastic wave device according to an embodiment of the present invention. Figure 2 The cross section of the elastic wave device is shown at the CC line position.

[0019] Figure 2 yes Figure 1 Cross-sectional structure diagram at line AA in the figure.

[0020] Figure 3 yes Figure 1 Cross-sectional structure diagram at line BB in .

[0021] Figure 4 1 is a diagram showing a structure of an example of a resonator formed on a device chip constituting the first embodiment.

[0022] Figure 5 1 is a structural diagram showing an example of a circuit formed on a device chip constituting the first embodiment described above.

[0023] 1-elastic wave device; 2-package substrate; 2a-one side; 2b, 2ba-wiring; 2c-the other side; 2d-external connection terminal; 2e-edge; 3-device chip; 3a-functional surface; 3b-non-functional surface; 3c-side; 4-sealing part; 4a-first part; 4b-second part; 4c-inner layer; 4d-outer layer; 4e-non-forming part; 5-gap; 6-internal space; 7-functional element; 7a, 7aa, 7ab-resonator; 7b-I DT electrode; 7c-reflector; 7d-electrode finger; 7e-bus bar; 7f-electrode finger; 7g-bus bar; 8-wiring; 9-input and output ports; 10-protruding electrode; 11-circuit; 12-ground terminal; 12a-ground wiring; 13-blind hole; 13a-hole opening; 13b-hole bottom; 13c-blind hole row; 14-through hole; 14a-hole opening on one side; 14b-hole opening on the other side; 15-heat dissipation path structure; x-propagation direction; y-distance. DETAILED DESCRIPTION

[0024] The following is based on Figure 1 to Figure 5 A typical embodiment of the present invention will be described below. Acoustic wave device 1 in this embodiment is suitable for use as a frequency filter in mobile communication equipment and the like.

[0025] The elastic wave device 1 includes a device chip 3 mounted on one surface 2 a of a package substrate 2 . A functional element 7 , typically a resonator 7 a , including an IDT electrode 7 b is formed on a functional surface 3 a of the device chip 3 , and the functional surface 3 a faces the one surface 2 a of the package substrate 2 .

[0026] Typically, the device chip 3 is formed in a plate shape, the plate shape is a quadrilateral, the side of the plate shape is 0.5 mm to 1 mm, and the thickness is 0.15 mm to 0.2 mm. In addition, the package substrate 2 is formed in a plate shape, the plate shape is a quadrilateral, the side of the plate shape is 0.7 mm to 3 mm, and the thickness is 0.15 mm to 0.2 mm. The thickness of the elastic wave device 1 is about 0.4 mm to 0.6 mm.

[0027] The schematic diagram of the cross-sectional structure of the elastic wave device 1 is shown in FIG. Figure 1 Reference numeral 3 in the figure is a device chip, reference numeral 3a is its functional surface, reference numeral 3b is a non-functional surface facing the functional surface 3a, reference numeral 7a is a resonator, and reference numeral 9 is an input / output port (terminal) at the end of the wiring 8 formed on the functional surface 3a.

[0028] Protruding electrodes 10 are interposed between the device chip 3 and the package substrate 2 . The protruding electrodes 10 electrically connect the input / output ports 9 and the wirings 8 formed on the package substrate 2 side, and gaps 5 are formed between the protruding electrodes 10 .

[0029] External connection terminals 2 d for connecting the elastic wave device 1 to a motherboard (not shown) are formed on a surface 2 b of the package substrate 2 opposite to the surface 2 a on which the device chip 3 is mounted.

[0030] After the device chip 3 is mounted on one surface 2 a of the mounting substrate 2 , the sealing portion 4 is formed on one surface 2 a of the package substrate 2 .

[0031] The sealing portion 4 comprises: a first portion 4a, which covers the non-functional surface 3b of the device chip 3 facing the functional surface 3a of the device chip 3; and a second portion 4b, which continues from the first portion 4a and covers the side surface 3c which is the thickness direction of the device chip 3, wherein the side surface 3c is between the functional surface 3a and the non-functional surface 3b, and the second portion 4b extends to the one surface 2a of the packaging substrate 2, thereby forming an internal space 6 (hollow structure portion or air cavity) between the functional surface 3a of the device chip 3 and the one surface 2a of the packaging substrate 2.

[0032] The sealing portion 4 hermetically seals the gap 5 along the entire circumference of the device chip 3 , thereby forming the internal space 6 between the functional surface 3 a of the device chip 3 and the one surface 2 a of the package substrate 2 .

[0033] The device chip 3 includes a functional element 7 including an IDT electrode in a portion of the functional surface 3 a facing the internal space 6 . In the example shown in the figure, the functional element 7 includes a resonator 7 a .

[0034] The device chip 3 has the function of propagating elastic waves. Typically, the device chip 3 uses lithium tantalate or lithium niobate as a piezoelectric body. In addition, in other embodiments, the device chip 3 can be formed by stacking lithium tantalate or lithium niobate with materials such as sapphire, silicon, aluminum oxide, spinel, quartz or glass.

[0035] Figure 4 An example of a resonator 7a as a SAW filter is shown. The resonator 7a has an IDT electrode 7b and a reflector 7c formed in a manner of sandwiching the IDT electrode 7b. The IDT electrode 7b is composed of an electrode pair, each of which connects one end side of a plurality of electrode fingers 7d through a bus bar 7e, and the plurality of electrode fingers 7d are arranged in parallel so that the length direction of the electrode fingers 7d intersects with the propagation direction x of the elastic wave. The reflector 7c connects the ends of a plurality of electrode fingers 7f through a bus bar 7g, and the plurality of electrode fingers 7f are arranged in parallel so that the length direction of the electrode fingers 7f intersects with the propagation direction x of the elastic wave.

[0036] Typically, the resonator 7a is composed of a conductive metal film formed by photolithography technology.

[0037] In addition, a plurality of the resonators 7 a may be formed on one device chip 3 .

[0038] Figure 5 1 is a conceptual example of a circuit 11 provided on a device chip 3. Reference numeral 7aa denotes a resonator 7a connected in series between input and output ports 9, reference numeral 7ab denotes a resonator 7a connected in parallel between input and output ports 9, reference numeral 12 denotes a ground terminal, and reference numeral 8 denotes wiring. The number and arrangement of the resonators 7a may be changed as required. Figure 5 The circuit constitutes a ladder filter.

[0039] In addition, the device chip 3 is provided with a blind hole 13 extending from the non-functional surface 3b to the functional surface 3a, and a through hole 14 extending in the thickness direction of the device chip 3. It can be understood that the blind hole 13 is provided alone, the through hole 14 is provided alone, or the blind hole 13 and the through hole 14 are included.

[0040] Here, the thickness direction of the device chip 3 is a direction perpendicular to both the non-functional surface 3 b and the functional surface 3 a .

[0041] In the example shown in the figure, the blind vias 13 and the through vias 14 are formed simultaneously in the device chip 3 .

[0042] The opening 13a of the blind hole 13 is located on the non-functional surface 3b. In addition, the distance y (refer to Figure 1 ).

[0043] In addition, the blind hole 13 is formed in the formation area of ​​the functional element 7 in the functional surface 3a of the device chip 3 (refer to Figure 2 and Figure 3 ).

[0044] That is, when the device chip 3 is viewed from a direction perpendicular to the non-functional surface 3 b and the functional surface 3 a , the bottomed hole 13 is formed at a position overlapping with a formation region of the functional element 7 .

[0045] exist Figure 2 In the example of FIG. 1 , four functional elements 7 are formed on the functional surface 3 a , and a plurality of blind holes 13 are formed in a formation region of one of the functional elements 7 .

[0046] In the example shown in the figure, in the direction along one side of the quadrilateral device chip 3 ( Figure 2In the left-right direction), eight blind holes 13 are formed at intervals between adjacent blind holes 13 to form a blind hole row 13c. Figure 2 In the vertical direction, two rows of bottom holes 13c are formed at intervals between adjacent blind hole rows 13c. In the example shown in the figure, 16 blind holes 13 are formed in the formation area of ​​one functional element 7 in this way. In addition, in the example shown in the figure, the cross-sectional profile of each blind hole 13 is circular, and the aperture gradually decreases from the hole opening 13a toward the hole bottom 13b. Preferably, the blind hole 13 is formed by laser ablation.

[0047] On the other hand, the through hole 14 is such that one opening 14 a is located on the non-functional surface 3 b and the other opening 14 b is located on the functional surface 3 a .

[0048] In the example shown in the figure, the cross-sectional profile of the through hole 14 is circular, and the hole diameter gradually decreases from one hole 14a toward the other hole 14b. Preferably, the through hole 14 is formed by laser ablation.

[0049] The through hole 14 is not formed in a region where the functional element 7 is formed on the functional surface 3 a of the device chip 3 .

[0050] That is, the through hole 14 is formed at a position outside the formation region of the functional element 7 when the device chip 3 is viewed from a direction perpendicular to the non-functional surface 3 b and the functional surface 3 a .

[0051] In the example shown in the figure, the through hole 14 is formed in the above-mentioned formation area of ​​the device chip 3, in which a plurality of blind holes 13 are formed, and is adjacent to the functional element 7. Specifically, the through hole 14 is located adjacent to the blind hole 13 formed in the functional element 7. Figure 2 The position adjacent to the input / output port 9 in the lower left corner, that is, the left side of the input / output port 9.

[0052] The blind holes 13 and the through holes 14 formed in this way are filled with a material having a high thermal conductivity.

[0053] The blind hole 13 is filled with the material without any gap in the entire range from the hole opening 13a to the hole bottom 13b.

[0054] The through hole 14 is filled with the material without any gap in the entire range from the one opening 14 a to the other opening 14 b .

[0055] The device chip 3 of this embodiment has a structure in which the material filled in the blind vias 13 and the through vias 14 has a built-in heat dissipation path structure 15 extending toward the functional surface 3 a following the first portion 4 a of the sealing portion 4 .

[0056] Typically, nickel or an alloy of nickel and copper is used as the above-mentioned material.

[0057] In addition, typically, the material is filled into the blind holes 13 and the through holes 14 by electrolytic plating or sputtering.

[0058] In the present embodiment, the sealing portion 4 is configured to include an inner layer 4 c made of resin and an outer layer 4 d made of metal.

[0059] The inner layer 4c is made of insulating resin. The inner layer 4c can also be made of a resin with high thermal conductivity. This resin usually uses a filler made of a substance with high thermal conductivity, and its content in the resin as the base material is controlled within the range of 70wt% to 90wt%. Typically, the filler is made of granular bodies with a diameter of about 10μm.

[0060] Specifically, the resin constituting the inner layer 4c may be selected from epoxy resin containing fillers or phenolic resin containing fillers. Typically, aluminum oxide, aluminum nitride, or powdered diamond may be used as the filler.

[0061] At the same time, the first portion 4a is provided with a non-formed portion 4e of the inner layer 4c. In the example shown in the figure, the non-formed portion 4e of the inner layer 4c is provided at the formed portion of the blind hole 13 and the through hole 14. The non-formed portion 4e is in the shape of an opening on the inner layer 4c, and in the non-formed portion 4e, the non-functional surface 3b of the device chip 3 is not covered by the inner layer 4c. The opening 13a of the blind hole 13 and the opening 14a of one side of the through hole 14 are located in the non-formed portion 4e.

[0062] After the device chip 3 is mounted on the package substrate 2 in the above manner, the inner layer 4c as the first part 4a of the sealing portion 4 and the inner layer 4c as the second part 4b are formed. In the formation process, the non-formed portion 4e is formed at the same time as the inner layer 4c of the first part 4a is formed, or the entire inner layer 4c covering the non-functional surface 3b of the device chip 3 is first formed as the first part 4a, and then a part of the inner layer 4c is removed to form the non-formed portion 4e.

[0063] In this way, after the inner layer 4c of the sealing portion 4 is formed, the outer layer 4d as the first portion 4a and the outer layer 4d as the second portion 4b are formed. In the non-formed portion 4e of the inner layer 4c, the metal constituting the outer layer 4d is ensured to be filled in the non-formed portion 4e of the inner layer 4c without gaps. Thus, in the non-formed portion 4e of the inner layer 4c, the end portion of the non-functional surface 3b side of the heat dissipation path structure 15 is integrated with the outer layer 4d. That is, in the first portion 4a, the heat dissipation path structure 15 is connected to the outer layer 4d through the non-formed portion 4e.

[0064] Typically, the outer layer 4d is made of the same material as the heat dissipation path structure 15 or a material with good compatibility, and is typically formed by electrolytic plating or sputtering process.

[0065] In the example shown in the figure, a gap z is formed between the side surface 3c of the device chip 3 and the edge 2e of the one surface 2a of the package substrate 2 at any position around the center of the functional surface 3a of the device chip 3 (see Figure 1 At the same time, a portion 2ba of the wiring 2b on the package substrate 2 side is formed in a portion of one surface 2a of the package substrate 2 that is located outside the side surface 3c of the device chip 3.

[0066] In the example shown in the figure, the outer layer 4d of the second part 4b covers a part 2ba of the wiring 2b on the side of the packaging substrate 2, and the two are connected. The wiring 2b on the side of the packaging substrate 2 is formed in one side 2a of the packaging substrate 2 and is located at a position further outward than the side surface 3c of the device chip 3.

[0067] The heat generated by the device chip 3 is efficiently conducted from the heat dissipation path structure 15 to the sealing portion 4 , and is released to the outside through the sealing portion 4 .

[0068] In this embodiment, the heat generated by the device chip 3 is conducted from the heat dissipation path structure 15 to the outer layer 4d of the sealing part 4, and then from the outer layer 4d of the sealing part 4 to the wiring 2b of the packaging substrate 2, and finally efficiently released through the packaging substrate 2 side.

[0069] Preferably, heat dissipation path structure 15 formed by through-hole 14 is provided near functional element 7 on the transmission (Tx) side in the elastic wave device.

[0070] In this way, the heat dissipation performance near the functional element 7 on the transmission side of the device chip 3 can be effectively improved. Since the power on the transmission side is large, more heat will be generated.

[0071] In addition, preferably, the heat dissipation path structure 15 formed by the through hole 14 is connected to the ground wiring 12a in the wiring 8 of the functional surface 3a of the device chip 3, and the ground wiring 12a is located between the functional element 7 as the transmission side and the ground terminal 12. In this way, by using the wide ground wiring 12a, the heat dissipation efficiency can be improved, and the ground wiring 12a is connected to the outer layer 4d of the sealing part 4 through the heat dissipation path structure 15, thereby improving the shielding performance of the elastic wave device.

[0072] In addition, regarding the blind via 13 , a distance y between the bottom 13 b of the via and the functional surface 3 a of the device chip 3 is set to be at least five times the wavelength of the bulk wave generated by the device chip 3 .

[0073] If the distance y is less than 5 times the wavelength of the bulk wave generated by the device chip 3 , the blind hole 13 will have an excessive impact on the resonance frequency of the resonator formed on the functional surface 3 a .

[0074] Specifically, if the frequency of the input signal of the elastic wave device is 1 GHz, its wavelength is about 4 μm, so the distance y is set to be greater than 20 μm. If the frequency of the input signal of the elastic wave device is 2 GHz, its wavelength is about 2 μm, so the distance y is set to be greater than 10 μm.

[0075] Furthermore, it is needless to say that the present invention is not limited to the above-described embodiments, but includes all embodiments that can achieve the object of the present invention.

Claims

1. An elastic wave device, characterized in that: have: Package substrate; A device chip, wherein the device chip includes a functional surface of a functional element of an IDT electrode, the functional surface faces one surface of the packaging substrate, and is mounted on the packaging substrate; A sealing portion, the sealing portion comprising: a first part, the first part covers the non-functional surface of the device chip facing the functional surface of the device chip; and a second part, the second part is continued from the first part, covers the side surface of the device chip in the thickness direction, the side surface is between the functional surface and the non-functional surface, and the second part extends to the one side of the packaging substrate, the sealing part forms an internal space between the functional surface of the device chip and the one side of the packaging substrate, A blind hole extending from the non-functional surface to the functional surface and / or a through hole extending along the thickness direction of the device chip are formed on the device chip, and A heat dissipation path structure is provided in the device chip; the heat dissipation path structure fills the blind hole and / or the through hole.

2. The elastic wave device according to claim 1, characterized in that: The heat dissipation path structure formed in the through hole is connected to a ground wiring of a circuit structure formed on the functional surface of the device chip.

3. The elastic wave device according to claim 1, characterized in that: The bottom of the blind hole is located in a formation area corresponding to the functional element on the functional surface of the device chip.

4. The elastic wave device according to any one of claims 1 to 3, characterized in that: The distance between the bottom of the blind hole and the functional surface of the device chip is more than 5 times the wavelength of the bulk wave generated in the device chip.

5. The elastic wave device according to claim 1, characterized in that: The sealing portion is composed of an inner layer and an outer layer, and a non-formed portion that does not include the inner layer is provided in the first portion, and the heat dissipation path structure is connected to the outer layer through the non-formed portion in the first portion.

6. The elastic wave device according to claim 5, characterized in that: The inner layer is made of a resin material.

7. The elastic wave device according to claim 5, characterized in that: The outer layer is composed of a metal material.

8. The elastic wave device according to claim 1, characterized in that: The heat dissipation path structure is made of the same material as the outer layer, the heat dissipation path structure is integrally connected to the outer layer, and the heat dissipation path structure extends toward the functional surface side toward the first portion of the sealing portion.

9. The elastic wave device according to claim 1, characterized in that: The through hole is formed at a position outside a formation region of a functional element when the device chip is viewed from a direction perpendicular to the non-functional surface and the functional surface.

10. The elastic wave device according to claim 1, wherein: The cross-sectional profile of the through hole is circular, and the hole diameter gradually decreases from one hole opening toward the other hole opening.

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