Preparation method of glass-based and silicon-based adapter plate mixed and stacked radio frequency microsystem

Abstract

The invention provides a preparation method of a glass-based and silicon-based adapter plate mixed and stacked radio frequency microsystem, which comprises the following steps of: firstly, forming a damaged layer at a certain depth of two wafers through ion implantation, then growing an oxide layer (SiO2 layer) on the surfaces of the wafers, aligning through holes in the oxide layers of the two wafers, and bonding the two wafers together at low temperature to form a glass through hole (TGV); and after the pinboard process is completed, the wafer is separated at the damaged layer by annealing. The two wafers can be separated into three wafers for use, so that the utilization efficiency of the wafers is improved, and the production cost is reduced; the intermediate layer adapter plate is replaced by glass with natural electrical insulation property and low insertion loss from a silicon material, so that the loss of signals in the transmission process of the silicon adapter plate is reduced; the SiO2 is an insulator, so that side wall insulation treatment is not needed when the through hole is manufactured, the process flow is simplified, and the cost is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of electrical components, and in particular to a method for preparing a radio frequency microsystem of mixed stacking of glass-based and silicon-based adapter plates. Background Art

[0002] In the past few decades, the miniaturization, lightweight and low power consumption of electronic information systems have been mainly solved by reducing the line width of semiconductor device process. However, as the size of transistors gradually decreases, quantum effects and power consumption become the main bottlenecks restricting physical size, and Moore's Law gradually slows down. Therefore, people began to seek to meet the requirements of miniaturization and low power consumption of electronic systems by reducing the size of device packages and improving system integration. High-integration system-level packaging represented by advanced packaging has become a current research hotspot.

[0003] The RF microsystem is an integrated microsystem for RF applications based on through silicon via (TSV) etching and electroplating technology in advanced packaging, wafer-level adapter surface rewiring (RDL) technology, and high-precision wafer-level bonding technology. It is an important product form for realizing the miniaturized integration of various microwave components.

[0004] At present, the three-dimensional heterogeneous integrated microsystem mainly adopts the three-dimensional stacking method of multi-layer silicon adapter boards. The processing method is to process each layer of silicon adapter board separately, then embed or surface mount functional chips in the adapter board, and finally realize three-dimensional stacking through wafer-level bonding or module bonding. The current processing method has the following problems:

[0005] (1) In order to ensure the overall size of the package and reduce power consumption, each layer of the silicon adapter needs to be thinned to 100-200 μm during processing. The thickness of a complete silicon wafer is 500-800 μm, and most of the silicon is removed after grinding and polishing, which reduces the utilization efficiency of the wafer;

[0006] (2) Silicon has a high dielectric constant and a large loss factor, which results in poor electrical performance of silicon materials at high frequencies. In addition, silicon material TSVs have leakage current, which results in large signal losses during transmission on the silicon adapter board.

[0007] (3) The cost of silicon adapter boards is relatively high, and each adapter board is processed separately. Processes such as TSV etching, passivation layer deposition, and through-hole metal filling increase the process steps and production costs. Summary of the invention

[0008] The present invention aims to provide a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates. In this process, a damage layer is formed by ion implantation at a certain depth of two wafers, and then an oxide layer is grown on the surface of the wafer. The through holes in the oxide layers of the two wafers are aligned and bonded together at low temperature. After the adapter plate process is completed, annealing is used to separate the wafers at the damage layer. This method not only divides the wafer into multiple parts, but also integrates TGV and TSV together, thereby overcoming the shortcomings of low wafer utilization, complex process, high cost, and poor high-frequency performance in traditional microsystem processes.

[0009] The present invention provides a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates, comprising the following steps:

[0010] S1, forming a first damaged layer and a second damaged layer by ion implantation at a distance of 10 μm to 30 μm from the upper surface of the first double-sided polished silicon wafer and the second double-sided polished silicon wafer, respectively, wherein the thickness of the first double-sided polished silicon wafer and the second double-sided polished silicon wafer are both 500 μm to 800 μm;

[0011] S2, depositing a first SiO2 layer and a second SiO2 layer on the upper surfaces of the first double-sided polished silicon wafer and the second double-sided polished silicon wafer respectively;

[0012] S3, etching a first through hole and a second through hole of the same size at the same position of the first SiO2 layer and the second SiO2 layer, the etching depth is the same as the thickness of the first SiO2 layer and the second SiO2 layer, then removing the photoresist, cleaning, and electroplating filling metal in the first through hole and the second through hole to obtain a TGV through hole;

[0013] S4, rotating the first double-sided polished silicon wafer 180° so that the first SiO2 layer and the second SiO2 layer are placed face to face, and aligning the TGV through hole of the first SiO2 layer with the TGV through hole of the second SiO2 layer;

[0014] The first SiO2 layer and the second SiO2 layer are connected by metal low temperature bonding to obtain a hybrid module;

[0015] In the hybrid module, the portion above the first damage layer is the adapter plate A, the portion between the first damage layer and the second damage layer is the adapter plate B, and the portion below the second damage layer is the adapter plate C. The adapter plate B includes a first double-sided polished silicon wafer below the first damage layer, a first SiO2 layer, a second SiO2 layer, a second double-sided polished silicon wafer above the second damage layer, and a TGV through hole connected sequentially from top to bottom;

[0016] S5, annealing the hybrid module to generate bubbles in the first damaged layer and separating the adapter plate A from the adapter plate B to obtain an independent adapter plate A and a separated hybrid module;

[0017] S6, facing the separation surface of the separated hybrid module upward, and embedding passive components on the adapter board B of the separated hybrid module;

[0018] S7, performing photolithography to open holes and etching at the upper part of the TGV through-hole in the separated hybrid module, and the etching is stopped until the metal filled in the TGV through-hole is completely exposed and TSV is obtained, removing the photoresist and cleaning; depositing a passivation layer on the sidewall of the TSV, and electroplating the filling metal; finally, making RDL on the silicon surface of the separated hybrid module to obtain a separated hybrid module component;

[0019] S8, performing annealing treatment on the separated hybrid module assembly to allow the injected ions to diffuse due to heat and generate bubbles in the damaged layer, thereby separating the adapter plate B and the adapter plate C in the separated hybrid module assembly;

[0020] S9, the back side of the adapter board B is subjected to the same process as steps S6 and S7: photolithography opening, TSV etching, sidewall passivation, metal filling, and RDL production;

[0021] A first cavity is etched on the back side of the adapter plate B, and the etching depth ends at exposing the second SiO2 layer;

[0022] S10, performing surface mounting of a functional chip on the back side of the adapter board B, interconnecting the chip pads through RDL to communicate with external signals, and obtaining an adapter board B assembly;

[0023] S11, etching a second cavity on the surface of the adapter board, and then performing surface passivation and metal interconnection to obtain an adapter board A component;

[0024] S12, performing TSV, cavity opening, functional chip embedding and surface RDL production on the adapter board C to obtain an adapter board C component;

[0025] S13, overlapping the adapter board A component, the adapter board B component and the adapter board C component in sequence, performing wafer-level bonding, chip heterogeneous integration and signal interconnection, and cutting them into bare chips, wherein the functional chip of the adapter board B component is located in the second cavity, and the first cavity is located above the adapter board C component;

[0026] The interconnection between the bare chip and the PCB obtains a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates, and a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates is completed.

[0027] The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates described in the present invention is, as a preferred embodiment, in step S1, the injected ions are any one of the following: O ions, H ions, He ions or any combination of ions, and the surface is inclined by 5° to 10° during injection.

[0028] In the method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates described in the present invention, as a preferred embodiment, the thickness of the first damaged layer and the second damaged layer are both 10 nm to 50 nm.

[0029] The present invention discloses a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates. As a preferred embodiment, the ion implantation conditions of the first damaged layer and the second damaged layer are different so that the annealing separation conditions are different; the ion implantation conditions include ion concentration, ion type, implantation energy and implantation angle; the annealing temperature of the first damaged layer is lower than the annealing temperature of the second damaged layer.

[0030] The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates described in the present invention is, as a preferred embodiment, in step S5, the annealing temperature is between 300°C and 450°C.

[0031] The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates described in the present invention is, as a preferred embodiment, in step S8, the annealing temperature is between 450°C and 600°C.

[0032] The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates described in the present invention is, as a preferred embodiment, in step S2, the method for depositing SiO2 is any one of the following: PVD, CVD, PECVD or ALD;

[0033] The thickness of the first SiO2 layer and the second SiO2 layer are both 40 to 80 μm.

[0034] The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates described in the present invention is, as a preferred embodiment, in step S3, the etching method of the first through hole and the second through hole is any one of the following: plasma etching, laser ablation, electrochemical method, and the first through hole and the second through hole are both filled with metal Cu;

[0035] In step S4, a hybrid module is obtained by Cu-Cu low temperature bonding;

[0036] In step S7 , the TGV through hole is filled with metal Cu, and the sidewall of the TSV is filled with metal Cu.

[0037] The present invention discloses a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter boards. As a preferred method, a bare chip is interconnected with a PCB through a bottom ball planting BGA to obtain a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter boards.

[0038] The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates described in the present invention is, as a preferred embodiment, in step S1, the ion implantation conditions of the first damaged layer (2A) and the second damaged layer (2B) are the same;

[0039] In step S2, when the thickness of the first SiO2 layer and the second SiO2 layer are both greater than or equal to 100 μm, the annealing separation of step S5 and step S8 is combined and performed in step S5, and independent adapter plates A, B and C are obtained in step S5;

[0040] Steps S6 and S7 embed passive components on the upper surface of the adapter board B and prepare TSV and RDL.

[0041] The present invention proposes a preparation process for a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates. First, a damage layer is formed at different depths of two wafers by ion implantation, and then SiO2 of a certain thickness is grown thereon respectively. Blind holes are etched on the surfaces of the SiO2 of the two wafers and filled with metal, and the through holes of the two silicon oxides are aligned and bonded together at low temperature to form a through glass via (TGV). After the process of making the adapter plate is completed, annealing or chemical methods are used to separate the wafers at the damage layer, thereby dividing the wafers into three parts, thereby mixing and integrating the glass-based and silicon-based adapter plates, thereby achieving the purpose of improving wafer utilization efficiency, simplifying process procedures, reducing production costs, and reducing transmission losses in the high-frequency field.

[0042] The present invention has the following advantages:

[0043] (1) In this solution, two wafers can be separated into three wafers for use, which improves the utilization efficiency of the wafers and reduces production costs;

[0044] (2) Reducing signal loss during transmission on the silicon adapter by replacing the middle layer adapter with glass that has natural electrical insulation properties and low insertion loss;

[0045] (3) Since SiO2 itself is an insulator, there is no need for sidewall insulation treatment when making through holes, which simplifies the process flow and reduces costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 A schematic diagram of the process of ion implantation in step S1 of a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates;

[0047] Figure 2 A schematic diagram of the process of depositing SiO2 in step S2 of a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates;

[0048] Figure 3 A schematic diagram of the process of blind hole etching and metal filling in step S3 of a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates;

[0049] Figure 4A schematic diagram of the process of low-temperature Cu-Cu bonding in step S4 of a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates;

[0050] Figure 5 It is a schematic diagram of a preparation method of a radio frequency microsystem with mixed stacking of glass-based and silicon-based adapter plates, step S5 of intelligently cutting and separating the adapter plate A and the components of the adapter plates A, B, and C;

[0051] Figure 6 It is a schematic diagram of the process of pre-embedding passive components of adapter board B in step S6 of a method for preparing a radio frequency microsystem with mixed stacking of glass-based and silicon-based adapter boards;

[0052] Figure 7 A schematic diagram of the process of step S7 etching, sidewall passivation, blind hole filling and surface RDL in a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates;

[0053] Figure 8 It is a schematic diagram of the process of intelligently cutting and separating the adapter plate C in step S8 of a method for preparing a radio frequency microsystem with mixed stacking of glass-based and silicon-based adapter plates;

[0054] Fig. 9 A schematic diagram of the process of preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter boards, step S9, in which holes are opened on the back of adapter board B to make TSV, cavity and surface RDL;

[0055] Fig.10 It is a schematic diagram of the process of preparing a radio frequency microsystem with mixed stacking of glass-based and silicon-based adapter boards, step S10, surface mounting of the chip on the front side of the adapter board B and gold wire bonding;

[0056] Fig.11 It is a schematic diagram of the process of preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates, step S11 of digging a cavity in adapter plate A, passivating the surface, and metallizing interconnection lines;

[0057] Fig.12 A method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter boards, step S12, conventional process of adapter board C: TSV, cavity opening, chip embedding and surface RDL process diagram;

[0058] Fig.13 The present invention is a flow chart of wafer-level bonding and bottom ball implantation in step S13 of a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates.

[0059] Reference numerals:

[0060] 1A, first double-sided polished silicon wafer; 2A, first damaged layer; 3A, first SiO2 layer; 1B, second double-sided polished silicon wafer; 2B, second damaged layer; 3B, second SiO2 layer; 4, TGV through hole; 5, passive device; 6, TSV; 7, RDL; 81, first cavity; 82, second cavity; 9, BGA. DETAILED DESCRIPTION

[0061] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0062] Example 1

[0063] like Figures 1 to 13 As shown, a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates comprises the following steps:

[0064] (1) A first damaged layer 2A and a second damaged layer 2B are formed by co-injecting O ions, H ions, He ions or any combination of ions into a first double-sided polished silicon wafer 1A and a second silicon wafer 1B with a thickness of 500 μm to 800 μm. During the injection, the surface is tilted by 5° to 10° to reduce the channel effect. The injection depth is 10 μm to 30 μm from the upper surface of the wafer, respectively. The thickness of the first damaged layer 2A and the second damaged layer 2B are between 10 nm and 50 nm. The annealing temperature of the first damaged layer 2A is lower than the annealing temperature of the second damaged layer 2B.

[0065] Preferably, by changing the parameters such as ion implantation type, dosage, current density, etc., the two damaged layers can be separated under different annealing conditions;

[0066] (2) SiO2 3A and 3B with a thickness of 40 to 80 μm are deposited on the surfaces of silicon wafer A and silicon wafer B processed in step (1) by PVD, CVD, PECVD or ALD.

[0067] (3) Photolithography is performed on one side of the SiO2 of the silicon wafer A and silicon wafer B processed in step (2), and a through hole is etched at the same position of the SiO2 of the two wafers by plasma etching, laser ablation, electrochemical method, etc., and the etching depth is the same as that of the first damaged layer 2A and the second damaged layer 2B. The photoresist is removed, the silicon wafer is cleaned, and the through hole is filled with metal Cu by electroplating to form a TGV through hole 4;

[0068] (4) Align the TGV through holes 4 on the SiO2 side of the silicon wafer A and silicon wafer B processed in step (3) and perform Cu-Cu low-temperature bonding to form a hybrid module. At this time, the hybrid module forms a three-layer transfer board of A, B, and C with two damaged layers as the boundary;

[0069] (5) annealing the hybrid module treated in step (4) at a temperature between 300° C. and 450° C. The injected ions diffuse due to the heat, and bubbles are generated in the first damaged layer 2A, thereby separating the three parts of the hybrid module to form an independent adapter plate A and a separated hybrid module;

[0070] (6) placing the separated hybrid module processed in step (5) with the separation surface facing upward, and embedding a passive device 5 in the silicon by ion implantation or diffusion;

[0071] (7) Place the hybrid module separated surface facing upward after the treatment in step (6), perform photolithography, and use RIE or ICP to etch the silicon material to form TSV6, until the Cu filled in the TGV through hole is completely exposed. Remove the photoresist, clean it, deposit a passivation layer on the side wall of the through hole, then electroplate the metal Cu, and finally make RDL7 on the silicon surface;

[0072] (8) annealing the hybrid module treated in step (7) at a temperature between 450° C. and 600° C. The injected ions diffuse due to the heat, and bubbles are generated in the second damaged layer 2B, thereby separating the two parts of the hybrid module to form independent adapter plates B and C;

[0073] (9) The same process is performed on the back of the adapter B: photolithography opening, TSV etching, sidewall passivation, metal filling, and finally RDL production; the difference is that a cavity 81 needs to be etched on the surface of the adapter, and the etching depth is limited to expose SiO2;

[0074] (10) The functional chip is surface mounted on the back of the adapter board B processed in step (9), and the chip pads are interconnected through RDL to achieve communication with external signals;

[0075] (11) performing conventional transfer board manufacturing processes on the transfer board A, including etching the cavity 82, surface passivation, metal interconnection, etc.;

[0076] (12) The conventional transfer board manufacturing process is performed on the transfer board C, including TSV, cavity opening, functional chip embedding and surface RDL production.

[0077] (13) The adapter plates A, B, and C are bonded at the wafer level to realize heterogeneous chip integration and signal interconnection. The bonded hybrid module is cut into single-chip dies, and the module is interconnected with the PCB through the bottom ball bonding (BGA) 9, thereby realizing a multi-layer three-dimensional heterogeneous integrated microsystem.

[0078] Example 2

[0079] like Figures 1 to 13 As shown, a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates comprises the following steps:

[0080] (1) A first damaged layer 2A and a second damaged layer 2B are formed by co-injecting O ions, H ions, He ions or any combination of ions into a first double-sided polished silicon wafer 1A and a second silicon wafer 1B with a thickness of 500 μm to 800 μm. During the injection, the surface is tilted by 5° to 10° to reduce the channel effect. The injection depth is 10 μm to 30 μm from the upper surface of the wafer, respectively. The thickness of the first damaged layer 2A and the second damaged layer 2B are between 10 nm and 50 nm. The annealing temperature of the first damaged layer 2A is the same as the annealing temperature of the second damaged layer 2B.

[0081] Preferably, by changing the parameters such as ion implantation type, dosage, current density, etc., the two damaged layers can be separated under different annealing conditions;

[0082] (2) SiO2 3A and 3B having a thickness greater than or equal to 100 μm are deposited on the surfaces of silicon wafer A and silicon wafer B processed in step (1) by using PVD, CVD, PECVD or ALD.

[0083] (3) Photolithography is performed on one side of the SiO2 of the silicon wafer A and silicon wafer B processed in step (2), and a through hole is etched at the same position of the SiO2 of the two wafers by plasma etching, laser ablation, electrochemical method, etc., and the etching depth is the same as that of the first damaged layer 2A and the second damaged layer 2B. The photoresist is removed, the silicon wafer is cleaned, and the through hole is filled with metal Cu by electroplating to form a TGV through hole 4;

[0084] (4) Align the TGV through holes 4 on the SiO2 side of the silicon wafer A and silicon wafer B processed in step (3) and perform Cu-Cu low-temperature bonding to form a hybrid module. At this time, the hybrid module forms a three-layer transfer board of A, B, and C with two damaged layers as the boundary;

[0085] (5) annealing the hybrid module treated in step (4) at a temperature between 300° C. and 450° C. The injected ions diffuse due to the heat, and bubbles are generated in the first damaged layer 2A and the second damaged layer 2B, thereby separating the three parts of the hybrid module to form independent transfer plates A, B and C. Transfer plate B itself can provide sufficient mechanical support;

[0086] (6) The adapter plate B processed in step (5) is placed with one side facing upward, and passive components 5 are embedded in the silicon by ion implantation or diffusion;

[0087] (7) Photolithography is performed on the adapter plate B processed in step (6), and silicon material is etched by RIE or ICP to form TSV6, and the etching is stopped until the Cu filled in the TGV through hole is completely exposed. The photoresist is removed and the through hole is cleaned; a passivation layer is deposited on the side wall of the through hole, and then metal Cu is electroplated and filled, and finally RDL7 is made on the silicon surface;

[0088] (8) Rotate adapter plate B 180° with the back facing upwards;

[0089] (9) The same process is performed on the back of the adapter B: photolithography opening, TSV etching, sidewall passivation, metal filling, and finally RDL production; the difference is that a cavity 81 needs to be etched on the surface of the adapter, and the etching depth is limited to expose SiO2;

[0090] (10) The functional chip is surface mounted on the back of the adapter board B processed in step (9), and the chip pads are interconnected through RDL to achieve communication with external signals;

[0091] (11) performing conventional transfer board manufacturing processes on the transfer board A, including etching the cavity 82, surface passivation, metal interconnection, etc.;

[0092] (12) The conventional transfer board manufacturing process is performed on the transfer board C, including TSV, cavity opening, functional chip embedding and surface RDL production.

[0093] (13) Adapter plates A, B, and C are bonded at the wafer level to achieve heterogeneous chip integration and signal interconnection. The bonded hybrid module is cut into single dies, and the module is interconnected with the PCB through the bottom ball BGA9, thereby realizing a multi-layer three-dimensional heterogeneous integrated microsystem.

[0094] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates, characterized in that: The following steps are involved: S1, forming a first damaged layer (2A) and a second damaged layer (2B) by ion implantation at a distance of 10 μm to 30 μm from the upper surface of a first double-sided polished silicon wafer (1A) and a second double-sided polished silicon wafer (1B), respectively, wherein the thickness of the first double-sided polished silicon wafer (1A) and the second double-sided polished silicon wafer (1B) are both 500 μm to 800 μm; S2, depositing a first SiO2 layer (3A) and a second SiO2 layer (3B) on the upper surfaces of the first double-sided polished silicon wafer (1A) and the second double-sided polished silicon wafer (1B), respectively; S3, etching a first through hole and a second through hole of the same size at the same position of the first SiO2 layer (3A) and the second SiO2 layer (3B), wherein the etching depth is the same as the thickness of the first SiO2 layer (3A) and the second SiO2 layer (3B), then removing the photoresist, cleaning, and electroplating a filling metal in the first through hole and the second through hole to obtain a TGV through hole (4); S4, rotating the first double-sided polished silicon wafer (1A) by 180° so that the first SiO2 layer (3A) and the second SiO2 layer (3B) are placed face to face, and aligning the TGV through hole (4) of the first SiO2 layer (3A) and the TGV through hole (4) of the second SiO2 layer (3B); The first SiO2 layer (3A) and the second SiO2 layer (3B) are connected by metal low-temperature bonding to obtain a hybrid module; In the hybrid module, the portion above the first damaged layer (2A) is an adapter plate A, the portion between the first damaged layer (2A) and the second damaged layer (2B) is an adapter plate B, and the portion below the second damaged layer (2B) is an adapter plate C, wherein the adapter plate B comprises the first double-sided polished silicon wafer (1A) below the first damaged layer (2A), the first SiO2 layer (3A), the second SiO2 layer (3B), the second double-sided polished silicon wafer (1B) above the second damaged layer (2B), and the TGV through hole (4) connected in sequence from top to bottom; S5, annealing the hybrid module to generate bubbles in the first damaged layer (2A) and separating the adapter plate A from the adapter plate B to obtain an independent adapter plate A and a separated hybrid module; S6, facing the separation surface of the separated hybrid module upwards, and embedding passive components (5) on the adapter board B (B) of the separated hybrid module; S7, performing photolithography to open a hole and perform etching on the upper portion of the TGV through hole (4) in the separated hybrid module until all the metal filled in the TGV through hole (4) is exposed and a TSV (6) is obtained, removing the photoresist and cleaning; depositing a passivation layer on the side wall of the TSV (6), and electroplating the filled metal; and finally making an RDL (7) on the silicon surface of the separated hybrid module to obtain a separated hybrid module component; S8, performing annealing treatment on the separated hybrid module assembly so that the injected ions diffuse due to heat and generate bubbles in the damaged layer (2B), thereby separating the adapter plate B and the adapter plate C in the separated hybrid module assembly; S9, performing the same process as steps S6 and S7 on the back side of the adapter board B: photolithography opening, etching the TSV (6), sidewall passivation, metal filling, and manufacturing the RDL (7); Etching a first cavity (81) on the back side of the adapter plate B, with the etching depth ending at a point where the second SiO2 layer (3B) is exposed; S10, performing surface mounting of a functional chip on the back side of the adapter board B, and interconnecting chip pads through the RDL (7) to communicate with external signals, thereby obtaining an adapter board B assembly; S11, etching a second cavity (82) on the surface of the adapter board A, and then performing surface passivation and metal interconnection to obtain an adapter board A component; S12, performing TSV, cavity opening, functional chip embedding and surface RDL production on the adapter board C to obtain an adapter board C component; S13, overlapping the adapter board A component, the adapter board B component and the adapter board C component in sequence, performing wafer-level bonding, chip heterogeneous integration and signal interconnection, and cutting them into bare chips, wherein the functional chip of the adapter board B component is located in the second cavity (82), and the first cavity (81) is located above the adapter board C component; The interconnection between the bare chip and the PCB obtains a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates, and a method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates is completed.

2. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: In step S1, the implanted ions are any one of the following: O ions, H ions, He ions or any combination of ions, and the surface is inclined by 5° to 10° during the implantation.

3. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: The thickness of the first damaged layer (2A) and the second damaged layer (2B) are both 10 nm to 50 nm.

4. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: The ion implantation conditions of the first damaged layer (2A) and the second damaged layer (2B) are different so as to make the annealing separation conditions different; the ion implantation conditions include ion concentration, ion type, implantation energy and implantation angle; the annealing temperature of the first damaged layer (2A) is lower than the annealing temperature of the second damaged layer (2B).

5. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: In step S5, the annealing temperature is between 300°C and 450°C.

6. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: In step S8, the annealing temperature is between 450°C and 600°C.

7. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: In step S2, the method of depositing SiO2 is any one of the following: PVD, CVD, PECVD or ALD; The thickness of the first SiO2 layer (3A) and the second SiO2 layer (3B) are both 40 to 80 μm.

8. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: In step S3, the etching method of the first through hole and the second through hole is any one of the following: plasma etching, laser ablation, electrochemical method, and the first through hole and the second through hole are both filled with metal Cu; In step S4, the hybrid module is obtained by Cu-Cu low temperature bonding; In step S7, metal Cu is filled in the TGV through hole (4), and metal Cu is filled in the side wall of the TSV (6).

9. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: The bare chip is interconnected with the PCB via a bottom ball planting BGA (9) to obtain a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter boards.

10. The method for preparing a radio frequency microsystem with a mixed stack of glass-based and silicon-based adapter plates according to claim 1, characterized in that: In step S1, the ion implantation conditions of the first damaged layer (2A) and the second damaged layer (2B) are the same; In step S2, the thickness of the first SiO2 layer (3A) and the second SiO2 layer (3B) are both greater than or equal to 100 μm; The annealing separation and combination of step S5 and step S8 are performed in step S5, and independent transfer plates A, B and C are obtained in step S5; Steps S6 and S7 embed passive components (5) on the upper surface of the adapter board B and prepare TSV (6) and RDL (7).

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