Circuit and method for detecting failure of MEMS device comprising oscillating mass

Abstract

Embodiments of the present disclosure relate to a circuit and method for detecting a failure of a MEMS device including an oscillating mass. A fault in a periodically oscillating MEMS mass is detected by processing a position signal having an amplitude and an oscillation frequency, generated as a function of the mass position. A first reference signal and a second reference signal formed from samples of an orthogonal sinusoid at an oscillation frequency are generated. The first multiplier and the second multiplier generate a first product signal and a second product signal, respectively, via multiplication of the position signal with the first reference signal and the second reference signal. The first product signal and the second product signal are low-pass filtered to generate a first filtered signal and a second filtered signal, respectively. The estimator circuit determines an estimate of the amplitude from the first filtered signal and the second filtered signal. A decision circuit detects the presence of a fault based on a comparison of the estimated value to the range of values.

Description

[0001] Priority claim

[0002] This application claims the benefit of priority from Italian Patent Application No. 102023000013692, filed on June 30, 2023, the contents of which are hereby incorporated herein by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] The present invention relates to circuits and methods for detecting faults in a micro-electromechanical system (MEMS) device including an oscillating mass. Background Art

[0004] As is known, the MEMS devices available today envisage the presence of a moving mass which, in use, oscillates, for example linearly or angularly.

[0005] For example, MEMS mirrors are well known, in which the mobile mass is formed by so-called micromirrors, which oscillate angularly. Typically, MEMS mirrors are driven at a desired frequency, which is typically approximately equal to the resonance frequency, in order to maximize the angle of the aperture (i.e. the amplitude of the (angular) oscillation of the micromirrors) and reduce the consumption level.

[0006] Furthermore, available is a failure detection circuit, also referred to as a "fault detection circuit", which, when coupled to, for example, a MEMS mirror, continuously detects whether a reduction in the angle of the aperture of the micromirror occurs, for example, because the micromirror is driven at a frequency higher or lower than the desired frequency. Furthermore, the fault detection circuit is able to detect possible situations of failure of the micromirror, i.e. situations in which the micromirror is no longer able to move.

[0007] Fault detection circuits are designed to detect possible faults in a reliable manner in the shortest possible time, i.e. to detect any possible malfunctions without generating so-called false alarms. Furthermore, from a circuit point of view, the fault detection circuit must ideally be simple in order to reduce the consumption level and the overall size and to facilitate the corresponding calibration procedures.

[0008] An example of a circuit for detecting a fault in a micromirror is illustrated in U.S. Patent Application Publication No. 2018 / 0129036A1 (incorporated herein by reference). This solution envisages providing a differentiator circuit downstream of the analog-to-digital converter, thereby having a shorter response time. However, it has been noted that, due to the high-pass type frequency response that characterizes the differentiator, this solution is highly susceptible to the phenomenon of high-frequency noise, resulting in a degradation of performance.

[0009] There is a need in the art to provide a fault detection circuit that will at least partially overcome the shortcomings of the prior art. Summary of the invention

[0010] Embodiments herein relate to circuits and methods for detecting faults.

[0011] In an embodiment, a circuit is provided for detecting a fault in a MEMS device including a periodically oscillating mass. The circuit is configured to receive a position signal formed by successive samples of an analog signal, the position signal being a function of the position of the mass and having an amplitude and an oscillation frequency. The fault detection circuit includes: a reference circuit, the reference circuit is configured to generate a first reference signal and a second reference signal, the first reference signal and the second reference signal are respectively formed by continuous samples of the first sinusoidal signal and continuous samples of the second sinusoidal signal, the first sinusoidal signal and the second sinusoidal signal have a frequency equal to the oscillation frequency and are phase-shifted by 90° relative to each other; a first multiplier, the first multiplier is configured to generate a first product signal by multiplying the position signal by the first reference signal; a second multiplier, the second multiplier is configured to generate a second product signal by multiplying the position signal by the second reference signal; a first filter and a second filter of a low-pass type, the first filter and the second filter are configured to filter the first product signal and the second product signal, respectively, and generate a first filtered signal and a second filtered signal, respectively; an estimator circuit, the estimator circuit is configured to determine an estimate of the amplitude based on the first filtered signal and the second filtered signal; and a decision circuit, the decision circuit is configured to compare the estimate of the amplitude with a range of values ​​and detect the presence of a fault based on the result of the comparison.

[0012] In an embodiment, a method for detecting a fault in a MEMS device is provided, the MEMS device comprising a mass that periodically oscillates based on a position signal formed by successive samples of an analog signal, the position signal being a function of the position of the mass and having an amplitude and an oscillation frequency. The method comprises: generating a first reference signal and a second reference signal, the first reference signal and the second reference signal being formed by successive samples of a first sinusoidal signal and successive samples of a second sinusoidal signal, respectively, the first sinusoidal signal and the second sinusoidal signal having a frequency equal to the oscillation frequency and being phase-shifted by 90° relative to each other; generating a first product signal via multiplication of the position signal and the first reference signal; generating a second product signal via multiplication of the position signal and the second reference signal; generating a first filtered signal and a second filtered signal via low-pass filtering of the first product signal and the second product signal, respectively; determining an estimate of the amplitude from the first filtered signal and the second filtered signal; and comparing the estimate of the amplitude with a range of values, and detecting the presence of a fault based on the result of the comparison. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] For a better understanding of the present invention, embodiments of the present invention will now be described by way of non-limiting examples only, with reference to the accompanying drawings, in which:

[0014] Figure 1 A circuit diagram of a circuit for driving a micro-mirror is shown;

[0015] Figure 2 A circuit diagram of a fault detection circuit is shown;

[0016] Figure 3 It is a schematic diagram of the points arranged on the circle of angle measurement;

[0017] Figure 4 is a schematic diagram of points arranged on a circle in a Cartesian plane and vectors defined by said points;

[0018] Figure 5 A flow chart showing operations according to a calculation algorithm;

[0019] Figure 6 a flow chart showing operations performed by the present fault detection circuit; and

[0020] Figure 7 It is a schematic diagram of the structure of a bit string. DETAILED DESCRIPTION

[0021] Figure 1 A drive circuit 1 is shown coupled to a MEMS device 2, the MEMS device comprising a micromirror 3. In this regard, hereinafter, the present description refers precisely to the case in which the mobile mass of the MEMS device 2 is formed by the micromirror 3, which oscillates angularly. However, there are possible variants (not explicitly illustrated) in which the mobile mass is different from the mirror and / or in which the mobile mass oscillates, for example, linearly, rather than angularly, as in the case of a MEMS gyroscope, for example.

[0022] In particular, the drive circuit 1 comprises an analog front end (AFE) circuit 4 of analog type, the AFE circuit 4 being coupled to the MEMS device 2 to receive a position signal sx(t) of analog and continuous time type, the position signal sx(t) indicating the angular position of the micro-mirror 3. In particular, the position signal sx(t) is generated by the MEMS device 2 in a manner known per se, for example via a mechanism implementing a detection of the angular position of the capacitive type. Based on the position signal sx(t), the front end circuit 4 generates a processed position signal px(t) of analog and continuous time type; for example, the front end circuit 4 may perform anti-aliasing filtering on the position signal sx(t), and / or may perform adaptation on the dynamic range of the position signal sx(t). In particular, as explained in more detail below, the position signal sx(t) and the processed position signal px(t) are sinusoidal signals having a frequency equal to the oscillation frequency of the micro-mirror 3, which frequency is hereinafter referred to as the frequency f sense specified.

[0023] The driving circuit 1 further comprises an analog-to-digital converter (ADC) 6 and a filtering circuit 10 . The filtering circuit 10 further comprises a digital filter 12 , a sub-sampler 14 and a series of biquad (BQ) filters 16 .

[0024] Specifically, the input of the analog-to-digital converter 6 is connected to the output of the front-end circuit 4, so that the analog-to-digital converter 6 generates a sampled position signal px[n] starting from the processed position signal px(t). For example, the analog-to-digital converter 6 is an analog-to-digital converter of the Σ(sigma)-Δ(delta) (ΣΔ) type. In addition, the analog-to-digital converter 6 operates at a first sampling frequency f ADC Generate samples of the sampled position signal px[n].

[0025] In more detail, as described above, the front-end circuit 4 can adjust the dynamic range of the processed position signal px(t) according to the dynamic range of the analog-to-digital converter 6. In addition, the samples of the sampled position signal px[n] can be expressed as follows (ignoring the contribution of white noise and flicker noise):

[0026] Where n=0,1,2,…

[0027] Among them: A sense is an amplitude directly proportional to the amplitude of the (angular) oscillation of the micromirror 3; ω sense =2π·f sense ;t s is the sampling period and is equal to 1 / f ADC ; φ senseis the phase of the micromirror 3 oscillation (but with possible contributions of phase shift introduced by the front end circuit 4 and by the analog-to-digital converter 6); QN is the contribution of the quantization noise caused by the sampling performed by the analog-to-digital converter 6; and OS is a possible offset contribution.

[0028] For example and without implying any general damages, A sense The amplitude of the oscillation of the micro-mirror 3 can be linearly dependent via a constant equal to Ksense·G_AFE / Vref_ADC, wherein: G_AFE is the gain introduced by the front-end circuit 4; Ksense is a constant so that the amplitude of the position signal sx(t) (which is, for example, a voltage signal) is equal to the product of the constant Ksense and the amplitude of the oscillation of the micro-mirror 3; and Vref_ADC is the normalized voltage of the analog-to-digital converter 6.

[0029] The input of the digital filter 12 is connected to the output of the analog-to-digital converter 6, so that the digital filter 12 generates a filtered digital signal fpx[n] according to the sampled position signal px[n]. For example, the digital filter 12 is a low-pass filter. In addition, the digital filter 12 is at a first sampling frequency f ADC Generate samples of the filtered digital signal fpx[n] below.

[0030] The input of the subsampler 14 is connected to the output of the digital filter 12, so that the subsampler 14 generates a subsampled signal ssx[n] based on the filtered digital signal fpx[n] and by subsampling (or decimation). For example, the subsampler 14 generates the subsampled signal ssx[n] by selecting a corresponding sample (e.g., the first sample) for each set formed by a number K2 of consecutive samples of the filtered digital signal fpx[n] and discarding other K2-1 samples, so that the samples of the subsampled signal ssx[n] are in the same order as fpx[n]. ADC / K2 equal to the second sampling frequency f BQ In practice, K2 is the so-called subsampling factor of the subsampler 14 and is equal to ten, for example.

[0031] Although not shown, the series of biquad filters 16 may be formed by a number (e.g., four) of biquad digital filters cascaded together. Furthermore, the input of the series of biquad filters 16 is connected to the output of the subsampler 14, so that at the output from the series of biquad filters 16, there is a filtered subsampled signal fssx[n], the signal fssx[n] being a function of the subsampled signal ssx[n] and the samples of the signal fssx[n] being at the same frequency as the second sampling frequency f BQ The biquad filters can be different from each other and can be implemented as a whole, for example, with a frequency fsense centered bandpass filter.

[0032] The driving circuit 1 further includes a control circuit 20 and an oscillation driving circuit 22 .

[0033] The control circuit 20 has an input connected to the output of the series of biquad filters 16 for receiving the filtered subsampled signal fssx[n] and an output connected to the input of the oscillation drive circuit 22. Furthermore, the output of the oscillation drive circuit 22 is coupled to the MEMS device 2.

[0034] In a manner known per se, the control circuit 20 comprises a corresponding phase-locked loop (PLL) circuit (not shown) which generates a phase-locked loop having a clock frequency f PLL A timing signal of equal frequency (not shown).

[0035] In addition, the control circuit 20 controls the oscillation drive circuit 22 so that the oscillation drive circuit 22 generates an analog type drive signal sV(t), which has a frequency similar to the drive frequency f. DRV Equal frequency and amplitude V DRV The drive signal sV(t) is applied to an actuator (not shown) present in the MEMS device 2 in a manner known per se, so that the micromirror 3 moves at a frequency equal to the drive frequency f. DRV Therefore, the oscillation frequency f of the micro-mirror 3 is sense Equal to the driving frequency f DRV The actuator may be, for example, an electrostatic or piezoelectric actuator and may be driven in a differential manner based on a drive signal sV(t).

[0036] That being said, the analog-to-digital converter 6 is clocked based on the timing signal so that the relationship f ADC =f PLL / K1 applies. In addition, the drive frequency f DRV is the timing frequency f PLL function; specifically, by way of example only, it is assumed in the following:

[0037] f DRV =f PLL / (16×K1×K2)

[0038] Therefore, the following relationship also applies:

[0039] f ADC =16×K2×f DRV

[0040] f BQ =16×f DRV

[0041] Furthermore, in a manner known per se, the control circuit 20, the oscillation drive circuit 22, the MEMS device 2, the front-end circuit 4, the analog-to-digital converter 6 and the filter circuit 10 form a closed control loop which converts the drive frequency f DRV The value of is set so that it will be, for example, substantially equal to the resonance frequency of the micromirror 3 .

[0042] Specifically, the filtered subsampled signal fssx[n] also indicates the amplitude A sense (but for possible scaling factors introduced by the digital filter 12, the subsampler 14 and the series of biquad filters 16) and the phase φ sense (but with a possible contribution of the phase shift introduced by the digital filter 12, the subsampler 14 and the successive biquad filter 16). Thus, in a manner known per se and therefore not described in greater detail, the control circuit 20 may, for example, set the amplitude A to sense and phase φ sense With calibration amplitude A cal and calibration phase φ cal Compare and can be based on the difference Sum and Difference A sense -A cal , applying the timing frequency f PLL (and hence the drive frequency f DRV ) and amplitude V DRV , where the calibration amplitude A cal and calibration phase φ cal represents the values ​​of the amplitude and phase of the oscillation of the micromirror 3 when the micromirror 3 is driven at a desired frequency (in this example, the resonance frequency) in the absence of faults, and can be determined in a calibrated circuit of the MEMS device 2 .

[0043] For example, the amplitude V DRV Can have a difference A sense -A cal PID dependence. Similarly, the timing frequency f PLL (and hence the drive frequency f DRV ) can have a difference The control circuit 20 thus phase-locks the timing signal with the position signal sx(t), the processed position signal px(t) and the sampled position signal px[n]; it thus phase-locks the timing frequency f PLL is locked to the oscillation frequency f of the micromirror 3 sense , so that the latter frequency (which is equal to the timing frequency f PLL The submultiple of will be equal to the resonant frequency of the micro-mirror 3.

[0044] In practice, the above closed control loop can not only adjust the driving frequency f DRV In addition to being set to the value of the resonant frequency, it also acts as a control loop for the gain (i.e., amplitude), thereby ideally obtaining A without any glitches. sense =A cal .

[0045] In summary, Figure 2 A fault detection circuit 30 is shown, which is coupled to the analog-to-digital converter 6 so as to receive the sampled position signal px[n].

[0046] Specifically, the fault detection circuit 30 includes a reference generator 32, a first multiplier circuit 34 and a second multiplier circuit 36, and a first low pass filter 40 and a second low pass filter 42. It should be noted that no pre-filtering operation is performed on the sampled position signal px[n] before multiplication using the first multiplier circuit 34 and the second multiplier circuit 36. Therefore, the isolation of the resonant signal for fault detection is performed on the sampled position signal px[n] from the sensor without the need for preliminary filtering action. An advantage of this configuration is that it allows fast fault detection, because any preliminary filtering of the sampled position signal px[n] will disadvantageously introduce a large time constant, resulting in a slow fault detection and reaction time. The first low pass filter 40 and the second low pass filter 42 are used to cut off the intermodulation products of the multiplication operations performed by the first multiplier circuit 34 and the second multiplier circuit 36. This improves the accuracy of the extraction of the DC component.

[0047] The reference generator 32 has a first output and a second output, at which the reference generator 32 generates a first reference signal xref[n] and a second reference signal yref[n], respectively, both of which are of digital type and have a sampling frequency equal to the first sampling frequency f ADC .

[0048] In more detail, the samples of the first reference signal xref[n] are respectively as follows:

[0049] Where n=0,1,2,…

[0050] Where: ref =2π×f ref , where f ref =f DRV ; and φ ref is an arbitrary reference phase. Although not shown, to obtain f ref =f DRV , a reference generator 32 is coupled to the control circuit 20 .

[0051] In addition, the samples of the second reference signal yref[n] are respectively as follows:

[0052] Where n=0,1,2,…

[0053] In practice, for each value of n, corresponding samples of the first reference signal xref[n] and the second reference signal yref[n] form a pair of coordinates (xref[n]; yref[n]) that identifies the corresponding point P i The position on the circle of angle measurement, for example, Figure 3 As shown, I = n mod (R), where R = f ADC / f DRV and "mod" denotes a modular operation according to modular arithmetic (in Figure 3 In order to simplify the representation, it is assumed that R = 16).

[0054] Furthermore, the i+1th point P has the following coordinates:

[0055]

[0056] in:

[0057]

[0058] and

[0059] i=0,1,2,…,(f ADC / f DRV -1).

[0060] Therefore, in order to generate samples of the first reference signal xref[n] and samples of the second reference signal yref[n] in a computationally efficient manner, the reference generator 32 may calculate the i+1th sample of the first reference signal xref[n] and the i+1th sample of the second reference signal yref[n] in the following manner:

[0061] xref[i+1]=xref[i]×xrot-yref[i]×yrot

[0062] yref[i+1]=xref[i]×yrot+yref[i]x·xrot

[0063] in:

[0064]

[0065]

[0066] And where i=0,1,2,…,(f ADC / fDRV -1).

[0067] The reference generator 32 is therefore able to calculate any pair of samples of the first reference signal xref[n] and of the second reference signal yref[n] based on the relationship above and therefore based on a linear combination of the samples in the previous pair without having to implement any look-up table.

[0068] Regardless of the details regarding the generation of samples of the first reference signal xref[n] and samples of the second reference signal yref[n], the first multiplier circuit 34 has a first input and a second input, which are respectively connected to the output of the analog-to-digital converter 6 and the first output of the reference generator 32, thereby receiving the sampled position signal px[n] and the first reference signal xref[n], respectively.

[0069] The second multiplier circuit 36 ​​has a first input and a second input, which are respectively connected to the output of the analog-to-digital converter 6 and the second output of the reference generator 32, so as to receive the sampled position signal px[n] and the second reference signal yref[n] respectively.

[0070] The first multiplier circuit 34 multiplies each sample of the sampled position signal px[n] by the corresponding sample of the first reference signal xref[n], thereby generating a first product signal y[n] of digital type, the samples of which are respectively equal to (neglecting the contribution of white noise and flicker noise) for a first approximation:

[0071] Where n=0,1,2,…

[0073] in

[0074] The second multiplier circuit 36 ​​multiplies each sample of the sampled position signal px[n] by the corresponding sample of the second reference signal yref[n], thereby generating a second product signal x[n] of digital type, the samples of which are respectively equal to (ignoring the contribution of white noise and flicker noise) for a first approximation:

[0075] Where n=0,1,2,…

[0077] The input of the first low-pass filter 40 and the input of the second low-pass filter 42 are connected to the output of the first multiplier circuit 34 and the output of the second multiplier circuit 36, respectively, so as to generate the first filtered signal Y LPF [n] and the second filtered signal XLPF [n], the first filtered signal Y LPF [n] and the second filtered signal X LPF [n] is obtained by low-pass filtering the first product signal y[n] and the second product signal x[n] respectively.

[0078] Specifically, the first low-pass filter 40 and the second low-pass filter 42 are digital filters which are identical to each other and designed to filter the frequency f except for the corresponding harmonics. ref In this regard, it can be shown that both the first product signal y[n] and the second product signal x[n] have a frequency of f=2·f DRV (due to intermodulation) and frequency f = f DRV There are undesired spectral contributions at all φ (due to the offset), in addition to the spectral contribution of the quantization noise, which to a first approximation increases with increasing frequency, and contributions due to white noise and flicker noise.

[0079] For example, the first low-pass filter 40 and the second low-pass filter 42 can each be formed by a corresponding moving average filter. For example, the first low-pass filter 40 (but the same considerations also apply to the second low-pass filter 42) can implement a moving window, which selects a number NUM of consecutive samples of the first product signal y[n] (for example, NUM=16×K2); the first low-pass filter 42 is for a frequency equal to the first sampling frequency f ADC Each cycle of the inverse of LPF The value of each sample of [n] is set equal to the average value of the samples of the first product signal y[n] selected by the corresponding window. The moving average filter is characterized by being equal to the driving frequency f DRV There are zero points at frequencies that are integer multiples of f, thereby eliminating the DRV and f = 2·f DRV Furthermore, the moving average filter has a frequency profile of the low-pass type, capable of reducing the above-mentioned spectral contribution of the quantization noise and, more generally, capable of reducing the undesirable contribution.

[0080] As an alternative, the first low-pass filter 40 and the second low-pass filter 42 may be formed by corresponding digital filters (eg of the IIR type), wherein the time constants may be selected to limit the extension of the reaction time of the fault detection circuit 30 .

[0081] Having said that, to a first approximation the following relationship therefore applies:

[0082]

[0083]

[0084] Among them, as mentioned earlier, Therefore, the relationship Also applicable.

[0085] In practice, the first filtered signal Y LPF [n] and the second filtered signal X LPF [n] are respectively the DC component of the first product signal y[n] and the DC component of the second product signal x[n], which are extracted by the first low-pass filter 40 and the second low-pass filter 42, respectively, and represent the in-phase component and the orthogonal component of the sampled position signal px[n], respectively.

[0086] The fault detection circuit 30 also includes an amplitude estimator circuit 46 .

[0087] The amplitude estimator circuit 46 has an input coupled to the outputs of the first low pass filter 40 and the second low pass filter 42, thereby receiving the first filtered signal Y LPF [n] and the second filtered signal X LPF [n]. Specifically, the amplitude estimator circuit 46 generates a signal sA at its own output sense [n], signal sA sense [n] is the first filtered signal Y LPF [n] and the second filtered signal X LPF Each pair of samples of [n] indicates the amplitude A sense The corresponding estimated value A sense [n]' digital signal.

[0088] In more detail, note that given the first filtered signal Y LPF [n] samples and the second filtered signal X LPF [n] pairs of samples, which means that the corresponding point U0 has coordinates The point U0 falls on a radius equal to A sense / 2 and defines the corresponding vector; therefore, point U0 (in Figure 4 The upper left side of the diagram contains the amplitude A sense Information about the value of .

[0089] Note further that, in theory, one could Figure 5 The angle θ is shown and referred to below. jThe amplitude A is obtained by using a CORDIC (Coordinate Rotation Digital Computer) type algorithm described by a set of (where j = 0, 1, ..., Ntheta-1; for example, Ntheta = 18) sense The estimated value of , so that:

[0090] tan(θ j )=2 -j

[0091] Specifically, the algorithm initially envisions verification (block 100, Figure 5 ) whether the coordinate X_U0 (i.e., the abscissa of point U0) is less than zero. Furthermore, if the coordinate X_U0 is less than zero, the algorithm contemplates reversing the signs of the abscissa and ordinate of point U0 (block 102); i.e., it contemplates setting X_U0=-X_U0 and Y_U0=-Y_U0 (in other words, rotating the vector defined by point U0 by 180°); otherwise, point U0 remains unchanged. In practice, if Figure 4 As shown (upper left), the operations of blocks 100 and 102 are such that, at their conclusion, point U0 defined by coordinates (X_U0; Y_U0) is located in either the first or fourth quadrant of the Cartesian plane.

[0092] Next, the algorithm assumes that for each value j = 0, 1, ... Ntheta-1, if the point U j The coordinates of Y_U j Greater than zero (e.g. Figure 4 As shown in the upper left of the figure, refer to j = 0), then point U j The vectors rotate in the clockwise direction by angle θ j (Block 104), otherwise, if point U j The coordinates of Y_U j Less than zero (e.g. Figure 4 As shown in the upper right and lower left of the figure, refer to j=1 and j=2 respectively), then point U j The vectors rotate in the counterclockwise direction by angle θ j (Block 104). The vector thus rotated defines the point U j+1 The position of the j+1 ;Y_U j+1 ).

[0093] In practice, as can be Figure 4 As seen in the lower right, the iteration of the operation of block 104 results in point U Ntheta (which has coordinates (X_U Ntheta ;Y_U Ntheta )) is located in the first approximation on the abscissa axis. Therefore, it happens that the abscissa X_U Ntheta Approximately equal to A sense / 2, and thus contains enough to estimate the amplitude A sense information.

[0094] That being said, at the actual level, the amplitude estimator circuit 46 stores the angle θ j and performs the operations described below, which are based on the consideration that the coordinates (X_U0; Y_U0) of the point U0 are stored by the amplitude estimator circuit 46 as a corresponding bit string (e.g., in a fixed-point format on a number of bits of NB+Ntheta-1, where the first NB bits of the string are so-called two's complement encoded, and the Ntheta-1 least significant bits of the string are set equal to "0", such as Figure 7 As shown, the values ​​of the single bits of the abscissa X_U0 and ordinate Y_U0 are usually represented by "bx p ” and “by p ” where the subscript “p” indicates the position of the bit in the string, and p=1 corresponds to the most significant bit, so that the Ntheta-1 least significant bits do not encode any information and have the purpose of preventing information loss, as explained below), and each rotation by an angle θj can be represented as the corresponding rotation matrix:

[0095]

[0096] Thus, the amplitude estimator circuit 46 performs the operations of blocks 100 and 102 so that the point U0 is located in the first or fourth quadrant of the Cartesian plane, and then performs for each value of j=0, 1, ..., Ntheta-1 Figure 6 Operations shown.

[0097] In detail, the amplitude estimator circuit 46 verifies (block 200) that point U j The vertical coordinate Y_U j Is it greater than zero?

[0098] Next, if you click U j The vertical coordinate Y_U j is greater than zero (“yes” output from block 200), the amplitude estimator circuit 46 calculates the value of point U j+1 The position of is encoded (block 202) so that the corresponding bit string is as follows:

[0099] X_U j+1 =X_U j +Y_U j '

[0100] Y_U j+1 =Y_U j -X_U j '

[0101] Among them Y_Uj ' represents the value of the amplitude estimator circuit 46 by j The bit string to be encoded is shifted right (ie, in the direction of the least significant bit) by a number of bits equal to j and inserted on the left by a number of bits equal to j and equal to the ordinate Y_U j The amount determined by the most significant bit (MSB) of Figure 7 In the example, j=1 is used to qualitatively represent the situation. j ' represents the value of the amplitude estimator circuit 46 by dividing the horizontal coordinate X_U j The bit string to be encoded is shifted right by a number of bits equal to j and inserted on the left by a number of bits equal to j equal to the coordinates X_U j The amount determined by the most significant bit of Figure 7 The case with reference j=1 is again illustrated qualitatively.

[0102] In practice, the quantity X_U j ' and quantity Y_U j 'It is obtained by performing an arithmetic translation of the bit string using the sign extension, which is used to convert the coordinates X_U j and Y_U j Encoding is performed. From a computational point of view, the above operation is far from cumbersome. Furthermore, the sizing of the string described above prevents loss of information during the Ntheta-1 shifts (for j=0, no shift occurs).

[0103] On the contrary, if point U j The vertical coordinate Y_U j is less than or equal to zero (a “no” output from block 200), the amplitude estimator circuit 46 calculates the value of point U j+1 The position of is encoded (block 204) so ​​that the corresponding bit string is as follows:

[0104] X_U j+1 =X_U j -Y_U j '

[0105] Y_U j+1 =Y_U j +X_U j '

[0106] In practice, for the sake of brevity, only the operations of block 202 are referred to (but the same considerations also apply to the operations of block 204), which are equivalent to converting point U j The coordinates (X_U j ;Y_U j ) multiplied by the angle θ j The rotation matrix ofj ); in fact, as explained earlier, tan(θ j )=2 -j , and it is well known that shifting a bit string right by j number of bits is equivalent to dividing the number represented by the bit string by 2 j .

[0107] Therefore, the operations of blocks 202 and 204 are equivalent to obtaining the point U by: j+1 :i) Point U j The vector is defined to rotate in the counterclockwise and clockwise directions respectively by an angle equal to θ j ; and ii) introducing an angle equal to 1 / cos(θ j ). Therefore, from the perspective of computational complexity, the above operations are performed in an extremely efficient manner.

[0108] The amplitude estimator circuit 46 then estimates the value A sense [n]' is set equal to point U Ntheta The horizontal coordinate X_U Ntheta multiplied by the product of the normalization factor KN, which in turn is equal to 2·cos(θ0)·cos(θ1)·cos(θ2)·…·cos(θ Ntheta-1 ), thereby compensating for the scaling factor introduced earlier.

[0109] Fault detection circuit 30 also includes a decision circuit 48 having an input coupled to the output of amplitude estimator circuit 46 so as to receive signal sA sense , signal sA sense The sample indicates the estimated value A calculated by the amplitude estimator circuit 46. sense [n]'. In addition, the decision circuit 48 is programmable so as to store a first threshold value AmpUpTh and a second threshold value AmpLoTh, wherein AmpUpTh>AmpLoTh.

[0110] The first threshold value AmpUpTh and the second threshold value AmpLoTh define a range [AmpLoTh; AmpUpTh], which represents the amplitude A when the micromirror 3 is driven at a desired frequency (in this example, the resonant frequency) and has no faults. sense A window of admissible values ​​of (understood as values ​​that are not more distant from the expected value than a predefined limit).

[0111] In use, the decision circuit 48 converts each estimated value A sense [n]' is compared with the range [AmpLoTh; AmpUpTh]. If the estimated value A sense[n]' falls within the range [AmpLoTh; AmpUpTh] (eg, including the extreme values), this means that the behavior of the micromirror 3 is correct; that is, it oscillates at the expected frequency and has the expected amplitude. On the contrary, if the estimated value A sense [n]' falls outside the range [AmpLoTh; AmpUpTh], which means that the micro-mirror 3 does not oscillate correctly. To this end, the first threshold value AmpUpTh and the second threshold value AmpLoTh may be equal to P, respectively, for example. avg +Δ and P avg -Δ, where P avg is the amplitude A sense is the expected value of , and Δ represents the tolerance.

[0112] Furthermore, the decision circuit 48 generates a signal sF which is generated for each estimated value A sense [n]', indicating whether it falls inside or outside the range [AmpLoTh; AmpUpTh]. The signal sF can then be received, for example, by the control circuit 20 or by a device external to the MEMS device 2 to implement an appropriate strategy for the control / shutdown of the MEMS device 2 or an appropriate strategy for the control / shutdown of the projection system including the MEMS device 2. For example, at the estimated value A sense In case [n]′ falls outside the range [AmpLoTh; AmpUpTh], the projection system (not shown) including the MEMS device 2 may be switched off.

[0113] The fault detection circuit 30 described above can be formed in the same first semiconductor die (not shown) together with the analog-to-digital converter 6, the filtering circuit 10 and the control circuit 20; the oscillation driving circuit 22 can be formed in a second semiconductor die (not shown), and the MEMS device 2 can be formed in a third semiconductor die (not shown).

[0114] The advantages of the present solution can be clearly seen from the above description.

[0115] In particular, the present fault detection circuit is characterized by a high resilience to high-frequency and low-frequency noise, as well as a shorter reaction time and simplicity of calculation. In addition, the present fault detection circuit operates directly downstream of the analog-to-digital converter, rather than being coupled to the output of the filtering circuit, thereby reducing the intervention time. Furthermore, the characteristics described make it possible for the design of the filtering circuit to not affect the intervention time of the fault detection circuit. Furthermore, the fault detection circuit envisages the use of only two thresholds: a first threshold AmpUpTh and a second threshold AmpLoTh; this leads to a simplification of the calibration procedure.

[0116] Finally, modifications and variations may clearly be made to the present circuit without thereby departing from the scope of the present invention as defined in the appended claims.

[0117] For example, the amplitude estimator circuit 46 may be based on the relationship Determine the amplitude A sense ; however, the calculation of this function proves to be computationally more cumbersome. Furthermore, the generation of samples of the first reference signal xref[n] and the second reference signal yref[n] may be obtained in a different way than that already described.

[0118] The analog-to-digital converter may be of a different type than that already described.

[0119] In addition, the fault detection circuit can also be used for the drive frequency f of the micro-mirror 3. DRV The case where the resonant frequency of the micromirror 3 is different. In this case as well, in fact, the relationship f ref =f DRV In addition, when the micromirror 3 is driven at a frequency f DRV When driven and no fault exists, the first threshold AmpUpTh and the second threshold AmpLoTh may be set so that the range [AmpLoTh; AmpUpTh] indicates the amplitude A sense The permissible value of .

[0120] Finally, the present fault detection circuit can also be used in cases where the position of the moving mass (eg angular position or linear position) has a non-sinusoidal periodic time pattern, such as for example according to a time constant with an oscillation frequency f sense The time diagram of a triangular wave with a frequency of . Also in this case, the relationship f ref =f sense Applicable.

Claims

1. A circuit for detecting a fault in a micro-electromechanical system (MEMS) device, the MEMS device comprising a periodically oscillating mass, the circuit comprising: an input configured to receive a position signal formed by successive samples of an analog signal, the position signal being a function of the position of the periodically oscillating mass, the position signal having an amplitude and an oscillation frequency; a reference circuit configured to generate a first reference signal formed by consecutive samples of the first sinusoidal signal and to generate a second reference signal formed by consecutive samples of the second sinusoidal signal, wherein the first sinusoidal signal and the second sinusoidal signal have a frequency equal to the oscillation frequency and are phase-shifted by 90° relative to each other; a first multiplier configured to multiply the position signal by the first reference signal to generate a first product signal; a second multiplier configured to multiply the position signal by the second reference signal to generate a second product signal; a first low pass filter configured to filter the first product signal and generate a first filtered signal; a second low pass filter configured to filter the second product signal and generate a second filtered signal; an estimator circuit configured to generate an estimate of the amplitude based on the first filtered signal and the second filtered signal; as well as A decision circuit is configured to detect the presence of a fault in response to a comparison of the estimate of the magnitude to a range of values. 2 . The circuit of claim 1 , wherein the first low-pass filter and the second low-pass filter are configured to extract a DC component of the first product signal and a DC component of the second product signal, respectively.

3. The circuit of claim 1 , wherein the estimator circuit is configured to store a consecutive number N theta of angles θ j , the angle θ j is indexed by index j and such that: tan(θ j )=2 -j , where j = 0, 1, 2, ..., Ntheta-1; And among them, For each pair of a sample of the first filtered signal and a sample of the second filtered signal, the estimator circuit is configured to: encoding a first coordinate and a second coordinate of a first point on the corresponding bit string so that each of the first coordinate and the second coordinate of the first point is respectively equal to a corresponding sample in the pair of samples; And then When the first coordinate of the first point is negative, inverting the sign of the first coordinate of the first point and the sign of the second coordinate; and then Starting from the first point, for each of the consecutive angles θ j , encoding the first coordinate and the second coordinate of the corresponding point on the corresponding bit string, thereby determining continuous points including the first point; and The estimator circuit is further configured to calculate, for each of the consecutive angles θ j , encode the first coordinate and the second coordinate of the corresponding point so that: When the second coordinate of the previous point is greater than zero, the first coordinate of the point is equal to the sum of the first coordinate of the previous point and the first quantity, and the second coordinate of the point is equal to the difference between the second coordinate of the previous point and the second quantity; and When the second coordinate of the previous point is less than or equal to zero, the first coordinate of the point is equal to the difference between the first coordinate of the previous point and the first quantity, and the second coordinate of the point is equal to the sum of the second coordinate of the previous point and the second quantity; and wherein the estimator circuit is further configured to shift the bits of the string in the direction of the least significant bit by an angle θ j The first quantity and the second quantity are determined by the number of bits of the index j, and the string encodes the second coordinate of the previous point and the first coordinate of the previous point respectively; and Wherein the estimator circuit is further configured to determine, for each pair of samples of the first filtered signal and samples of the second filtered signal, a corresponding estimate of the amplitude based on the first coordinate of a last point of a corresponding succession of the points. 4 . The circuit of claim 1 , wherein the first low pass filter and the second low pass filter are moving average filters.

5. The circuit of claim 1 , wherein the reference circuit is configured to generate each sample in each pair of samples of the first reference signal and samples of the second reference signal based on a linear combination of samples in a previous pair of samples of the first reference signal and samples of the second reference signal.

6. An electronic circuit comprising: The fault detection circuit according to claim 1; as well as An analog-to-digital conversion circuit is configured to couple to the MEMS device and generate the position signal.

7. The electronic circuit according to claim 6, further comprising: a control circuit configured to generate a timing signal based on the position signal, the timing signal being phase locked with the analog signal and having a frequency equal to a multiple of the oscillation frequency; as well as a drive circuit configured to be controlled by the control circuit so as to generate a drive signal for applying to the MEMS device to cause oscillation of the periodic oscillating mass, the drive signal having a frequency equal to the oscillation frequency and a corresponding amplitude; and The control circuit and the drive circuit are further configured to control the amplitude of the drive signal, thereby forming a closed control loop, and the closed control loop is used to control the amplitude of the analog signal.

8. An electronic system comprising: The electronic circuit according to claim 7; as well as The MEMS device.

9. A method for detecting faults in a micro-electromechanical system (MEMS) device, the MEMS device comprising a periodically oscillating mass, the method comprising: receiving a position signal formed by successive samples of an analog signal, the position signal being a function of the position of the periodically oscillating mass and having an amplitude and an oscillation frequency; generating a first reference signal, the first reference signal being formed by consecutive samples of the first sinusoidal signal; generating a second reference signal, the second reference signal being formed by consecutive samples of the second sinusoidal signal; wherein the first sinusoidal signal and the second sinusoidal signal have a frequency equal to the oscillation frequency and are phase-shifted by 90° relative to each other; multiplying the position signal by the first reference signal to generate a first product signal; multiplying the position signal by the second reference signal to generate a second product signal; filtering the first product signal to generate a first filtered signal; filtering the second product signal to generate a second filtered signal; generating an estimate of the amplitude based on the first filtered signal and the second filtered signal; as well as The estimate of the magnitude is compared to a range of values ​​to detect the presence of a fault.

10. The method of claim 9, wherein low pass filtering comprises: A DC component of the first product signal and a DC component of the second product signal are extracted.

11. The method according to claim 9, further comprising: Stores a continuous number Ntheta angles θ j , the angle θ j indexed by index j and such that tan(θ j )=2 -j , where j = 0, 1, 2, …, Ntheta–1; For each pair of a sample of the first filtered signal and a sample of the second filtered signal: encoding a first coordinate and a second coordinate of a first point on the corresponding bit string so that each of the first coordinate and the second coordinate of the first point is respectively equal to a corresponding sample in the pair; And then When the first coordinate of the first point is negative, inverting the sign of the first coordinate of the first point and the sign of the second coordinate; and then Starting from the first point, for each of the consecutive angles θ j , encoding the first coordinate and the second coordinate of the corresponding point on the corresponding bit string, thereby determining continuous points including the first point; For each of the consecutive angles θ j , encode the first coordinate and the second coordinate of the corresponding point so that: When the second coordinate of the previous point is greater than zero, the first coordinate of the point is equal to the sum of the first coordinate of the previous point and the first quantity, and the second coordinate of the point is equal to the difference between the second coordinate of the previous point and the second quantity; and When the second coordinate of the previous point is less than or equal to zero, the first coordinate of the point is equal to the difference between the first coordinate of the previous point and the first quantity, and the second coordinate of the point is equal to the sum of the second coordinate of the previous point and the second quantity; By translating the bits of the string in the direction of the least significant bit by an angle θ j The first quantity and the second quantity are determined by the number of bits of the index j, and the string encodes the second coordinate of the previous point and the first coordinate of the previous point respectively; as well as For each pair of samples of the first filtered signal and samples of the second filtered signal, a corresponding estimate of the amplitude is determined based on the first coordinates of a last point of a corresponding succession of the points.

12. The method of claim 9, wherein low pass filtering comprises: Moving average filtering of the first product signal and the second product signal is performed.

13. The method according to claim 9, comprising: Each sample in each pair of a sample of the first reference signal and a sample of the second reference signal is generated based on a linear combination of samples in a previous pair of a sample of the first reference signal and a sample of the second reference signal.

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