Off-chip storage bad block processing method, device and computer-readable storage medium

Abstract

The present invention discloses a method and device for processing off-chip storage bad blocks and a computer-readable storage medium, wherein the method comprises: when a newly generated bad block is encountered during storage, the bad block information is written into the starting page of the current basic erasing unit; when the storage address falls into the bad block interval marked by the bad block information, the bad block interval is skipped and storage is continued; when the storage address is offset to the bottom of the unit, the storage is transferred to the next adjacent unit for continued storage, while erasing the current unit and writing the bad block information of the current unit into the starting page of the current unit; when the storage address is offset to the bottom of the last unit, the storage is returned to the first unit for continued storage, while erasing the last unit and writing the bad block information of the last unit into the starting page of the last unit, and the execution is repeated in this way; the present invention is aimed at off-chip storage applications, can effectively avoid bad blocks, avoid equipment failures caused by data reading errors, and improve product stability and service life.

Description

Technical Field

[0001] The present invention relates to the technical field of data storage, and in particular to a method and device for processing off-chip storage bad blocks, and a computer-readable storage medium. Background Art

[0002] In the prior art, off-chip FLASH (flash memory, i.e., non-volatile memory) is relative to the built-in FLASH of MCU (Micro Controller Unit). Usually, the erase and write life of FLASH is nominally greater than 100,000 times.

[0003] Generally, the built-in FLASH of MCU has a small capacity and is mainly used to store program code. It is not frequently erased and written. If it is frequently erased and written, the FLASH on the chip will be damaged, thus affecting the service life of the MCU.

[0004] In actual projects, a lot of data needs to be written to FLASH frequently. Considering the above factors, it is obviously not appropriate to use the MCU's on-chip FLASH. For this reason, many projects will match the appropriate off-chip FLASH.

[0005] However, when using off-chip FLASH, two problems are generally encountered:

[0006] First, the system cannot operate FLASH correctly due to bad blocks. Second, when data reading errors occur during normal FLASH operation, equipment failure will occur.

[0007] Therefore, how to effectively avoid FLASH bad blocks and prevent equipment failures caused by data reading errors during normal FLASH operations has become a technical problem that needs to be solved urgently. Summary of the invention

[0008] In order to overcome the deficiencies in the prior art, the purpose of the present invention is to provide a method, device and computer-readable storage medium for processing bad blocks of off-chip storage, which are used to solve the problem that the system cannot operate FLASH correctly due to bad blocks in FLASH, and the problem that data reading errors occur during normal operation of FLASH and cause equipment failure.

[0009] The present invention proposes a method for processing off-chip storage bad blocks, the method comprising:

[0010] The off-chip storage is divided into a plurality of basic erasable and write units, and the starting page of each basic erasable and write unit is used as the identification page of the bad block, and the remaining pages are used as the storage pages of the data;

[0011] During the storage process, when a newly generated bad block is encountered, the bad block information is written to the specified position of the starting page of the current basic erase unit;

[0012] When the storage address falls into the bad block interval marked by the bad block information, skip the bad block interval and continue to store data;

[0013] When the storage address is offset to the bottom of the current basic erasing unit, the data is transferred to the next adjacent basic erasing unit to continue to be stored, and the current basic erasing unit is erased at the same time, and the bad block information of the current basic erasing unit is written into the starting page of the current basic erasing unit;

[0014] When the storage address offsets to the bottom of the last basic erase unit, it returns to the first basic erase unit to continue storing data, erases the last basic erase unit, and writes the bad block information of the last basic erase unit to the starting page of the last basic erase unit, thereby cyclically executing the erase operation of the bad block information and the stored data.

[0015] Optionally, dividing the off-chip storage into a plurality of basic erasable and programmable units specifically includes:

[0016] Calculate the total number of erase and write times based on the product life of the off-chip storage and the update frequency of the stored data;

[0017] The number of divisions of the basic erasing unit is determined according to the total erasing times and the type of the basic erasing unit, wherein the type is a sector or a block.

[0018] Optionally, the step of using the start page of each basic erasing unit as an identification page of a bad block further includes:

[0019] Obtaining the number of all pages of a basic erasing unit, and determining a bit sequence consisting of the number of bits in the bad block information;

[0020] During the storage process, when an address damaged page exists in a basic erasing unit, it is identified by the bit corresponding to the address damaged page in the bit sequence.

[0021] Optionally, the step of using the start page of each basic erasing unit as an identification page of a bad block further includes:

[0022] In the bad block information, two bytes are determined as bad block identification check bits;

[0023] During the storage process, the validity of the bad block information is verified by the bad block identification check bit, and all pages with bad blocks in the current basic erasing unit are identified by the bad block information, and pages with bad blocks are skipped when writing or reading data.

[0024] Optionally, the method further comprises:

[0025] During the bad block identification process, traversal is started from the starting address of the bad block identification page to determine whether the first preset number of bytes read are all reset values; wherein, if the current first preset number of bytes are not all reset values, the first preset number of bytes of the next segment are continued to be read, and if the current first preset number of bytes are all reset values, it is determined that the first preset number of bytes read last time are the bad block information.

[0026] Optionally, the method further comprises:

[0027] During the bad block identification process, if you traverse upward from the end address of the bad block identification page, determine whether the first preset number of bytes read contain non-reset values; if the current first preset number of bytes are all reset values, continue to read the first preset number of bytes in the previous section, and if the current first preset number of bytes have non-reset values, it is determined that the first preset number of bytes currently read are the bad block information.

[0028] Optionally, the method further comprises:

[0029] After determining that the first preset number of bytes is the bad block information, dividing the first preset number of bytes into two groups, and determining whether the data of the two groups are the same;

[0030] A preset check calculation is performed based on the judgment result, wherein, if the data of the two groups are different, the check calculation is performed on the first second preset number of bytes in the data of the two groups respectively, and if the data of the two groups are the same, the check calculation is performed on the first second preset number of bytes in the data of one of the groups.

[0031] Optionally, after performing a preset verification calculation according to the judgment result, the method further includes:

[0032] Comparing the calculated value of the verification calculation with a preset stored value;

[0033] The validity of the bad block information is determined based on the comparison result, wherein if the comparison is inconsistent, the bad block information is determined to be erroneous, and if the comparison is consistent, the bad block information is determined to be valid.

[0034] The present invention also proposes an off-chip storage bad block processing device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, the steps of the off-chip storage bad block processing method as described in any one of the above items are implemented.

[0035] The present invention also proposes a computer-readable storage medium, which stores an off-chip storage bad block processing program. When the off-chip storage bad block processing program is executed by a processor, the steps of the off-chip storage bad block processing method as described in any one of the above items are implemented.

[0036] The off-chip storage bad block processing method, device and computer-readable storage medium of the present invention are implemented by dividing the off-chip storage into multiple basic erasing units, and using the starting page of each basic erasing unit as the identification page of the bad block, and the remaining pages as the storage pages of the data; during the storage process, when encountering a newly generated bad block, the bad block information is written to the specified position of the starting page of the current basic erasing unit; when the storage address falls into the bad block interval marked by the bad block information, the bad block interval is skipped to continue storing data; when the storage address offsets to the bottom of the current basic erasing unit, the data is transferred to the next adjacent basic erasing unit to continue storing data, and the current basic erasing unit is erased at the same time, and the bad block information of the current basic erasing unit is written to the starting page of the current basic erasing unit; when the storage address offsets to the bottom of the last basic erasing unit divided, the data is returned to the first basic erasing unit to continue storing data, and the last basic erasing unit is erased at the same time, and the bad block information of the last basic erasing unit is written to the starting page of the last basic erasing unit, so as to cyclically perform the erasing operation of the bad block information and the stored data. A bad block processing solution for off-chip storage has been implemented, which can effectively avoid bad blocks and prevent equipment failures caused by data reading errors, thereby improving product stability and service life. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0038] Figure 1 It is a first flow chart of the off-chip storage bad block processing method of the present invention;

[0039] Figure 2 is a second flow chart of the off-chip storage bad block processing method of the present invention;

[0040] Figure 3 is a third flow chart of the off-chip storage bad block processing method of the present invention;

[0041] Figure 4 is a fourth flow chart of the off-chip storage bad block processing method of the present invention;

[0042] Figure 5-1 , 5-2 is a fifth flow chart of the off-chip storage bad block processing method of the present invention;

[0043] Figure 6 is a sixth flow chart of the off-chip storage bad block processing method of the present invention;

[0044] Figure 7 is the seventh flow chart of the off-chip storage bad block processing method of the present invention;

[0045] Figure 8 It is a working principle diagram of the off-chip storage bad block processing method of the present invention;

[0046] Fig. 9 It is a storage schematic diagram based on the sector structure of the off-chip storage bad block processing method of the present invention;

[0047] Fig.10 It is a schematic diagram of storage based on block structure of the off-chip storage bad block processing method of the present invention;

[0048] Fig.11 It is a schematic diagram of bad block identification based on sector structure in the off-chip storage bad block processing method of the present invention;

[0049] Fig.12 The present invention is a schematic diagram of bad block identification based on block structure in the off-chip storage bad block processing method. DETAILED DESCRIPTION

[0050] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.

[0051] In the subsequent description, the suffixes such as "module", "component" or "unit" used to represent elements are only used to facilitate the description of the present invention, and have no specific meanings. Therefore, "module", "component" or "unit" can be used in a mixed manner.

[0052] Figure 1 This is the first flow chart of the off-chip storage bad block processing method of the present invention. This embodiment proposes an off-chip storage bad block processing method, the method comprising:

[0053] S1, dividing the off-chip storage into a plurality of basic erasable and write units, and using the starting page of each basic erasable and write unit as the identification page of the bad block, and the remaining pages as the storage pages of the data;

[0054] S2. During the storage process, when a newly generated bad block is encountered, the bad block information is written to the specified position of the starting page of the current basic erasing unit;

[0055] S3, when the storage address falls into the bad block interval marked by the bad block information, skip the bad block interval and continue to store data;

[0056] S4, when the storage address shifts to the bottom of the current basic erasing unit, transfer to the next adjacent basic erasing unit to continue storing data, erase the current basic erasing unit at the same time, and write the bad block information of the current basic erasing unit into the starting page of the current basic erasing unit;

[0057] S5. When the storage address is offset to the bottom of the last basic erasing unit, it returns to the first basic erasing unit to continue storing data, erases the last basic erasing unit at the same time, and writes the bad block information of the last basic erasing unit to the starting page of the last basic erasing unit, thereby cyclically executing the erasing operation of the bad block information and the stored data.

[0058] Please refer to Figure 8 The working principle diagram of the off-chip storage bad block processing method of the present invention is shown. In this embodiment, the minimum system using the off-chip storage bad block processing method includes MCU, FLASH and super capacitor. Among them, MCU is used to implement the logic algorithm and control algorithm of the method described in this embodiment, FLASH is the operation object in the method described in this embodiment, and the super capacitor is used to ensure that when the external power supply fails abnormally, the minimum system can still maintain normal operation for a period of time, and ensure that FLASH safely completes the write operation before powering off to avoid the loss of important data. Optionally, in this embodiment, MCU can be replaced by MPU (Micro Processor Unit) or a single-chip microcomputer.

[0059] Specifically, in the present embodiment, first, in the process of storage division, the off-chip storage is divided into a plurality of basic erasing and writing units, and the starting page of each basic erasing and writing unit is used as the identification page of the bad block, and the remaining pages are used as the storage pages of the data; then, in the process of implementing the storage, when a newly generated bad block is encountered, the bad block information is written to the specified position of the starting page of the current basic erasing and writing unit; when the storage address falls into the marked bad block interval, the bad block interval is skipped to continue storing data; when the storage address is offset to the bottom of the current basic erasing and writing unit, the data is transferred to the next adjacent basic erasing and writing unit to continue storing data, and the current basic erasing and writing unit is erased at the same time, and the bad block information of the current basic erasing and writing unit is written to the starting page of the current basic erasing and writing unit; and when the storage address is offset to the bottom of the last basic erasing and writing unit divided, the data is returned to the first basic erasing and writing unit to continue storing data, and the last basic erasing and writing unit is erased at the same time, and the bad block information of the last basic erasing and writing unit is written to the starting page of the last basic erasing and writing unit, thereby cyclically executing the erasing and writing operations of the bad block information and the stored data. For example, the 0th page of each basic erasing unit is used as the identification page of the bad block of the basic erasing unit, and the remaining pages are used to store data. During the storage process, if a newly generated bad block is encountered, the bad block information is written to the specified position of the 0th page of the current basic erasing unit; when the storage address falls into the marked bad block interval, the bad block interval is skipped to continue to store data; when the storage address is offset to the bottom of the current basic erasing unit, it is transferred to the next adjacent basic erasing unit to continue to store data, and the current basic erasing unit is erased at the same time, and the bad block information of the current basic erasing unit is written into the 0th page of the current basic erasing unit; and when the storage address is offset to the bottom of the last basic erasing unit divided, it returns to the first basic erasing unit to continue to store data, and the last basic erasing unit is erased at the same time, and the bad block information of the last basic erasing unit is written into the 0th page of the last basic erasing unit, and so on. Further, after erasing, each basic erasing unit must rewrite the bad block identification data of the basic erasing unit on its first page as the bad block information. Based on this, this embodiment provides a FLASH bad block information processing solution based on cyclic execution of bad block information and storage data erase operations, which fully utilizes the FLASH storage space and avoids FLASH being discarded due to a small number of bad blocks, effectively improving the product's service life.

[0060] The beneficial effect of this embodiment is that by dividing the off-chip storage into multiple basic erasing and writing units, and using the starting page of each basic erasing and writing unit as the identification page of the bad block, and the remaining pages as the storage pages of the data; during the storage process, when encountering a newly generated bad block, the bad block information is written to the specified position of the starting page of the current basic erasing and writing unit; when the storage address falls into the bad block interval marked by the bad block information, the bad block interval is skipped to continue storing data; when the storage address offsets to the bottom of the current basic erasing and writing unit, it is transferred to the next adjacent basic erasing and writing unit to continue storing data, and at the same time the current basic erasing and writing unit is erased, and the bad block information of the current basic erasing and writing unit is written to the starting page of the current basic erasing and writing unit; when the storage address offsets to the bottom of the last basic erasing and writing unit divided, it returns to the first basic erasing and writing unit to continue storing data, and at the same time the last basic erasing and writing unit is erased, and the bad block information of the last basic erasing and writing unit is written to the starting page of the last basic erasing and writing unit, thereby cyclically executing the erasing and writing operations of the bad block information and the stored data. A bad block processing solution for off-chip storage has been implemented, which can effectively avoid bad blocks and prevent equipment failures caused by data reading errors, thereby improving product stability and service life.

[0061] Figure 2 This is a second flow chart of the off-chip storage bad block processing method of the present invention. Based on the above embodiment, the steps of dividing the off-chip storage into a plurality of basic erasing and writing units specifically include:

[0062] S01, calculating the total number of erase and write times according to the product life of the off-chip storage and the update frequency of the stored data;

[0063] S02. Determine the number of divisions of the basic erasing unit according to the total erasing times and the type of the basic erasing unit, wherein the type is sector or block.

[0064] In this embodiment, the erasing modes of FLASH include sector erasing (Sector Erase), block erasing (BlockErase) and chip erasing (Chip Erase). In actual projects, Sector erasing or Block erasing is generally selected, so the basic unit of erasing is divided according to Sector or Block. Among them, the difference between Sector and Block is that the storage space of Block is much larger than that of Sector. Optionally, in this embodiment, the W25Q64FV off-chip storage chip is taken as an example for explanation. The chip has a total of 8Mbytes, divided into 2048 sectors, each sector has 16 pages; divided into 128 blocks, each block has 256 pages; each page has 256 bytes.

[0065] In this embodiment, during the storage partitioning process, when determining to partition by sector, more than two sectors are divided for each group of data to be stored. Specifically, the number of divided sectors is calculated by the total number of erase and write times based on the product life and the frequency of data updates.

[0066] In this embodiment, during the storage division process, when determining to divide by Block, each group of data to be stored is divided into more than two Blocks. Specifically, the number of divided Blocks is calculated by calculating the total number of erase and write times according to the product life and the frequency of data update.

[0067] Please refer to Fig. 9 The storage schematic diagram of the off-chip storage bad block processing method of the present invention is shown. In this embodiment, the specific erasing steps when divided by Sector include: first, the 0th page of each Sector, that is, Page-0, is used as the identification page of the bad block of the Sector, and the remaining pages are used to store data; then, during the storage process, if the storage address shifts to the bottom of the Sector and it is recognized that the remaining space is insufficient for storage, the data is transferred to the next adjacent Sector for storage, and at the same time, the current Sector is erased, and the bad block information of the current Sector is written into the 0th page of the current Sector; and when the storage address shifts to the bottom of the planned last Sector and it is recognized that the remaining space is insufficient for storage, the data is returned to the first Sector for storage, and at the same time, the last Sector is erased, and the bad block information of the last Sector is written into the 0th page of the last Sector, and so on for cyclic erasing.

[0068] Please refer to Fig.10 The schematic diagram of storage based on block structure of the off-chip storage bad block processing method of the present invention is shown. In this embodiment, the specific erasing steps when divided by Block include: first, the 0th page of each Block, that is, Page-0, is used as the identification page of the bad block of the Block, and the remaining pages are used to store data; then, during the storage process, if the storage address shifts to the bottom of the Block and it is recognized that the remaining space is insufficient for storage, the data is transferred to the next adjacent Block for storage, and at the same time, the current Block is erased, and the bad block information of the current Block is written to the 0th page of the current Block; and when the storage address shifts to the bottom of the planned last Block and it is recognized that the remaining space is insufficient for storage, the data is returned to the first Block for storage, and at the same time, the last Block is erased, and the bad block information of the last Block is written to the 0th page of the last Block, and the erasing cycle is repeated in this way.

[0069] Figure 3 The third flow chart of the off-chip storage bad block processing method of the present invention is based on the above embodiment, and the step of using the starting page of each basic erasing unit as the identification page of the bad block further includes:

[0070] S41, obtaining the number of all pages of a basic erasing unit, and determining a bit sequence consisting of the number of bits in the bad block information;

[0071] S42. During the storage process, when an address damaged page exists in a basic erasing unit, the address damaged page is identified by a bit in the bit sequence corresponding to the address damaged page.

[0072] Please refer to Fig.11 The schematic diagram of bad block identification based on the sector structure of the off-chip storage bad block processing method of the present invention is shown. In this embodiment, the design is based on Sector as the basic erase unit. The specific steps include: agreeing that the Page-0 starting page (i.e., page 0) of each Sector is used as the bad block identification page, and counting the number of pages of each Sector. Similarly, taking the W25Q64FV memory chip as an example, each Sector has 16 pages, and 16 bits are required to identify the information of the 16 pages respectively, i.e., Bad Page Flg 1 or Bad Page Flg 2. For example, if the nth page has a damaged address, the nth bit in the bad block information is written to 0, and so on.

[0073] Please refer to Fig.12 This is a schematic diagram of bad block identification based on block structure of the off-chip storage bad block processing method of the present invention. In this embodiment, the design is based on Block as the basic erase unit. The specific steps include: agreeing that the Page-0 starting page (i.e., page 0) of each Block is used as the bad block identification page, and counting the number of pages of each Block. Similarly, taking the W25Q64FV memory chip as an example, each Block has 256 pages, then 256 bits are required to identify the information of 256 pages respectively, i.e., BadPage Flg 1 or Bad Page Flg 2. For example, if the nth page has a damaged address, the nth bit in the bad block information is written to 0, and so on.

[0074] Figure 4 This is a fourth flow chart of the off-chip storage bad block processing method of the present invention. Based on the above embodiment, the step of using the starting page of each basic erasing unit as the identification page of the bad block further includes:

[0075] S43, in the bad block information, determining two bytes as bad block identification check bits;

[0076] S44. During the storage process, the validity of the bad block information is verified by the bad block identification check bit, and all pages with bad blocks in the current basic erasing unit are identified by the bad block information, and pages with bad blocks are skipped when writing or reading data.

[0077] Please refer to Fig.11 In this embodiment, when the Sector is used as the basic erase unit for design, two bytes are added as bad block identification check bits based on Bad Page Flg 1 and Bad Page Flg 2, namely Checksum 1 and Checksum 2. In this way, the bad block information is identified by 4 bytes in total.

[0078] Please refer to Fig.12 In this embodiment, when designing with Block as the basic erase unit, two bytes are added as bad block identification check bits based on Bad Page Flg 1 and Bad Page Flg 2, namely Checksum 1 and Checksum 2. In this way, the bad block information identification occupies a total of 34 bytes.

[0079] Furthermore, in this embodiment, for the sake of redundancy design, when the bad block identification data of the current basic erase unit is written into the starting page of the current basic erase unit, the identification data is repeatedly written multiple times as the bad block information. Specifically: when designing with Sector as the basic erase unit, redundancy is considered, and each update of the bad block identification needs to be written twice, which is equivalent to storing 8 bytes of data each time; and the W25Q64FV off-chip storage chip has 256 bytes per page, and once the Sector is erased, the bad block information can be continuously updated 32 times, which is more than enough for the 16-page Sector; when designing with Block as the basic erase unit, redundancy is considered, and each update of the bad block identification needs to be written twice, which is equivalent to storing 68 bytes of data each time; and the W25Q64FV off-chip storage chip has 256 bytes per page, and once the Sector is erased, the bad block information can be continuously updated 3 times, which is obviously not enough for the 256-page Block. Therefore, without considering redundancy, at least 37 pages are required, which is a certain waste. Furthermore, in this embodiment, considering that the minimum erase unit of FLASH is 1 Sector, for Block, it is preferred to use the 0th Sector of Block to identify the bad block information. Even if the writing reaches the bottom of the Sector, the Sector can be erased cyclically to update the bad block information. It can be seen that although the above method saves some storage space, it still sacrifices 16 pages of storage space. Further, in this embodiment, considering that the probability of bad blocks appearing in the FLASH storage space is very low, and the probability of more than 3 consecutive bad blocks is even lower, based on this consideration, the 0th page of Block can also continue to be used as the bad block information storage page, and if the bad block storage address is offset to the bottom of the page, the bad block is recognized again, and then jump to the next Block for data storage.

[0080] Figure 5-1 FIG. 5 is a fifth flow chart of the off-chip storage bad block processing method of the present invention. Based on the above embodiment, the method further includes:

[0081] S51, in the bad block identification process, traverse from the start address of the identification page of the bad block to determine whether the first preset number of bytes read are all reset values;

[0082] S52: If the current first preset number of bytes are not all reset values, continue to read the first preset number of bytes of the next segment; and if the current first preset number of bytes are all reset values, determine that the first preset number of bytes read last time are the bad block information.

[0083] Figure 5-2 As Figure 5-1 Another optional solution of the steps shown, the method further includes:

[0084] S51', in the bad block identification process, if traversing upward from the end address of the identification page of the bad block, it is determined whether the first preset number of bytes read have a non-reset value;

[0085] S52', if the current first preset number of bytes are all reset values, continue to read the first preset number of bytes of the previous segment, and if the current first preset number of bytes has non-reset values, determine that the first preset number of bytes currently read are the bad block information.

[0086] Please refer to Fig.11 In this embodiment, when the Sector is used as the basic erase unit for design, the specific steps include: each time a bad block is identified, 8 bytes are read from the starting address of the bad block identification page to determine whether all 8 bytes are 0xFF (reset value); if not, continue to search downward, if so, it means that the data read last time is bad block information.

[0087] Each time a bad block is identified, 8 bytes are read upward from the end address of the bad block to determine whether all 8 bytes are 0xFF (reset value); if so, continue to search upward; if not, it means that the currently read data contains bad block information.

[0088] Please refer to Fig.12 In this embodiment, when the design is based on Block as the basic erase unit, the specific steps include: each time a bad block is identified, 68 bytes are read from the starting address of the bad block identification page to determine whether all 68 bytes are 0xFF (reset value); if not, continue to search downward, if so, it means that the data read last time is bad block information.

[0089] Each time a bad block is identified, 68 bytes are read upward from the end address of the bad block to determine whether all 68 bytes are 0xFF (reset value); if so, continue to search upward; if not, it means that the currently read data contains bad block information.

[0090] Figure 6 is a sixth flow chart of the off-chip storage bad block processing method of the present invention, based on the above embodiment, after the step of determining that the first preset number of bytes are the bad block information, comprising:

[0091] S53, dividing the first preset number of bytes into two groups, and determining whether the data of the two groups are the same;

[0092] S54. Execute a preset verification calculation based on the judgment result, wherein, if the data of the two groups are different, the verification calculation is performed on the first second preset number of bytes in the data of the two groups respectively, and if the data of the two groups are the same, the verification calculation is performed on the first second preset number of bytes in the data of one of the groups.

[0093] Please refer to Fig.11 In this embodiment, when the Sector is used as the basic erase unit for design, the specific steps include: dividing the read bad block information into two groups according to the front and rear 4 bytes, and judging whether the two groups of data are the same. If they are different, performing CRC (Cyclic Redundancy Check) check calculation on the first 2 bytes in the two groups of data; if they are the same, performing CRC calculation on the first 2 bytes in one of the groups of data.

[0094] Please refer to Fig.12 In this embodiment, when Block is used as the basic erase unit for design, the specific steps include: dividing the read bad block information into two groups according to the front and back 34 bytes, and judging whether the two groups of data are the same. If they are different, CRC check calculation is performed on the first 32 bytes in the two groups of data; if they are the same, CRC calculation is performed on the first 32 bytes in one of the groups of data.

[0095] Figure 7 This is a seventh flow chart of the off-chip storage bad block processing method of the present invention. Based on the above embodiment, after the step of performing a preset verification calculation according to the judgment result, it also includes:

[0096] S55, comparing the calculated value of the verification calculation with a preset stored value;

[0097] S56. Determine the validity of the bad block information according to the comparison result, wherein if the comparison is inconsistent, it is determined that the bad block information is wrong, and if the comparison is consistent, it is determined that the bad block information is valid.

[0098] In this embodiment, when the Sector is used as the basic erase unit for design, the CRC calculation value is compared with the preset storage value; if the CRC does not match, it means that the bad block information identification is wrong and an error prompt needs to be reported; if the CRC matches, it is determined that the read bad block information is valid. Next, all the pages with bad blocks in the current Sector are identified according to the bit values ​​of the first 2 bytes; after the pages with bad blocks are identified, these pages with bad blocks are skipped when writing data to the FLASH or reading data.

[0099] In this embodiment, when designing with Block as the basic erase unit, the above CRC calculation value is compared with the preset storage value; if the CRC does not match, it means that the bad block information identification is wrong and an error prompt needs to be reported; if the CRC matches, it is determined that the read bad block information is valid. Next, all the pages with bad blocks in the current Block are identified according to the bit values ​​of the first 32 bytes; after the pages with bad blocks are identified, these pages with bad blocks are skipped when writing data to FLASH or reading data.

[0100] Based on the above embodiments, the present invention also proposes an off-chip storage bad block processing device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, the steps of the off-chip storage bad block processing method as described in any one of the above items are implemented.

[0101] It should be noted that the above-mentioned device embodiment and method embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, and the technical features in the method embodiment are correspondingly applicable in the device embodiment, which will not be repeated here.

[0102] Based on the above embodiments, the present invention also proposes a computer-readable storage medium, which stores an off-chip storage bad block processing program. When the off-chip storage bad block processing program is executed by a processor, the steps of the off-chip storage bad block processing method as described in any of the above items are implemented.

[0103] It should be noted that the above-mentioned medium embodiment and method embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, and the technical features in the method embodiment are correspondingly applicable in the medium embodiment, which will not be repeated here.

[0104] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0105] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0106] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A method for processing off-chip storage bad blocks, characterized in that: The method comprises: The off-chip storage is divided into a plurality of basic erasable and write units, and the starting page of each basic erasable and write unit is used as the identification page of the bad block, and the remaining pages are used as the storage pages of the data; During the storage process, when a newly generated bad block is encountered, the bad block information is written to the specified position of the starting page of the current basic erase unit; When the storage address falls into the bad block interval marked by the bad block information, skip the bad block interval and continue to store data; When the storage address is offset to the bottom of the current basic erasing unit, the data is transferred to the next adjacent basic erasing unit to continue to be stored, and the current basic erasing unit is erased at the same time, and the bad block information of the current basic erasing unit is written into the starting page of the current basic erasing unit; When the storage address is offset to the bottom of the last basic erasing unit, the data is returned to the first basic erasing unit to continue to be stored, and the last basic erasing unit is erased, and the bad block information of the last basic erasing unit is written to the starting page of the last basic erasing unit, so as to cyclically perform the erasing operation of the bad block information and the storage data; The method of using the starting page of each basic erasing unit as the identification page of the bad block further includes: Obtaining the number of all pages of a basic erasing unit, and determining a bit sequence consisting of the number of bits in the bad block information; During the storage process, when an address damaged page exists in a basic erasing unit, it is marked by a bit corresponding to the address damaged page in the bit sequence; The method of using the starting page of each basic erasing unit as the identification page of the bad block further includes: In the bad block information, two bytes are determined as bad block identification check bits; During the storage process, the validity of the bad block information is verified by the bad block identification check bit, and all pages with bad blocks in the current basic erasing unit are identified by the bad block information, and the pages with bad blocks are skipped when writing or reading data; During the bad block identification process: Traversing from the start address of the identification page of the bad block, determining whether the first preset number of bytes read are all reset values, if the current first preset number of bytes are not all reset values, continuing to read the first preset number of bytes of the next segment, and if the current first preset number of bytes are all reset values, determining that the first preset number of bytes read last time are the bad block information; Alternatively, traverse upward from the end address of the identification page of the bad block to determine whether the first preset number of bytes read have a non-reset value, if the current first preset number of bytes are all reset values, continue to read the first preset number of bytes of the previous segment, and if the current first preset number of bytes have a non-reset value, determine that the first preset number of bytes currently read are the bad block information; The method further comprises: After determining that the first preset number of bytes is the bad block information, dividing the first preset number of bytes into two groups, and determining whether the data of the two groups are the same; Performing a preset check calculation according to the judgment result, wherein if the data of the two groups are different, performing the check calculation on the first second preset number of bytes in the data of the two groups respectively, and if the data of the two groups are the same, performing the check calculation on the first second preset number of bytes in the data of one of the groups; After performing the preset verification calculation according to the judgment result, the method further includes: Comparing the calculated value of the verification calculation with a preset stored value; The validity of the bad block information is determined based on the comparison result, wherein if the comparison is inconsistent, the bad block information is determined to be erroneous, and if the comparison is consistent, the bad block information is determined to be valid.

2. The off-chip storage bad block processing method according to claim 1, characterized in that: The off-chip storage is divided into a plurality of basic erasable and writeable units, specifically including: Calculate the total number of erase and write times based on the product life of the off-chip storage and the update frequency of the stored data; The number of divisions of the basic erasing unit is determined according to the total erasing times and the type of the basic erasing unit, wherein the type is a sector or a block.

3. An off-chip storage bad block processing device, characterized in that: The device includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, the steps of the off-chip storage bad block processing method as claimed in claim 1 or 2 are implemented.

4. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores an off-chip storage bad block processing program, and when the off-chip storage bad block processing program is executed by the processor, the steps of the off-chip storage bad block processing method according to claim 1 or 2 are implemented.

Images