Mode filter for backside emitting vertical cavity surface emitting laser
By adopting a mode filter structure in VCSEL, using the offset and destructive interference of the dielectric layer and mirror structure, the higher-order transverse mode is suppressed, and the problems of output power reduction and poor manufacturing properties caused by the reduction of oxide pore size are solved, and the problem of output power reduction and poor manufacturing performance is achieved. High performance and high controllability single-mode operation.
Patent Information
- Application Number
- CN202410857677.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-19
- Filing Date
- 2024-06-28
- Publication Date
- 2024-12-31
AI Technical Summary
The prior art reduces the oxide pore size to improve the reliability and low input power of single-mode operation, but will lead to a decrease in output power and poor manufacturing, making it difficult to Achieve high performance and high controllability single-mode operation.
Using a mode filter (MF) structure, including a dielectric layer and a mirror structure, the single mode is achieved by providing offset and destructive interference in different areas of the mode filter, suppressing the emission of higher order transverse modes and increasing reflectivity. Operation and improve performance uniformity.
The single-mode operation of Gaussian distributed beam is realized, which improves the output power and manufacturability of VCSEL, and provides operational controllability and performance uniformity, especially under high bias current conditions.
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Figure CN119231310A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This patent application claims priority to U.S. Provisional Patent Application No. 63 / 511,480, filed on June 30, 2023, entitled “MODE SELECTION FOR ASINGLE MODE BACKSIDE EMITTING POLARIZED VERTICAL-CAVITY SURFACE-EMITTING LASER”. The disclosure of the prior application is considered a part of this patent application and is incorporated by reference into this patent application. Technical Field
[0003] The present disclosure generally relates to mode selection of vertical cavity surface emitting lasers (VCSELs) and mode filters for back side emitting (BSE) VCSELs. Background Art
[0004] A VCSEL is a semiconductor laser, more specifically a diode laser with a monolithic laser resonator, where light is emitted in a direction perpendicular to the chip surface. Typically, the laser resonator consists of two distributed Bragg reflector (DBR) mirrors parallel to the chip surface, between which is the cavity region (consisting of one or more quantum wells) where the light is generated. Typically, the upper and lower mirrors of a VCSEL are doped as p-type and n-type materials, respectively, to form a diode junction. Summary of the invention
[0005] In some implementations, a VCSEL includes: a first mirror structure located above a cavity region; a grating associated with polarized light emitted by the VCSEL, the grating located above the first mirror structure; and a mode filter (MF) structure located above the grating, the MF structure including: an MF layer located in a first region of the MF structure, for at least partially suppressing high-order transverse modes (HOMs) of light, the MF layer including a dielectric layer, and a second mirror structure located at least in a second region of the MF structure, for increasing the reflectivity of a side of the VCSEL including the first mirror structure.
[0006] In some implementations, the first reflector structure includes a plurality of p-type distributed Bragg reflector (DBR) pairs, and the second reflector structure includes a plurality of dielectric DBR pairs.
[0007] In some implementations, the MF layer includes a metal layer located above the dielectric layer.
[0008] In some implementations, the metal layer includes the same material as a contact layer of the VCSEL, the same material as a seed metal of the VCSEL, or the same material as a plating metal of the VCSEL.
[0009] In some implementations, the MF layer includes only a dielectric layer.
[0010] In some implementations, the MF layer provides an offset between a first region of the MF structure and a second region of the MF structure.
[0011] In some implementations, the first reflector structure includes a first plurality of p-type DBR pairs, and the second reflector structure includes a second plurality of p-type DBR pairs.
[0012] In some implementations, a size of the second region of the MF structure differs from a size of an oxide aperture of the VCSEL by an amount less than about 2.0 micrometers (μm).
[0013] In some implementations, a size of the first region of the MF structure differs from a size of an oxide aperture of the VCSEL by an amount in a range of about 4.0 micrometers μm to about 6.0 μm.
[0014] In some implementations, a size of the annular region defined by the first region and the second region is in a range of about 1.5 micrometers μm to about 3.5 μm.
[0015] In some implementations, the number of mirror pairs in the second mirror structure ranges from 3 mirror pairs to 8 mirror pairs.
[0016] In some implementations, the number of mirror pairs in the first mirror structure ranges from 7 mirror pairs to 17 mirror pairs.
[0017] In some implementations, the VCSEL is a back-emitting (BSE) VCSEL.
[0018] In some implementations, the thickness of the dielectric layer is selected to cause destructive interference of reflections in the first region of the MF structure.
[0019] In some implementations, the thickness of the MF layer is not a multiple of one quarter of the emission wavelength of the VCSEL.
[0020] In some implementations, the dielectric layer in the MF layer has a thickness within 15 nanometers of a value equal to about 0.92×(λ / n d ) to about 1.45×(λ / n d ) plus or minus a value equal to X×λ / (2*n d ), where λ is the wavelength of the VCSEL, n d is the refractive index of the dielectric material, and X is an integer value.
[0021] In some implementations, a back side emitting (BSE) VCSEL includes: a first mirror structure located above a cavity region; and an MF structure located above the first mirror structure, the MF structure including: a MF layer located in the first region, the MF layer associated with suppressing one or more modes of light emitted by the BSE VCSEL, wherein the MF layer includes at least a dielectric layer, and at least a second mirror structure located in the second region, the second mirror structure associated with increasing a reflectivity of a side of the BSE VCSEL including the first mirror structure.
[0022] In some implementations, the BSE VCSEL further includes a grating positioned above the first reflector structure, the grating being associated with polarizing light emitted by the BSE VCSEL.
[0023] In some implementations, the MF layer further includes a metal layer located above the dielectric layer in the first region.
[0024] In some implementations, a VCSEL includes a MF structure, the structure including: an MF layer for providing an offset between a first region of the MF structure and a second region of the MF structure, associated with at least partially suppressing one or more modes of light emitted by the VCSEL by causing destructive interference of reflections in the first region of the MF structure; and a mirror structure located at least in the second region for increasing the reflectivity of an epitaxial side of the VCSEL. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 are diagrams associated with example implementations of a VCSEL including the MF structure described herein.
[0026] Figure 2 are diagrams associated with alternative example implementations of a VCSEL including the MF structure described herein.
[0027] Figure 3 and Figure 4 is a graph illustrating simulation results of a VCSEL including the MF structure described herein. DETAILED DESCRIPTION
[0028] The following detailed description of example implementations refers to the accompanying drawings.The same reference numerals in different drawings may represent the same or similar elements.
[0029] A VCSEL that achieves single-mode operation emits a beam with a Gaussian distribution with high reliability while requiring low input power, which means that single-mode operation of VCSELs is ideal in many applications. The conventional technique for achieving single-mode operation of BSE VCSELs is to reduce the size of the oxide aperture of the VCSEL. However, reducing the size of the oxide aperture reduces the output power of the VCSEL and reduces the manufacturability of the VCSEL.
[0030] Some implementations described herein include a mode filter (MF) for a VCSEL (such as a BSE VCSEL). In some implementations, the VCSEL includes a first reflector structure located above a cavity region and a MF structure located above the first reflector structure. The MF structure may include an MF layer in a first region of the MF structure and a second reflector structure in at least a second region of the MF structure. In some implementations, the MF layer includes a dielectric layer and at least partially suppresses one or more light modes (e.g., one or more high-order transverse modes of light) emitted by the VCSEL. In some implementations, the second reflector structure increases the reflectivity of the VCSEL including a side of the first reflector structure. In some implementations, the VCSEL may also include a grating associated with polarizing light.
[0031] In some implementations, the VCSELs described herein provide controllability of the operation of the VCSELs. For example, the VCSELs described herein can be designed to achieve low divergence or single-mode operation (e.g., at high bias currents). In addition, the VCSELs described herein can have improved performance uniformity (e.g., compared to a BSE VCSEL that includes a relatively small oxide aperture associated with achieving single-mode operation). Additional details are provided below.
[0032] Figure 1 is a diagram associated with an example implementation of a VCSEL 100 including the MF structure described herein. In some implementations, the VCSEL 100 may be included in an array of emitters (e.g., an array of VCSELs 100). In some implementations, such as Figure 1 As shown in , VCSEL 100 is a BSE VCSEL, which means that VCSEL 100 emits light through a substrate 102 of VCSEL 100 .
[0033] like Figure 1As shown in , VCSEL 100 may include substrate 102, bottom metal 104, bottom mirror structure 106, a cavity including one or more active regions (referred to herein as cavity region 108), confinement layer 110 forming confinement aperture 112, first top mirror structure 114, etch stop layer 116, cap layer 118, dielectric layer 120, metal layer 122, top contact layer 124, second top mirror structure 126, and top metal 128. In some implementations, the MF structure of VCSEL 100 includes second top mirror structure 126, and MF layer 130 formed by a portion of dielectric layer 120 and (optionally) metal layer 122. Additional details regarding the MF structure are provided below.
[0034] The substrate 102 includes a support material on which one or more layers or features of the VCSEL 100 are grown or fabricated. In some implementations, the substrate 102 includes an n-type material. In some implementations, the substrate 102 includes a semi-insulating type of material. In some implementations, when the VCSEL 100 includes one or more bottom-emitting emitters, the semi-insulating type of material can be used to reduce light absorption from the substrate 102. In such an implementation, the VCSEL 100 can include a contact buffer located in or near the bottom reflector structure 106. In some implementations, the substrate 102 can include a semiconductor material such as gallium arsenide (GaAs), indium phosphide (InP), or another type of semiconductor material. In some implementations, the bottom contact of the VCSEL 100 (e.g., the bottom n-contact) can be made from the back side of the substrate 102. In some implementations, the bottom contact of the VCSEL 100 can be made from the front side of the VCSEL 100. In some implementations, the front contact may be implemented by, for example, etching a mesa step or trench into the substrate 102 , or inserting a contact bumper in or near the bottom mirror structure 106 .
[0035] The bottom metal 104 includes a metal layer on the bottom surface of the substrate 102 (e.g., on the back side of the VCSEL 100). In some implementations, the bottom metal 104 is formed of an n-type material. In some implementations, the bottom metal 104 is a layer that is in electrical contact with the substrate 102. In some implementations, the bottom metal 104 serves as an anode of the VCSEL 100. In some implementations, the bottom metal 104 may include an annealed metallization layer, such as a gold germanium nickel (AuGeNi) layer or a palladium germanium gold (PdGeAu) layer. In some implementations, such as Figure 1 As shown in FIG. 1 , an anti-reflective (AR) coating 132 may be formed in an opening in the bottom metal 104 (eg, an opening through which the VCSEL 100 will emit light).
[0036] The bottom reflector structure 106 is a bottom reflector of an optical resonator of the VCSEL 100. For example, the bottom reflector structure 106 may include a plurality of distributed Bragg reflector (DBR) pairs, or another type of reflector structure. In some implementations, the bottom reflector structure 106 is formed of an n-type material. Therefore, in some implementations, the bottom reflector structure 106 may include a plurality of n-type DBR pairs. Alternatively, in some implementations, the bottom reflector structure 106 may be formed of a p-type material. In some implementations, the bottom reflector structure 106 is located on the (top) surface of the substrate 102. In some implementations, the thickness of the bottom reflector structure 106 may range from about 3.5 micrometers (μm) to about 9 μm, such as 5 μm. In some implementations, the bottom reflector structure 106 includes a set of layers (e.g., aluminum gallium arsenide (AlGaAs) layers) grown using metal organic chemical vapor deposition (MOCVD) techniques, molecular beam epitaxy (MBE) techniques, or other techniques.
[0037] The cavity region 108 includes one or more layers in which electrons and holes recombine to emit light and define the emission wavelength range of the VCSEL 100. For example, the cavity region 108 may include one or more active regions in the form of one or more quantum wells (QWs). In some implementations, the cavity region 108 may include one or more cavity spacer layers (e.g., so that the epitaxial growth has enough space to gradually change the composition or temperature). In some implementations, the one or more cavity spacer layers can reduce stress between active regions of the cavity region 108, and / or can alleviate thermal issues of laser operation of the VCSEL 100. In some implementations, the one or more cavity spacer layers may include an oxide layer. The optical thickness of the cavity region 108 (including one or more active regions and any cavity spacer layers), the first top reflector structure 114, the second top reflector structure 126, and the bottom reflector structure 106 may define the resonant cavity wavelength of the VCSEL 100, which can be designed to be within the emission wavelength range of the cavity region 108 to enable lasing. In some implementations, the wavelength range of the VCSEL 100 can be in the range of about 940 nanometers (nm) to about 1380 nm. In some implementations, the cavity region 108 can be formed on the bottom reflector structure 106. In some implementations, the thickness of the cavity region 108 can be in the range of about 0.006 μm to about 0.5 μm, such as 0.15 μm or 0.30 μm. In some implementations, the cavity region 108 includes a set of layers grown using MOCVD technology, MBE technology, or other technology.
[0038] The confinement layer 110 is a layer that provides optical and / or electrical confinement for the VCSEL 100. In some implementations, the confinement layer 110 enhances carrier and mode confinement of the VCSEL 100 and can therefore improve the performance of the VCSEL 100. In some implementations, the confinement layer 110 is located above, below, or in the cavity region 108. In some implementations, there may be one or more spacer layers or reflector layers (e.g., DBR) between the confinement layer 110 and the cavity region 108. In some implementations, such as Figure 1 As shown in FIG, the confinement layer 110 is located on a side of the cavity region 108 close to the first top reflector structure 114 (i.e., on the non-substrate side of the cavity region 108). In some implementations, the confinement layer 110 is located on a side of the cavity region 108 close to the bottom reflector structure 106 (i.e., on the substrate side of the cavity region 108).
[0039] In some implementations, the confinement layer 110 includes an oxide layer formed by oxidation of one or more epitaxial layers of the VCSEL 100. For example, the confinement layer 110 may be an aluminum oxide (Al2O3) layer formed due to oxidation of an epitaxial layer (e.g., an AlGaAs layer, an AlAs layer, etc.). In some implementations, the confinement layer 110 may have a thickness in a range of about 0.007 μm to about 0.04 μm, such as 0.02 μm. In some implementations, an oxidation trench etched around the VCSEL 100 may allow steam to enter the epitaxial layer from which the confinement layer 110 is formed. In some implementations, the oxidation trench may not completely surround the confinement layer 110. For example, the oxidation trench may follow the general shape of the confinement region, but there may be gaps between adjacent oxidation trenches. In some implementations, the confinement layer 110 may follow a general geometry, but there may be variations associated with the shape or location of the oxidation trenches and / or variations associated with the oxidation rate. In some implementations, in addition to the confinement layer 110, the VCSEL 100 may also include one or more other types of structures or layers that provide current confinement, such as an implant passivation structure, a mesa isolation structure, a moat trench isolation structure, a buried tunnel junction, etc. Additionally or alternatively, other types of structures or layers for providing current confinement may be included in the confinement layer 110 or integrated with the confinement layer 110.
[0040] In some implementations, the confining layer 110 defines a confining aperture 112. Thus, in some implementations, the confining aperture 112 is an optically active aperture defined by the confining layer 110. In some implementations, the size of the confining aperture 112 (e.g., the width in a given direction) is in the range of about 1 μm to about 300 μm, such as 5 μm or 8 μm. In some implementations, as described above, the confining aperture 112 can be formed by oxidation (e.g., when the confining layer 110 is an oxide layer). Additionally, or alternatively, the confining aperture 112 can be formed by other means, such as by implantation, diffusion, regrowth (e.g., using a high resistance layer, a current blocking layer, a tunnel junction, etc.), or an air gap, among other examples.
[0041] The first top reflector structure 114 is a top reflector of the optical resonator of the VCSEL 100. For example, the first top reflector structure 114 may include a plurality of DBR pairs, or another type of reflector structure. In some implementations, the first top reflector structure 114 is formed of a p-type material. Therefore, in some implementations, the first top reflector structure 114 includes a plurality of p-type DBR pairs. Alternatively, in some implementations, the first top reflector structure 114 may be formed of an n-type material. In some implementations, the thickness of the first top reflector structure 114 may range from about 1 μm to about 4 μm, such as 2 μm. In some implementations, the number of reflector pairs in the first top reflector structure 114 is in the range of 7 reflector pairs to 17 reflector pairs. In some implementations, the number of reflector pairs in the first top reflector structure 114 may be based on the number of reflector pairs in the second top reflector structure 126. In some implementations, the first top reflector structure 114 includes a set of layers (eg, AlGaAs layers) grown using MOCVD techniques, MBE techniques, or other techniques. In some implementations, the first top reflector structure 114 is grown on or above the cavity region 108 .
[0042] The etch stop layer 116 is a layer used to prevent etching of one or more other layers during the etching process. In the VCSEL 100, the etch stop layer can be used during the etching of the cap layer 118 (e.g., during the formation of the polarization grating) to prevent etching of the first top reflector structure 114. In some implementations, the etch stop layer 116 can include, for example, indium gallium phosphide (InGaP) or another type of material. In some implementations, the etch stop layer 116 is optional (i.e., in some implementations of the VCSEL 100, there may be no etch stop layer 116).
[0043] Cap layer 118 is a layer associated with one or more layers or features that cap or protect the VCSEL. Additionally, in some implementations, cap layer 118 can include a grating associated with polarizing light emitted by VCSEL 100. In some implementations, the grating introduces polarization dependence into the reflectivity of VCSEL 100, which has the effect of suppressing one of two orthogonal polarization orientations in the light (e.g., causing the light emitted by VCSEL 100 to have a single polarization orientation). In some implementations, such as Figure 1 As shown in , the cap layer 118 is located above the first top reflector structure 114. In some implementations, the cap layer 118 includes a semiconductor material such as GaAs that is etched to form a grating pattern that defines a grating. For example, the grating pattern can include a series of lines (e.g., from a top view of the VCSEL 100). In some implementations, the pitch of the grating pattern can be in a range of about 0.35 μm to about 0.66 μm. In addition, or alternatively, the pitch of the grating pattern can be in a range of about 0.35×λ to about 0.48×λ, where λ is the wavelength of the VCSEL 100. It is worth noting that by appropriately designing the top reflector structure 114 and the second top reflector structure 126 used as a back reflector, the grating pitch can be larger than the wavelength of light in the semiconductor without causing a significant degradation in device performance (e.g., optical power, polarization, mode selectivity, etc.), and the larger pitch can simplify manufacturing compared to alternative designs that require sub-wavelength gratings. In some implementations, the duty cycle of the grating pattern (e.g., the ratio of the grating ridge width to the period) can be in a range of about 0.40 to about 0.60. In some implementations, the depth of the grating pattern can be in a range of about 100 nanometers (nm) to about 150 nm. In some implementations, the grating is optional (i.e., in some implementations of the VCSEL 100, the grating may not be present). In such implementations, the VCSEL 100 can, for example, provide unpolarized light (e.g., single-mode light or multi-mode light) whose controlled divergence (e.g., low) is provided by the MF structures described herein.
[0044] The dielectric layer 120 is a layer that creates an out-of-phase region for the high-order transverse modes (HOM) of light in the VCSEL 100 and, associated, provides mode filtering for the VCSEL 100. In some implementations, a portion of the dielectric layer 120 may be included in the MF layer 130. In some implementations, the dielectric layer 120 may include, for example, SiNx, SiO2, a polymer dielectric, or another type of insulating material. In some implementations, the thickness of the dielectric layer 120 is selected to cause destructive interference of reflections in the first region 134 of the MF structure. Additional details about the dielectric layer 120 are provided below in the description related to the MF layer 130.
[0045] The metal layer 122 is a layer that provides lateral absorption of the HOM in the VCSEL 100 and, associated, provides mode filtering for the VCSEL 100. Additionally or alternatively, the metal layer 122 may be formed to create (in conjunction with the dielectric layer 120) an out-of-phase region for the HOM of light in the VCSEL 100. In some implementations, the metal layer 122 may be included in the MF layer 130. In some implementations, the metal layer 122 may include the same material as the top contact layer 124. For example, in some implementations, the metal layer 122 may be formed of the same p-type metal that forms the top contact layer 124. In some implementations, using the same material for both the metal layer 122 and the top contact layer 124 reduces the manufacturing complexity of the VCSEL 100 (e.g., by enabling the metal layer 122 and the top contact layer 124 to be formed using the same deposition process). Additionally or alternatively, the metal layer 122 may include the same material as the plated metal (e.g., gold (Au)) of the VCSEL 100. In addition, or alternatively, the metal layer 122 may include the same material as the seed metal of the VCSEL 100 (e.g., titanium tungsten (TiW) / Au). In some implementations, the thickness of the metal layer 122 ranges from about 0.2 μm to about 0.8 μm, such as 0.5 μm. In some implementations, the metal layer 122 has an annular shape, a slotted annular shape, a gear shape, or other types of circular or non-circular shapes (e.g., depending on the design of the VCSEL 100). In some implementations, the shape of the metal layer 122 corresponds to or matches the shape of the limiting aperture 112. In some implementations, the metal layer 122 is optional and therefore may not be present in some implementations of the VCSEL 100. Additional details about the metal layer 122 are provided below in the description related to the MF layer 130.
[0046] The top contact layer 124 is the top contact layer of the VCSEL 100, which is in electrical contact with the first top reflector structure 114 through which current can flow. In some implementations, the top contact layer 124 is formed of a material optimized for contacting a p-type semiconductor. Alternatively, in some implementations, the contact layer 124 is formed of a material optimized for contacting an n-type semiconductor. In some implementations, the top contact layer 124 includes an annealed metallization layer. For example, the top contact layer 124 may include a chromium-gold (Cr-Au) layer, a gold-zinc (Au-Zn), a titanium-platinum-gold (TiPtAu) layer, a gold-germanium-nickel (AuGeNi) layer, a palladium-germanium-gold (PdGeAu) layer, and the like. In some implementations, the thickness of the top contact layer 124 ranges from about 0.2 μm to about 0.8 μm, such as 0.5 μm. In some implementations, top contact layer 124 has a ring shape, a slotted ring shape, a gear shape, or other types of circular or non-circular shapes (e.g., depending on the design of VCSEL 100). In some implementations, top contact layer 124 is a continuation of metal layer 122 and thus can have a shape that corresponds to or matches the shape of metal layer 122 (and the shape of limiting aperture 112).
[0047] The second top reflector structure 126 is a top reflector of an optical resonator of the VCSEL 100. In some implementations, the second top reflector structure 126 is configured to increase the reflectivity of a side of the VCSEL 100 that includes the first top reflector structure 114 (e.g., the top side of the VCSEL 100). In operation, integrating optical elements (such as gratings or mode filters) in a BSE VCSEL is less efficient (e.g., compared to a top emitting VCSEL) because the reflectivity is high and the cavity mode has less interaction with the optical elements. Reducing the number of mirror pairs in the top reflector structure increases the coupling of the cavity mode to such optical elements. However, reducing the number of mirror pairs in the top reflector structure decreases the reflectivity of the side of the VCSEL that includes the top reflector structure. In the VCSEL 100, the second top reflector structure 126 is used to increase the reflectivity of a side of the VCSEL 100 that includes the first top reflector structure 114. Therefore, the number of mirror pairs in the first top reflector structure 114 can be reduced to increase the coupling of the cavity mode to the MF structure, and the second top reflector structure 126 can be designed to mitigate the reduction in reflectivity caused by the reduction in the number of mirror pairs in the first top reflector structure 114. In some implementations, the number of mirror pairs in the first top reflector structure 114 and the number of mirror pairs in the second top reflector structure 126 can be optimized to provide effective mode filtering using the MF structure while keeping the performance of the VCSEL 100 less sensitive to the MF design parameters, ultimately maintaining the performance uniformity of the VCSEL 100.
[0048] In some implementations, the second top reflector structure 126 may include multiple DBR pairs, or another type of reflector structure. In some implementations, the second top reflector structure 126 is formed of a dielectric material. Therefore, in some implementations, the second top reflector structure 126 includes multiple dielectric DBR pairs. For example, the second top reflector structure 126 may include multiple SiO2 / SiNx reflector pairs, multiple SiO2 / titanium dioxide (TiO2) reflector pairs, or multiple Al2O3 / TiO2 reflector pairs, etc. Alternatively, in some implementations, the second top reflector structure 126 may be formed of a p-type material. Therefore, in some implementations, the second top reflector structure 126 includes multiple p-type DBR pairs, examples of which are described below in Figure 2 is shown in and about Figure 2 is described. Alternatively, in some implementations, the second top reflector structure 126 can be formed of an n-type material. In some implementations, the thickness of the second top reflector structure 126 can range from about 2.0 μm to about 5.0 μm, such as 2.5 μm. In some implementations, the number of reflector pairs in the second top reflector structure 126 ranges from 3 reflector pairs to 8 reflector pairs.
[0049] The top metal 128 is the top metal layer of the front side of the VCSEL 100. In some implementations, the top metal 128 can be a layer that is in electrical contact with the top contact layer 124 (e.g., through a via in the second top reflector structure 126). In some implementations, the top metal 128 can serve as a cathode of the VCSEL 100. In some implementations, the top metal 128 can include a plating metal (e.g., gold (Au)) and / or a seed metal (e.g., TiW / Au).
[0050] As described above, the VCSEL 100 includes a MF structure that provides mode filtering for light generated in the VCSEL 100. For example, the MF structure may at least partially suppress all HOMs of the VCSEL 100, such that light emitted by the VCSEL 100 is substantially only in a fundamental mode (e.g., such that the VCSEL 100 is a single-mode VCSEL). As another example, the MF structure may be configured to at least partially suppress some HOMs of the VCSEL 100, such that light emitted by the VCSEL 100 is substantially in a few (selected) modes (e.g., such that the VCSEL 100 is a multi-mode VCSEL, where the modes are controlled or selected based on the design of the MF structure).
[0051] As described above, the MF structure may include the MF layer 130 and the second top reflector structure 126, the MF layer 130 being formed from a portion of the dielectric layer 120 and the (optional) metal layer 122. In some implementations, such as Figure 1 As shown in , the MF layer 130 is located in the first region 134 of the MF structure (e.g., the outer ring region of the MF structure), but not in the second region 136 of the MF structure (e.g., the inner circle region of the MF structure). As further shown, the second top reflector structure 126 can be located at least in the second region 136 of the MF structure. For example, as shown in Figure 1 As shown in , the second top reflector structure 126 may be present in both the first region 134 of the MF structure and the second region 136 of the MF structure, wherein the portion of the second top reflector structure 126 located in the first region 134 is located above the MF layer 130. In some implementations, the size (e.g., outer diameter) of the second region 136 of the MF structure differs from the size of the limiting aperture 112 (e.g., oxide aperture) of the VCSEL 100 by an amount less than about 2.0 μm. In some implementations, the size of the second region 136 of the MF structure may be larger than the size of the limiting aperture 112. Alternatively, in some implementations, the size of the second region 136 of the MF structure may be smaller than the size of the limiting aperture 112. In some implementations, the size (e.g., outer diameter) of the first region 134 of the MF structure differs from the size of the limiting aperture (e.g., oxide aperture) of the VCSEL 100 by an amount in the range of about 4.0 μm to about 6.0 μm. In some implementations, the size (eg, width) of the annular region defined by the first region 134 and the second region 136 is in a range from about 1.5 μm to about 3.5 μm.
[0052] The MF layer 130 is a layer that at least partially suppresses one or more HOMs of light generated in the VCSEL 100. Figure 1 As shown in FIG. 1 , in some implementations, the MF layer 130 can include the metal layer 122 over a portion of the dielectric layer 120 in the first region 134. In some implementations, the dielectric layer 120 can have a thickness t (i.e., the thickness of the dielectric layer 120 in the MF 130) ranging from about 0.92×(λ / n d ) to about 1.45×(λ / n d ), where λ is the wavelength of VCSEL100, n d is the refractive index of the dielectric material. More generally, the dielectric layer 120 may have a thickness T that is equal to the thickness t plus or minus a value corresponding to a multiple of the wavelength of the VCSEL 100 divided by twice the refractive index of the dielectric material (e.g., T = t ± X × λ / (2*n d ), where 0.92×(λ / n d )≤t≤1.45×(λ / n d), and X is an integer value such as 0, 1, 2, etc. In some implementations, the thickness T of the dielectric layer 120 can vary by a certain amount (e.g., ±10 nm, ±15 nm) depending on the VCSEL design. Thus, in some implementations, the dielectric layer 120 has a thickness within about 15 nm of the following value: This value is equal to about 0.92×(λ / n d ) to about 1.45×(λ / n d ) plus or minus a value equal to X×λ / (2*n d ), where λ is the wavelength of the VCSEL, n d is the refractive index of the dielectric material, and X is an integer value. In some implementations, the thickness of the MF layer 130 is not equal to a multiple of one quarter of the emission wavelength of the VCSEL 100 (eg, to provide mode filtering by destructive interference in the first region 134, as described below).
[0053] In fact, if Figure 1 , the MF layer 130 provides an offset between the mirror pairs in a portion of the second top reflector structure 126 in a first region 134 of the MF structure and the mirror pairs in a portion of the second top reflector structure 126 in a second region 136 of the MF structure. This offset provided by the MF layer 130 creates an out-of-phase region in the portion of the second top reflector structure 126 in the first region 134 (e.g., the outer ring region) of the VCSEL 100 while maintaining an in-phase region in the portion of the second top reflector structure 126 in the second region 136. Here, the second region 136 is the in-phase region and the features of the VCSEL 100 can be designed to maximize reflectivity, while the first region 134 is the out-of-phase region and the features of the VCSEL 100 can be designed to minimize reflectivity. In operation, the HOM is mostly confined within the boundaries of the VCSEL 100 aperture, and therefore, the amount of overlap of the HOM with the in-phase region can be negligible, while the amount of overlap of the HOM with the out-of-phase region can be significant. Since the HOM is nearly confined within the out-of-phase region, the losses in the HOM increase and the HOM stops lasing. However, the fundamental mode is mostly confined closer to the center of the aperture, and therefore, the amount of overlap of the fundamental mode with the in-phase region can be large, while the amount of overlap of the fundamental mode with the out-of-phase region can be negligible. Since the fundamental mode is nearly confined within the in-phase region, the losses in the fundamental mode are not large and the fundamental mode is permitted to lase. In this way, the MF layer 130 can provide mode filtering (e.g., by destructive interference) for one or more HOMs in the first region 134 of the VCSEL 100.
[0054] Additionally, in some implementations, the metal layer 122 can provide absorption of the HOMs in the first region 134 of the VCSEL. Here, the lateral overlap of the HOMs in the first region 134 with the metal layer 122 increases the absorption of the HOMs by the metal layer 122 and, therefore, increases the mode loss. In this way, the metal layer 122 can provide mode filtering by at least partially absorbing one or more HOMs in the first region 134 of the VCSEL 100.
[0055] In some implementations, MF layer 130 may include only a portion of dielectric layer 120. That is, in some implementations, metal layer 122 is optional and, therefore, in some implementations, may not be present in VCSEL 100. In such implementations, the thickness of dielectric layer 120 in first region 134 may be selected to create a heterophase region.
[0056] In some implementations, the total thickness from the bottom surface of the bottom reflector structure 106 to the top surface of the second top reflector structure 126 can be, for example, in the range of about 7 μm to about 9 μm, such as about 8 μm. In some implementations, the thickness of one or more layers of the VCSEL 100 can be selected to provide a structure that achieves high reflectivity (e.g., a reflectivity greater than about 99%). In some implementations, a smaller total thickness can facilitate shortening the growth time of the VCSEL 100 or reducing stress within the VCSEL 100.
[0057] Figure 1 The number, arrangement, thickness, order, symmetry, etc. of the layers shown in the drawings are provided as examples only. Figure 1 VCSEL 100 may include more layers, fewer layers, different layers, differently constructed layers, or differently arranged layers than those shown in . For example, in some implementations, VCSEL 100 may not include a grating in cap layer 118. In some such implementations, cap layer 118 may be etched instead of dielectric layer 120 below metal layer 122, and may be combined with metal layer 122 to provide an offset that creates an out-of-phase region. As another example, VCSEL 100 may include one or more isolation implant regions to prevent free carriers from reaching the edges of the trenches and / or to isolate adjacent VCSELs 100 from each other (e.g., if the trenches do not completely surround the VCSELs in VCSEL 100). Additionally, or alternatively, a set of layers (e.g., one or more layers) of VCSEL 100 may perform one or more functions described as being performed by another set of layers of VCSEL 100, and any one layer may include more than one layer.
[0058] Figure 2 is a diagram associated with an alternative example implementation of a VCSEL 100 including the MF structure described herein. Figure 2 In the example shown in , the second top reflector structure 126 includes the same type of mirror pairs as the mirror pairs included in the first top reflector structure 114. For example, the first top reflector structure 114 may include a first plurality of p-type DBR mirror pairs, and the second top reflector structure 126 may include a second plurality of p-type DBR mirror pairs (e.g., instead of a plurality of dielectric DBR mirror pairs, such as Figure 1 ). In this embodiment, the bottom reflector structure includes a plurality of n-type DBR reflector pairs. As another example, the first top reflector structure 114 may include a first plurality of n-type DBR reflector pairs, and the second top reflector structure 126 may include a second plurality of n-type DBR reflector pairs, while the bottom reflector structure includes a plurality of p-type DBR reflector pairs.
[0059] In some such implementations, such as Figure 2 , the second top reflector structure 126 can form a mesa structure on the surface of the VCSEL 100. In some implementations where the second top reflector structure 126 includes the same type of mirror pairs as the mirror pairs in the first top reflector structure 114, the second top reflector structure 126 can be formed by an epitaxial regrowth process, for example, using MOCVD techniques.
[0060] It is worth noting that in Figure 2 In the example implementation of the VCSEL 100 shown in FIG. 1 , the second top reflector structure 126 is not present in the first region 134 of the MF structure. Figure 1 The concept is the same as shown in - the MF 130 creates an out-of-phase region with respect to the first region 134 of the VCSEL 100 while maintaining an in-phase region in the second region 136 .
[0061] Figure 2 The number, arrangement, thickness, order, symmetry, etc. of the layers shown in FIG. 1 are provided as examples. In practice, VCSEL 100 may include Figure 2 1. For example, in some implementations, VCSEL 100 may not include a grating in cap layer 118, as described above.
[0062] Figure 3 and Figure 4 is a diagram illustrating simulation results of a VCSEL 100 including the MF structure described herein. The simulation results are Figure 1, which includes a confining aperture 112 having a diameter of 5.5 μm and a second region 136 having a diameter of 6.0 μm and uses a bias current of 8 milliamperes (mA). Figure 3 The spectrum of VCSEL 100 is shown in FIG. Figure 3 As shown in , VCSEL 100 achieves single mode operation with a side mode suppression ratio (SMSR) of approximately 40 decibels (dB). Figure 4 A one-dimensional cross section of the far field of a VCSEL 100 is shown, with a two-dimensional view of the far field as an inset. Figure 4 As shown in , the far field of VCSEL 100 resembles a Gaussian beam distribution.
[0063] As indicated above, Figure 3 and Figure 4 are provided as examples. Other examples can be found in the Figure 3 and Figure 4 Different than described.
[0064] In this manner, VCSEL 100 may provide controllability of the operation of VCSEL 100 to achieve low divergence, single-mode operation (e.g., at high bias currents), or selective multi-mode operation. Thus, VCSEL 100 may have improved performance uniformity (e.g., compared to a BSE VCSEL including a relatively small oxide aperture associated with achieving single-mode operation).
[0065] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementations to the precise forms disclosed. Modifications and variations may be made in accordance with the foregoing disclosure or may be obtained from the practice of the implementations. In addition, unless the foregoing disclosure clearly provides a reason why one or more implementations cannot be combined, any implementations described herein may be combined.
[0066] Even though specific combinations of features are described in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of various implementations. In fact, many of these features can be combined in ways that are not specifically described in the claims and / or disclosed in the specification. Although each dependent claim listed below may be directly dependent on only one claim, the disclosure of various implementations includes the combination of each dependent claim with all other claims in the claim set. As used herein, the phrase "at least one" referring to a list of items refers to any combination of these items, including single members. For example, "at least one of: a, b, or c" is intended to cover a, b, or c, ab, ac, bc, and abc, as well as any combination with multiple identical items.
[0067] Unless clearly described, any element, action or instruction used herein should not be interpreted as key or necessary. In addition, as used herein, the article "one" and "an" are intended to include one or more projects, and can be used interchangeably with "one or more". In addition, as used herein, the article "the" is intended to include one or more projects related to the article "the", and can be used interchangeably with "one or more". In addition, as used herein, the term "set" is intended to include one or more projects (for example, a combination of related projects, unrelated projects, or related and unrelated projects), and can be used interchangeably with "one or more". If only intended to a project, the phrase "only one" or similar language is used. In addition, as used herein, the term "have", "have", "have" etc. are intended to be open terms. In addition, unless otherwise clearly stated, the phrase "based on" is intended to mean "at least partially based on". In addition, as used herein, the term "or" is intended to be inclusive when used in a series, and can be used interchangeably with "and / or", unless otherwise clearly stated (for example, if used in combination with "either" or "only one"). In addition, for ease of description, spatially relative terms (such as "below," "lower," "above," "upper," etc.) may be used herein to describe the relationship of one element or feature illustrated in the figures to another element or feature. In addition to the orientations depicted in the figures, spatially relative terms are also intended to cover different orientations of devices, equipment, and / or elements in use or operation. Devices may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein may also be interpreted accordingly.
Claims
1. A vertical cavity surface emitting laser (VCSEL), comprising: a first reflector structure located above the cavity region; a grating associated with polarized light emitted by the VCSEL, the grating being located above the first reflector structure; as well as A mode filter MF structure is located above the grating, and the MF structure comprises: an MF layer located in the first region of the MF structure for at least partially suppressing a high-order transverse mode (HOM) of light, the MF layer comprising a dielectric layer, and The second reflector structure is located at least in the second region of the MF structure and is used to increase the reflectivity of the side of the VCSEL including the first reflector structure. 2 . The VCSEL according to claim 1 , wherein the first reflector structure comprises a plurality of p-type distributed Bragg reflector (DBR) pairs, and the second reflector structure comprises a plurality of dielectric DBR pairs. 3 . The VCSEL of claim 1 , wherein the MF layer comprises a metal layer, the metal layer being located above the dielectric layer. 4 . The VCSEL of claim 3 , wherein the metal layer comprises a same material as a contact layer of the VCSEL, a same material as a seed metal of the VCSEL, or a same material as a plating metal of the VCSEL. The VCSEL according to claim 1 , wherein the MF layer comprises only the dielectric layer. 6 . The VCSEL of claim 1 , wherein the MF layer provides an offset between the first region of the MF structure and the second region of the MF structure.
7. The VCSEL of claim 1, wherein the first reflector structure comprises a first plurality of p-type DBR pairs and the second reflector structure comprises a second plurality of p-type DBR pairs.
8. The VCSEL of claim 1, wherein a size of the second region of the MF structure differs from a size of an oxide aperture of the VCSEL by less than about 2.0 micrometers (μm).
9. The VCSEL of claim 1, wherein a size of the first region of the MF structure differs from a size of an oxide aperture of the VCSEL by an amount in a range of about 4.0 microns (μm) to about 6.0 μm.
10. The VCSEL of claim 1, wherein a size of an annular region defined by the first region and the second region is in a range of about 1.5 microns (μm) to about 3.5 μm.
11. The VCSEL of claim 1, wherein the number of mirror pairs in the second mirror structure is in the range of 3 mirror pairs to 8 mirror pairs.
12. The VCSEL of claim 1, wherein the number of mirror pairs in the first mirror structure is in the range of 7 mirror pairs to 17 mirror pairs.
13. The VCSEL of claim 1, wherein the VCSEL is a back side emitting (BSE) VCSEL.
14. The VCSEL of claim 1, wherein a thickness of the dielectric layer is selected to cause destructive interference of reflections in the first region of the MF structure.
15. The VCSEL of claim 1, wherein the thickness of the MF layer is not a multiple of one quarter of the emission wavelength of the VCSEL.
16. The VCSEL of claim 1, wherein the dielectric layer in the MF layer has a thickness within 15 nanometers of a value equal to about 0.92×(λ / n d ) to about 1.45×(λ / n d ) plus or minus a value equal to X×λ / (2*n d ), where λ is the wavelength of the VCSEL, n d is the refractive index of the dielectric material, and X is an integer value.
17. A back-emitting BSE vertical cavity surface emitting laser VCSEL, comprising: a first reflector structure located above the cavity region; as well as A mode filter MF structure is located above the first reflector structure, and the MF structure comprises: a MF layer located in the first region, the MF layer being associated with suppressing one or more modes of light emitted by the BSE VCSEL, wherein the MF layer comprises at least one dielectric layer, and A second reflector structure is located at least in the second region, the second reflector structure being associated with increasing the reflectivity of a side of the BSE VCSEL including the first reflector structure.
18. The BSE VCSEL of claim 17, further comprising a grating located above the first reflector structure, the grating being associated with polarizing light emitted by the BSE VCSEL.
19. The BSE VCSEL of claim 17, wherein the MF layer further comprises a metal layer located above the dielectric layer in the first region.
20. A vertical cavity surface emitting laser (VCSEL), comprising: The pattern filter MF structure includes: an MF layer for providing an offset between a first region of the MF structure and a second region of the MF structure, associated to at least partially suppress one or more modes of light emitted by the VCSEL by causing destructive interference of reflections in the first region of the MF structure; and A reflector structure is located at least in the second region and is used to increase the reflectivity of the epitaxial side of the VCSEL.
