Surface-emitting laser chip

Abstract

According to the invention, the surface-emitting laser chip is improved, and the closed groove between the first electrode and the exposed light-emitting layer on the horizontal projection surface is formed through etching, so that the laser light-emitting angle is reduced. Furthermore, the surface emitting type laser chip only forms the closed groove additionally through etching, so that the complexity is not increased too much, and compared with an edge emitting type laser chip, the surface emitting type laser chip still has the advantages of higher process yield and lower manufacturing cost, so that the surface emitting type laser chip has a better market advantage and a wider application range.

Description

Technical Field

[0001] The present invention relates to a surface emitting laser chip, and more particularly to a surface emitting laser chip which limits the laser emitting angle by setting a cylindrical ring groove. Background Art

[0002] Laser chips are currently used in many technical fields, such as optical communications, material processing, displays, automotive lighting, dermatology, surgery, and three-dimensional sensing in LiDAR. Common laser chips are roughly divided into edge-emitting laser chips and surface-emitting laser chips. Edge-emitting laser chips can have a smaller laser emission angle, that is, the laser divergence angle is smaller. However, the laser emission angle of surface-emitting laser chips is larger. In general use, it is hoped that the laser chip's laser is concentrated, that is, the laser emission angle cannot be too large.

[0003] After the chip process is completed, the edge-emitting laser chip must be split into core strips and end-face coated. This process is complex and time-consuming and is the key to affecting the process yield. Since the surface-emitting laser chip does not use the natural fracture surface of the crystal as a reflection surface, it does not need to be split or end-face coated, which can save considerable process time and avoid affecting the process yield. Therefore, the industry still uses surface-emitting laser chips more frequently.

[0004] Please refer to Figure 1 and Figure 2 , Figure 1 is a three-dimensional schematic diagram of a surface-emitting laser chip in the prior art, and Figure 2 1 is a cross-sectional schematic diagram of a surface-emitting laser chip of the prior art. The surface-emitting laser chip 1 of the prior art includes a substrate 11, an n-type distributed Bragg reflector 12, an n-type cover layer 13, an n-type light confinement layer 14, a light-emitting layer 15, an oxide layer 19, a p-type light confinement layer 16, a first electrode 17 and a second electrode 18. The second electrode 18 is formed under the substrate 11, the n-type distributed Bragg reflector 12 is located on the substrate 11, and the n-type cover layer 13 is located on the n-type distributed Bragg reflector 12, wherein the second electrode 18, the substrate 11 and a portion of the n-type distributed Bragg reflector 12n are integrated into a rectangular shape.

[0005] The n-type light confinement layer 14 is formed on the n-type cladding layer 13, the light emitting layer 15 is formed on the n-type light confinement layer 14, the oxide layer 19 is formed on the light emitting layer 15, the p-type light confinement layer 16 is formed on the oxide layer 19, and the first electrode 17 is formed on the p-type light confinement layer 16. Another part of the n-type distributed Bragg reflector 12, the n-type cladding layer 13, the n-type light confinement layer 14, the light emitting layer 15, the oxide layer 19 and the p-type light confinement layer 16 are integrated into a cylindrical shape, and the first electrode 17 is annular. The oxide layer 19 is provided with a slot 191 (usually filled with air) to expose the light emitting layer 15 so that the light of the light emitting layer can pass through.

[0006] At Figure 1 and Figure 2 In the embodiment, the light beam emitted by the light-emitting layer 15 will be confined within the annular first electrode 17, that is, the laser emission angle is determined by the position of the annular first electrode 17, but generally there is still a distance between the annular first electrode 17 and the outer edge of the light-emitting layer 15, so that the laser emission angle is still not effectively limited, that is, the formed light spot SP is not too concentrated, resulting in the need to set optical components outside the surface-emitting laser chip 1 to perform focusing action in order to achieve the required smaller laser emission angle.

[0007] In short, although edge-emitting laser chips can have a smaller laser beam angle, the manufacturing cost is high and the yield is low. Therefore, how to improve surface-emitting laser chips to reduce the laser beam angle of surface-emitting laser chips without reducing the process yield and increasing the cost is still a problem that developers and related researchers need to continue to work hard to overcome and solve. Summary of the invention

[0008] In view of this, the inventor, with the help of his rich professional knowledge and years of practical experience, has improved a surface-emitting laser chip, and the technical problem solved is to reduce the technical problem of the excessive laser emission angle of the surface-emitting laser chip. When the laser emission angle of the surface-emitting laser chip is reduced, its performance can be close to that of the edge-emitting laser chip, and it does not have the high manufacturing cost and low yield of the edge-emitting laser chip, which will make the application range of the surface-emitting laser chip wider.

[0009] The technical means adopted in the present invention are as follows.

[0010] In order to achieve the aforementioned purpose of the present invention, the present invention provides a surface-emitting laser chip, which includes a substrate, an n-type distributed Bragg reflection layer, an n-type covering layer, an n-type light confinement layer, a light-emitting layer, an oxide layer, a p-type light confinement layer, a first electrode and a second electrode. The n-type distributed Bragg reflection layer is located on the substrate, the n-type covering layer is located on the n-type distributed Bragg reflection layer, the n-type light confinement layer is located on the light-emitting layer, the oxide layer is located on the light-emitting layer, the oxide layer is provided with slots to expose a portion of the light-emitting layer, the p-type light confinement layer is located on the oxide layer, the first electrode is located on the p-type light confinement layer, the second electrode is located under the substrate, and the p-type light confinement layer is formed with a closed groove, and the closed groove is located within the first electrode on a horizontal projection plane.

[0011] According to one embodiment of the present invention, the first electrode, the substrate and a portion of the n-type distributed Bragg reflector are integrated into a rectangle, the other portion of the n-type distributed Bragg reflector, the n-type cover layer, the n-type light confinement layer, the light-emitting layer, the oxide layer and the p-type light confinement layer are integrated into a cylinder, and the first electrode is in a circular ring shape.

[0012] According to one embodiment of the present invention, the closed groove is a cylindrical ring groove with a circular ring cross section.

[0013] According to one embodiment of the present invention, the closed groove is a regular polygonal groove with a regular polygonal cross section.

[0014] According to one embodiment of the present invention, the width of the closed groove is 3 to 6 microns, and the depth of the closed groove is 2 to 4 microns.

[0015] According to one embodiment of the present invention, the closed groove is located within the first electrode and the exposed light-emitting layer on a horizontal projection plane.

[0016] According to one embodiment of the present invention, the n-type distributed Bragg reflection layer, the n-type covering layer, the n-type light confinement layer, the light-emitting layer and the p-type light confinement layer of the other part form an integrated cylindrical shape with a diameter of 8 to 12 microns, and the diameter of the slot is 6 to 10 microns.

[0017] According to one embodiment of the present invention, the groove width of the cylindrical ring groove is 3 to 6 microns, and the groove depth of the cylindrical ring groove is 2 to 4 microns.

[0018] The surface emitting laser chip further includes a p-type distributed Bragg reflection layer, the p-type distributed Bragg reflection layer is located on the p-type light confinement layer, and the first electrode is on the p-type distributed Bragg reflection layer.

[0019] According to one embodiment of the present invention, the closed trench is formed on the surface of the p-type distributed Bragg reflector layer and extends downward to the p-type light confinement layer.

[0020] Thus, the technical effect produced by the surface-emitting laser chip of the present invention is that a closed groove between the first electrode and the exposed light-emitting layer is etched on the surface of the p-type light-confining layer to reduce the laser emission angle. Therefore, in addition to increasing the performance of the surface-emitting laser chip, the surface-emitting laser chip can be used to replace the edge-emitting laser chip in some applications due to its lower manufacturing cost and higher yield, thereby increasing the application breadth of the surface-emitting laser chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 : A three-dimensional schematic diagram of a surface-emitting laser chip in the prior art.

[0022] Figure 2 : Schematic cross-sectional view of a surface-emitting laser chip in the prior art.

[0023] Figure 3 : A three-dimensional schematic diagram of a surface-emitting laser chip according to an embodiment of the present invention.

[0024] Figure 4 : A schematic cross-sectional view of a surface-emitting laser chip according to an embodiment of the present invention.

[0025] Description of the figure number:

[0026] (Prior Art)

[0027] 1: Surface-emitting laser chip

[0028] 11: Substrate

[0029] 12: n-type distributed Bragg reflector

[0030] 13: n-type cladding layer

[0031] 14: n-type light confinement layer

[0032] 15: Luminous layer

[0033] 16: p-type light confinement layer

[0034] 17: First electrode

[0035] 18: Second electrode

[0036] 19: Oxide layer

[0037] 191: Slot

[0038] SP: Light Class

[0039] (The present invention)

[0040] 2: Surface-emitting laser chip

[0041] 20: Cylindrical ring groove

[0042] 21: Substrate

[0043] 22: n-type distributed Bragg reflector

[0044] 23: n-type cladding layer

[0045] 24: n-type light confinement layer

[0046] 25: Luminous layer

[0047] 26: p-type light confinement layer

[0048] 27: First electrode

[0049] 28: Second electrode

[0050] 29: Oxide layer

[0051] 291: Slot

[0052] D: Groove depth

[0053] W: Slot width

[0054] RI, RO: diameter length SP': light shift. DETAILED DESCRIPTION

[0055] The p-type light confinement layer in the surface-emitting laser chip is made of p-type material, and the present invention forms a closed groove in the p-type light confinement layer after dry etching to limit the laser emission angle, wherein the closed groove is located within the closed first electrode above the p-type light confinement layer on the horizontal projection plane. When the closed groove is formed, the light emitted by the light-emitting layer will be blocked by the closed groove, and since the closed groove is located within the closed first electrode above the p-type light confinement layer on the horizontal projection plane, the present invention can achieve the purpose of reducing the laser emission angle. In an embodiment of the present invention, the p-type light confinement layer is cylindrical, and the closed groove can be a cylindrical ring groove with a circular ring cross section.

[0056] See also Figure 3 and Figure 4 , Figure 3 is a three-dimensional schematic diagram of a surface-emitting laser chip according to an embodiment of the present invention, and Figure 42 is a schematic cross-sectional view of a surface-emitting laser chip according to an embodiment of the present invention. The surface-emitting laser chip 2 includes a substrate 21, an n-type distributed Bragg reflector 22, an n-type cover layer 23, an n-type light confinement layer 24, a light-emitting layer 25, an oxide layer 29, a p-type light confinement layer 26, a first electrode 27, and a second electrode 28. The second electrode 28 is formed under the substrate 21, the n-type distributed Bragg reflector 22 is located on the substrate 21, and the n-type cover layer 23 is located on the n-type distributed Bragg reflector 22, wherein the second electrode 28, the substrate 21, and a portion of the n-type distributed Bragg reflector 22 are integrated into a rectangular shape.

[0057] The n-type light confinement layer 24 is formed on the n-type cladding layer 23, the light emitting layer 25 is formed on the n-type light confinement layer 24, the oxide layer 29 is formed on the light emitting layer 25, the p-type light confinement layer 26 is formed on the oxide layer 29, and the first electrode 27 is formed on the p-type light confinement layer 26. Another part of the n-type distributed Bragg reflector 22, the n-type cladding layer 23, the n-type light confinement layer 24, the light emitting layer 25, the oxide layer 29 and the p-type light confinement layer 26 are integrated into a cylindrical shape, and the first electrode 27 is annular. The oxide layer 29 is provided with a slot 253 (usually filled with air) to expose part of the light emitting layer 25, so that the light of the light emitting layer 25 can pass through.

[0058] The surface of the p-type light confinement layer 26 is etched to form a cylindrical ring groove 20, and the etching method is dry etching, such as sputter etching, ion beam etching, plasma etching or reactive ion etching (RIE), and the present invention is not limited to the etching method. The cylindrical ring groove 20 is located inside the annular first electrode 27 and outside the exposed light-emitting layer 25 on the horizontal projection plane (that is, the cylindrical ring groove 20 is located inside the first electrode 27 and the slot 291 on the horizontal projection plane).

[0059] Figure 3 and Figure 4 The closed groove of the embodiment takes the cylindrical ring groove 20 as an example, and the cross-section of the cylindrical ring groove 20 is annular, but the present invention is not limited to this. The closed groove located on the p-type light confinement layer 26 and between the first electrode 27 and the exposed light-emitting layer 25 on the horizontal projection plane can also be a groove with a cross-section in other shapes, such as a regular polygonal groove with a regular hexagonal groove, a regular octagonal groove or a regular dodecagonal groove, etc., but the use of annular grooves can achieve a better laser light emission angle reduction effect.

[0060] In this embodiment, the groove depth D of the cylindrical ring groove 20 is, for example, 2 to 4 microns (i.e., 2 μm≤D≤4 μm), the groove width W of the cylindrical ring groove 20 is, for example, 3 to 6 microns (i.e., 3 μm≤W≤6 μm), the diameter length RO of the cylindrical shape of the other part of the n-type distributed Bragg reflector 22, the n-type cap layer 23, the n-type light confinement layer 24, the light emitting layer 25, the oxide layer 29 and the p-type light confinement layer 26 is, for example, 8 to 12 microns (i.e., 8 μm≤RO≤12 μm), and the diameter length RI of the unoxidized annular part of the cylindrical integration (i.e., the diameter length of the slot 291 or the diameter length of the exposed light emitting layer 25) is, for example, 6 to 10 microns (i.e., 6 μm≤RO≤10 μm). The above-mentioned size limitation is only for example, and the present invention is not limited to the above-mentioned size limitation.

[0061] Different from the surface-emitting laser chip in the prior art, the first electrode will limit the laser emission angle. Figure 3 and Figure 4 In the embodiment, the light emitted by the light emitting layer 25 will be limited by the cylindrical ring groove 20 , so the formed light spot SP′ will be more concentrated, that is, the laser emission angle of the surface emitting laser chip 2 is reduced due to the existence of the cylindrical ring groove 20 .

[0062] On the other hand, the selection of materials for each layer is described as follows. The material that can be selected for the substrate 21 is, for example, gallium arsenide (GaAs), and through doping, it is an n-type substrate. The n-type distributed Bragg reflector 22 uses aluminum gallium arsenide (AlxGaAs) material and forms a distributed Bragg reflector (distributed Bragg reflector), wherein the x in AlxGaAs changes according to the required refractive index, and the x of each sublayer of the n-type distributed Bragg reflector 22 will be different. The n-type capping layer 23 will use an n-type material with a larger energy band slot than the light-emitting layer 25 to effectively seal the carrier (electrons and holes), and its refractive index is also smaller than that of the light-emitting layer 25, so that the light can be sealed in the light-emitting layer 25, for example, aluminum gallium arsenide (AlyGaAs) material is used, wherein the y in AlyGaAs is adjusted according to actual needs.

[0063] The refractive index of the n-type light confinement layer 24 and the p-type light confinement layer 26 must be higher than that of the light emitting layer 25 to achieve better light emitting performance. The n-type light confinement layer 24 and the p-type light confinement layer 26 are made of, for example, aluminum gallium arsenide (AliGaAs) material, wherein the i in AliGaAs is adjusted according to actual needs. The light emitting layer 25 is mainly used to generate an electro-optical effect through the received current to emit light, for example, aluminum gallium arsenide (AlzGaAs) or indium gallium arsenide (InGaAs) material is also used, wherein the z in AlzGaAs is adjusted according to actual needs. The oxide layer 29 is made of, for example, an oxide material of aluminum gallium arsenide (AlzGaAs). The first electrode 27 and the second electrode 28 are made of an opaque conductive material, such as copper, silver, or gold.

[0064] In addition, in other embodiments, a p-type distributed Bragg reflector layer may be further provided on the p-type light confinement layer 26, and the first electrode 27 is located on the p-type distributed Bragg reflector layer. In this case, the cylindrical ring groove 20 is formed in the p-type distributed Bragg reflector layer, and preferably can penetrate into the p-type light confinement layer 26. In short, the present invention forms a closed groove, such as a cylindrical ring groove 20, between the first electrode 27 and the exposed light-emitting layer 25 on a horizontal projection plane on a layer below the first electrode 27 of a surface-emitting laser chip 2 after the first electrode 27 has been formed, so as to reduce the laser emission angle.

[0065] It can be seen from the above implementation description that the present invention has the following advantages compared with the prior art and products. The present invention improves the surface-emitting laser chip by etching to form a closed groove between the first electrode and the exposed light-emitting layer on the horizontal projection plane, thereby reducing the laser light emission angle. Furthermore, the surface-emitting laser chip of the present invention only forms an additional closed groove by etching, so it does not increase the complexity too much. Compared with the edge-emitting laser chip, it still has the advantages of higher process yield and lower manufacturing cost. Therefore, the surface-emitting laser chip of the present invention has better market advantages and a wider range of applications.

Claims

1. A surface-emitting laser chip, comprising a substrate (21), an n-type distributed Bragg reflection layer (22), an n-type cover layer (23), an n-type light confinement layer (24), a light-emitting layer (25), an oxide layer (29), a p-type light confinement layer (26), a first electrode (27) and a second electrode (28), wherein the n-type distributed Bragg reflection layer (22) is located on the substrate (21), and the n-type cover layer (23) is located on the n-type distributed Bragg reflection layer (22). ), the n-type light confinement layer (24) is located on the light-emitting layer (25), the oxide layer (29) is located on the light-emitting layer (25), the oxide layer (29) is provided with a slot (291) to expose a portion of the light-emitting layer (25), the p-type light confinement layer (26) is located on the oxide layer (29), the first electrode (27) is located on the p-type light confinement layer (26), and the second electrode (28) is located under the substrate (21), characterized in that: The p-type light confinement layer (26) is formed with a closed groove, and the closed groove is located within the first electrode (27) on a horizontal projection plane.

2. The surface emitting laser chip according to claim 1, wherein: The first electrode (28), the substrate (21) and a portion of the n-type distributed Bragg reflection layer (22) are integrated into a rectangular shape, the other portion of the n-type distributed Bragg reflection layer (22), the n-type covering layer (23), the n-type light confinement layer (24), the light-emitting layer (25), the oxide layer (29) and the p-type light confinement layer (26) are integrated into a cylindrical shape, and the first electrode (27) is in a circular ring shape.

3. The surface emitting laser chip according to claim 2, wherein: The closed groove is a cylindrical ring groove (20) with a circular ring cross section.

4. The surface emitting laser chip according to claim 1, wherein: The closed groove is a regular polygonal groove with a regular polygonal cross section.

5. The surface emitting laser chip according to claim 1, wherein: The width of the closed groove is 3 to 6 micrometers, and the depth of the closed groove is 2 to 4 micrometers.

6. The surface emitting laser chip according to claim 3, wherein: The closed groove is located between the first electrode (27) and the exposed light-emitting layer (25) on a horizontal projection plane.

7. The surface emitting laser chip according to claim 6, wherein: The n-type distributed Bragg reflection layer (22), the n-type covering layer (23), the n-type light confinement layer (24), the light-emitting layer (25), the oxide layer (29) and the p-type light confinement layer (26) of the other part form an integrated cylindrical shape with a diameter (RO) of 8 to 12 microns, and a diameter (RI) of the slot (291) of 6 to 10 microns.

8. The surface emitting laser chip according to claim 7, wherein: The groove width (W) of the cylindrical ring groove (20) is 3 to 6 microns, and the groove depth (D) of the cylindrical ring groove (20) is 2 to 4 microns.

9. The surface emitting laser chip according to claim 1, wherein: The surface-emitting laser chip further comprises a p-type distributed Bragg reflection layer, wherein the p-type distributed Bragg reflection layer is located on the p-type light confinement layer (26), and the first electrode (27) is located on the p-type distributed Bragg reflection layer.

10. The surface emitting laser chip according to claim 9, wherein: The closed groove is formed on the surface of the p-type distributed Bragg reflection layer and extends downward to the p-type light confinement layer (26).

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