Voltage and current sensor signal acquisition device, traction control unit and sampling method

Abstract

The invention provides a voltage and current sensor signal acquisition device, a traction control unit and a sampling method. The device comprises a sampling conditioning module, an analog-to-digital conversion module, a first programmable gate array module and a first M-LVDS transceiver. The sampling conditioning module is used for collecting a current signal output by a voltage or current sensor and converting the current signal into a voltage signal; the analog-to-digital conversion module is connected with the sampling conditioning module and is used for carrying out alternating current and direct current conversion on the voltage signal to generate a conversion result; the first programmable gate array module is connected with the analog-to-digital conversion module and is used for synchronously acquiring the conversion result through multiple channels according to a preset period, generating an M-LVDS data packet according to the conversion result and converting the M-LVDS data packet into an M-LVDS signal; and the first M-LVDS transceiver is connected with the programmable gate array module and is used for providing the M-LVDS signal to a plurality of external inverter control board cards.

Description

Technical Field

[0001] The present application relates to the technical field of train traction control, and in particular to a voltage and current sensor signal acquisition device, a traction control unit and a sampling method. Background Art

[0002] In the field of rail transit electric locomotives, traction converters are the core components of energy conversion, responsible for efficiently converting electrical energy into mechanical energy. In this process, the inverter control board (SPU) in the traction control unit (TCU) needs to collect key physical quantities such as contact network voltage, DC link voltage, output AC current, and input DC current. To ensure that these physical quantities can be accurately captured and processed by the inverter control board, it is usually necessary to use voltage and current sensors to convert their actual voltage and current into voltage signals, which are collected by a dedicated voltage and current sensor board (AIO) and the results are provided to the SPU.

[0003] Existing AIO boards may have some deficiencies in design and application:

[0004] 1. The backplane of the board usually uses a parallel bus, which has low availability: such boards usually consist of a conditioning circuit and a conversion device ADC. The drive control of the ADC is generally performed by the corresponding SPU board. The main control board completes the control of the ADC through a parallel bus or SPI bus. The parallel bus has a large number of signals, complex wiring, high cost, and the signal transmission frequency cannot be continuously improved. The SPI bus has poor anti-interference ability and is not suitable for cross-board transmission;

[0005] 2. There is a problem of overlapping analog and digital signals: In a TCU, there are usually multiple SPUs to realize the drive control of the rectifier or inverter. In some applications, some voltage and current signals need to be transmitted to multiple SPUs synchronously, and the sensor acquisition board based on parallel bus or SPI cannot provide data to more than one actuator at the same time. Therefore, it can only be done by outputting the conditioned analog quantity on the backplane, entering another acquisition board, and then being collected by its ADC and read by the corresponding actuator. This results in the analog signal needing to enter the backplane together with the bus signal, which not only increases the complexity of the system, but may also introduce problems such as signal interference and transmission delay, and greatly limits the standardization of the interface. Summary of the invention

[0006] The purpose of the present application is to provide a voltage and current sensor signal acquisition device, a traction control unit and a sampling method to overcome the problems of the prior art caused by the use of a parallel bus or SPI on the backplane, and the overlap problem of analog and digital quantities.

[0007] To achieve the above-mentioned purpose, the voltage and current sensor signal acquisition device provided in the present application comprises: a sampling and conditioning module, an analog-to-digital conversion module, a first programmable gate array module and a first M-LVDS transceiver; the sampling and conditioning module is used to collect the current signal output by the voltage or current sensor and convert the current signal into a voltage signal; the analog-to-digital conversion module is connected to the sampling and conditioning module, and is used to perform AC-DC conversion on the voltage signal to generate a conversion result; the first programmable gate array module is connected to the analog-to-digital conversion module, and is used to synchronously collect the conversion result through multiple channels according to a preset period, generate an M-LVDS data packet according to the conversion result and convert it into an M-LVDS signal; the first M-LVDS transceiver is connected to the programmable gate array module, and is used to provide the M-LVDS signal to multiple external inverter control boards.

[0008] In the above-mentioned voltage and current sensor signal acquisition device, optionally, the first programmable gate array module includes a conversion drive unit and an M-LVDS sending unit; the conversion drive unit is used to drive the analog-to-digital conversion module to acquire the conversion result according to a preset period, and provide the flag bit of the analog-to-digital conversion module and the conversion result to the M-LVDS sending unit; the M-LVDS sending unit is used to generate an M-LVDS data packet according to the flag bit and the conversion result and convert it into an M-LVDS signal to be output by the first M-LVDS transceiver.

[0009] In the above-mentioned voltage and current sensor signal acquisition device, optionally, the M-LVDS sending unit includes a data generation component, a verification component and an encoding component; the verification component is used to combine the multiple conversion results according to the flag bit and generate a verification code; the data generation component is connected to the verification component, and is used to generate an M-LVDS data packet according to the verification code and the conversion result; the encoding component is connected to the data generation component, and is used to convert the M-LVDS data packet into an M-LVDS signal.

[0010] In the above-mentioned voltage and current sensor signal acquisition device, optionally, the sampling and conditioning module includes a sampling resistor unit and a conditioning circuit unit; the sampling resistor unit is used to collect the current signal output by the voltage or current sensor; and the conditioning circuit unit is used to convert the current signal into a voltage signal.

[0011] The present application also provides a traction control unit including the voltage and current sensor signal acquisition device, the traction control unit also includes multiple inverter control boards, and the voltage and current sensor signal acquisition device is respectively connected to the multiple inverter control boards.

[0012] In the above-mentioned traction control unit, optionally, the inverter control board includes a second M-LVDS transceiver and a second programmable gate array module; the second M-LVDS transceiver is used to convert the received M-LVDS signal into an IO signal; the second programmable gate array module is connected to the second M-LVDS transceiver, and is used to decode the IO signal and store it locally.

[0013] In the above-mentioned traction control unit, optionally, the second programmable gate array module further includes a receiving unit, and the receiving unit is used to perform consistency check on the M-LVDS data packet according to the received check code, and store the M-LVDS data packet locally when the verification is passed.

[0014] In the above-mentioned traction control unit, optionally, the receiving unit includes a decoding component, a data receiving component and a verification component; the decoding component is used to parse the received M-LVDS signal to obtain a verification code and an M-LVDS data packet; the verification component is used to perform a consistency check on the M-LVDS data packet according to the verification code to obtain a verification result; the data receiving component is used to store the M-LVDS data packet locally according to the verification result.

[0015] The present application also provides a signal sampling method suitable for the traction control unit, the method comprising: generating an AC / DC switching signal periodically according to preset configuration parameters, obtaining a conversion result fed back by the analog-to-digital conversion module after completing the sampling conversion according to the AC / DC switching signal; generating an M-LVDS data packet according to the conversion result, and generating a corresponding check code through the M-LVDS data packet; generating an M-LVDS data packet through the M-LVDS data packet and the check code and converting it into an M-LVDS signal, and synchronously providing the M-LVDS signal and the clock signal to multiple inverter control boards.

[0016] In the signal sampling method of the traction control unit mentioned above, optionally, the method further includes: receiving the M-LVDS signal according to the clock signal, obtaining a corresponding check code and an M-LVDS data packet through the M-LVDS signal; performing a consistency check on the M-LVDS data packet according to the check code, and storing the M-LVDS data packet locally after the verification is passed.

[0017] The present application also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the above method when executing the computer program.

[0018] The present application also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for executing the above method.

[0019] The present application also provides a computer program product, comprising a computer program / instruction, which implements the steps of the above method when executed by a processor.

[0020] The beneficial technical effect of the present application is that 8-24 voltage or current signals can be collected at a synchronous speed of not less than 400kHz with 16-bit accuracy, and the A / D conversion control and M-LVDS sending action are closely coordinated, so that the synchronously collected data can be transmitted to all SPU boards losslessly and synchronously, which can fully meet the speed and accuracy requirements of traction control and protection. The backplane interface has only two pairs of M-LVDS differential pairs, which greatly simplifies the overall structure and backplane complexity of the traction control unit. This structure greatly reduces the backplane address and data lines, eliminates the necessity of the backplane analog signals, and avoids the problem of sampling interference caused by the overlap of analog and digital quantities. Since M-LVDS has good anti-interference performance and low external radiation, the availability of the entire control system is also improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The drawings described herein are used to provide a further understanding of the present application, constitute a part of the present application, and do not constitute a limitation of the present application. In the drawings:

[0022] Figure 1A A schematic diagram of the structure of a voltage and current sensor signal acquisition device provided in one embodiment of the present application;

[0023] Figure 1B This is a schematic diagram of an application of a voltage and current sensor signal acquisition device provided in one embodiment of the present application;

[0024] Figure 2 A schematic diagram of the internal structure of a voltage and current sensor signal acquisition device provided in one embodiment of the present application;

[0025] Figure 3 A schematic diagram of the internal structure of a programmable logic device provided in one embodiment of the present application;

[0026] Figure 4A A schematic flow chart of a signal sampling method for a traction control unit provided in one embodiment of the present application;

[0027] Figure 4B A schematic diagram of the FPGA workflow of the M-LVDS transmitter of the AIO provided in one embodiment of the present application;

[0028] Figure 5A A schematic diagram of the working process of an inverter control board provided in one embodiment of the present application;

[0029] Figure 5BA schematic diagram of the FPGA workflow of the M-LVDS receiving end of the SPU provided in one embodiment of the present application;

[0030] Figure 6 A schematic diagram of the structure of an electronic device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0031] The following will describe the implementation methods of the present application in detail in conjunction with the accompanying drawings and embodiments, so that the implementation process of how the present application applies technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly. It should be noted that as long as there is no conflict, the various embodiments in the present application and the various features in the embodiments can be combined with each other, and the technical solutions formed are all within the protection scope of the present application.

[0032] In addition, the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be performed in an order different from that shown here.

[0033] Please refer to Figure 1A As shown, the voltage and current sensor signal acquisition device provided in the present application includes: a sampling and conditioning module, an analog-to-digital conversion module, a first programmable gate array module and a first M-LVDS transceiver; the sampling and conditioning module is used to collect the current signal output by the voltage or current sensor and convert the current signal into a voltage signal; the analog-to-digital conversion module is connected to the sampling and conditioning module, and is used to perform AC-DC conversion on the voltage signal to generate a conversion result; the first programmable gate array module is connected to the analog-to-digital conversion module, and is used to synchronously collect the conversion result through multiple channels according to a preset period, generate an M-LVDS data packet according to the conversion result and convert it into an M-LVDS signal; the first M-LVDS transceiver is connected to the programmable gate array module, and is used to provide the M-LVDS signal to multiple external inverter control boards. Wherein, the sampling and conditioning module includes a sampling resistor unit and a conditioning circuit unit; the sampling resistor unit is used to collect the current signal output by the voltage or current sensor; and the conditioning circuit unit is used to convert the current signal into a voltage signal.

[0034] In the above embodiments, the voltage and current sensor signal acquisition device provided by the present application uses a synchronous ADC chip to acquire input signals, a programmable logic device FPGA to drive and control the ADC, and an M-LVDS transceiver to perform point-to-multipoint data transmission; an ADC drive control program and an M-LVDS high-speed serial communication protocol are designed. The structure includes: 1. ADC conversion circuit; 2. FPGA minimum system; 3. M-LVDS transceiver; the software includes: ADC drive control module, M-LVDS transceiver module. It has the advantages of simple structure, high precision, high data bandwidth, high degree of modularization, easy deployment and use, etc.

[0035] For details, please refer to Figure 1B As shown in the figure, the traction control unit TCU is equipped with an AIO board and an SPU board based on M-LVDS, or any board that needs to receive AIO output, which is referred to as SPU in this example. M-LVDS supports multiple receptions and can support up to 32 nodes, so multiple SPU boards can be set up to fully meet the application needs of the traction control unit. The AIO board is the sender of data and is only responsible for sending; all SPU boards receive data from the AIO synchronously.

[0036] In one embodiment of the present application, the first programmable gate array module includes a conversion drive unit and an M-LVDS sending unit; the conversion drive unit is used to drive the analog-to-digital conversion module to collect the conversion result according to a preset period, and provide the flag bit of the analog-to-digital conversion module and the conversion result to the M-LVDS sending unit; the M-LVDS sending unit is used to generate an M-LVDS data packet according to the flag bit and the conversion result and convert it into an M-LVDS signal to be output by the first M-LVDS transceiver. Wherein, the M-LVDS sending unit includes a data generation component, a verification component and an encoding component; the verification component is used to combine multiple conversion results according to the flag bit and generate a verification code; the data generation component is connected to the verification component, and is used to generate an M-LVDS data packet according to the verification code and the conversion result; the encoding component is connected to the data generation component, and is used to convert the M-LVDS data packet into an M-LVDS signal.

[0037] For details, please refer to Figure 2As shown in the figure, in actual work, the internal structure of the voltage and current sensor signal acquisition device is as follows: the AIO board is composed of a sampling resistor / conditioning circuit part, an ADC (A / D converter), i.e., an analog-to-digital conversion module, an FPGA minimum system, i.e., a first programmable gate array module, and an M-LVDS transceiver, i.e., a first M-LVDS transceiver; the output of the voltage and current sensor is generally a current signal of tens to hundreds of mA, and the current signal is converted into a voltage recognizable by the ADC through the sampling resistor / conditioning circuit part of the AIO board; an ADC with multi-channel synchronous acquisition should be selected to ensure that the acquisition phase of the voltage and current is consistent; the drive control of the ADC is implemented by the FPGA, and except for the initialization ADC at the initial power-on, the FPGA needs to accurately and periodically control and read the ADC; after obtaining the conversion results of the ADC, the FPGA packages these results into M-LVDS data packets, converts them into M-LVDS signals through IO, and sends them to all SPUs through the M-LVDS transceiver, where the M-LVDS transceiver only plays a sending role.

[0038] The present application also provides a traction control unit including the voltage and current sensor signal acquisition device, the traction control unit also includes multiple inverter control boards, and the voltage and current sensor signal acquisition device is respectively connected to the multiple inverter control boards. Wherein, the inverter control board includes a second M-LVDS transceiver and a second programmable gate array module; the second M-LVDS transceiver is used to convert the received M-LVDS signal into an IO signal; the second programmable gate array module is connected to the second M-LVDS transceiver, and is used to decode the IO signal and store it locally. Specifically, the second programmable gate array module also includes a receiving unit, and the receiving unit is used to perform consistency check on the M-LVDS data packet according to the received check code, and store the M-LVDS data packet locally when the verification is passed. Furthermore, the receiving unit includes a decoding component, a data receiving component and a verification component; the decoding component is used to parse the received M-LVDS signal to obtain a verification code and an M-LVDS data packet; the verification component is used to perform a consistency check on the M-LVDS data packet according to the verification code to obtain a verification result; the data receiving component is used to store the M-LVDS data packet locally according to the verification result.

[0039] For details, please refer to Figure 2As shown in FIG. 1 , the SPU board consists of an M-LVDS transceiver, an FPGA minimum system, and a DSP or other processor. The M-LVDS transceiver of the SPU only plays a receiving role. It converts the received M-LVDS differential signal into an IO signal and inputs it into the FPGA. The FPGA decodes it and stores it in the local space for use by the DSP. The first programmable gate array module and the second programmable gate array module are the FPGA minimum unit, and their structure can be referred to Figure 3 As shown in the figure, the FPGA of AIO includes an ADC drive control module and an M-LVDS transmission module. The M-LVDS transmission module can be divided into an M-LVDS data generation module, a CRC check module and an M-LVDS encoding module. The ADC driver module is responsible for periodically sending ADC control instructions, reading ADC data, and sending flags and data to the M-LVDS transmission module. When the M-LVDS transmission module starts to send data content, it will synchronously send data to the CRC check module until the last data content is sent. At this time, the CRC check module will return the generated CRC check code to the M-LVDS transmission module. The transmission module will attach the check code to the last byte of the data packet and send it together, thus completing a round of ADC conversion and transmission. An M-LVDS receiving module is designed in the FPGA of SPU, which will convert the M-LVDS clock and data sent by AIO into parallel data and pass it to the M-LVDS data receiving module. After receiving the content, the receiving module will activate the CRC check module to calculate the check code, and after receiving the complete data packet, it will compare the received check code with the calculated check code. After consistency, it will be sent to the local cache and can be read by the DSP. Due to the point-to-multipoint output feature of M-LVDS, multiple SPUs can synchronously obtain the latest ADC conversion data.

[0040] Please refer to Figure 4A As shown, the present application also provides a signal sampling method applicable to the traction control unit, the method comprising:

[0041] S401 generates an AC / DC switching signal periodically according to preset configuration parameters, and obtains a conversion result fed back by the analog-to-digital conversion module after completing sampling conversion according to the AC / DC switching signal;

[0042] S402 generates an M-LVDS data packet according to the conversion result, and generates a corresponding check code through the M-LVDS data packet;

[0043] S403 generates an M-LVDS data packet through the M-LVDS data packet and the check code and converts it into an M-LVDS signal, and synchronously provides the M-LVDS signal and the clock signal to multiple inverter control boards.

[0044] For details, please refer to Figure 4B As shown in the figure, in actual work, this part consists of ADC control module and M-LVDS transmission module. The FPGA workflow of M-LVDS transmission end of AIO is as follows:

[0045] After the FPGA is powered on and initialized, the ADC will be initialized first, and the reference source, sampling rate, acquisition mode, etc. of the ADC will be configured, and then the ADC conversion instructions will be sent periodically. Under normal circumstances, after each conversion instruction is sent, the ADC will usually feedback a conversion completion signal after completing the sampling conversion. The ADC control module will actively judge this signal. If the feedback signal cannot be received or the feedback signal is received for a timeout, the ADC control module will reinitialize the ADC; if the feedback signal can be received normally, the read enable will be sent, and the output data of the ADC will be read in sequence. After reading the last data, the ADC control module will synchronously send all conversion results and a transmission flag to the M-LVDS sending module, and then the conversion flag will be set to 0, and enter the state of waiting for the next conversion cycle until the cycle arrives, thus forming an ADC control and conversion cycle. The M-LVDS sending module will convert all contents including the header, data, and checksum into serial data according to bytes, and synchronously send the M-LVDS clock and data signals. The M-LVDS sending module is in a non-working state by default. After receiving the transmission flag and data sent by the ADC control module, it enters the sending state. The M-LVDS sending module first sends a 4-byte fixed content header, then activates the crc check module, and outputs the data content to the M-LVDS encoding module and the crc check module synchronously by byte. The M-LVDS encoding module converts the input data into clock and data for external output, and the crc check module synchronously generates a check code. When all data are sent, the final generated crc check code is output to the encoding module output. At this point, a packet of M-LVDS data is sent, and the module enters the state of waiting for flags and new data.

[0046] Please refer to Figure 5A As shown, the signal sampling method provided in this application also includes:

[0047] S501 receives the M-LVDS signal according to the clock signal, and obtains a corresponding check code and an M-LVDS data packet through the M-LVDS signal;

[0048] S502 performs consistency check on the M-LVDS data packet according to the check code, and stores the M-LVDS data packet locally when the check passes.

[0049] For details, please refer to Figure 5BAs shown, in actual work, this part mainly includes an M-LVDS data receiving module and a CRC check module; the workflow diagram of the M-LVDS receiving end FPGA of the SPU is as follows: the M-LVDS decoding module has a disconnection detection function. When the input clock line or data line does not change within a plurality of consecutive agreed cycles, it will be determined to enter a disconnected state. In the disconnected state, it will temporarily release the disconnected state when the rising edge of the M-LVDS clock line comes, and start sampling the input data, and realize the serial-to-parallel conversion from 1 bit to 8 bits. After each 8-bit conversion is completed, a byte of data is pushed to the M-LVDS data receiving module; after the M-LVDS data receiving module receives 4 agreed packet header contents in succession, it starts to receive the actual data content and activates the CRC check module, and synchronously generates a CRC check code. When the agreed data packet length is received, the CRC check code of the last byte of the data packet is compared with the locally generated CRC check code. When the two are consistent, the data of this packet is received. When they are inconsistent, the local data is not updated to prevent the wrong data from being read by the DSP.

[0050] Theoretical transmission capacity calculation The content generated by the M-LVDS data generation module includes: a 4-byte fixed content header, 8-24 ADC 16-bit conversion results, taking the maximum value of 48 bytes, 1 byte of CRC check code, a total of 53 bytes, that is, 424 bits. Considering that a certain interval needs to be left between packets, 500 bits are taken. The communication rate of M-LVDS is calculated as 50Mbit / s, and 100k transmissions can be completed per second. Therefore, this application realizes lossless transmission of up to 24 channels with a sampling conversion rate below 100k synchronous conversion ADC results, which can meet the needs of most traction calculations and protection.

[0051] The beneficial technical effect of the present application is that 8-24 voltage or current signals can be collected at a synchronous speed of not less than 400kHz with 16-bit accuracy, and the A / D conversion control and M-LVDS sending action are closely coordinated, so that the synchronously collected data can be transmitted to all SPU boards losslessly and synchronously, which can fully meet the speed and accuracy requirements of traction control and protection. The backplane interface has only two pairs of M-LVDS differential pairs, which greatly simplifies the overall structure and backplane complexity of the traction control unit. This structure greatly reduces the backplane address and data lines, eliminates the necessity of the backplane analog signals, and avoids the problem of sampling interference caused by the overlap of analog and digital quantities. Since M-LVDS has good anti-interference performance and low external radiation, the availability of the entire control system is also improved.

[0052] The present application also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the above method when executing the computer program.

[0053] The present application also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for executing the above method.

[0054] The present application also provides a computer program product, comprising a computer program / instruction, which implements the steps of the above method when executed by a processor.

[0055] like Figure 6 As shown, the electronic device 600 may further include: a communication module 110, an input unit 120, an audio processor 130, a display 160, and a power supply 170. It is worth noting that the electronic device 600 does not necessarily have to include Figure 6 In addition, the electronic device 600 may also include Figure 6 For components not shown, reference may be made to the prior art.

[0056] like Figure 6 As shown, the central processor 100 is sometimes also referred to as a controller or an operation control, and may include a microprocessor or other processor devices and / or logic devices. The central processor 100 receives inputs and controls the operations of various components of the electronic device 600.

[0057] The memory 140 may be, for example, one or more of a cache, a flash memory, a hard drive, a removable medium, a volatile memory, a non-volatile memory or other suitable devices. The above-mentioned information related to the failure may be stored, and a program for executing the relevant information may also be stored. The CPU 100 may execute the program stored in the memory 140 to implement information storage or processing.

[0058] The input unit 120 provides input to the CPU 100. The input unit 120 is, for example, a key or a touch input device. The power supply 170 is used to provide power to the electronic device 600. The display 160 is used to display display objects such as images and text. The display may be, for example, an LCD display, but is not limited thereto.

[0059] The memory 140 may be a solid-state memory, such as a read-only memory (ROM), a random access memory (RAM), a SIM card, etc. It may also be a memory that saves information even when the power is off, can be selectively erased, and is provided with more data, examples of which are sometimes referred to as EPROMs, etc. The memory 140 may also be some other type of device. The memory 140 includes a buffer memory 141 (sometimes referred to as a buffer). The memory 140 may include an application / function storage unit 142, which is used to store application programs and function programs or processes for executing the operation of the electronic device 600 through the central processor 100.

[0060] The memory 140 may also include a data storage unit (data 143) for storing data, such as contacts, digital data, pictures, sounds, and / or any other data used by the electronic device. The driver storage unit (driver 144) of the memory 140 may include various drivers for communication functions of the electronic device and / or for executing other functions of the electronic device (such as messaging applications, address book applications, etc.).

[0061] The communication module 110 is a transmitter / receiver 110 that transmits and receives signals via an antenna 111. The communication module (transmitter / receiver) 110 is coupled to the central processor 100 to provide input signals and receive output signals, which may be the same as the case of a conventional mobile communication terminal.

[0062] Based on different communication technologies, multiple communication modules 110 may be provided in the same electronic device, such as a cellular network module, a Bluetooth module and / or a wireless LAN module. The communication module (transmitter / receiver) 110 is also coupled to a speaker 131 and a microphone 132 via an audio processor 130 to provide an audio output via the speaker 131 and receive an audio input from the microphone 132, thereby realizing a common telecommunication function. The audio processor 130 may include any suitable buffer, decoder, amplifier, etc. In addition, the audio processor 130 is also coupled to the central processor 100, so that the sound can be recorded on the local machine through the microphone 132, and the sound stored on the local machine can be played through the speaker 131.

[0063] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0064] The present application is described with reference to the flowchart and / or block diagram of the method, device (system) and computer program product according to the embodiment of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, and the combination of the process and / or box in the flowchart and / or block diagram can be realized by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device produce a device for realizing the function specified in one process or multiple processes in the flowchart and / or one box or multiple boxes in the block diagram.

[0065] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device that implements the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0066] These computer program instructions may also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, whereby the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0067] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present application. It should be understood that the above description is only a specific embodiment of the present application and is not intended to limit the scope of protection of the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A voltage and current sensor signal acquisition device, characterized in that: The device comprises: a sampling and conditioning module, an analog-to-digital conversion module, a first programmable gate array module and a first M-LVDS transceiver; The sampling and conditioning module is used to collect the current signal output by the voltage or current sensor and convert the current signal into a voltage signal; The analog-to-digital conversion module is connected to the sampling and conditioning module, and is used to perform AC-DC conversion on the voltage signal to generate a conversion result; The first programmable gate array module is connected to the analog-to-digital conversion module, and is used to synchronously collect the conversion results through multiple channels according to a preset period, generate an M-LVDS data packet according to the conversion results, and convert it into an M-LVDS signal; The first M-LVDS transceiver is connected to the programmable gate array module and is used to provide the M-LVDS signal to multiple external inverter control boards.

2. The voltage and current sensor signal acquisition device according to claim 1, characterized in that: The first programmable gate array module includes a conversion driving unit and an M-LVDS sending unit; The conversion driving unit is used to drive the analog-to-digital conversion module to collect the conversion result according to a preset period, and provide the flag bit of the analog-to-digital conversion module and the conversion result to the M-LVDS sending unit; The M-LVDS sending unit is used to generate an M-LVDS data packet according to the flag bit and the conversion result and convert it into an M-LVDS signal to be output by the first M-LVDS transceiver.

3. The voltage and current sensor signal acquisition device according to claim 2, characterized in that: The M-LVDS sending unit comprises a data generating component, a checking component and an encoding component; The verification component is used to combine the multiple conversion results according to the flag bit and generate a verification code; The data generation component is connected to the verification component, and is used to generate an M-LVDS data packet according to the verification code and the conversion result; The encoding component is connected to the data generating component and is used to convert the M-LVDS data packet into an M-LVDS signal.

4. The voltage and current sensor signal acquisition device according to claim 1, characterized in that: The sampling and conditioning module comprises a sampling resistor unit and a conditioning circuit unit; The sampling resistor unit is used to collect the current signal output by the voltage or current sensor; The conditioning circuit unit is used for converting the current signal into a voltage signal.

5. A traction control unit comprising the voltage and current sensor signal acquisition device according to any one of claims 1 to 4, characterized in that: The traction control unit further comprises a plurality of inverter control boards, and the voltage and current sensor signal acquisition device is respectively connected to the plurality of inverter control boards.

6. The traction control unit according to claim 5, characterized in that: The inverter control board includes a second M-LVDS transceiver and a second programmable gate array module; The second M-LVDS transceiver is used to convert the received M-LVDS signal into an IO signal; The second programmable gate array module is connected to the second M-LVDS transceiver and is used for decoding the IO signal and storing it locally.

7. The traction control unit according to claim 6, characterized in that: The second programmable gate array module further includes a receiving unit, which is used to perform consistency check on the M-LVDS data packet according to the received check code, and store the M-LVDS data packet locally when the verification passes.

8. The traction control unit according to claim 7, characterized in that: The receiving unit comprises a decoding component, a data receiving component and a checking component; The decoding component is used to parse the received M-LVDS signal to obtain a check code and an M-LVDS data packet; The verification component is used to perform consistency verification on the M-LVDS data packet according to the verification code to obtain a verification result; The data receiving component is used to store the M-LVDS data packet locally according to the verification result.

9. A signal sampling method applicable to a traction control unit according to any one of claims 5 to 8, characterized in that: The method comprises: Generate an AC / DC switching signal periodically according to preset configuration parameters, and obtain a conversion result fed back by the analog-to-digital conversion module after completing sampling conversion according to the AC / DC switching signal; Generate an M-LVDS data packet according to the conversion result, and generate a corresponding check code through the M-LVDS data packet; An M-LVDS data packet is generated through an M-LVDS data packet and a check code and converted into an M-LVDS signal, and the M-LVDS signal and a clock signal are synchronously provided to a plurality of inverter control boards.

10. The signal sampling method of the traction control unit according to claim 9, characterized in that: The method further comprises: Receive the M-LVDS signal according to the clock signal, and obtain a corresponding check code and an M-LVDS data packet through the M-LVDS signal; The M-LVDS data packet is subjected to consistency check according to the check code, and the M-LVDS data packet is stored locally after the check is passed.

11. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the method according to any one of claims 9 to 10 is implemented.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 9 to 10 is implemented.

13. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 9 to 10 are implemented.

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