Circuit diagram display system for signal value tracing analysis

Abstract

The invention relates to the technical field of chip simulation, in particular to a circuit diagram display system for signal value tracing analysis, which analyzes a source code corresponding to a target design according to a signal value tracing analysis module, determines an active signal related to a target signal, and displays the active signal according to the active signal. Determining a path set related to the target signal according to the connection relationship between the reference signals in the circuit diagram connection relationship database, and generating a target circuit diagram according to the path information, so that the target circuit diagram only containing the path to which the active signal belongs can be generated; the target circuit diagram contains the signal value change analysis result of the target signal and does not contain redundant information, so that the target circuit diagram is more concise and intuitive, and the understanding efficiency and debugging efficiency of a user on target design are effectively improved.

Description

Technical Field

[0001] The present invention relates to the technical field of signal analysis, and in particular to a circuit diagram display system for signal value traceability analysis. Background Art

[0002] In the chip design verification and debugging software process, users will trace back the simulation value of the signal of interest at a certain moment based on the design and simulation results to find out the reason why the signal gets this value at this moment. In other words, find out which signals affect the value of the signal at a certain moment, so that when the value of the signal does not meet the user's expectations, the user can determine the source signal based on the traceability analysis results of the signal, and then fix this unexpected behavior by modifying the design or other means.

[0003] However, signal tracing analysis in existing methods is usually based on the syntax parse tree generated by the design source code and the simulation results for reverse deduction to obtain the result, and then the result is graphically displayed in the form of a tree structure. However, although the tree structure can assist users in understanding and debugging the design, it is still not intuitive enough compared to the circuit diagram form, which leads to a long time for users to understand the design and low debugging efficiency. Although the circuit diagram can comprehensively and intuitively display the connection relationship between signals, under the demand of signal tracing analysis, the circuit diagram will contain redundant information that the user does not care about, which also interferes with the user's understanding and debugging of the design.

[0004] Therefore, how to improve users' understanding and debugging efficiency of chip design has become an urgent problem to be solved. Summary of the invention

[0005] In view of the above technical problems, the technical solution adopted by the present invention is:

[0006] A circuit diagram display system for signal value traceability analysis, the system comprising: a signal value traceability analysis module, a processor and a memory storing a computer program, the memory further comprising a source code corresponding to a target design, and a circuit diagram connection relationship database corresponding to the target design, wherein the circuit diagram connection relationship database comprises all reference signals in the target design and connection relationships between the reference signals. When the computer program is executed by the processor, the following steps are implemented:

[0007] S101, obtaining a target signal and a time value specified by a user, wherein the target signal has a reference signal that uniquely corresponds to it.

[0008] S102: Analyze the source code using the signal value tracing analysis module according to the target signal and the time value to obtain a plurality of active signals.

[0009] S103, taking, from the circuit diagram connection relationship database, a plurality of reference signals that are connected to the reference signal corresponding to the target signal as first signals.

[0010] S104: for any first signal, form a path set by the first signal and the target signal to obtain a path set corresponding to each first signal.

[0011] S105: For any first signal, use the first signal as a temporary signal.

[0012] S106: According to the circuit diagram connection relationship database, a plurality of reference signals that are connected to the reference signal corresponding to the temporary signal are all used as second signals.

[0013] S107: For any second signal, if the second signal is the same as any active signal, add the second signal to the path set to which the temporary signal belongs.

[0014] S108: If the second signal is different from each active signal and the second signal satisfies a first preset condition, deleting the path set to which the temporary signal belongs.

[0015] S109: If the second signal is different from each active signal and the second signal satisfies the second preset condition, the second signal is added to the path set corresponding to the temporary signal, and the second signal is used as the temporary signal, and the execution of steps S106 to S108 is returned.

[0016] S110, forming a target circuit diagram according to all path sets, wherein the target circuit diagram is used to display a traceability analysis result of the target signal in the target design at the time value.

[0017] Compared with the prior art, the present invention has obvious beneficial effects. By means of the above technical solution, the circuit diagram display system for signal value tracing analysis provided by the present invention can achieve considerable technical advancement and practicality, and has wide industrial utilization value, and has at least the following beneficial effects:

[0018] The present invention provides a circuit diagram display system for signal value tracing analysis, the system comprising: a signal value tracing analysis module, a processor and a memory storing a computer program, the memory further comprising a source code corresponding to a target design, and a circuit diagram connection relationship database corresponding to the target design, wherein the circuit diagram connection relationship database comprises all reference signals in the target design and the connection relationship between the reference signals, and when the computer program is executed by the processor, the following steps are implemented: S101, obtaining a target signal and a time value specified by a user, wherein the target signal has a reference signal uniquely corresponding to it, S102, analyzing the source code using the signal value tracing analysis module according to the target signal and the time value to obtain a plurality of active signals, S103, taking a plurality of reference signals having a connection relationship with the reference signal corresponding to the target signal from the circuit diagram connection relationship database as first signals, S104, for any first signal, forming a path set by the first signal and the target signal to obtain each first signal Corresponding path set, S105, for any first signal, take the first signal as a temporary signal, S106, according to the circuit diagram connection relationship database, take several reference signals that have a connection relationship with the reference signal corresponding to the temporary signal as second signals, S107, for any second signal, if the second signal is the same as any active signal, add the second signal to the path set to which the temporary signal belongs, S108, if the second signal is different from each active signal and the second signal meets the first preset condition, delete the path set to which the temporary signal belongs, S109, if the second signal is different from each active signal and the second signal meets the second preset condition, add the second signal to the path set corresponding to the temporary signal, take the second signal as the temporary signal, and return to execute steps S106 to S108, S110, form a target circuit diagram according to all path sets, and the target circuit diagram is used to display the traceability analysis results of the target signal in the target design at the time value.

[0019] It can be seen that the source code corresponding to the target design is analyzed according to the signal value tracing analysis module to determine the active signal related to the target signal, and then the path set related to the target signal is determined according to the connection relationship between the reference signals in the circuit diagram connection relationship database, and the target circuit diagram is generated according to the path information, so that the target circuit diagram containing only the path to which the active signal belongs can be generated, so that the target circuit diagram contains the signal value change analysis results of the target signal without containing redundant information, thereby making the target circuit diagram more concise and intuitive, thereby effectively improving the user's understanding efficiency and debugging efficiency of the target design. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 A schematic diagram of a flow chart of a computer program being executed by a processor in a circuit diagram display system for signal value tracing analysis provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0023] This embodiment provides a circuit diagram display system for signal value traceability analysis, the system comprising: a signal value traceability analysis module, a processor, and a memory storing a computer program, the memory further comprising a source code corresponding to a target design, and a circuit diagram connection relationship database corresponding to the target design, wherein the circuit diagram connection relationship database comprises all reference signals in the target design and the connection relationship between the reference signals, see Figure 1 , is a flow chart of a computer program executed by a processor in a circuit diagram display system for signal value tracing analysis provided by an embodiment of the present invention. When the computer program is executed by the processor, the following steps are implemented:

[0024] S101, obtaining a target signal and a time value specified by a user, wherein the target signal has a reference signal uniquely corresponding to it;

[0025] S102, analyzing the source code using the signal value tracing analysis module according to the target signal and the time value to obtain a plurality of active signals;

[0026] S103, from the circuit diagram connection relationship database, taking as the first signal a plurality of reference signals that have a connection relationship with the reference signal corresponding to the target signal;

[0027] S104, for any first signal, forming a path set by the first signal and the target signal, to obtain a path set corresponding to each first signal;

[0028] S105, for any first signal, use the first signal as a temporary signal;

[0029] S106, according to the circuit diagram connection relationship database, taking a plurality of reference signals that have a connection relationship with the reference signal corresponding to the temporary signal as second signals;

[0030] S107, for any second signal, if the second signal is the same as any active signal, adding the second signal to the path set to which the temporary signal belongs;

[0031] S108, if the second signal is different from each active signal and the second signal satisfies a first preset condition, deleting the path set to which the temporary signal belongs;

[0032] S109, if the second signal is different from each active signal and the second signal satisfies the second preset condition, adding the second signal to the path set corresponding to the temporary signal, taking the second signal as the temporary signal, and returning to step S106 to step S108;

[0033] S110, forming a target circuit diagram according to all path sets, wherein the target circuit diagram is used to display a traceability analysis result of the target signal in the target design at the time value.

[0034] The target design may refer to a chip design, and correspondingly, the source code may refer to an RTL code, and all signals included in the target design are reference signals.

[0035] The target signal may refer to a signal for which the implementer needs to analyze the signal value change, and the time value may refer to the time point corresponding to the change in the signal value of the target signal.

[0036] An active signal may refer to a reference signal that is related to a target signal and is in an active state, and a path set to which a single active signal belongs may be used to describe path information from the target signal to the active signal.

[0037] In a specific implementation, step S102 includes the following steps:

[0038] S1021, analyzing the source code using the signal value tracing analysis module according to the target signal and the time value, and obtaining a plurality of reference signals associated with the target signal as related signals;

[0039] S1022: taking the relevant signal whose signal value changes at the time value as the active signal.

[0040] Among them, the signal value tracing analysis module can adopt an open source signal value tracing analysis system. The signal value tracing analysis module can be used to extract a reference signal associated with the target signal from the source code as a related signal, and according to the moment value, the related signal whose signal value changes at the time point corresponding to the moment value is taken as an active signal, that is, at the moment value, the change of the active signal causes the change of the target signal.

[0041] In a specific implementation, the first preset condition is that the second signal is a preset declaration signal, and the preset declaration signal is a signal pre-declared in the target design.

[0042] The preset declaration signal may refer to a signal pre-defined by a designer in a target design.

[0043] In a specific implementation, the second preset condition is that the second signal is an intermediate signal, and the intermediate signal is a non-predeclared signal generated by a signal transmission process in the target design.

[0044] For example, the designer predefines an input signal and an output signal, and the input signal passes through two circuit units to reach the output signal, so the signal between the two circuit units is the intermediate signal.

[0045] In a specific implementation, the circuit diagram connection relationship database further includes circuit units, and a corresponding relationship between reference signals and circuit units;

[0046] The forming of the target circuit diagram according to all the path sets includes:

[0047] The target circuit diagram is formed according to the reference signals included in all the path sets and the circuit units corresponding thereto.

[0048] The circuit unit may refer to a module in a target design, and a single circuit unit may correspond to multiple reference signals.

[0049] In a specific implementation, after step S109 and before step S110, the following steps are also included:

[0050] S201, for any active signal, use the active signal as a temporary signal;

[0051] S202, according to the circuit diagram connection relationship database, taking a plurality of reference signals that have a connection relationship with the reference signal corresponding to the temporary signal as second signals;

[0052] S203, for any second signal, if the second signal satisfies a third preset condition, adding the second signal to the path set to which the temporary signal belongs;

[0053] S204: If the second signal satisfies the fourth preset condition, the second signal is added to the path set corresponding to the temporary signal, the second signal is used as the temporary signal, and the execution of steps S202 to S203 is returned.

[0054] Among them, the active signal is only the direct or first-level factor that causes the target signal to change at the moment value. The implementer can continue to trace and analyze the active signal according to needs to determine the most original factor that causes the target signal to change at the moment value.

[0055] In a specific implementation, the third preset condition is: the second signal is a top layer signal or a non-driving signal.

[0056] Among them, there may be dependencies between the multiple modules included in the chip design, and the top-level module can be determined based on the dependencies. The top-level signal may refer to the signal corresponding to the top-level module, and the undriven signal may refer to the signal not being driven by other signals.

[0057] In a specific implementation, the fourth preset condition is: the second signal is not a top layer signal and is not a no-drive signal.

[0058] In this embodiment, the source code corresponding to the target design is analyzed according to the signal value tracing analysis module to determine the active signal related to the target signal, and then the path set related to the target signal is determined according to the connection relationship between the reference signals in the circuit diagram connection relationship database, and the target circuit diagram is generated according to the path information, so that the target circuit diagram containing only the paths to which the active signals belong can be generated, so that the target circuit diagram contains the signal value change analysis results of the target signal without containing redundant information, thereby making the target circuit diagram more concise and intuitive, thereby effectively improving the user's understanding efficiency and debugging efficiency of the target design.

[0059] Although some specific embodiments of the present invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It will also be appreciated by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A circuit diagram display system for signal value traceability analysis, characterized in that: The system includes: a signal value tracing analysis module, a processor, and a memory storing a computer program, wherein the memory also includes source code corresponding to a target design, and a circuit diagram connection relationship database corresponding to the target design, wherein the circuit diagram connection relationship database includes all reference signals in the target design and connection relationships between the reference signals. When the computer program is executed by the processor, the following steps are implemented: S101, obtaining a target signal and a time value specified by a user, wherein the target signal has a reference signal uniquely corresponding to it; S102, analyzing the source code using the signal value tracing analysis module according to the target signal and the time value to obtain a plurality of active signals; S103, from the circuit diagram connection relationship database, taking as the first signal a plurality of reference signals that have a connection relationship with the reference signal corresponding to the target signal; S104, for any first signal, forming a path set by the first signal and the target signal, to obtain a path set corresponding to each first signal; S105, for any first signal, use the first signal as a temporary signal; S106, according to the circuit diagram connection relationship database, taking a plurality of reference signals that have a connection relationship with the reference signal corresponding to the temporary signal as second signals; S107, for any second signal, if the second signal is the same as any active signal, adding the second signal to the path set to which the temporary signal belongs; S108, if the second signal is different from each active signal and the second signal satisfies a first preset condition, deleting the path set to which the temporary signal belongs; S109, if the second signal is different from each active signal and the second signal satisfies the second preset condition, adding the second signal to the path set corresponding to the temporary signal, taking the second signal as the temporary signal, and returning to step S106 to step S108; S110, forming a target circuit diagram according to all path sets, wherein the target circuit diagram is used to display a traceability analysis result of the target signal in the target design at the time value.

2. The circuit diagram display system for signal value traceability analysis according to claim 1, characterized in that: Step S102 includes the following steps: S1021, analyzing the source code using the signal value tracing analysis module according to the target signal and the time value, and obtaining a plurality of reference signals associated with the target signal as related signals; S1022: taking the relevant signal whose signal value changes at the time value as the active signal.

3. The circuit diagram display system for signal value traceability analysis according to claim 1, characterized in that: The first preset condition is that the second signal is a preset declaration signal, and the preset declaration signal is a signal pre-declared in the target design.

4. The circuit diagram display system for signal value traceability analysis according to claim 3, characterized in that: The second preset condition is that the second signal is an intermediate signal, and the intermediate signal is a non-predeclared signal generated by a signal transmission process in the target design.

5. The circuit diagram display system for signal value traceability analysis according to claim 1, characterized in that: The circuit diagram connection relationship database also includes circuit units, and the corresponding relationship between reference signals and circuit units; The forming of the target circuit diagram according to all the path sets includes: The target circuit diagram is formed according to the reference signals included in all the path sets and the circuit units corresponding thereto.

6. The circuit diagram display system for signal value traceability analysis according to claim 1, characterized in that: After step S109 and before step S110, the following steps are also included: S201, for any active signal, use the active signal as a temporary signal; S202, according to the circuit diagram connection relationship database, taking a plurality of reference signals that have a connection relationship with the reference signal corresponding to the temporary signal as second signals; S203, for any second signal, if the second signal satisfies a third preset condition, adding the second signal to the path set to which the temporary signal belongs; S204: If the second signal satisfies the fourth preset condition, the second signal is added to the path set corresponding to the temporary signal, the second signal is used as the temporary signal, and the execution of steps S202 to S203 is returned.

7. The circuit diagram display system for signal value traceability analysis according to claim 6, characterized in that: The third preset condition is that the second signal is a top layer signal or a non-driving signal.

8. The circuit diagram display system for signal value traceability analysis according to claim 6, characterized in that: The fourth preset condition is that the second signal is neither a top layer signal nor a no-driving signal.

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