Wafer defect enhancement processing method and device, storage medium and electronic equipment

By counting the pixel value distribution of wafer images and performing grayscale suppression, the problem of weak defect detection in semiconductor wafer production is solved, and the detection effect of weak defects is significantly enhanced while maintaining the obvious defect effect remains unchanged, and the detection effect of weak defects is improved. Detection stability and efficiency.

CN119251147APending Publication Date: 2025-01-03中科慧远半导体技术(广东)有限公司 +1
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Patent Information

Application Number
CN202411190128.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-27
Publication Date
2025-01-03

AI Technical Summary

Technical Problem

During the semiconductor wafer production process, manual detection efficiency is low and high-precision imaging is prone to jitter and pixel fluctuations, which makes it difficult to distinguish defects from background when weak defect detection is difficult. Simple contrast enhancement is easily affected by outlier noise, resulting in poor enhancement effect. obvious.

Method used

By counting the pixel value distribution in the wafer image, the background pixel area is determined, and grayscale suppression is performed based on the area to reduce the influence of high contrast noise, thereby enhancing weak defects while maintaining the obvious defect effect unchanged.

Benefits of technology

It effectively suppresses the impact of noise on weak defects, improves the visualization effect and detection stability of weak defects, and enhances the detection effect of wafer defects.

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Abstract

The invention discloses a wafer defect enhancement processing method and device, a storage medium and electronic equipment, and relates to the technical field of industrial visual intelligent detection. The method comprises the following steps: acquiring a wafer image to be processed; carrying out statistics on pixel value distribution in the wafer image; determining a background pixel area corresponding to the wafer image according to the pixel value distribution; performing gray scale suppression on the wafer image based on the background pixel region to obtain a wafer image after gray scale suppression; and performing defect contrast enhancement based on the wafer image after gray scale suppression. According to the invention, the wafer weak defect enhancement effect can be improved.
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Description

Technical Field

[0001] The present application relates to the field of industrial visual intelligent detection technology, and in particular to a wafer defect enhancement processing method, device, storage medium and electronic equipment. Background Art

[0002] During the production of semiconductor wafer products such as silicon carbide, defects are inevitable due to the high precision requirements and complex process. Manual quality judgment of such products not only requires the assistance of high-precision instruments, but also has low detection efficiency, so detection equipment is a better choice. While improving production efficiency, detection equipment can also more conveniently observe the distribution and causes of defects, providing improvement directions for front-end production processes.

[0003] High-precision imaging often jitters during the actual image acquisition process, and it is very easy to have out-of-focus or large pixel fluctuations. Based on this phenomenon, when detecting weak defects, it is difficult to effectively distinguish defects from the background by simply relying on AI models for segmentation. Therefore, defects need to be enhanced before defect detection to improve the stability of defect detection.

[0004] At present, for weak defects on wafers, contrast stretching, pixel index, local pixel enhancement, etc. are usually used to improve the contrast between weak defects on wafers and the background. However, simple contrast enhancement is easily affected by outlier noise, resulting in unclear enhancement effect on weak defects on wafers. Summary of the invention

[0005] In view of this, the present application provides a wafer defect enhancement processing method, device, storage medium and electronic device, the main purpose of which is to improve the enhancement effect of wafer weak defects.

[0006] According to a first aspect of the present application, a wafer defect enhancement processing method is provided, the method comprising:

[0007] Acquiring an image of a wafer to be processed;

[0008] Counting the distribution of pixel values ​​in the wafer image;

[0009] Determining a background pixel area corresponding to the wafer image according to the pixel value distribution;

[0010] Performing grayscale suppression on the wafer image based on the background pixel area to obtain a grayscale suppressed wafer image;

[0011] Defect contrast enhancement is performed based on the wafer image after grayscale suppression.

[0012] According to a second aspect of the present application, a wafer defect enhancement processing device is provided, the device comprising:

[0013] An acquisition unit, used for acquiring an image of a wafer to be processed;

[0014] A statistical unit, used for counting the distribution of pixel values ​​in the wafer image;

[0015] A determination unit, configured to determine a background pixel area corresponding to the wafer image according to the pixel value distribution;

[0016] A suppression unit, configured to suppress the grayscale of the wafer image based on the background pixel area to obtain a grayscale suppressed wafer image;

[0017] The enhancement unit is used to enhance the defect contrast based on the wafer image after the grayscale is suppressed.

[0018] According to a third aspect of the present application, a storage medium is provided, on which a computer program is stored, and when the program is executed by a processor, the above-mentioned wafer defect enhancement processing method is implemented.

[0019] According to a fourth aspect of the present application, an electronic device is provided, comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, wherein the processor implements the above-mentioned wafer defect enhancement processing method when executing the program.

[0020] Through the above-mentioned technical scheme, the present application provides a wafer defect enhancement processing method, device, storage medium and electronic device. Compared with the prior art, by statistically analyzing the pixel value distribution in the wafer image and determining the background pixel area corresponding to the wafer image based on the pixel value distribution, the wafer image can be gray-scale suppressed based on the background pixel area, thereby reducing the impact of obvious defects on weak defects during grayscale stretching. That is, the present application can enhance weak defects while keeping the effect of obvious defects unchanged by suppressing high-contrast noise points.

[0021] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0023] Figure 1A schematic diagram of a process flow of a wafer defect enhancement processing method provided in an embodiment of the present application is shown;

[0024] Figure 2 A schematic diagram of an original wafer image provided by an embodiment of the present application is shown;

[0025] Figure 3 A schematic diagram of pixel value distribution provided by an embodiment of the present application is shown;

[0026] Figure 4 A schematic diagram of an original function curve provided in an embodiment of the present application is shown;

[0027] Figure 5 A schematic diagram of a function curve after smoothing provided in an embodiment of the present application is shown;

[0028] Figure 6 A schematic diagram of a wafer image after grayscale suppression provided by an embodiment of the present application is shown;

[0029] Figure 7 A schematic diagram of a process flow of another wafer defect enhancement processing method provided in an embodiment of the present application is shown;

[0030] Figure 8 A background correction template diagram provided in an embodiment of the present application is shown;

[0031] Fig. 9 A schematic diagram of a wafer image after non-uniform correction provided by an embodiment of the present application is shown;

[0032] Fig.10 A schematic diagram of defect enhancement effect provided by an embodiment of the present application is shown;

[0033] Fig.11 A schematic structural diagram of a wafer defect enhancement processing device provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0034] The present application will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other without conflict.

[0035] The existing simple contrast enhancement is easily affected by outlier noise, resulting in unclear enhancement effect of wafer weak defects.

[0036] The embodiment of the present invention provides a wafer defect enhancement processing method, such as Figure 1 As shown, the method includes:

[0037] Step 101: Acquire a wafer image to be processed.

[0038] The wafer image to be processed is an image that needs to be processed for defect enhancement. The wafer may be a semiconductor wafer product, such as silicon carbide.

[0039] The embodiment of the present invention is mainly applicable to the scenario of enhancing wafer defects. The execution subject of the embodiment of the present invention is a device or equipment capable of enhancing wafer defects, which can be specifically set on the server side.

[0040] Specifically, a camera is used to photograph a semiconductor wafer product to obtain a wafer image. It should be noted that the embodiment of the present invention has no limit on the depth of the wafer image. As a preferred method, the embodiment of the present invention can select a 16-bit wafer image, such as Figure 2 shown.

[0041] Step 102: Count the pixel value distribution in the wafer image.

[0042] For the embodiment of the present invention, after the wafer image is collected, it is necessary to count the pixel value distribution in the wafer image. For this process, step 102 specifically includes: counting the pixel values ​​in the wafer image and their corresponding frequencies; based on the pixel values ​​and their corresponding frequencies, determining the pixel value distribution, such as Figure 3 As shown, the horizontal axis represents the pixel value, and the vertical axis represents the frequency of occurrence of the pixel value.

[0043] Step 103: Determine a background pixel area corresponding to the wafer image according to the pixel value distribution.

[0044] For the embodiment of the present invention, after the pixel value distribution of the wafer image is statistically calculated, it is necessary to determine the background pixel area of ​​the wafer image. For this process, step 103 specifically includes: based on the pixel value distribution, fitting a function curve about pixel value and pixel frequency; derivatizing the function curve to obtain the maximum point in the function curve; based on the maximum point, determining the peak value in the function curve; and according to the peak value, determining the background pixel area corresponding to the wafer image.

[0045] When fitting a function curve about pixel value and pixel frequency based on pixel value distribution, numerical fitting is performed based on the pixel value distribution to obtain a numerical fitting curve; and the numerical fitting curve is smoothed to obtain a function curve about pixel value and pixel frequency.

[0046] When determining the background pixel area corresponding to the wafer image according to the peak value, it is necessary to first obtain the pixel parameters of the background area in the wafer image, then subtract the peak value from the pixel parameters with the peak value as the center to obtain the background pixel lower limit, add the peak value to the pixel parameters to obtain the background pixel upper limit, and then determine the background pixel area corresponding to the wafer image based on the background pixel lower limit and the background pixel upper limit. Among them, the pixel parameters can be set according to actual business needs, and the embodiment of the present invention does not specifically limit this.

[0047] Specifically, based on the statistical distribution of pixel values, a curve about pixel values ​​and pixel frequencies is fitted. Due to the volatility of imaging itself, the original curve is usually a complex function curve with high-frequency oscillations, such as Figure 4 In order to obtain the peak value of the curve, the complex function curve is smoothed to reduce the oscillation frequency of the curve, as shown in Figure 5 As shown. Then, the smoothed function curve is differentiated to obtain the maximum point in the function curve, and the pixel value corresponding to the maximum point is determined as the peak value. Then, the background pixel area is set according to the pixel parameter and the peak value, that is, the pixel parameter is subtracted from the peak value to obtain the lower limit of the background pixel, and the upper limit of the background pixel is obtained by adding the pixel parameter. Finally, the background pixel area corresponding to the wafer image is determined according to the background pixel lower limit and the background pixel upper limit, and the range outside the background pixel area is considered to be an obvious defect.

[0048] Step 104 : performing grayscale suppression on the wafer image based on the background pixel area to obtain a grayscale suppressed wafer image.

[0049] In order to prevent the contrast from being affected by outlier noise, an embodiment of the present invention suppresses the grayscale of the wafer image based on the background pixel area. For this process, step 104 specifically includes: based on the background pixel area, determining the minimum value and the maximum value of the background pixel area; replacing the pixel values ​​in the wafer image that are lower than the minimum value of the background pixel area with the minimum value of the background pixel area, and replacing the pixel values ​​that are higher than the maximum value of the background pixel area with the maximum value of the background pixel area, to obtain a replaced wafer image; performing extreme value filling on the replaced wafer image to obtain the wafer image after grayscale suppression, such as Figure 6 shown.

[0050] Specifically, the upper limit of the background pixels corresponding to the background pixel area is determined as the maximum value of the background pixel area, and similarly, the lower limit of the background pixels corresponding to the background pixel area is determined as the minimum value of the background pixel area. Then, all pixel values ​​in the wafer image that are lower than the minimum value of the background pixel area are replaced with the minimum value of the background pixel area, and all pixel values ​​in the wafer image that are higher than the maximum value of the background pixel area are replaced with the maximum value of the background pixel area, thereby achieving grayscale suppression of the wafer image.

[0051] Step 105 : performing defect contrast enhancement based on the grayscale suppressed wafer image.

[0052] Specifically, when performing contrast enhancement, the wafer image after grayscale suppression is first subjected to a histogram equalization operation to obtain a equalized wafer image, and then the equalized wafer image is subjected to a mean filtering operation to obtain a defect-enhanced wafer image, which can reduce the impact of background pixel fluctuations and improve the visualization effect of defects.

[0053] A wafer defect enhancement processing method provided by an embodiment of the present invention can suppress the grayscale of the wafer image based on the background pixel area by counting the pixel value distribution in the wafer image and determining the background pixel area corresponding to the wafer image according to the pixel value distribution, thereby reducing the impact of obvious defects on weak defects during grayscale stretching. That is, the present application can enhance weak defects while keeping the effect of obvious defects unchanged by suppressing high-contrast noise points.

[0054] Further, as a refinement and extension of the specific implementation of the above embodiment, in order to fully illustrate the implementation of this embodiment, the embodiment of the present invention also provides another wafer defect enhancement processing method, such as Figure 7 As shown, the method includes:

[0055] Step 201: Acquire a wafer image to be processed.

[0056] Specifically, a semiconductor wafer product is photographed with a camera to obtain a wafer image. It should be noted that the embodiment of the present invention has no limit on the depth of the wafer image. As a preferred method, the embodiment of the present invention can select a 16-bit wafer image.

[0057] Step 202: Count the pixel value distribution in the wafer image, and determine the background pixel area corresponding to the wafer image according to the pixel value distribution.

[0058] For the embodiment of the present invention, the process of determining the pixel value distribution and the background pixel area corresponding to the wafer image is exactly the same as step 102 and step 103, and will not be repeated here.

[0059] Step 203 : performing grayscale suppression on the wafer image based on the background pixel area to obtain a grayscale suppressed wafer image.

[0060] For the embodiment of the present invention, the upper limit of the background pixels corresponding to the background pixel area is determined as the maximum value of the background pixel area, and similarly, the lower limit of the background pixels corresponding to the background pixel area is determined as the minimum value of the background pixel area. After that, all pixel values ​​in the wafer image that are lower than the minimum value of the background pixel area are replaced with the minimum value of the background pixel area, and all pixel values ​​in the wafer image that are higher than the maximum value of the background pixel area are replaced with the maximum value of the background pixel area, thereby achieving grayscale suppression of the wafer image.

[0061] Step 204: Determine a background correction template image based on the grayscale suppressed wafer image.

[0062] For the embodiment of the present invention, the high precision of the camera will lead to a smaller field of view. A single semiconductor wafer product needs to be divided into multiple tasks for inspection. The imaging of the scanning camera will inevitably have an uneven background. The uneven background will cause the grayscale deviation of the bright and dark areas to increase when grayscale stretching is performed, which has no obvious effect on improving the contrast of defects. Therefore, the embodiment of the present invention corrects the background.

[0063] When performing background correction, it is necessary to determine a background correction template image based on the wafer image after grayscale suppression. For this process, step 204 specifically includes: downsampling the wafer image after grayscale suppression to obtain a downsampled wafer image; performing large-scale mean filtering on the downsampled wafer image to obtain a filtered wafer image; and upsampling the filtered wafer image to obtain a background correction template image.

[0064] Specifically, the wafer image after grayscale suppression is first downsampled. Since smoothing filtering is required later, downsampling the image can speed up the processing of subsequent processes without affecting the expected effect of smoothing filtering. Then, the wafer image after downsampling is subjected to large-scale mean filtering, and then the wafer image after filtering is upsampled to obtain a background correction template image with the same size as the original wafer image, such as Figure 8 shown.

[0065] Step 205: Perform a pixel inversion operation on the background correction template image to obtain an inverted background correction template image.

[0066] For the embodiment of the present invention, when performing the inversion operation on the background correction template image, the current pixel value of each pixel in the background correction template image can be subtracted from the maximum pixel value (255) to achieve the inversion operation of the background correction template image.

[0067] Step 206: Add the inverted background correction template image to the grayscale suppressed wafer image to obtain a wafer image after non-uniform correction.

[0068] For the embodiment of the present invention, the pixel value of each pixel point in the inverted background correction template image is added to the pixel value of each pixel point in the wafer image after grayscale suppression to obtain a wafer image after non-uniform correction, such as Fig. 9 shown.

[0069] Step 207: perform defect contrast enhancement based on the wafer image after the non-uniformity correction.

[0070] For the embodiment of the present invention, in order to enhance the defect contrast, step 207 specifically includes: performing a histogram equalization operation on the wafer image after the non-uniform correction to obtain a balanced wafer image; performing a mean filtering operation on the balanced wafer image to obtain a defect enhanced wafer image, such as Fig.10 The histogram equalization operation adopted in the embodiment of the present invention has an obvious enhancement effect on the situation where the image pixel difference is small, and can achieve contrast enhancement of weak defects in combination with mean filtering.

[0071] The embodiment of the present invention provides a wafer defect enhancement processing method, which can suppress high-contrast noise by determining the background pixel area corresponding to the wafer image and using the background pixel area to suppress the grayscale of the wafer image, thereby enhancing weak defects while maintaining the effect of obvious defects unchanged. In addition, the embodiment of the present invention can stabilize the pixels of the entire image within a smaller range by performing non-uniform correction operations of pixel inversion and addition on the image, which is convenient for the full-image operation of defect enhancement, is not affected by background fluctuations, has simple calculation logic, and can greatly improve real-time performance in conjunction with downsampling operations.

[0072] Further, as Figure 1 and Figure 7 The specific implementation of the method shown in the embodiment provides a wafer defect enhancement processing device, such as Fig.11 As shown, the device includes: an acquisition unit 31, a statistical unit 32, a determination unit 33, a suppression unit 34 and an enhancement unit 35.

[0073] The acquisition unit 31 may be used to acquire the wafer image to be processed.

[0074] The statistical unit 32 may be used to count the distribution of pixel values ​​in the wafer image.

[0075] The determining unit 33 may be configured to determine a background pixel region corresponding to the wafer image according to the pixel value distribution.

[0076] The suppression unit 34 may be configured to suppress the grayscale of the wafer image based on the background pixel region to obtain a wafer image after grayscale suppression.

[0077] The enhancement unit 35 may be used to enhance defect contrast based on the grayscale suppressed wafer image.

[0078] In some embodiments, the statistical unit 32 may be specifically used to count the pixel values ​​and their corresponding frequencies in the wafer image; and determine the pixel value distribution based on the pixel values ​​and their corresponding frequencies.

[0079] In some embodiments, the determination unit 33 includes: a fitting module, a derivation module and a determination module.

[0080] The fitting module may be used to fit a function curve regarding pixel value and pixel frequency based on the pixel value distribution.

[0081] The derivation module can be used to derive the function curve to obtain a maximum point in the function curve.

[0082] The determination module may be configured to determine a peak value in the function curve based on the maximum value point.

[0083] The determination module may also be used to determine a background pixel area corresponding to the wafer image according to the peak value.

[0084] In some embodiments, the fitting module can be specifically used to perform numerical fitting based on the pixel value distribution to obtain a numerical fitting curve; and smooth the numerical fitting curve to obtain a function curve related to pixel value and pixel frequency.

[0085] In some embodiments, the determination module can be specifically used to obtain pixel parameters of the background area in the wafer image; taking the peak value as the center, subtracting the peak value from the pixel parameter to obtain a lower limit of the background pixel, and adding the peak value to the pixel parameter to obtain an upper limit of the background pixel; based on the lower limit of the background pixel and the upper limit of the background pixel, determine the background pixel area corresponding to the wafer image.

[0086] In some embodiments, the suppression unit 34 can be specifically used to determine the minimum value and the maximum value of the background pixel area based on the background pixel area; replace the pixel values ​​in the wafer image that are lower than the minimum value of the background pixel area with the minimum value of the background pixel area, and replace the pixel values ​​that are higher than the maximum value of the background pixel area with the maximum value of the background pixel area to obtain a replaced wafer image; perform extreme value filling on the replaced wafer image to obtain the wafer image after grayscale suppression.

[0087] In some embodiments, the device further comprises: a negation unit and an addition unit.

[0088] The determination unit 33 may also be configured to determine a background correction template image based on the grayscale suppressed wafer image.

[0089] The inversion unit may be used to perform a pixel inversion operation on the background correction template image to obtain a inverted background correction template image.

[0090] The adding unit may be used to add the inverted background correction template image and the grayscale suppressed wafer image to obtain a wafer image after non-uniform correction.

[0091] In some embodiments, the enhancement unit 35 may be specifically configured to perform defect contrast enhancement based on the wafer image after the non-uniformity correction.

[0092] In some embodiments, the determination unit 33 can be specifically used to downsample the wafer image after grayscale suppression to obtain a downsampled wafer image; perform large-scale mean filtering on the downsampled wafer image to obtain a filtered wafer image; and upsample the filtered wafer image to obtain a background correction template image.

[0093] In some embodiments, the enhancement unit 35 can also be specifically used to perform a histogram equalization operation on the wafer image after the non-uniform correction to obtain a balanced wafer image; and perform a mean filtering operation on the balanced wafer image to obtain a defect-enhanced wafer image.

[0094] It should be noted that for other corresponding descriptions of the functional units involved in the wafer defect enhancement processing device provided in this embodiment, reference can be made to Figure 1 and Figure 7 The corresponding description in will not be repeated here.

[0095] Based on the above Figure 1 and Figure 7 The method shown in the embodiment also provides a storage medium on which a computer program is stored. When the program is executed by a processor, the above-mentioned Figure 1 and Figure 7 Wafer defect enhancement processing method shown.

[0096] Based on this understanding, the technical solution of the present application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, USB flash drive, mobile hard disk, etc.), including a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute the methods of various implementation scenarios of the present application.

[0097] Based on the above Figure 1 and Figure 7 The method shown, and Fig.11 In order to achieve the above-mentioned purpose, the embodiment of the present application also provides an electronic device, which can be a personal computer, a tablet computer, a server, or other network equipment, etc. The device includes a storage medium and a processor; the storage medium is used to store a computer program; the processor is used to execute the computer program to achieve the above-mentioned Figure 1 and Figure 7 Wafer defect enhancement processing method shown.

[0098] Optionally, the above-mentioned physical device may also include a user interface, a network interface, a camera, a radio frequency (RF) circuit, a sensor, an audio circuit, a WI-FI module, etc. The user interface may include a display, an input unit such as a keyboard, etc., and the optional user interface may also include a USB interface, a card reader interface, etc. The network interface may optionally include a standard wired interface, a wireless interface (such as a WI-FI interface), etc.

[0099] Those skilled in the art will appreciate that the above-mentioned physical device structure provided in this embodiment does not constitute a limitation on the physical device, and may include more or fewer components, or a combination of certain components, or different arrangements of components.

[0100] The storage medium may also include an operating system and a network communication module. The operating system is a program that manages the hardware and software resources of the above-mentioned physical device, and supports the operation of the information processing program and other software and / or programs. The network communication module is used to realize the communication between the components inside the storage medium, and the communication with other hardware and software in the information processing physical device.

[0101] Through the description of the above implementation methods, those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform, or by hardware.

[0102] The embodiment of the present invention can suppress high-contrast noise by determining the background pixel area corresponding to the wafer image and using the background pixel area to suppress the grayscale of the wafer image, thereby enhancing weak defects while maintaining the effect of obvious defects unchanged. In addition, the embodiment of the present invention can stabilize the pixels of the entire image within a smaller range by performing non-uniform correction operations of pixel inversion and addition on the image, which is convenient for full-image operation of defect enhancement, is not affected by background fluctuations, has simple calculation logic, and can greatly improve real-time performance in conjunction with downsampling operations.

[0103] Those skilled in the art will appreciate that the accompanying drawings are only schematic diagrams of a preferred implementation scenario, and the modules or processes in the accompanying drawings are not necessarily necessary for implementing the present application. Those skilled in the art will appreciate that the modules in the devices in the implementation scenario can be distributed in the devices of the implementation scenario according to the description of the implementation scenario, or can be changed accordingly and located in one or more devices different from the present implementation scenario. The modules of the above-mentioned implementation scenario can be combined into one module, or can be further split into multiple submodules.

[0104] The above serial numbers of this application are only for description and do not represent the advantages and disadvantages of the implementation scenarios. The above disclosure is only a few specific implementation scenarios of this application, but this application is not limited to them, and any changes that can be thought of by technicians in this field should fall within the scope of protection of this application.

Claims

1. A wafer defect enhancement processing method, characterized in that: include: Acquiring an image of a wafer to be processed; Counting the distribution of pixel values ​​in the wafer image; Determining a background pixel area corresponding to the wafer image according to the pixel value distribution; Performing grayscale suppression on the wafer image based on the background pixel area to obtain a grayscale suppressed wafer image; Defect contrast enhancement is performed based on the wafer image after grayscale suppression.

2. The method according to claim 1, characterized in that The counting of pixel value distribution in the wafer image includes: Counting each pixel value in the wafer image and its corresponding frequency; The pixel value distribution is determined based on the pixel values ​​and their corresponding frequencies.

3. The method according to claim 1, characterized in that Determining the background pixel area corresponding to the wafer image according to the pixel value distribution includes: Based on the pixel value distribution, fitting a function curve about pixel value and pixel frequency; Deriving the function curve to obtain a maximum point in the function curve; Based on the maximum value point, determining a peak value in the function curve; A background pixel area corresponding to the wafer image is determined according to the peak value.

4. The method according to claim 3, characterized in that The step of fitting a function curve related to pixel value and pixel frequency based on the pixel value distribution includes: Performing numerical fitting based on the pixel value distribution to obtain a numerical fitting curve; The numerical fitting curve is smoothed to obtain a function curve of pixel value and pixel frequency.

5. The method according to claim 3, characterized in that: Determining the background pixel area corresponding to the wafer image according to the peak value includes: Obtaining pixel parameters of a background area in the wafer image; Taking the peak value as the center, subtracting the peak value from the pixel parameter to obtain a lower limit of background pixels, and adding the peak value to the pixel parameter to obtain an upper limit of background pixels; Based on the background pixel lower limit and the background pixel upper limit, a background pixel area corresponding to the wafer image is determined.

6. The method according to claim 1, characterized in that The grayscale suppression of the wafer image based on the background pixel area to obtain the grayscale suppressed wafer image includes: Based on the background pixel area, determining a background pixel area minimum value and a background pixel area maximum value; The pixel values ​​in the wafer image that are lower than the minimum value of the background pixel area are replaced with the minimum value of the background pixel area, and the pixel values ​​that are higher than the maximum value of the background pixel area are replaced with the maximum value of the background pixel area to obtain the wafer image after grayscale suppression.

7. The method according to any one of claims 1 to 6, characterized in that: After performing grayscale suppression on the wafer image based on the background pixel area to obtain the grayscale suppressed wafer image, the method further includes: Determining a background correction template image based on the grayscale suppressed wafer image; Performing a pixel inversion operation on the background correction template image to obtain an inverted background correction template image; The inverted background correction template image is added to the grayscale suppressed wafer image to obtain a non-uniformly corrected wafer image.

8. A wafer defect enhancement processing device, characterized in that: include: An acquisition unit, used for acquiring an image of a wafer to be processed; A statistical unit, used for counting the distribution of pixel values ​​in the wafer image; A determination unit, configured to determine a background pixel area corresponding to the wafer image according to the pixel value distribution; A suppression unit, configured to suppress the grayscale of the wafer image based on the background pixel area to obtain a grayscale suppressed wafer image; The enhancement unit is used to enhance the defect contrast based on the wafer image after the grayscale is suppressed.

9. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

10. An electronic device comprising a storage medium, a processor, and a computer program stored in the storage medium and executable on the processor, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.