Voltage-controlled oscillator and electronic equipment
By using the bias generation circuit of the P-type cross-coupling pair and the N-type cross-coupling pair in the voltage-controlled oscillator in the voltage-controlled oscillator, the problem of complex structure and limited performance of the voltage-controlled oscillator in the prior art is solved, and the problem of the voltage-controlled oscillator in the prior art is realized. Miniaturize, lower cost and improve performance.
Patent Information
- Application Number
- CN202411360005.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2025-01-03
AI Technical Summary
In electronic devices facing high-performance demands, existing voltage-controlled oscillators have complex composition structures and limited performance, making it difficult to achieve miniaturization and low cost.
Using a bias generation circuit including a P-type cross-coupling pair and an N-type cross-coupling pair, the parasitic resistance consumption of the resonant module is compensated by modulating the threshold voltage of the transistor, simplifying the structure of the voltage-controlled oscillator, and providing it through the bias generation circuit. Modulation voltages are used to modulate the current generated by the transistor, enabling a wider current adjustment and a wider adjustment range.
The composition structure of the voltage-controlled oscillator is simplified, miniaturized and low-cost, and the noise impact generated by the tail current source is reduced, improving the performance of the voltage-controlled oscillator.
Smart Images
Figure CN119254146A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of electronic information technology, and more specifically, to a voltage-controlled oscillator and electronic equipment. Background Art
[0002] A voltage-controlled oscillator is an electronic oscillation circuit whose output frequency changes with the input control voltage. That is, by changing the input control voltage, the output frequency of the voltage-controlled oscillator can be accurately adjusted, making it an ideal source of frequency-modulated signals. Therefore, it is widely used in wireless communications, radar systems, phase-locked loops, digital signal processing, frequency synthesizers and other fields. From the tube oscillator in the early 20th century to the modern monolithic integrated voltage-controlled oscillator, voltage-controlled oscillator technology has undergone many major changes. In particular, with the development of microelectronics technology, voltage-controlled oscillators have gradually become smaller and less expensive, and are widely used in various electronic devices. Although voltage-controlled oscillators occupy an important position in modern electronic technology, with the continuous development and innovation of technology, as well as the high-performance requirements of various components of today's electronic equipment, the performance of voltage-controlled oscillators still needs to be improved. Summary of the invention
[0003] In view of this, the present application provides a voltage-controlled oscillator and an electronic device, which effectively solve the technical problems existing in the prior art, simplify the component structure of the voltage-controlled oscillator, and improve the performance of the voltage-controlled oscillator.
[0004] To achieve the above objectives, the technical solutions provided by this application are as follows:
[0005] A voltage-controlled oscillator comprises a bias generating circuit and a main circuit electrically connected, wherein the main circuit comprises a P-type cross-coupling pair, an N-type cross-coupling pair and a resonant module;
[0006] The bias generating circuit is used to provide a first modulation voltage for the substrate of the P-type transistor in the P-type cross-coupling pair, and to provide a second modulation voltage for the substrate of the N-type transistor in the N-type cross-coupling pair;
[0007] The P-type cross-coupling pair and the N-type cross-coupling pair are used to form respective negative resistance loads to compensate for energy consumed by the parasitic resistance of the resonant module;
[0008] Furthermore, the resonance module is used to resonate and output a first resonance signal and a second resonance signal.
[0009] Optionally, the bias generating circuit includes: a first current source, a second current source, a first N-type transistor, a first P-type transistor, a first operational amplifier, and a second operational amplifier;
[0010] The output end of the first current source is electrically connected to the non-inverting end of the first operational amplifier and the drain of the first P-type transistor, the source of the first P-type transistor is electrically connected to the power supply voltage end, the gate of the first P-type transistor and the inverting end of the first operational amplifier are both connected to a reference voltage, and the output end of the first operational amplifier is electrically connected to the substrate of the first P-type transistor and is used to output the first modulation voltage;
[0011] The output end of the second current source is electrically connected to the in-phase end of the second operational amplifier and the drain of the first N-type transistor, the source of the first N-type transistor is electrically connected to the ground end, the gate of the first N-type transistor and the inverting end of the second operational amplifier are both connected to the reference voltage, and the output end of the second operational amplifier is electrically connected to the substrate of the first N-type transistor and is used to output the second modulation voltage.
[0012] Optionally, the first current source includes a second N-type transistor, a source of the second N-type transistor is electrically connected to the ground terminal, a gate of the second N-type transistor is connected to a first bias voltage, and a drain of the second N-type transistor is an output terminal of the second N-type current source;
[0013] The second current source includes a second P-type transistor, a source of the second P-type transistor is electrically connected to the power supply voltage terminal, a gate of the second P-type transistor is connected to a second bias voltage, and a drain of the second P-type transistor is an output terminal of the second current source.
[0014] Optionally, both the first N-type transistor and the first P-type transistor are STVL reverse well transistors.
[0015] Optionally, the P-type cross-coupling pair includes a third P-type transistor and a fourth P-type transistor, a source of the third P-type transistor and a source of the fourth P-type transistor are both electrically connected to a power supply voltage terminal, a substrate of the third P-type transistor and a substrate of the fourth P-type transistor are both connected to the first modulation voltage, a gate of the third P-type transistor is electrically connected to a drain of the fourth P-type transistor, and a gate of the fourth P-type transistor is electrically connected to a drain of the third P-type transistor;
[0016] The N-type cross-coupling pair comprises a third N-type transistor and a fourth N-type transistor, a source of the third N-type transistor and a source of the fourth N-type transistor are both electrically connected to the ground terminal, a substrate of the third N-type transistor and a substrate of the fourth N-type transistor are both connected to the second modulation voltage, a gate of the third N-type transistor is electrically connected to a drain of the fourth N-type transistor, and a gate of the fourth N-type transistor is electrically connected to a drain of the third N-type transistor;
[0017] The drain of the third P-type transistor and the drain of the third N-type transistor are electrically connected to the first output end of the resonance module for outputting the first resonance signal, and the drain of the fourth P-type transistor and the drain of the fourth N-type transistor are electrically connected to the second output end of the resonance module for outputting the second resonance signal.
[0018] Optionally, the resonance module is an LC resonance module, and the LC resonance module includes: an inductor, a first capacitor, and a second capacitor;
[0019] The first end of the inductor is electrically connected to the first end of the first capacitor to output the first resonant signal, the second end of the inductor is electrically connected to the second end of the second capacitor to output the second resonant signal, and the second end of the first capacitor is electrically connected to the first end of the second capacitor and connected to an oscillation control voltage.
[0020] Optionally, at least one of the first capacitor and the second capacitor is a variable capacitor.
[0021] Optionally, the LC resonance module further includes a capacitance adjustment unit, and the capacitance adjustment unit is used to adjust the capacitance value of the LC resonance module.
[0022] Optionally, the capacitance adjustment unit includes a first capacitance adjustment branch to an Nth capacitance adjustment branch, where N is an integer not less than 1;
[0023] The i-th trimming branch comprises a (2i-1)th trimming capacitor, a 2i-th trimming capacitor and an i-th controllable switch, wherein a first end of the (2i-1)th trimming capacitor is electrically connected to a first end of the first capacitor, a second end of the (2i-1)th trimming capacitor is electrically connected to a first end of the i-th controllable switch, a control end of the i-th control switch is connected to an i-th control signal, a second end of the i-th controllable switch is electrically connected to a first end of the 2i-th trimming capacitor, and a second end of the 2i-th trimming capacitor is electrically connected to a second end of the second capacitor, wherein i is a positive integer not greater than N;
[0024] The capacitance value of the (2i-1)th trimming capacitor is the same as that of the 2ith trimming capacitor, and the capacitance value of the trimming capacitor in the i+1th capacitance trimming branch is a set multiple of the capacitance value of the trimming capacitor in the ith capacitance trimming branch.
[0025] Based on the same inventive concept, the present application also provides an electronic device, including the above-mentioned voltage-controlled oscillator.
[0026] Compared with the prior art, the technical solution provided by this application has at least the following advantages:
[0027] The present application provides a voltage-controlled oscillator and an electronic device, comprising an electrically connected bias generating circuit and a main circuit, wherein the main circuit comprises a P-type cross-coupling pair, an N-type cross-coupling pair and a resonance module; the bias generating circuit is used to provide a first modulation voltage for a substrate of a P-type transistor in the P-type cross-coupling pair, and to provide a second modulation voltage for a substrate of an N-type transistor in the N-type cross-coupling pair; the P-type cross-coupling pair and the N-type cross-coupling pair are used to constitute respective corresponding negative resistance loads to compensate for energy consumed by a parasitic resistance of the resonance module; and the resonance module is used to resonate and output a first resonance signal and a second resonance signal.
[0028] It can be seen from the above content that the technical solution provided by the present application can realize the energy consumed by the parasitic resistance of the compensation resonant module through the P-type cross-coupling pair and the N-type cross-coupling pair, thereby simplifying the composition structure of the voltage-controlled oscillator, which is conducive to the miniaturization and low cost of the voltage-controlled oscillator. In addition, the present application modulates the threshold voltage of the P-type transistor in the P-type cross-coupling pair by the first modulation voltage provided by the bias generating circuit to modulate the current generated by the P-type transistor; and modulates the threshold voltage of the N-type transistor in the N-type cross-coupling pair by the second modulation voltage provided by the bias generating circuit to modulate the current generated by the N-type transistor, thereby achieving the purpose of adjustable current and wider current adjustment range, reducing the noise impact generated by the tail current source in the existing voltage oscillator, and improving the performance of the voltage-controlled oscillator. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.
[0030] Figure 1 A schematic diagram of the structure of a voltage-controlled oscillator provided in an embodiment of the present application;
[0031] Figure 2 A circuit diagram of a bias generating circuit provided in an embodiment of the present application;
[0032] Figure 3 A circuit diagram of a main circuit provided in an embodiment of the present application;
[0033] Figure 4 A circuit diagram of another main circuit provided in an embodiment of the present application;
[0034] Figure 5 A circuit diagram of another main circuit provided in an embodiment of the present application;
[0035] Figure 6 A circuit diagram of a capacitance trimming unit provided in an embodiment of the present application. DETAILED DESCRIPTION
[0036] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0037] As described in the background technology, a voltage-controlled oscillator is an electronic oscillation circuit whose output frequency varies with the input control voltage, that is, by changing the input control voltage, the output frequency of the voltage-controlled oscillator can be accurately adjusted, making it an ideal source of frequency-modulated signals, and thus widely used in wireless communications, radar systems, phase-locked loops, digital signal processing, frequency synthesizers and other fields. From the electron tube oscillator at the beginning of the last century to the modern monolithic integrated voltage-controlled oscillator, the voltage-controlled oscillator technology has undergone many major changes. In particular, with the development of microelectronics technology, voltage-controlled oscillators have gradually become miniaturized and low-cost, and are widely used in various electronic devices. Although voltage-controlled oscillators occupy a pivotal position in modern electronic technology, with the continuous development and innovation of technology, as well as the high-performance requirements of various components of today's electronic equipment, the performance of voltage-controlled oscillators still needs to be improved.
[0038] Based on this, the embodiments of the present application provide a voltage-controlled oscillator and an electronic device, which effectively solve the technical problems existing in the prior art, simplify the component structure of the voltage-controlled oscillator, and improve the performance of the voltage-controlled oscillator.
[0039] To achieve the above purpose, the technical solution provided in the embodiment of the present application is as follows, specifically combined with Figures 1 to 6 The technical solution provided in the embodiments of the present application is described in detail.
[0040] refer to Figure 1 FIG. 1 is a schematic diagram of a structure of a voltage-controlled oscillator provided in an embodiment of the present application, wherein the voltage-controlled oscillator provided in an embodiment of the present application includes:
[0041] A bias generating circuit 100 and a main circuit 200 are electrically connected, wherein the main circuit 200 includes a P-type cross-coupling pair 210, an N-type cross-coupling pair 220 and a resonance module 230; the bias generating circuit 100 is used to provide a first modulation voltage VP for the substrate of the P-type transistor in the P-type cross-coupling pair 210, and to provide a second modulation voltage VN for the substrate of the N-type transistor in the N-type cross-coupling pair 220; the P-type cross-coupling pair 210 and the N-type cross-coupling pair 220 are used to form respective corresponding negative resistance loads to compensate for the energy consumed by the parasitic resistance of the resonance module 230; and the resonance module 230 is used to resonate and output a first resonance signal and a second resonance signal.
[0042] It can be understood that the technical solution provided by the embodiment of the present application, the P-type cross-coupling pair 210 is a negative resistance load of the cross-coupling of the P-type transistor, and the N-type cross-coupling pair 220 is a negative resistance load of the cross-coupling of the N-type transistor. The energy consumed by the parasitic resistance of the resonant module 230 can be compensated by the P-type cross-coupling pair 210 and the N-type cross-coupling pair 220, thereby simplifying the composition structure of the voltage-controlled oscillator, which is conducive to miniaturization and low cost of the voltage-controlled oscillator. In addition, the embodiment of the present application modulates the threshold voltage of the P-type transistor in the P-type cross-coupling pair 210 by the first modulation voltage VP provided by the bias generating circuit 100 to modulate the current generated by the P-type transistor; and modulates the threshold voltage of the N-type transistor in the N-type cross-coupling pair 220 by the second modulation voltage VN provided by the bias generating circuit 100 to modulate the current generated by the N-type transistor, thereby achieving the purpose of adjustable current and wider current adjustment range, reducing the noise influence generated by the tail current source in the existing voltage oscillator, and improving the performance of the voltage-controlled oscillator.
[0043] refer to Figure 2, which is a circuit diagram of a bias generating circuit provided by an embodiment of the present application, wherein the bias generating circuit 100 provided by an embodiment of the present application comprises: a first current source IS1, a second current source IS2, a first N-type transistor NM1, a first P-type transistor PM1, a first operational amplifier OPM1 and a second operational amplifier OPM2. The output end of the first current source IS1 is electrically connected to the in-phase end of the first operational amplifier OPM1 and the drain of the first P-type transistor PM1, the source of the first P-type transistor PM1 is electrically connected to the power supply voltage end VCC, the gate of the first P-type transistor PM1 and the inverting end of the first operational amplifier are both connected to the reference voltage VRF, and the output end of the first operational amplifier OPM1 is electrically connected to the substrate of the first P-type transistor PM1 and is used to output the first modulation voltage VP. Furthermore, the output end of the second current source IS2 is electrically connected to the in-phase end of the second operational amplifier OPM2 and the drain of the first N-type transistor NM1, the source of the first N-type transistor NM1 is electrically connected to the ground end GND, the gate of the first N-type transistor NM1 and the inverting end of the second operational amplifier OPM2 are both connected to the reference voltage VRF, and the output end of the second operational amplifier OPM2 is electrically connected to the substrate of the first N-type transistor NM1 and is used to output the second modulation voltage VN.
[0044] The first N-type transistor NM1 and the first P-type transistor PM1 provided in the embodiment of the present application are both STVL reverse well tubes. Also, the fixed bias current sources of the first current source IS1 and the second current source IS2, the currents generated by the two can be equal, and the present application does not make specific restrictions on this. Among them, the first P-type transistor PM1 and the first operational amplifier OPM1 provided in the embodiment of the present application form a first negative feedback loop. According to the principle of negative feedback, the voltage of the gate of the first P-type transistor PM1 and its drain are equal. Similarly, the first N-type transistor NM1 and the second operational amplifier OPM2 form a second negative feedback loop. According to the principle of negative feedback, the voltage of the gate of the first N-type transistor NM1 and its drain are equal. Therefore, by increasing the reference voltage VRF, the first modulation voltage VP and the second modulation voltage VN can be reduced. Conversely, by reducing the reference voltage VRF, the first modulation voltage VP and the second modulation voltage VN can be increased. Thus, by adjusting the reference voltage VRF, the voltages of the first modulation voltage VP and the second modulation voltage VN are adjusted, and finally the threshold voltage of the P-type transistor in the P-type cross-coupling pair 210 and the threshold voltage of the N-type transistor in the N-type cross-coupling pair 220 are adjusted to achieve the purpose of adjusting the current.
[0045] Continue to refer Figure 2As shown, the first current source IS1 provided in the embodiment of the present application includes a second N-type transistor NM2, the source of the second N-type transistor NM2 is electrically connected to the ground terminal GND, the gate of the second N-type transistor NM2 is connected to the first bias voltage Vb1, the drain of the second N-type transistor NM2 is the output terminal of the second N-type current source, and the drain of the second N-type transistor NM2 is electrically connected to the in-phase terminal of the first operational amplifier OPM1 and the drain of the first P-type transistor PM1. And, the second current source IS2 includes a second P-type transistor PM2, the source of the second P-type transistor PM2 is electrically connected to the power supply voltage terminal VCC, the gate of the second P-type transistor PM2 is connected to the second bias voltage Vb2, the drain of the second P-type transistor PM2 is the output terminal of the second current source, and the drain of the second P-type transistor PM2 is electrically connected to the in-phase terminal of the second operational amplifier OPM2 and the drain of the first N-type transistor NM1.
[0046] refer to Figure 3 As shown, it is a circuit diagram of a main circuit provided in an embodiment of the present application, wherein in the main circuit 200 provided in an embodiment of the present application, the P-type cross-coupling pair 210 includes a third P-type transistor PM3 and a fourth P-type transistor PM4, the source of the third P-type transistor PM3 and the source of the fourth P-type transistor PM4 are both electrically connected to the power supply voltage terminal VCC, the substrate of the third P-type transistor PM3 and the substrate of the fourth P-type transistor PM4 are both connected to the first modulation voltage VP, the gate of the third P-type transistor PM3 is electrically connected to the drain of the fourth P-type transistor PM4, and the gate of the fourth P-type transistor PM4 is electrically connected to the drain of the third P-type transistor PM3. The N-type cross-coupling pair includes a third N-type transistor NM3 and a fourth N-type transistor NM4, the source of the third N-type transistor NM3 and the source of the fourth N-type transistor NM4 are both electrically connected to the ground terminal GND, the substrate of the third N-type transistor NM3 and the substrate of the fourth N-type transistor NM4 are both connected to the second modulation voltage VN, the gate of the third N-type transistor NM3 is electrically connected to the drain of the fourth N-type transistor NM4, and the gate of the fourth N-type transistor NM4 is electrically connected to the drain of the third N-type transistor NM3. In addition, the drain of the third P-type transistor PM3 and the drain of the third N-type transistor NM3 are electrically connected to the first output terminal of the resonance module 230 for outputting the first resonance signal, and the drain of the fourth P-type transistor PM4 and the drain of the fourth N-type transistor NM4 are electrically connected to the second output terminal of the resonance module 230 for outputting the second resonance signal. The first resonance signal and the second resonance signal are signals with the same amplitude and opposite phases.
[0047] It can be understood that the third P-type transistor PM3 and the fourth P-type transistor PM4 provided in the embodiment of the present application constitute a P-type cross-coupled negative resistance load, and the third N-type transistor NM3 and the fourth N-type transistor NM4 constitute an N-type cross-coupled negative resistance load. When the resonance module 230 resonates, the negative resistance load offsets the energy consumed by the parasitic resistance of the resonance module 230. Among them, the first P-type transistor PM1 and the P-type cross-coupled pair 210 (such as the third P-type transistor PM3 and the fourth P-type transistor PM4) provided in the embodiment of the present application, and the first N-type transistor NM1 and the N-type cross-coupled pair 220 (such as the third N-type transistor NM3 and the fourth N-type transistor NM4) can all be four-terminal transistors of the fully depleted silicon-on-insulator process (Fully-Depleted Silicon-On-Insulator, FDSOI).
[0048] refer to Figure 4 As shown, it is a circuit diagram of another main circuit provided in an embodiment of the present application, wherein the resonance module 230 provided in the embodiment of the present application can be an LC resonance module 230, and the LC resonance module 230 includes: an inductor L, a first capacitor C1 and a second capacitor C2; the first end of the inductor L is electrically connected to the first end of the first capacitor C1 to output the first resonance signal, the second end of the inductor L is electrically connected to the second end of the second capacitor C2 to output the second resonance signal, the second end of the first capacitor C1 is electrically connected to the first end of the second capacitor C2 and is connected to the oscillation control voltage VTUNE, wherein the oscillation control voltage VTUNE is used to control the oscillation frequency of the voltage-controlled oscillator.
[0049] The formula for the oscillation frequency f0 generated when the LC resonance module 230 provided in the embodiment of the present application resonates is:
[0050]
[0051] L is the inductance value of the inductor L of the LC resonance module 230, and C is the capacitance value of the LC resonance module 230. It can be seen that the oscillation frequency of the LC resonance module 230 can be adjusted based on the change of the oscillation control voltage VTUNE and / or the change of the capacitance value of the first capacitor C1 and the second capacitor C2. Furthermore, at least one of the first capacitor C1 and the second capacitor C2 provided in the embodiment of the present application is a variable capacitor, so that when the oscillation control voltage VTUNE and the capacitance value of the original first capacitor C1 and the second capacitor C2 cannot adjust the oscillation frequency, the capacitance value of the first capacitor C1 and / or the second capacitor C2 is changed to achieve the purpose of adjusting the oscillation frequency. Among them, the variable capacitor can be a Varactor variable capacitor, and this application does not make any specific restrictions on this.
[0052] In addition, the LC resonance module 230 provided in the embodiment of the present application may also be provided with a capacitance adjustment unit to adjust the capacitance value of the module. Figure 5 As shown, it is a circuit diagram of another main circuit provided in an embodiment of the present application, wherein the LC resonance module 230 provided in the embodiment of the present application further includes a capacitance adjustment unit 231, and the capacitance adjustment unit 231 is used to adjust the capacitance value of the LC resonance module 231.
[0053] refer to Figure 6 As shown, it is a circuit diagram of a capacitor trimming unit provided in an embodiment of the present application, wherein the capacitor trimming unit 231 provided in the embodiment of the present application includes a first capacitor trimming branch 2311 to an N-th capacitor trimming branch 231n, N is an integer not less than 1; the i-th trimming branch includes a (2i-1)-th trimming capacitor, a 2i-th trimming capacitor and an i-th controllable switch, the first end of the (2i-1)-th trimming capacitor is electrically connected to the first end of the first capacitor, the second end of the (2i-1)-th trimming capacitor is electrically connected to the first end of the i-th controllable switch, the control end of the i-th controllable switch is connected to the i-th control signal, the second end of the i-th controllable switch is electrically connected to the first end of the 2i-th trimming capacitor, and the second end of the 2i-th trimming capacitor is electrically connected to the second end of the second capacitor, and i is a positive integer not greater than N. That is, the first trimming branch 2311 includes a first trimming capacitor Cx1, a second trimming capacitor Cx2 and a first controllable switch K1, a first end of the first trimming capacitor Cx1 is electrically connected to a first end of the first capacitor C1, a second end of the first trimming capacitor Cx1 is electrically connected to a first end of the first controllable switch K1, a control end of the first controllable switch K1 is connected to a first control signal S1, a second end of the first controllable switch K1 is electrically connected to a first end of the second trimming capacitor Cx2, and a second end of the second trimming capacitor Cx2 is electrically connected to a second end of the second capacitor C2; and The second trimming branch 2312 includes a third trimming capacitor Cx3, a fourth trimming capacitor Cx4 and a second controllable switch K2, the first end of the third trimming capacitor Cx3 is electrically connected to the first end of the first capacitor C1, the second end of the third trimming capacitor Cx3 is electrically connected to the first end of the second controllable switch K2, the control end of the second controllable switch K2 is connected to the second control signal S2, the second end of the second controllable switch K2 is electrically connected to the first end of the fourth trimming capacitor Cx4, the second end of the fourth trimming capacitor Cx4 is electrically connected to the second end of the second capacitor C2, and so on.
[0054] In an embodiment of the present application, the capacitance values of the (2i-1)th trimming capacitor and the 2ith trimming capacitor provided in the embodiment of the present application are the same, and the capacitance value of the trimming capacitor in the i+1th capacitor trimming branch is a set multiple of the capacitance value of the trimming capacitor in the i-th capacitor trimming branch. That is, the capacitance values of the first trimming capacitor Cx1 and the second trimming capacitor Cx2 are the same, the third trimming capacitor Cx3 and the fourth trimming capacitor Cx4 are the same, and the capacitance values of the third trimming capacitor Cx3 and the fourth trimming capacitor Cx4 are set multiples of the capacitance values of the first trimming capacitor Cx1 and the second trimming capacitor Cx2, and so on. Furthermore, when adjusting the capacitance of the LC resonance module 230 to adjust the oscillation frequency, the corresponding capacitance trimming branch can be selected and controlled to be connected in parallel with the inductor L through the control signal, thereby changing the capacitance value of the LC resonance module 230 to achieve the purpose of adjusting the oscillation frequency.
[0055] Optionally, the capacitance values of the two trimming capacitors in any capacitance trimming branch provided in the embodiments of the present application are the same, and the capacitance values of the first trimming capacitor Cx1 and the second trimming capacitor Cx2 can be set as reference capacitance values, and the capacitance value of the trimming capacitor in the jth capacitance trimming branch is j times the capacitance value of the trimming capacitor in the first capacitance trimming branch 2311, where j is an integer greater than 1; for example, the capacitance value of the trimming capacitor in the second capacitance trimming branch 2312 is twice the capacitance value of the trimming capacitor in the first capacitance trimming branch 2311, and so on, and the present application does not make any specific restrictions on this.
[0056] Based on the same inventive concept, an embodiment of the present application further provides an electronic device, which includes the voltage-controlled oscillator provided by any one of the above embodiments.
[0057] An embodiment of the present application provides a voltage-controlled oscillator and an electronic device, including an electrically connected bias generating circuit and a main circuit, the main circuit including a P-type cross-coupling pair, an N-type cross-coupling pair and a resonance module; the bias generating circuit is used to provide a first modulation voltage for a substrate of a P-type transistor in the P-type cross-coupling pair, and to provide a second modulation voltage for a substrate of an N-type transistor in the N-type cross-coupling pair; the P-type cross-coupling pair and the N-type cross-coupling pair are used to constitute respective corresponding negative resistance loads to compensate for energy consumed by a parasitic resistance of the resonance module; and the resonance module is used to resonate and output a first resonance signal and a second resonance signal.
[0058] It can be seen from the above content that the technical solution provided by the embodiment of the present application can realize the energy consumed by the parasitic resistance of the compensation resonant module through the P-type cross-coupling pair and the N-type cross-coupling pair, thereby simplifying the composition structure of the voltage-controlled oscillator, which is conducive to the miniaturization and low cost of the voltage-controlled oscillator. In addition, the embodiment of the present application modulates the threshold voltage of the P-type transistor in the P-type cross-coupling pair through the first modulation voltage provided by the bias generating circuit to modulate the current generated by the P-type transistor; and modulates the threshold voltage of the N-type transistor in the N-type cross-coupling pair through the second modulation voltage provided by the bias generating circuit to modulate the current generated by the N-type transistor, thereby achieving the purpose of adjustable current and wider current adjustment range, reducing the noise impact generated by the tail current source in the existing voltage oscillator, and improving the performance of the voltage-controlled oscillator.
[0059] In the description of the embodiments of the present application, it needs to be understood that the orientation or position relationship indicated by terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.
[0060] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the embodiments of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0061] In the embodiments of the present application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection, an electrical connection, or communication with each other; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0062] In the embodiments of the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.
[0063] In the embodiments of the present application, if the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" appear, it means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradicting each other.
[0064] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.
Claims
1. A voltage-controlled oscillator, characterized in that: A bias generating circuit and a main circuit are electrically connected, wherein the main circuit includes a P-type cross-coupling pair, an N-type cross-coupling pair, and a resonant module; The bias generating circuit is used to provide a first modulation voltage for the substrate of the P-type transistor in the P-type cross-coupling pair, and to provide a second modulation voltage for the substrate of the N-type transistor in the N-type cross-coupling pair; The P-type cross-coupling pair and the N-type cross-coupling pair are used to form respective negative resistance loads to compensate for energy consumed by the parasitic resistance of the resonant module; Furthermore, the resonance module is used to resonate and output a first resonance signal and a second resonance signal.
2. The voltage controlled oscillator according to claim 1, characterized in that: The bias generating circuit comprises: a first current source, a second current source, a first N-type transistor, a first P-type transistor, a first operational amplifier and a second operational amplifier; The output end of the first current source is electrically connected to the non-inverting end of the first operational amplifier and the drain of the first P-type transistor, the source of the first P-type transistor is electrically connected to the power supply voltage end, the gate of the first P-type transistor and the inverting end of the first operational amplifier are both connected to a reference voltage, and the output end of the first operational amplifier is electrically connected to the substrate of the first P-type transistor and is used to output the first modulation voltage; The output end of the second current source is electrically connected to the in-phase end of the second operational amplifier and the drain of the first N-type transistor, the source of the first N-type transistor is electrically connected to the ground end, the gate of the first N-type transistor and the inverting end of the second operational amplifier are both connected to the reference voltage, and the output end of the second operational amplifier is electrically connected to the substrate of the first N-type transistor and is used to output the second modulation voltage.
3. The voltage controlled oscillator according to claim 2, characterized in that: The first current source comprises a second N-type transistor, a source of the second N-type transistor is electrically connected to the ground terminal, a gate of the second N-type transistor is connected to a first bias voltage, and a drain of the second N-type transistor is an output terminal of the second N-type current source; The second current source includes a second P-type transistor, a source of the second P-type transistor is electrically connected to the power supply voltage terminal, a gate of the second P-type transistor is connected to a second bias voltage, and a drain of the second P-type transistor is an output terminal of the second current source.
4. The voltage controlled oscillator according to claim 2, characterized in that: The first N-type transistor and the first P-type transistor are both STVL reverse well transistors.
5. The voltage controlled oscillator according to claim 1, characterized in that: The P-type cross-coupling pair includes a third P-type transistor and a fourth P-type transistor, a source of the third P-type transistor and a source of the fourth P-type transistor are both electrically connected to a power supply voltage terminal, a substrate of the third P-type transistor and a substrate of the fourth P-type transistor are both connected to the first modulation voltage, a gate of the third P-type transistor is electrically connected to a drain of the fourth P-type transistor, and a gate of the fourth P-type transistor is electrically connected to a drain of the third P-type transistor; The N-type cross-coupling pair comprises a third N-type transistor and a fourth N-type transistor, a source of the third N-type transistor and a source of the fourth N-type transistor are both electrically connected to the ground terminal, a substrate of the third N-type transistor and a substrate of the fourth N-type transistor are both connected to the second modulation voltage, a gate of the third N-type transistor is electrically connected to a drain of the fourth N-type transistor, and a gate of the fourth N-type transistor is electrically connected to a drain of the third N-type transistor; The drain of the third P-type transistor and the drain of the third N-type transistor are electrically connected to the first output end of the resonance module for outputting the first resonance signal, and the drain of the fourth P-type transistor and the drain of the fourth N-type transistor are electrically connected to the second output end of the resonance module for outputting the second resonance signal.
6. The voltage controlled oscillator according to claim 1, characterized in that: The resonance module is an LC resonance module, and the LC resonance module includes: an inductor, a first capacitor and a second capacitor; The first end of the inductor is electrically connected to the first end of the first capacitor to output the first resonant signal, the second end of the inductor is electrically connected to the second end of the second capacitor to output the second resonant signal, and the second end of the first capacitor is electrically connected to the first end of the second capacitor and connected to an oscillation control voltage.
7. The voltage controlled oscillator according to claim 6, characterized in that: At least one of the first capacitor and the second capacitor is a variable capacitor.
8. The voltage controlled oscillator according to claim 6, characterized in that: The LC resonance module further includes a capacitance adjustment unit, and the capacitance adjustment unit is used to adjust the capacitance value of the LC resonance module.
9. The voltage controlled oscillator according to claim 6, characterized in that: The capacitance adjustment unit includes a first capacitance adjustment branch to an Nth capacitance adjustment branch, where N is an integer not less than 1; The i-th trimming branch comprises a (2i-1)th trimming capacitor, a 2i-th trimming capacitor and an i-th controllable switch, wherein a first end of the (2i-1)th trimming capacitor is electrically connected to a first end of the first capacitor, a second end of the (2i-1)th trimming capacitor is electrically connected to a first end of the i-th controllable switch, a control end of the i-th control switch is connected to an i-th control signal, a second end of the i-th controllable switch is electrically connected to a first end of the 2i-th trimming capacitor, and a second end of the 2i-th trimming capacitor is electrically connected to a second end of the second capacitor, wherein i is a positive integer not greater than N; The capacitance value of the (2i-1)th trimming capacitor is the same as that of the 2ith trimming capacitor, and the capacitance value of the trimming capacitor in the i+1th capacitance trimming branch is a set multiple of the capacitance value of the trimming capacitor in the ith capacitance trimming branch.
10. An electronic device, characterized in that: A voltage-controlled oscillator comprising any one of claims 1-9.