Transaction protocol conversion method and device, equipment and storage medium

Abstract

The invention relates to the technical field of multi-core processors, and discloses a transaction protocol conversion method, device and equipment and a storage medium, one end of a transaction protocol conversion component is connected with a processor of a first bus protocol, the other end of the transaction protocol conversion component is connected with a main node of a second bus protocol, and the transaction protocol conversion component receives a transaction transmitted by the processor; and converting the transaction into a transaction message conforming to the second bus protocol according to the message format of the second bus protocol. And transmitting the transaction message carrying the retransmission identifier to the main node. And the main node feeds back a retransmission response to the processor through the transaction protocol conversion component. After receiving the retransmission response, the transaction protocol conversion component enters a waiting stage; and after receiving a retransmission notification fed back by the main node, retransmitting the transaction message to the main node. The transaction protocol conversion component realizes a request channel conversion function of two different bus protocols, and is provided with a retransmission function, so that the ordered processing of various transactions by the main node is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of multi-core processors, and in particular to a transaction protocol conversion method, device, equipment and storage medium. Background Art

[0002] As the demand for computing power increases, the performance of single-core processors can no longer meet the computing needs. The parallel computing capability of multi-core processor systems can provide higher computing power and has become the development trend of processors today. The bus protocol (Advanced eXtensible Interface, AXI) is the most important part of the Advanced Microcontroller Bus Architecture (AMBA) 3.0 protocol. It is an on-chip bus for high performance, high bandwidth, and low latency. The AXI Coherency Extensions (ACE) and Coherent Hub Interface (CHI) protocols are protocols that support cache consistency and are used to maintain cache consistency in multi-core processor systems.

[0003] As an evolution of the ACE protocol, the CHI protocol is a popular protocol for cache consistency in multi-core processors and has a wider range of applications. Currently, there is only a cache consistency implementation based on the CHI protocol, which does not involve the processing method of ACE and CHI conversion, resulting in the inability of transactions generated by the ACE processor core to access the multi-core CPU system with the CHI architecture.

[0004] It can be seen that how to realize the conversion of transactions under different protocols is a problem that technical personnel in this field need to solve. Summary of the invention

[0005] The purpose of the embodiments of the present invention is to provide a transaction protocol conversion method, device, equipment and storage medium, which can solve the problem that transactions generated by ACE processor cores cannot access a multi-core CPU system with a CHI architecture.

[0006] In order to solve the above technical problems, an embodiment of the present invention provides a transaction protocol conversion method, which is applicable to a transaction protocol conversion component, wherein one end of the transaction protocol conversion component is connected to a processor of a first bus protocol, and the other end is connected to a master node of a second bus protocol. The method includes:

[0007] receiving a transaction transmitted by the processor;

[0008] According to the message format of the second bus protocol, converting the transaction into a transaction message that complies with the second bus protocol;

[0009] Transmitting the transaction message to the master node; wherein the transaction message carries a retransmission flag;

[0010] After receiving the retransmission response fed back by the master node, entering the waiting phase;

[0011] After receiving the retransmission notification fed back by the master node, the transaction message is retransmitted to the master node.

[0012] On the one hand, after receiving the retransmission notification fed back by the master node, retransmitting the transaction message to the master node includes:

[0013] After receiving the retransmission notification fed back by the master node, determining whether the transaction identification information carried in the retransmission notification is the same as the transaction identification information carried in the retransmission response; wherein the transaction identification information includes a transaction number and a credit number;

[0014] In the case where the transaction identification information carried in the retransmission notification is the same as the transaction identification information carried in the retransmission response, a transaction message carrying the transaction identification information is transmitted to the master node, so that after receiving the transaction message, the master node processes the transaction message if the transaction identification information carried in the transaction message is consistent with the transaction identification information carried in the retransmission notification fed back by the master node.

[0015] On the one hand, after converting the transaction into a transaction message conforming to the second bus protocol, the method further includes:

[0016] Saving the transaction message conforming to the second bus protocol into the register;

[0017] After receiving the retransmission notification fed back by the master node, retransmitting the transaction message to the master node includes:

[0018] After receiving the retransmission notification fed back by the master node, the transaction message is read from the register, and the transaction message is transmitted to the master node.

[0019] On the one hand, it also includes:

[0020] After receiving the response information fed back by the master node, the transaction message is deleted from the register.

[0021] In one aspect, the transaction comprises a read channel transaction;

[0022] According to the message format of the second bus protocol, converting the transaction into a transaction message conforming to the second bus protocol comprises:

[0023] Sending the read address, read channel transaction number and read channel transaction type carried in the read channel transaction as a transaction management signal to the transaction management component, so that the transaction management component stores the read address, read channel transaction number and read channel transaction type corresponding to the read channel transaction;

[0024] Determine, according to the data bit width and bit width number carried in the read channel transaction, a read channel transaction that satisfies the total amount of data transmission of the second bus protocol;

[0025] The field information corresponding to the read channel transaction that meets the total data transmission amount of the second bus protocol is converted into a transaction message that complies with the second bus protocol; wherein the field information includes the total data transmission amount of the second bus protocol, the read address, the read channel transaction number, the read channel transaction type and the shared domain.

[0026] In one aspect, the transaction comprises a write channel transaction;

[0027] Receiving a transaction transmitted by the processor includes:

[0028] receiving a write request signal conforming to a first bus protocol and transmitted by a write request channel;

[0029] According to the message format of the second bus protocol, converting the transaction into a transaction message conforming to the second bus protocol comprises:

[0030] Sending the write address, write channel transaction number and write channel transaction type carried in the write request signal as a transaction management signal to the transaction management component, so that the transaction management component stores the write address, write channel transaction number and write channel transaction type corresponding to the write request signal;

[0031] Determining the total amount of data of the write request signal that satisfies the total amount of data transmission of the second bus protocol according to the data bit width and the number of bit widths carried in the write request signal;

[0032] receiving write data transmitted by a write data channel and satisfying a total amount of data of the write request signal;

[0033] Cache the write data to static random access memory;

[0034] When the write data transmission signal corresponding to the write data channel is pulled high, the number of splits of the write data is determined according to the single data transmission amount of the write data bus and the total amount of data of the write request signal;

[0035] Reading the write data from the static random access memory, and splitting the write data into a plurality of sub-data according to the split number;

[0036] According to the message format of the second bus protocol, convert each sub-data into a sub-data message that complies with the second bus protocol;

[0037] Transmitting the transaction message to the master node includes:

[0038] Each sub-data message is transmitted to the master node.

[0039] On the one hand, according to the single data transmission amount of the write data bus and the total amount of data of the write request signal, determining the number of splits of the write data includes:

[0040] The total amount of data of the write request signal is divided by the single data transmission amount of the write data bus, and the obtained quotient is used as the number of splits of the write data.

[0041] The embodiment of the present invention further provides a transaction protocol conversion device, which is applicable to a transaction protocol conversion component, wherein one end of the transaction protocol conversion component is connected to a processor of a first bus protocol, and the other end is connected to a master node of a second bus protocol, and the device comprises a receiving unit, a conversion unit, a transmission unit, a waiting unit and a retransmission unit;

[0042] The receiving unit is used to receive the transaction transmitted by the processor;

[0043] The conversion unit is used to convert the transaction into a transaction message that complies with the second bus protocol according to the message format of the second bus protocol;

[0044] The transmission unit is used to transmit the transaction message to the master node; wherein the transaction message carries a retransmission flag;

[0045] The waiting unit is used to enter a waiting phase after receiving a retransmission response fed back by the master node;

[0046] The retransmission unit is used to retransmit the transaction message to the master node after receiving the retransmission notification fed back by the master node.

[0047] On the one hand, the retransmission unit is used to determine whether the transaction identification information carried in the retransmission notification and the transaction identification information carried in the retransmission response are the same after receiving the retransmission notification fed back by the master node; wherein the transaction identification information includes a transaction number and a credit number;

[0048] In the case where the transaction identification information carried in the retransmission notification is the same as the transaction identification information carried in the retransmission response, a transaction message carrying the transaction identification information is transmitted to the master node, so that after receiving the transaction message, the master node processes the transaction message if the transaction identification information carried in the transaction message is consistent with the transaction identification information carried in the retransmission notification fed back by the master node.

[0049] On the one hand, it also includes a preservation unit;

[0050] The storage unit is used to store the transaction message that complies with the second bus protocol in the register;

[0051] The retransmission unit is used to read the transaction message from the register and transmit the transaction message to the master node after receiving the retransmission notification fed back by the master node.

[0052] On the one hand, it also includes deleting units;

[0053] The deleting unit is used to delete the transaction message from the register after receiving the response information fed back by the master node.

[0054] In one aspect, the transaction comprises a read channel transaction;

[0055] The conversion unit includes a first sending subunit, a first determining subunit and an information conversion subunit;

[0056] The first sending subunit is used to send the read address, read channel transaction number and read channel transaction type carried in the read channel transaction as a transaction management signal to the transaction management component, so that the transaction management component stores the read address, read channel transaction number and read channel transaction type corresponding to the read channel transaction;

[0057] The first determining subunit is used to determine the read channel transaction that satisfies the total amount of data transmission of the second bus protocol according to the data bit width and the number of bit widths carried in the read channel transaction;

[0058] The information conversion subunit is used to convert each field information corresponding to the read channel transaction that meets the total data transmission amount of the second bus protocol into a transaction message that complies with the second bus protocol; wherein each field information includes the total data transmission amount of the second bus protocol, the read address, the read channel transaction number, the read channel transaction type and the shared domain.

[0059] In one aspect, the transaction comprises a write channel transaction;

[0060] The receiving unit is used for receiving a write request signal conforming to the first bus protocol and transmitted by the write request channel;

[0061] The conversion unit includes a second sending subunit, a second determining subunit, a receiving subunit, a buffering subunit, a third determining subunit, a reading subunit, a splitting subunit, and a sub-data conversion subunit;

[0062] The second sending subunit is used to send the write address, write channel transaction number and write channel transaction type carried in the write request signal as a transaction management signal to the transaction management component, so that the transaction management component stores the write address, write channel transaction number and write channel transaction type corresponding to the write request signal;

[0063] The second determining subunit is used to determine the total amount of data of the write request signal that satisfies the total amount of data transmission of the second bus protocol according to the data bit width and the number of bit widths carried in the write request signal;

[0064] The receiving subunit is used to receive write data transmitted by the write data channel that satisfies the total amount of data of the write request signal;

[0065] The cache subunit is used to cache the write data into a static random access memory;

[0066] The third determination subunit is used to determine the number of splits of the write data according to the single data transmission amount of the write data bus and the total amount of data of the write request signal when the write data transmission signal corresponding to the write data channel is pulled high;

[0067] The reading subunit is used to read the write data from the static random access memory;

[0068] The splitting subunit is used to split the write data into multiple sub-data according to the split number;

[0069] The sub-data conversion sub-unit is used to convert each sub-data into a sub-data message that complies with the second bus protocol according to the message format of the second bus protocol;

[0070] The transmission unit is used to transmit each sub-data message to the master node.

[0071] On the one hand, the third determination subunit is used to divide the total amount of data of the write request signal by the single data transmission amount of the write data bus, and the obtained quotient is used as the number of splits of the write data.

[0072] The embodiment of the present invention further provides a transaction protocol conversion device, including:

[0073] Memory for storing computer programs;

[0074] A processor is used to execute the computer program to implement the steps of the protocol conversion method for the above transaction.

[0075] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the protocol conversion method for the above-mentioned transaction are implemented.

[0076] An embodiment of the present invention further provides a computer program product, including a computer program / instruction, which implements the steps of the protocol conversion method of the above transaction when executed by a processor.

[0077] It can be seen from the above technical solution that one end of the transaction protocol conversion component is connected to the processor of the first bus protocol, and the other end is connected to the master node of the second bus protocol. The transaction protocol conversion component receives the transaction transmitted by the processor; according to the message format of the second bus protocol, the transaction is converted into a transaction message that conforms to the second bus protocol. The transaction message is transmitted to the master node; wherein, the transaction message carries a retransmission mark, indicating that the current transaction message supports the retransmission function. After receiving the transaction message, if the master node cannot process the transaction message in the first time, it can feedback the retransmission response to the processor through the transaction protocol conversion component. After receiving the retransmission response fed back by the master node, the transaction protocol conversion component enters the waiting stage. After receiving the retransmission notification fed back by the master node, it indicates that the current master node can process the transaction message in time, and at this time the transaction protocol conversion component can retransmit the transaction message to the master node. The beneficial effect of the present invention is that the transaction protocol conversion component realizes the request channel conversion function of two different bus protocols, so that various types of transactions issued by the processor core that conform to the first bus protocol can be accurately and timely converted into transactions that conform to the second bus protocol and sent to the master node for processing. Taking into account the processing performance of the master node, a retransmission function is set to ensure that the master node handles various transactions in an orderly manner and avoid the situation where transaction messages cannot be processed in time and cause message loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0078] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0079] Figure 1 A flowchart of a transaction protocol conversion method provided by an embodiment of the present invention;

[0080] Figure 2 A schematic diagram of the architecture of a transaction protocol conversion component provided by an embodiment of the present invention;

[0081] Figure 3A flowchart of a method for processing a read channel transaction provided by an embodiment of the present invention;

[0082] Figure 4 A flowchart of a method for processing a write channel transaction provided by an embodiment of the present invention;

[0083] Figure 5 A schematic diagram of the structure of a protocol conversion device for a transaction provided by an embodiment of the present invention;

[0084] Figure 6 A structural diagram of a transaction protocol conversion device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0085] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0086] The terms "including" and "having" in the specification of the present invention and the above-mentioned drawings, as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device including a series of steps or units is not limited to the listed steps or units, but may include steps or units that are not listed.

[0087] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0088] As an evolution of the ACE protocol, the CHI protocol has a wider range of applications. According to the system drive performance, power consumption and area requirements, the CHI architecture allows flexible topology selection for component connections, which can use a crossbar structure for small systems, a ring structure for medium-sized systems, and a mesh structure for large systems.

[0089] Since some processor cores are still based on the ACE protocol, in order to connect them to the CHI architecture system as request nodes (RN), it is necessary to build an interface that converts the ACE and CHI protocols and has RN functions. In addition, the master node using the CHI protocol often needs to process more transactions, and it may not be able to process the transactions transmitted by the ACE protocol processor in the first place, resulting in the loss of transaction messages.

[0090] Therefore, the embodiment of the present invention provides a transaction protocol conversion method, device, equipment and storage medium, which realizes the request channel conversion function of two different bus protocols through the transaction protocol conversion component, so that various transactions issued by the processor core that comply with the first bus protocol can be accurately and timely converted into transactions that comply with the second bus protocol and sent to the master node for processing. Considering the processing performance of the master node, a retransmission function is set to ensure the orderly processing of various transactions by the master node, and avoid the situation where the transaction message cannot be processed in time and causes the message to be lost.

[0091] Next, a transaction protocol conversion method provided by an embodiment of the present invention is described in detail. Figure 1 A flowchart of a transaction protocol conversion method provided by an embodiment of the present invention is applicable to a transaction protocol conversion component, one end of the transaction protocol conversion component is connected to a processor of a first bus protocol, and the other end is connected to a master node of a second bus protocol. The method includes:

[0092] S101: receiving a transaction transmitted by a processor.

[0093] In the embodiment of the present invention, for the sake of distinction, the device using the first bus protocol may be referred to as a processor (core), and the device using the second bus protocol may be referred to as a home node (HN). In order to enable the processor of the first bus protocol to access the system where the home node is located, the processor of the first bus protocol may be regarded as a request node (RN).

[0094] Transactions transmitted by the processor may include write channel transactions and read channel transactions. Among them, write channel transactions may include write data transactions and write channel no-data transactions; read channel transactions may include read data transactions and read channel no-data transactions. Write channel no-data transactions include cache line eviction transactions (Evict), and read channel no-data transactions refer to no-data transactions except Evict.

[0095] S102: According to the message format of the second bus protocol, convert the transaction into a transaction message that complies with the second bus protocol.

[0096] The processor uses the first bus protocol, so the transactions transmitted by the processor also comply with the first bus protocol. In order to transmit the transactions transmitted by the processor to the master node so that the master node can process the transactions, it is necessary to convert the transaction format, converting the transactions that comply with the first bus protocol into transaction messages that comply with the second bus protocol.

[0097] The message format of the first bus protocol and the message format of the second bus protocol can be recorded in the transaction protocol conversion component, so as to realize the conversion between the first bus protocol and the second bus protocol.

[0098] S103: Transmitting the transaction message to the master node.

[0099] In an embodiment of the present invention, each processor can communicate with the master node through a transaction protocol conversion component. A master node can communicate with multiple processors. Therefore, the number of transactions processed by the master node is often large, which may cause the master node to be unable to immediately process the transaction message transmitted by one or some processors. In view of this situation, if the retransmission function can be supported, it can effectively avoid the situation where too many transaction messages are accumulated on the master node, resulting in the master node being overloaded or even losing transaction messages. Therefore, the retransmission function can be set in the transaction protocol conversion component.

[0100] The transaction message may carry a retransmission flag, which indicates that the transaction message supports the retransmission function.

[0101] S104: After receiving the retransmission response fed back by the master node, enter the waiting phase.

[0102] The processing method of each transaction message is similar. For the sake of convenience, the processing flow of a transaction message is used as an example to explain.

[0103] After the transaction protocol conversion component transmits the transaction message to the master node, if the master node cannot process the transaction message immediately, it can feedback a retransmission response to the transaction protocol conversion component when the transaction message carries a retransmission flag. After receiving the retransmission response, the transaction protocol conversion component knows that the master node cannot process the transaction message at this time, so the transaction protocol conversion component can control the transaction message to enter the waiting stage.

[0104] S105: After receiving the retransmission notification fed back by the master node, retransmit the transaction message to the master node.

[0105] When the master node can currently process the transaction message entering the waiting stage, it can feedback a retransmission notification to the transaction protocol conversion component. After receiving the retransmission notification feedback from the master node, the transaction protocol conversion component can retransmit the transaction message to the master node.

[0106] The above introduction takes the processing flow of a transaction message as an example. Considering that the number of transaction messages processed by the master node in actual applications is often large, in order to clearly distinguish different transaction messages, the master node can carry unique transaction identification information used to distinguish transaction messages when feeding back retransmission responses and retransmission notifications. Transaction identification information can include transaction number (TxnID) and credit number (PCrdType).

[0107] After receiving the retransmission notification fed back by the master node, the transaction protocol conversion component can determine whether the transaction identification information carried in the retransmission notification is the same as the transaction identification information carried in the retransmission response.

[0108] When the transaction identification information carried in the retransmission notification is the same as the transaction identification information carried in the retransmission response, it means that they are for the same transaction message. At this time, the transaction protocol conversion component can determine the corresponding transaction message based on the transaction identification information, and transmit the transaction message carrying the transaction identification information to the master node, so that after receiving the transaction message, the master node can process the transaction message if the transaction identification information carried in the transaction message is consistent with the transaction identification information carried in the retransmission notification fed back by it.

[0109] Figure 2 A schematic diagram of the architecture of a transaction protocol conversion component provided in an embodiment of the present invention. For the processing of write channel transactions and read channel transactions, the transaction protocol conversion component may include a write request conversion module (w_req), a read request conversion module (r_req) and a request generation module (req_gen).

[0110] The write request conversion module can be used to receive write request signals (AWsignals) and write data (W) that comply with the ACE protocol transmitted by the processor. The write request conversion module includes a data vol calculation module and a static random access memory (SRAM). The write data can be cached in the static random access memory. The write request conversion module can transmit the write data to the data generation module (dat_gen).

[0111] The read request conversion module is used to receive the read request signal (AR) that complies with the ACE protocol transmitted by the processor. The read request conversion module can send the read address, read channel transaction number and read channel transaction type carried in the read request signal to the transaction management component as transaction management signals (TM signals). The transaction management component can be used to record the relevant information of each transaction. Each transaction can correspond to a record, which can include information corresponding to different fields such as address (Addr), transaction number (ID / TxnID), transaction type (AxSNP), identification (DBID), status information (T_Stat) and conflict signal (sp).

[0112] The read-write response conversion module (rsp_br) can transmit Retry&PCrd signals to the request generation module.

[0113] The request generation module includes a Spec table and a Txn Reg module. The request generation module is used to convert each field information corresponding to the read channel transaction into a transaction message that complies with the second bus protocol; and convert each sub-data corresponding to the write channel transaction into a sub-data message that complies with the second bus protocol. Figure 2 Taking the CHI protocol as an example, the request generation module can determine whether the transaction message transmitted to the master node carries retry signals and identify the transaction identification information carried in the retry response and retry notification.

[0114] It can be seen from the above technical solution that one end of the transaction protocol conversion component is connected to the processor of the first bus protocol, and the other end is connected to the master node of the second bus protocol. The transaction protocol conversion component receives the transaction transmitted by the processor; according to the message format of the second bus protocol, the transaction is converted into a transaction message that conforms to the second bus protocol. The transaction message is transmitted to the master node; wherein, the transaction message carries a retransmission mark, indicating that the current transaction message supports the retransmission function. After receiving the transaction message, if the master node cannot process the transaction message in the first time, it can feedback the retransmission response to the processor through the transaction protocol conversion component. After receiving the retransmission response fed back by the master node, the transaction protocol conversion component enters the waiting stage. After receiving the retransmission notification fed back by the master node, it indicates that the current master node can process the transaction message in time, and at this time the transaction protocol conversion component can retransmit the transaction message to the master node. The beneficial effect of the present invention is that the transaction protocol conversion component realizes the request channel conversion function of two different bus protocols, so that various types of transactions issued by the processor core that conform to the first bus protocol can be accurately and timely converted into transactions that conform to the second bus protocol and sent to the master node for processing. Taking into account the processing performance of the master node, a retransmission function is set to ensure that the master node handles various transactions in an orderly manner and avoid the situation where transaction messages cannot be processed in time and cause message loss.

[0115] In an embodiment of the present invention, after converting the transaction into a transaction message that complies with the second bus protocol, the transaction message that complies with the second bus protocol can be saved in a register; after receiving a retransmission notification fed back by the master node, the transaction message can be directly read from the register and transmitted to the master node.

[0116] After receiving the response information fed back by the master node, it indicates that the master node has completed processing the transaction message, and the transaction message can be deleted from the register at this time.

[0117] By saving the transaction message to the register, the loss of the transaction message can be avoided. After receiving the response information fed back by the master node, the transaction message can be deleted from the register, which avoids useless transaction messages occupying the storage space of the register for a long time and improves the utilization rate of the register.

[0118] Transactions can include read channel transactions and write channel transactions. Different types of transactions have different processing procedures. Take the read channel transaction as an example. Figure 3 A flowchart of a method for processing a read channel transaction provided by an embodiment of the present invention, the method comprising:

[0119] S301: Send the read address, read channel transaction number and read channel transaction type carried in the read channel transaction as a transaction management signal to the transaction management component, so that the transaction management component stores the read address, read channel transaction number and read channel transaction type corresponding to the read channel transaction.

[0120] The read request conversion module of the transaction protocol conversion component can receive the read request signal and the no data request signal transmitted by the processor through the read request channel. The processing methods of the read request signal and the no data request signal are similar, and the following will take the read request signal as an example to explain.

[0121] The read request conversion module can send the read address (ARADDR), read channel transaction number (ARID) and read channel transaction type (ARSNOOP) carried in the read request signal as transaction management signals (TM signals) to the transaction management component (Transaction Manager, TM).

[0122] S302: Determine, according to the data bit width and bit width number carried in the read channel transaction, a read channel transaction that satisfies the total amount of data transmission of the second bus protocol.

[0123] The read request conversion module can calculate the total amount of data transfer for the read request.

[0124] In actual applications, the total amount of data transmission can be calculated according to the following formula: ARVolume=ARSIZE*ARLEN, where ARVolume represents the total amount of data transmission of the read request, ARSIZE represents the data bit width of the read request, and ARLEN represents the number of bit widths of the read request.

[0125] The data bit width and bit width number of the read request can be carried in the read request signal, and the total amount of data transmission can be determined by substituting the values ​​of these two parameters into the above formula. The total amount of data transmission can be 64B.

[0126] S303: Convert each field information corresponding to the read channel transaction that meets the total amount of data transmission of the second bus protocol into a transaction message that complies with the second bus protocol.

[0127] The information in each field may include the total amount of data transmission of the second bus protocol (Volume), a read address, a read channel transaction number, a read channel transaction type, and a shared domain (ARDOMAIN) corresponding to the read request signal.

[0128] It should be noted that, in addition to the above-mentioned field information, the remaining fields of the second bus protocol message can be filled in or deleted according to the protocol or functional requirements. Therefore, the second bus protocol message bit width is determined according to the requirements and is not limited here.

[0129] In practical applications, the read request conversion module may transmit each field information to the request generation module, and the request generation module may convert the field information into a transaction message conforming to the second bus protocol according to the message format of the second bus protocol.

[0130] In an embodiment of the present invention, through the cooperation of the read request conversion module and the request generation module, the read request signal transmitted by the processor in accordance with the first bus protocol can be converted into a transaction message in accordance with the second bus protocol, thereby transmitting the transaction message to the master node adopting the second bus protocol for processing, thereby realizing the access of the read channel transaction generated by the processor core of the first bus protocol to the multi-core CPU system of the second bus protocol architecture.

[0131] Take the write channel transaction as an example. Figure 4 A flowchart of a method for processing a write channel transaction provided by an embodiment of the present invention, the method comprising:

[0132] S401: Receive a write request signal that complies with a first bus protocol and is transmitted by a write request channel.

[0133] The write request conversion module of the transaction protocol conversion component can receive the write request signal transmitted by the processor through the write request channel.

[0134] S402: Send the write address, write channel transaction number and write channel transaction type carried in the write request signal as a transaction management signal to the transaction management component, so that the transaction management component stores the write address, write channel transaction number and write channel transaction type corresponding to the write request signal.

[0135] The write request conversion module may send the write address (AWADDR), the write channel transaction number (AWID), and the write channel transaction type (AWSNOOP) carried in the write request signal to the transaction management component as a transaction management signal.

[0136] S403: Determine the total amount of data of the write request signal that satisfies the total amount of data transmission of the second bus protocol according to the data bit width and the number of bit widths carried in the write request signal.

[0137] The write request conversion module can calculate the total amount of data in the write request.

[0138] In practical applications, the total data transmission volume of the write request can be calculated according to the following formula: AWVolume=AWSIZE*AWLEN, where AWVolume represents the total data volume of the write request signal, AWSIZE represents the data bit width of the write request, and AWLEN represents the number of bit widths of the write request.

[0139] The data bit width and bit width number of the write request can be carried in the write request signal. Substituting the values ​​of these two parameters into the above formula, the total amount of data of the write request can be determined. The total amount of data can be 64B.

[0140] S404: Receive write data transmitted by the write data channel that satisfies the total amount of data of the write request signal.

[0141] The processor may transmit write data to the write request conversion module through the write data channel.

[0142] S405: Cache the write data into the static random access memory.

[0143] The write request conversion module may have a built-in static random access memory (SRAM) for caching write data.

[0144] S406: When the write data transmission signal corresponding to the write data channel is pulled high, the number of splits of the write data is determined according to the single data transmission amount of the write data bus and the total data amount of the write request signal.

[0145] The write data channel has its corresponding write data transmission signal (WLAST). When the write data transmission signal is pulled high, it means that the data transmission is completed. At this time, the write request conversion module can transmit the total data volume (AWVolume), write address, write channel transaction number, write channel transaction type and the shared domain (AWDOMAIN) corresponding to the write request signal to the request generation module. And the number of splits of the write data can be determined according to the single data transmission volume of the write data bus and the total data volume of the write request signal.

[0146] In practical applications, the total amount of data of the write request signal may be divided by the single data transmission amount of the write data bus, and the obtained quotient may be used as the number of splits of the write data.

[0147] For example, the single data transmission amount of the write data bus is generally 16B. When the total data amount of the write request signal is 64B, the number of splits is 64 / 16=4.

[0148] S407: Read the write data from the static random access memory, and split the write data into multiple sub-data according to the number of splits.

[0149] The write request conversion module can read the write data from the static random access memory, split the write data into multiple sub-data, and send the sub-data to the data generation module through the data bus (Wdata).

[0150] S408: According to the message format of the second bus protocol, convert each sub-data into a sub-data message that complies with the second bus protocol.

[0151] The data generating module can convert each sub-data into a sub-data message conforming to the second bus protocol according to the message format of the second bus protocol.

[0152] S409: Transmit each sub-data message to the master node.

[0153] The data generation module can transmit the sub-data message that complies with the second bus protocol to the master node through the request channel.

[0154] In an embodiment of the present invention, through the cooperation of the write request conversion module and the request generation module, the write request signal transmitted by the processor in accordance with the first bus protocol can be converted into a message in accordance with the second bus protocol, thereby transmitting the message to the master node adopting the second bus protocol for processing, thereby realizing the access of the write channel transaction generated by the processor core of the first bus protocol to the multi-core CPU system of the second bus protocol architecture.

[0155] The transaction protocol conversion component provided by the present invention can support the retransmission function, and one retransmission consumes one credit, that is, when the request is sent for the first time and the master node cannot process it immediately, a retransmission response (RetryAck) will be sent to the transaction protocol conversion component, and the retransmission response will be sent to the request generation module through the retransmission signal (Retry signals). The retransmission response can carry transaction identification information, and the transaction identification information includes the transaction number and the credit number. When the master node can process the information, a retransmission notification (PCrdGrant) will be sent to the transaction protocol conversion component, and the retransmission notification will also include the transaction identification information. Both the retransmission response and the retransmission notification will be sent to the request generation module of the transaction protocol conversion component. The request generation module will resend the transaction message with the same transaction number to the master node only when it determines that the transaction identification information carried by the retransmission response and the retransmission notification are consistent.

[0156] In practical applications, the master node often supports a maximum of 16 credits. In order to ensure the orderly processing of different transaction messages, 16 groups of registers can be used to save transaction messages.

[0157] After the transaction message is generated, it can be stored in the corresponding register. If the transaction message is processed by the master node when it is sent for the first time, then after the transaction protocol conversion component receives the response from the master node, it will send a no retry signal containing the transaction number to the request generation module, and the request generation module will clear the transaction message corresponding to the transaction number in the register. For transaction messages that are not processed by the master node when they are sent for the first time, after receiving the retransmission notification transmitted by the master node, the transaction message can be read from the corresponding register according to the transaction number carried in the retransmission notification, and the transaction message can be resent to the master node; when the transaction protocol conversion component receives the response from the master node, the transaction message corresponding to the transaction number in the register can be cleared.

[0158] For ease of description, AllowRetry may be used to indicate whether the retransmission function is supported. When AllowRetry=1, it indicates that the retransmission function is supported; when AllowRetry=0, it indicates that the retransmission function is not supported. In the embodiment of the present invention, for the transaction message sent for the first time, the retransmission function may be supported by default, that is, AllowRetry=1.

[0159] The credit numbers corresponding to different transaction messages can be represented by different numbers. Assuming that the master node supports a maximum of 16 credits, 0 to 15 can be used in sequence according to the processing order to represent 16 different credit numbers (PCrdType).

[0160] Taking the first transaction message sent as an example, its corresponding AllowRetry=1, PCrdType=0. If a retransmission response is received from the master node, it is necessary to wait until a retransmission notification with the same transaction identification information is received, and then the transaction message can be sent again. At this time, the AllowRetry corresponding to the transaction message is 0, and PCrdType is the credit number carried in the retransmission response and retransmission notification. The credit number will change during the waiting process. Assuming PCrdType=n, it means that the current master node has consumed n+1 credits.

[0161] Since the processor of the ACE protocol does not support the retransmission function, the retransmission response and retransmission notification do not need to be transmitted to the processor, and the retransmission function can be completed with the help of the transaction protocol conversion component.

[0162] In the embodiment of the present invention, the number of registers is set according to the processing performance of the master node, and different types of transaction messages can be stored in their corresponding registers, ensuring efficient query and orderly processing of each transaction message. After the master node completes the processing of the transaction message, the transaction message in the corresponding register is deleted in time, thereby avoiding the situation where the retransmission function is frequently occupied by the same transaction message.

[0163] Figure 5 A schematic diagram of the structure of a transaction protocol conversion device provided by an embodiment of the present invention, which is applicable to a transaction protocol conversion component, wherein one end of the transaction protocol conversion component is connected to a processor of a first bus protocol, and the other end is connected to a master node of a second bus protocol, and the device comprises a receiving unit 51, a conversion unit 52, a transmission unit 53, a waiting unit 54 and a retransmission unit 55;

[0164] A receiving unit 51, configured to receive a transaction transmitted by a processor;

[0165] The conversion unit 52 is used to convert the transaction into a transaction message that complies with the second bus protocol according to the message format of the second bus protocol;

[0166] The transmission unit 53 is used to transmit the transaction message to the master node; wherein the transaction message carries a retransmission flag;

[0167] The waiting unit 54 is used to enter the waiting phase after receiving the retransmission response fed back by the master node;

[0168] The retransmission unit 55 is used to retransmit the transaction message to the master node after receiving the retransmission notification fed back by the master node.

[0169] In some embodiments, the retransmission unit is used to determine whether the transaction identification information carried in the retransmission notification and the transaction identification information carried in the retransmission response are the same after receiving the retransmission notification fed back by the master node; wherein the transaction identification information includes a transaction number and a credit number;

[0170] When the transaction identification information carried in the retransmission notification is the same as the transaction identification information carried in the retransmission response, a transaction message carrying the transaction identification information is transmitted to the master node, so that after receiving the transaction message, the master node can process the transaction message if the transaction identification information carried in the transaction message is consistent with the transaction identification information carried in the retransmission notification fed back by the master node.

[0171] In some embodiments, a storage unit is also included;

[0172] A storage unit, used for storing the transaction message conforming to the second bus protocol in a register;

[0173] The retransmission unit is used to read the transaction message from the register and transmit the transaction message to the master node after receiving the retransmission notification fed back by the master node.

[0174] In some embodiments, a deletion unit is also included;

[0175] The deleting unit is used to delete the transaction message from the register after receiving the response information fed back by the master node.

[0176] In some embodiments, the transaction comprises a read channel transaction;

[0177] The conversion unit includes a first sending subunit, a first determining subunit and an information conversion subunit;

[0178] A first sending subunit is used to send the read address, the read channel transaction number and the read channel transaction type carried in the read channel transaction as a transaction management signal to the transaction management component, so that the transaction management component stores the read address, the read channel transaction number and the read channel transaction type corresponding to the read channel transaction;

[0179] A first determining subunit is used to determine a read channel transaction that satisfies a total amount of data transmission of the second bus protocol according to a data bit width and a bit width number carried in the read channel transaction;

[0180] The information conversion subunit is used to convert the field information corresponding to the read channel transaction that meets the total data transmission volume of the second bus protocol into a transaction message that complies with the second bus protocol; wherein the field information includes the total data transmission volume of the second bus protocol, the read address, the read channel transaction number, the read channel transaction type and the shared domain.

[0181] In some embodiments, the transaction comprises a write channel transaction;

[0182] The receiving unit is used for receiving a write request signal conforming to the first bus protocol and transmitted by the write request channel;

[0183] The conversion unit includes a second sending subunit, a second determining subunit, a receiving subunit, a buffering subunit, a third determining subunit, a reading subunit, a splitting subunit, and a sub-data conversion subunit;

[0184] a second sending subunit, configured to send the write address, the write channel transaction number, and the write channel transaction type carried in the write request signal as a transaction management signal to the transaction management component, so that the transaction management component stores the write address, the write channel transaction number, and the write channel transaction type corresponding to the write request signal;

[0185] A second determining subunit, configured to determine the total amount of data of the write request signal that satisfies the total amount of data transmission of the second bus protocol according to the data bit width and the number of bit widths carried in the write request signal;

[0186] A receiving subunit, used for receiving write data transmitted by a write data channel that satisfies a total amount of data of a write request signal;

[0187] A cache subunit, used for caching write data into a static random access memory;

[0188] A third determination subunit is used to determine the number of splits of the write data according to the single data transmission amount of the write data bus and the total data amount of the write request signal when the write data transmission signal corresponding to the write data channel is pulled high;

[0189] A read subunit, used for reading write data from the static random access memory;

[0190] A split sub-unit, used to split the write data into multiple sub-data according to the split number;

[0191] The sub-data conversion sub-unit is used to convert each sub-data into a sub-data message conforming to the second bus protocol according to the message format of the second bus protocol;

[0192] The transmission unit is used to transmit each sub-data message to the master node.

[0193] In some embodiments, the third determining subunit is used to divide the total amount of data of the write request signal by the single data transmission amount of the write data bus, and the obtained quotient is used as the number of splits of the write data.

[0194] Figure 5 The description of the features in the corresponding embodiments can be found in Figure 1 The relevant descriptions of the corresponding embodiments will not be repeated here one by one.

[0195] It can be seen from the above technical solution that one end of the transaction protocol conversion component is connected to the processor of the first bus protocol, and the other end is connected to the master node of the second bus protocol. The transaction protocol conversion component receives the transaction transmitted by the processor; according to the message format of the second bus protocol, the transaction is converted into a transaction message that conforms to the second bus protocol. The transaction message is transmitted to the master node; wherein, the transaction message carries a retransmission mark, indicating that the current transaction message supports the retransmission function. After receiving the transaction message, if the master node cannot process the transaction message in the first time, it can feedback the retransmission response to the processor through the transaction protocol conversion component. After receiving the retransmission response fed back by the master node, the transaction protocol conversion component enters the waiting stage. After receiving the retransmission notification fed back by the master node, it indicates that the current master node can process the transaction message in time, and at this time the transaction protocol conversion component can retransmit the transaction message to the master node. The beneficial effect of the present invention is that the transaction protocol conversion component realizes the request channel conversion function of two different bus protocols, so that various types of transactions issued by the processor core that conform to the first bus protocol can be accurately and timely converted into transactions that conform to the second bus protocol and sent to the master node for processing. Taking into account the processing performance of the master node, a retransmission function is set to ensure that the master node handles various transactions in an orderly manner and avoid the situation where transaction messages cannot be processed in time and cause message loss.

[0196] Figure 6A structural diagram of a protocol conversion device for a transaction provided by an embodiment of the present invention, such as Figure 6 As shown, the transaction protocol conversion device includes: a memory 60 for storing a computer program;

[0197] The processor 61 is used to implement the steps of the protocol conversion method in the above embodiment when executing a computer program.

[0198] The protocol conversion device for the transaction provided in this embodiment may include, but is not limited to, a smart phone, a tablet computer, a laptop computer, or a desktop computer.

[0199] Among them, the processor 61 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 61 can be implemented in at least one hardware form of digital signal processing (DSP), field-programmable gate array (FPGA), and programmable logic array (PLA). The processor 61 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 61 may be integrated with a graphics processing unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 61 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.

[0200] The memory 60 may include one or more computer-readable storage media, which may be non-transitory. The memory 60 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 60 is at least used to store the following computer program 601, wherein, after the computer program is loaded and executed by the processor 61, the relevant steps of the protocol conversion method of the transaction disclosed in any of the aforementioned embodiments can be implemented. In addition, the resources stored in the memory 60 may also include an operating system 602 and data 603, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 602 may include Windows, Unix, Linux, etc. Data 603 may include, but is not limited to, transaction messages, retransmission responses, retransmission notifications, etc.

[0201] In some embodiments, the transaction protocol conversion device may also include a display screen 62 , an input / output interface 63 , a communication interface 64 , a power supply 65 , and a communication bus 66 .

[0202] Those skilled in the art will understand that Figure 6 The structure shown in the figure does not constitute a limitation on the transaction protocol conversion device, and may include more or less components than those shown in the figure.

[0203] It is understandable that if the transaction protocol conversion method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention is essentially or the part that contributes to the current technology or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium to execute all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, register, hard disk, removable disk, CD-ROM, magnetic disk or optical disk and other media that can store program codes.

[0204] Based on this, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the protocol conversion method for the above-mentioned transaction are implemented.

[0205] An embodiment of the present invention further provides a computer program product, including a computer program / instruction, which implements the steps of the protocol conversion method of the above transaction when executed by a processor.

[0206] The above is a detailed introduction to a transaction protocol conversion method, device, equipment and computer-readable storage medium provided by an embodiment of the present invention. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description.

[0207] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0208] The above is a detailed introduction to the transaction protocol conversion method, device, equipment and computer-readable storage medium provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A transaction protocol conversion method, characterized in that: Applicable to a transaction protocol conversion component, one end of which is connected to a processor of a first bus protocol and the other end of which is connected to a master node of a second bus protocol, the method comprising: receiving a transaction transmitted by the processor; According to the message format of the second bus protocol, converting the transaction into a transaction message that complies with the second bus protocol; Transmitting the transaction message to the master node; wherein the transaction message carries a retransmission flag; After receiving the retransmission response fed back by the master node, entering the waiting phase; After receiving the retransmission notification fed back by the master node, the transaction message is retransmitted to the master node.

2. The transaction protocol conversion method according to claim 1, characterized in that: After receiving the retransmission notification fed back by the master node, retransmitting the transaction message to the master node includes: After receiving the retransmission notification fed back by the master node, determining whether the transaction identification information carried in the retransmission notification is the same as the transaction identification information carried in the retransmission response; wherein the transaction identification information includes a transaction number and a credit number; In the case where the transaction identification information carried in the retransmission notification is the same as the transaction identification information carried in the retransmission response, a transaction message carrying the transaction identification information is transmitted to the master node, so that after receiving the transaction message, the master node processes the transaction message if the transaction identification information carried in the transaction message is consistent with the transaction identification information carried in the retransmission notification fed back by the master node.

3. The transaction protocol conversion method according to claim 1, characterized in that: After converting the transaction into a transaction message conforming to the second bus protocol, the method further comprises: Saving the transaction message conforming to the second bus protocol into the register; After receiving the retransmission notification fed back by the master node, retransmitting the transaction message to the master node includes: After receiving the retransmission notification fed back by the master node, the transaction message is read from the register, and the transaction message is transmitted to the master node.

4. The transaction protocol conversion method according to claim 3, characterized in that: Also includes: After receiving the response information fed back by the master node, the transaction message is deleted from the register.

5. The transaction protocol conversion method according to claim 1, characterized in that: The transaction includes a read channel transaction; According to the message format of the second bus protocol, converting the transaction into a transaction message conforming to the second bus protocol comprises: Sending the read address, read channel transaction number and read channel transaction type carried in the read channel transaction as a transaction management signal to the transaction management component, so that the transaction management component stores the read address, read channel transaction number and read channel transaction type corresponding to the read channel transaction; Determine, according to the data bit width and bit width number carried in the read channel transaction, a read channel transaction that satisfies the total amount of data transmission of the second bus protocol; The field information corresponding to the read channel transaction that meets the total data transmission amount of the second bus protocol is converted into a transaction message that complies with the second bus protocol; wherein the field information includes the total data transmission amount of the second bus protocol, the read address, the read channel transaction number, the read channel transaction type and the shared domain.

6. The transaction protocol conversion method according to claim 1, characterized in that: The transaction includes a write channel transaction; Receiving a transaction transmitted by the processor includes: receiving a write request signal conforming to a first bus protocol and transmitted by a write request channel; According to the message format of the second bus protocol, converting the transaction into a transaction message conforming to the second bus protocol comprises: Sending the write address, write channel transaction number and write channel transaction type carried in the write request signal as a transaction management signal to the transaction management component, so that the transaction management component stores the write address, write channel transaction number and write channel transaction type corresponding to the write request signal; Determining the total amount of data of the write request signal that satisfies the total amount of data transmission of the second bus protocol according to the data bit width and the number of bit widths carried in the write request signal; receiving write data transmitted by a write data channel and satisfying a total amount of data of the write request signal; Cache the write data to static random access memory; When the write data transmission signal corresponding to the write data channel is pulled high, the number of splits of the write data is determined according to the single data transmission amount of the write data bus and the total amount of data of the write request signal; Reading the write data from the static random access memory, and splitting the write data into a plurality of sub-data according to the split number; According to the message format of the second bus protocol, convert each sub-data into a sub-data message that complies with the second bus protocol; Transmitting the transaction message to the master node includes: Each sub-data message is transmitted to the master node.

7. The transaction protocol conversion method according to claim 6, characterized in that: Determining the number of splits of the write data according to a single data transmission amount of the write data bus and a total amount of data of the write request signal comprises: The total amount of data of the write request signal is divided by the single data transmission amount of the write data bus, and the obtained quotient is used as the number of splits of the write data.

8. A transaction protocol conversion device, characterized in that: Applicable to a transaction protocol conversion component, one end of the transaction protocol conversion component is connected to a processor of a first bus protocol, and the other end is connected to a master node of a second bus protocol, the device comprising a receiving unit, a conversion unit, a transmission unit, a waiting unit and a retransmission unit; The receiving unit is used to receive the transaction transmitted by the processor; The conversion unit is used to convert the transaction into a transaction message that complies with the second bus protocol according to the message format of the second bus protocol; The transmission unit is used to transmit the transaction message to the master node; wherein the transaction message carries a retransmission flag; The waiting unit is used to enter a waiting phase after receiving a retransmission response fed back by the master node; The retransmission unit is used to retransmit the transaction message to the master node after receiving the retransmission notification fed back by the master node.

9. A transaction protocol conversion device, characterized in that: include: Memory for storing computer programs; A processor, configured to execute the computer program to implement the steps of the transaction protocol conversion method as claimed in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the protocol conversion method for a transaction as claimed in any one of claims 1 to 7 are implemented.

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