Method for manufacturing multilayer ceramic capacitor
By using a second material layer with excellent oxidation resistance in the laminated ceramic capacitor, the demand for external electrodes is reduced, and the problem of the inability to increase the electrostatic capacitance in the prior art is solved, and a larger electrostatic capacitance and higher reliability are achieved .
Patent Information
- Application Number
- CN202380042722.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-07-04
- Filing Date
- 2023-06-30
- Publication Date
- 2025-01-03
AI Technical Summary
The existing stacked capacitors cannot increase the capacitance after the size is determined, and the number of internal electrode stacking is limited by the thickness of the external electrode, so the capacitance cannot be effectively increased.
By forming a second material layer with excellent oxidation resistance inside the capacitor body, including materials such as Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au, the demand for external electrodes is reduced, thereby increasing the need for the above electrodes. The number of stacking and capacitance of the internal electrodes.
It is possible to increase the capacitor body size and electrostatic capacitance without external electrodes, improve the number of electrode stacking, and improve the reliability of the capacitor and connection reliability.
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Figure CN119256380A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a method for manufacturing a laminated ceramic capacitor. Background Art
[0002] There is known a type of multilayer capacitor that reduces ESL (equivalent series inductance) by making the path through which current flows thicker, shortening the path through which current flows, canceling out magnetic fields generated by currents of different polarities, etc. Patent document 1 (Japanese Patent Publication No. 2006-135333) discloses an example of a multilayer capacitor that reduces ESL.
[0003] The multilayer capacitor disclosed in Patent Document 1 includes a capacitor body having a plurality of dielectric layers, a plurality of first internal electrodes, and a plurality of second internal electrodes stacked thereon. The capacitor body is provided with a plurality of first via-hole conductors electrically connected to the plurality of first internal electrodes and extending to one main surface of the capacitor body, and a plurality of second via-hole conductors electrically connected to the plurality of second internal electrodes and extending to one main surface of the capacitor body. A plurality of first external electrodes electrically connected to the plurality of first via-hole conductors, respectively, and a plurality of second external electrodes electrically connected to the plurality of second via-hole conductors, respectively, are provided on one main surface of the capacitor body.
[0004] Prior Art Literature
[0005] Patent Literature
[0006] Patent Document 1: Japanese Patent Application Publication No. 2006-135333 Summary of the invention
[0007] Problem that the invention aims to solve
[0008] The multilayer capacitor disclosed in Patent Document 1 is manufactured by forming a first external electrode and a second external electrode on the surface of the capacitor body after manufacturing the capacitor body. Therefore, when the size of the multilayer capacitor is determined, the thickness of the capacitor body needs to be reduced by the thickness of the external electrodes. Therefore, the number of stacked internal electrodes is limited, and the electrostatic capacitance cannot be increased.
[0009] The present disclosure is made to solve the above-mentioned problems, and an object of the present disclosure is to provide a method for manufacturing a multilayer ceramic capacitor having a large electrostatic capacitance.
[0010] Technical solutions to solve problems
[0011] In the manufacturing method of the laminated ceramic capacitor disclosed in the present invention, the laminated ceramic capacitor includes a capacitor body in which a plurality of dielectric layers, a plurality of first internal electrodes and a plurality of second internal electrodes are laminated, a first via-hole conductor provided inside the capacitor body and electrically connected to the plurality of first internal electrodes, and a second via-hole conductor provided inside the capacitor body and electrically connected to the plurality of second internal electrodes, characterized in that:
[0012] In order to form the first via conductor and the second via conductor, the manufacturing method of the multilayer ceramic capacitor includes the following steps: forming a first material layer including a first material; and forming a second material layer located at an end of at least one of the first via conductor and the second via conductor and including a second material, the second material being a material different from the first material and including any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au as a main component.
[0013] Effects of the Invention
[0014] According to the manufacturing method of the stacked ceramic capacitor disclosed in the present invention, a first material layer and a second material layer are formed to form a first via-hole conductor and a second via-hole conductor provided inside the capacitor body, the second material layer is located at the end of at least one of the first via-hole conductor and the second via-hole conductor and includes a second material, the second material including any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au as a main component. The second material has excellent oxidation resistance, so oxidation can be suppressed even when the surface is exposed, and it can be connected to external electrodes with higher reliability. Therefore, there is no need to separately provide external electrodes electrically connected to the first via-hole conductor and the second via-hole conductor, respectively, so the size of the capacitor body can be increased. As a result, the number of stacked sheets of the first internal electrode and the second internal electrode can be increased, so the electrostatic capacitance can be increased. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 1 is a plan view of a multilayer ceramic capacitor manufactured by the method for manufacturing a multilayer ceramic capacitor disclosed in the present invention.
[0016] Figure 2 It is along Figure 1 FIG. 1 is a cross-sectional view of the multilayer ceramic capacitor taken along line II-II shown in FIG.
[0017] Figure 3 It is a cross-sectional view schematically showing a multilayer ceramic capacitor in which the second material layer is not exposed on the main surface of the capacitor body.
[0018] Figure 41 is a cross-sectional view schematically showing a multilayer ceramic capacitor in which a second material layer protrudes outward from a main surface of a capacitor body.
[0019] Figure 5 This is a flowchart for explaining the method for manufacturing the multilayer ceramic capacitor in the first embodiment of the present disclosure.
[0020] Figure 6 This is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor in accordance with a second embodiment of the present disclosure.
[0021] Figure 7 : is a cross-sectional view schematically showing a state where the capacitor body and the first via conductor are formed.
[0022] Figure 8 This is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor in a third embodiment of the present disclosure.
[0023] Fig. 9 This is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor in a fourth embodiment of the present disclosure.
[0024] Fig.10 This is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor in accordance with a fifth embodiment of the present disclosure.
[0025] Fig.11 It is a cross-sectional view schematically showing a state in which a portion of the surface of the capacitor body other than the position where the second material layer is to be formed is covered by a mask.
[0026] Fig.12 This is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor in a sixth embodiment of the present disclosure. DETAILED DESCRIPTION
[0027] Embodiments of the present disclosure are shown below, and features of the present disclosure are described in detail.
[0028] First, after describing an example of the structure of a multilayer ceramic capacitor manufactured by the method for manufacturing a multilayer ceramic capacitor of the present disclosure, the method for manufacturing a multilayer ceramic capacitor will be described.
[0029] (Multilayer Ceramic Capacitors)
[0030] Figure 1 1 is a plan view of a multilayer ceramic capacitor 100 manufactured by the method for manufacturing a multilayer ceramic capacitor of the present disclosure. Figure 2 It is along Figure 1 FIG. 1 is a cross-sectional view of the multilayer ceramic capacitor 100 taken along line II-II.
[0031] The multilayer ceramic capacitor 100 includes a capacitor body 1 , a first via-hole conductor 5 , and a second via-hole conductor 6 .
[0032] The capacitor body 1 has a structure in which a plurality of dielectric layers 2, a plurality of first internal electrodes 3, and a plurality of second internal electrodes 4 are stacked. More specifically, the capacitor body 1 has a structure in which a plurality of first internal electrodes 3 and a plurality of second internal electrodes 4 are alternately stacked with dielectric layers 2 interposed therebetween.
[0033] The material of the dielectric layer 2 is arbitrary, for example, including ceramic materials with BaTiO3, CaTiO3, SrTiO3, SrZrO3, or CaZrO3 as the main component. Mn compounds, Fe compounds, Cr compounds, Co compounds, Ni compounds, etc., which have a smaller content than the main component, may be added to these main components.
[0034] The shape of the capacitor body 1 is arbitrary. In the present embodiment, the capacitor body 1 has an overall rectangular parallelepiped shape. The overall rectangular parallelepiped shape is not a complete rectangular parallelepiped shape, such as a shape in which the corners or edges of the rectangular parallelepiped are rounded, but has six surfaces and can be regarded as a rectangular parallelepiped as a whole.
[0035] The size of the capacitor body 1 is arbitrary, but for example, the longitudinal size of the rectangle in plan view can be set to 0.3 mm or more and 3.0 mm or less, the lateral size can be set to 0.3 mm or more and 3.0 mm or less, and the size in the stacking direction T (hereinafter simply referred to as the stacking direction T) of the dielectric layer 2, the first internal electrode 3, and the second internal electrode 4 can be set to 50 μm or more and 200 μm or less. The size of the capacitor body 1 in the stacking direction T refers to the thickness of the capacitor body 1.
[0036] The material of the first internal electrode 3 and the second internal electrode 4 is arbitrary, and contains, for example, a metal such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn or Au, or an alloy containing these metals as a main component. The first internal electrode 3 and the second internal electrode 4 may contain, as a common material, a ceramic material which is the same as the dielectric ceramic contained in the dielectric layer 2. In this case, the proportion of the common material contained in the first internal electrode 3 and the second internal electrode 4 is, for example, 20 vol% or less.
[0037] The thickness of the first internal electrode 3 and the second internal electrode 4 is arbitrary, but can be, for example, 0.3 μm to 1.0 μm. The number of layers of the first internal electrode 3 and the second internal electrode 4 is arbitrary, but can be, for example, 10 to 150 layers in total.
[0038] The first inner electrode 3 has a plurality of first through holes 3a through which a plurality of second via-hole conductors 6 described below pass. The second inner electrode 4 has a plurality of second through holes 4a through which a plurality of first via-hole conductors 5 described below pass.
[0039] The multilayer ceramic capacitor 100 forms an electrostatic capacitance by the first internal electrode 3 and the second internal electrode 4 facing each other with the dielectric layer 2 interposed therebetween.
[0040] like Figure 2 As shown, the first via-hole conductor 5 is provided inside the capacitor body 1 and is electrically connected to the plurality of first internal electrodes 3. The first via-hole conductor 5 passes through a second through hole 4a formed in the second internal electrode 4 and is insulated from the second internal electrode 4.
[0041] like Figure 2 As shown, the second via-hole conductor 6 is provided inside the capacitor body 1 and is electrically connected to the plurality of second internal electrodes 4. The second via-hole conductor 6 passes through the first through-hole 3a formed in the first internal electrode 3 and is insulated from the first internal electrode 3.
[0042] The first via-hole conductor 5 and the second via-hole conductor 6 include a first material layer 11 and a second material layer 12, respectively. The first material layer 11 includes a first material, and the second material layer 12 includes a second material. The second material is a material different from the first material, and includes any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au as a main component. The main component refers to the component that is the largest in terms of mass. The second material layer 12 is provided at the end of the first via-hole conductor 5 and the second via-hole conductor 6 in the stacking direction T, and is an open end of at least one of the surfaces that is not covered. Figure 2 In the example shown, the second material layer 12 is provided on the first main surface 1 a side of the capacitor body 1 .
[0043] The first via-hole conductor 5 and the second via-hole conductor 6 are provided inside the capacitor body 1 so as to extend in the stacking direction T. Figure 2 In the example shown, the first via-hole conductor 5 and the second via-hole conductor 6 are respectively exposed on the first main surface 1a of the capacitor body 1, but are not exposed on the second main surface 1b. More specifically, the second material layer 12 of the first via-hole conductor 5 and the second via-hole conductor 6 is exposed on the first main surface 1a of the capacitor body 1, but the first material layer 11 is not exposed on the second main surface 1b.
[0044] like Figure 2As shown, the first main surface 1a and the second main surface 1b of the capacitor body 1 do not have an external electrode electrically connected to the first via-hole conductor 5 and including a material different from that of the first via-hole conductor 5, and an external electrode electrically connected to the second via-hole conductor 6 and including a material different from that of the second via-hole conductor 6. Therefore, in the stacking direction T, the size of the multilayer ceramic capacitor 100 is the same as that of the capacitor body 1. It should be noted that the size of the multilayer ceramic capacitor 100 in the stacking direction T refers to the distance between the outermost portion located on the first main surface 1a side and the outermost portion located on the second main surface 1b side in the stacking direction T among the components of the multilayer ceramic capacitor 100.
[0045] The first material includes, for example, Ni as a main component. As described above, the second material includes any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au as a main component. Among them, Sn-Ag is an alloy of Sn and Ag, Sn-Bi is an alloy of Sn and Bi, Sn-In is an alloy of Sn and In, and Sn-Ag-Cu is an alloy of Sn, Ag and Cu. The above-mentioned Ni is an easily oxidized metal, but Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au are metals with excellent oxidation resistance. Therefore, by providing a second material layer 12 including any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au as a main component at the open end of at least one of the first via conductor 5 and the second via conductor 6, oxidation can be suppressed even when the surface of the second material layer 12 is exposed, and it can be connected to an external electrode with high reliability. For example, when the multilayer ceramic capacitor 100 is mounted on a land on a mounting substrate, the second material layer 12 of the first via-hole conductor 5 and the second via-hole conductor 6 is connected to the land via solder or the like.
[0046] However, the main component of the first material is not limited to Ni, and may be a metal such as Cu, Ag, Pd, Pt, Fe, Ti, Cr, or Au, or an alloy including these metals, etc. That is, the first material may also include at least one of Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, and Au as a main component.
[0047] Therefore, it is not necessary to separately provide external electrodes on the surface of the capacitor body 1 that are electrically connected to the first via-hole conductor 5 and the second via-hole conductor 6 and that are made of a material different from that of the first via-hole conductor 5 and the second via-hole conductor 6, so that the size of the capacitor body 1 in the stacking direction T can be increased compared to a conventional multilayer ceramic capacitor having external electrodes. As a result, the number of stacked first internal electrodes 3 and second internal electrodes 4 can be increased, and thus the electrostatic capacitance can be increased.
[0048] The first via-hole conductor 5 and the second via-hole conductor 6 can be provided at any position. Figure 1 As shown in FIG. 1 , the plurality of first via-hole conductors 5 and the plurality of second via-hole conductors 6 are provided in a matrix. The number of the first via-hole conductors 5 and the number of the second via-hole conductors 6 can be any number.
[0049] The shapes of the first via-hole conductor 5 and the second via-hole conductor 6 are arbitrary, for example, they can be cylindrical. In this case, the diameters of the first via-hole conductor 5 and the second via-hole conductor 6 are, for example, about 30 μm or more and 150 μm or less. In addition, the distance between the adjacent first via-hole conductor 5 and the second via-hole conductor 6, more specifically, the distance L1 between the center of the first via-hole conductor 5 and the center of the second via-hole conductor 6 (see Figure 2 ) is, for example, about 50 μm or more and 500 μm or less.
[0050] It should be noted that the second material layer 12 may also be Figure 3 As shown, it is not exposed on the first main surface 1a of the capacitor body 1. Even with such a structure, it is possible to connect to an external electrode or the like using a bonding material such as solder.
[0051] In addition, the second material layer 12 may also be Figure 4 As shown in FIG. 1 , the first main surface 1a of the capacitor body 1 protrudes outward in the stacking direction T. However, even in this case, the size of the portion of the second material layer 12 that protrudes outward in the stacking direction T compared to the first main surface 1a is preferably 5 μm or less. By setting the size of the portion of the second material layer 12 that protrudes outward in the stacking direction T compared to the first main surface 1a to 5 μm or less, when the size of the multilayer ceramic capacitor 100 is determined, the size of the capacitor body 1 in the stacking direction T can be increased, and the electrostatic capacitance can be increased.
[0052] The first material layer 11 may be exposed on the second main surface 1b of the capacitor body 1. In addition, the second material layer 12 may be provided not only on the first main surface 1a side of the capacitor body 1 but also on the second main surface 1b side.
[0053] (Method for manufacturing multilayer ceramic capacitor)
[0054] The manufacturing method of the laminated ceramic capacitor disclosed in the present invention is a manufacturing method of the laminated ceramic capacitor 100 including a capacitor body 1 in which a plurality of dielectric layers 2, a plurality of first internal electrodes 3, and a plurality of second internal electrodes 4 are stacked, a first via-hole conductor 5 provided inside the capacitor body 1 and electrically connected to the plurality of first internal electrodes 3, and a second via-hole conductor 6 provided inside the capacitor body 1 and electrically connected to the plurality of second internal electrodes 4. The manufacturing method of the laminated ceramic capacitor includes the following steps to form the first via-hole conductor 5 and the second via-hole conductor 6: forming a first material layer 11 including a first material; and forming a second material layer 12 located at an end of at least one of the first via-hole conductor 5 and the second via-hole conductor 6, the second material layer 12 including a second material that is different from the first material and includes any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu, and Au as a main component.
[0055] According to the manufacturing method of the laminated ceramic capacitor disclosed in the present invention, a laminated ceramic capacitor 100 with a large electrostatic capacitance can be manufactured. That is, since the second material constituting the second material layer 12 has excellent oxidation resistance, oxidation can be suppressed even in a state where the surface is exposed, and it can be connected to an external electrode or the like with high reliability. Therefore, there is no need to separately provide external electrodes electrically connected to the first via-hole conductor 5 and the second via-hole conductor 6, respectively, so that when the size of the laminated ceramic capacitor 100 is determined, the size of the capacitor body 1 can be increased. As a result, the number of stacked sheets of the first internal electrode 3 and the second internal electrode 4 can be increased, so the electrostatic capacitance can be increased.
[0056] <First embodiment>
[0057] Figure 5 This is a flowchart for explaining the method for manufacturing the multilayer ceramic capacitor in the first embodiment of the present disclosure.
[0058] exist Figure 5 In step S1, a plurality of ceramic green sheets having internal electrode patterns formed thereon are stacked to produce a laminate. The ceramic green sheets may be known ceramic green sheets, and may be obtained, for example, by applying a ceramic slurry including ceramic powder, a resin component, and a solvent onto a substrate and drying the slurry.
[0059] The internal electrode pattern can be formed by applying the conductive paste for the internal electrode to the ceramic green sheet by printing or the like. The internal electrode pattern can also be formed so that a plurality of laminated ceramic capacitors 100 can be manufactured at one time. In this case, the laminated body produced by laminating a plurality of ceramic green sheets on which the internal electrode pattern is formed is the mother laminated body.
[0060] The conductive paste for internal electrodes is a conductive paste for forming the first internal electrodes 3 and the second internal electrodes 4, and a known conductive paste can be used. The conductive paste for internal electrodes includes, for example, particles and a solvent, and the particles include a metal such as Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or a precursor thereof. The conductive paste for internal electrodes may also include a dispersant or a resin component that serves as a binder.
[0061] It should be noted that the produced laminated body is preferably pressed by a method such as rigid body pressing or static pressure pressing.
[0062] In step S2 following step S1, holes for forming the first via-hole conductor 5 and the second via-hole conductor 6 are formed in the laminate. The holes can be formed by any method, for example, by irradiating a laser beam. Figure 2 In the case of the multilayer ceramic capacitor 100 shown, the formed hole is a non-through hole. In this case, the non-through hole can be formed by adjusting the depth of the formed hole, or after forming the through hole, the ceramic green sheet can be attached to one end side of the stacking direction T of the stacked body. It should be noted that the formed hole can also be a through hole depending on the shape of the first via conductor 5 and the second via conductor 6 formed.
[0063] In step S3 following step S2, a via conductor conductive paste including a first material and a second material having a lower melting point than the first material is filled in the formed hole. The first material includes, for example, Ni as a main component. As described above, the second material includes any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au as a main component. The amounts of the first material and the second material included in the via conductor conductive paste are adjusted so that the ratio of the first material layer 11 to the second material layer 12 in the formed first via conductor 5 and the second via conductor 6 becomes Figure 2 In addition to the solvent, the conductive paste for via-hole conductor may contain a dispersant, a resin component serving as a binder, and the like.
[0064] When the mother laminate is produced, the mother laminate in which the via-conductor conductive paste is filled in the holes is cut into pieces of a predetermined size. The mother laminate can be cut by a cutting method such as shearing, scribing, or laser cutting.
[0065] In step S4 following step S3, the laminated body filled with the conductive paste for via-hole conductors is fired to form the first material layer 11 and the second material layer 12 together with the capacitor body 1. That is, the second material with a lower melting point than the first material appears on the surface side by firing, thereby forming Figure 2The via conductors shown are first via conductors 5 and second via conductors 6 including a first material layer 11 and a second material layer 12 located closer to the surface of the capacitor body 1 than the first material layer 11. That is, in this embodiment, the process of step S4 is a process of forming the first material layer 11 and a process of forming the second material layer 12.
[0066] Through the above-described steps, the multilayer ceramic capacitor 100 is manufactured.
[0067] It should be noted that, when the multilayer ceramic capacitor 100 is manufactured by the above method, the first material layer 11 and the second material layer 12 are not Figure 2 The beautiful two layers shown are mainly formed in such a way that Ni exists on the inside and Sn exists on the outside.
[0068] According to the manufacturing method of the multilayer ceramic capacitor in the present embodiment, as described above, the process of separately providing external electrodes electrically connected to the first via-hole conductor 5 and the second via-hole conductor 6 is not included, and the size of the capacitor body 1 can be increased, so that the multilayer ceramic capacitor 100 with large electrostatic capacitance can be manufactured. In addition, by firing the laminated body in which the via-hole conductor conductive paste including the first material and the second material having a lower melting point than the first material is filled in the hole, the first material layer 11 and the second material layer 12 can be formed at one time together with the capacitor body 1, so that the manufacturing process can be simplified compared with the method of separately forming the first material layer 11 and the second material layer 12.
[0069] <Second embodiment>
[0070] In the method for manufacturing the multilayer ceramic capacitor according to the first embodiment, the first material layer 11 and the second material layer 12 are formed simultaneously by firing the unfired multilayer body.
[0071] On the other hand, in the method for manufacturing the multilayer ceramic capacitor according to the second embodiment, the second material layer 12 is formed after the first material layer 11 is formed.
[0072] Figure 6 : is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor according to a second embodiment of the present disclosure. Figure 6 The processing in the flowchart shown is Figure 5 The same processing as in the flowchart shown is denoted by the same reference numerals and detailed description thereof will be omitted.
[0073] exist Figure 6 In step S1, a plurality of ceramic green sheets on which internal electrode patterns are formed are stacked to produce a laminate.
[0074] In step S2 following step S1 , holes for forming the first via-hole conductor 5 and the second via-hole conductor 6 are formed in the laminated body.
[0075] In step S11 following step S2, a conductive paste for via-hole conductors including a first material is filled in the formed hole. The first material includes Ni as a main component, for example. The conductive paste for via-hole conductors may be filled to the surface of the laminate, or may be filled to the inner side of the laminate surface in the stacking direction T. In addition, after the conductive paste for via-hole conductors is filled in the hole, a space for forming the second material layer 12 may be provided by pressing.
[0076] In step S12 following step S11, the laminated body with the via conductor conductive paste filled in the hole is fired. By firing the laminated body, the first material layer 11 is formed together with the capacitor body 1. That is, in this embodiment, the process of step S12 is a process of forming the first material layer 11.
[0077] It should be noted that in any case of filling the conductive paste for via-hole conductors to the position on the surface of the laminate and filling it to the position on the inner side of the surface of the laminate in the stacking direction T, the end of the first material layer 11 formed by firing is located on the inner side of the surface of the capacitor body 1 in the stacking direction T. That is, even when the conductive paste for via-hole conductors is filled to the position on the surface of the laminate, it shrinks by firing, and thus the end of the formed first material layer 11 is located on the inner side of the surface of the capacitor body 1. In order to increase the amount of shrinkage by firing, the content of the resin component included in the conductive paste for via-hole conductors can also be increased to increase the component that disappears during firing.
[0078] In step S13 following step S12, the second material layer 12 is formed at the end of the first material layer 11. In the present embodiment, the second material layer 12 is formed by placing the second material at the end of the first material layer 11 and heating it. As described above, since the end of the first material layer 11 formed by firing is located inward of the surface of the capacitor body 1, a concave portion 20 (see FIG. 2 ) that is recessed inward from the surface of the capacitor body 1 is formed at the position where the first material layer 11 is formed. Figure 7 ). By placing the second material in the recessed portion 20 and heating and melting it, the second material layer 12 connected to the first material layer 11 is formed.
[0079] Through the above-described steps, the multilayer ceramic capacitor 100 is manufactured.
[0080] According to the manufacturing method of the multilayer ceramic capacitor in the second embodiment, the first material layer 11 is formed together with the capacitor body 1 by filling the conductive paste for via-hole conductors including the first material into the holes of the multilayer body and firing, and then the second material layer 12 is formed at the end of the first material layer 11, so that the second material layer 12 can be formed more reliably after the first material layer 11 is formed. In addition, by arranging the second material at the end of the first material layer 11 and heating it to form the second material layer 12, it is possible to form the second material layer 12 that is firmly connected to the first material layer 11.
[0081] <Third Embodiment>
[0082] In the method for manufacturing a laminated ceramic capacitor in the third embodiment, similarly to the method for manufacturing a laminated ceramic capacitor in the second embodiment, after forming the first material layer 11, the second material layer 12 is formed. The method for manufacturing a laminated ceramic capacitor in the third embodiment differs from the method for manufacturing a laminated ceramic capacitor in the second embodiment in the step of forming the second material layer 12.
[0083] Figure 8 : is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor in accordance with a third embodiment of the present disclosure. Figure 8 The processing in the flowchart shown is Figure 6 The same processing as in the flowchart shown is denoted by the same reference numerals and detailed description thereof will be omitted.
[0084] Figure 8 The steps S1 to S12 of the flowchart shown in FIG. Figure 6 The processes of step S1 to step S12 of the flowchart shown are the same. In step S21 following step S12, the second material layer 12 is formed at the end of the first material layer 11. In this embodiment, the paste including the second material is atomized and blown to the surface of the capacitor body 1, and the paste attached to the end of the first material layer 11 is heated, thereby forming the second material layer 12.
[0085] The paste including the second material is, for example, a paste including Sn. For example, by applying voltage to a spray gun or the like, the paste including the second material can be atomized and then blown. When the paste including the second material is atomized and then blown to the capacitor body 1, the charged paste particles adhere to the end of the first material layer 11 due to static electricity. Thereafter, the paste attached to the end of the first material layer 11 is heated and melted to form the second material layer 12 connected to the first material layer 11.
[0086] The method for manufacturing a multilayer ceramic capacitor in the third embodiment is similar to the method for manufacturing a multilayer ceramic capacitor in the second embodiment, and can more reliably form the second material layer 12 after forming the first material layer 11. In addition, the second material layer 12 is formed by atomizing the paste including the second material and blowing it onto the surface of the capacitor body 1, and heating the paste attached to the end of the first material layer 11, so that the second material layer 12 can be firmly connected to the first material layer 11.
[0087] <Fourth embodiment>
[0088] The manufacturing method of the multilayer ceramic capacitor in the fourth embodiment is similar to the manufacturing method of the multilayer ceramic capacitor in the second embodiment, and the second material layer 12 is formed after the first material layer 11 is formed. The manufacturing method of the multilayer ceramic capacitor in the fourth embodiment is different from the manufacturing method of the multilayer ceramic capacitor in the second embodiment in the process of forming the second material layer 12.
[0089] Fig. 9 : is a flowchart for explaining a method for manufacturing a multilayer ceramic capacitor in accordance with a fourth embodiment of the present disclosure. Fig. 9 The processing in the flowchart shown is Figure 6 The same processing as in the flowchart shown is denoted by the same reference numerals and detailed description thereof will be omitted.
[0090] Fig. 9 The steps S1 to S12 of the flowchart shown in FIG. Figure 6 The steps from step S1 to step S12 of the flowchart shown are the same. In step S31 following step S12, the second material layer 12 is formed at the end of the first material layer 11. In this embodiment, the capacitor body 1 is immersed in a molten tank in which the second material is melted, so that the second material adheres to the end of the first material layer 11 to form the second material layer 12.
[0091] Specifically, a melting tank in which the second material is melted is prepared, and capacitor body 1 is immersed in the melting tank. Thus, the melted second material adheres only to the end of first material layer 11 as a conductor. Thereafter, second material layer 12 connected to first material layer 11 is formed by cooling.
[0092] The manufacturing method of the multilayer ceramic capacitor in the fourth embodiment is also similar to the manufacturing method of the multilayer ceramic capacitor in the second embodiment, and can more reliably form the second material layer 12 after forming the first material layer 11. In addition, by immersing the capacitor body 1 in a molten tank in which the second material is melted, the second material can be attached to the end of the first material layer 11 to form the second material layer 12, so that a strong second material layer 12 connected to the first material layer 11 can be formed.
[0093] <Fifth embodiment>
[0094] The manufacturing method of the multilayer ceramic capacitor in the fifth embodiment is similar to the manufacturing method of the multilayer ceramic capacitor in the second embodiment, and the second material layer 12 is formed after the first material layer 11 is formed. The manufacturing method of the multilayer ceramic capacitor in the fifth embodiment is different from the manufacturing method of the multilayer ceramic capacitor in the second embodiment in the process of forming the second material layer 12.
[0095] Fig.10 The steps S1 to S12 of the flowchart shown in FIG. Figure 6 The steps S1 to S12 of the flowchart shown are the same. In step S41 following step S12, the second material layer 12 is formed at the end of the first material layer 11. In this embodiment, the second material layer 12 is formed by attaching the second material to the end of the first material layer 11 by evaporation.
[0096] For example, Fig.11 As shown in FIG. 1 , a mask 30 is used to cover a portion of the surface of the capacitor body 1 except for the position where the second material layer 12 is to be formed. Fig.11 In the example shown, the second main surface 1b of the capacitor body 1 is a surface in contact with the mounting table on which the capacitor body 1 is mounted, and therefore is not covered by the mask 30, but may be covered by the mask 30. Next, the second material is evaporated in a vacuum furnace and attached to the end of the first material layer 11 not covered by the mask 30, thereby forming the second material layer 12. Then, the mask 30 is removed.
[0097] The manufacturing method of the multilayer ceramic capacitor in the fifth embodiment is similar to the manufacturing method of the multilayer ceramic capacitor in the second embodiment, and can more reliably form the second material layer 12 after forming the first material layer 11. In addition, since the second material layer 12 is formed by attaching the second material to the end of the first material layer 11 by evaporation, the second material layer 12 having a uniform size in the stacking direction T can be formed.
[0098] <Sixth embodiment>
[0099] The manufacturing method of the laminated ceramic capacitor in the sixth embodiment is similar to the manufacturing method of the laminated ceramic capacitor in the second embodiment, and the second material layer 12 is formed after the first material layer 11 is formed. The manufacturing method of the laminated ceramic capacitor in the sixth embodiment is different from the manufacturing method of the laminated ceramic capacitor in the second embodiment in the process of forming the second material layer 12.
[0100] Fig.12The steps S1 to S12 of the flowchart shown in FIG. Figure 6 The steps from step S1 to step S12 of the flowchart shown in FIG. 1 are the same. In step S51 following step S12, the second material layer 12 is formed at the end of the first material layer 11. In the present embodiment, the second material layer 12 is formed by performing an electroless plating process. That is, the capacitor body 1 is immersed in a plating solution in which the second material is dissolved, so that the second material is precipitated at the end of the first material layer 11, thereby forming the second material layer 12.
[0101] The method for manufacturing a multilayer ceramic capacitor in the sixth embodiment is also similar to the method for manufacturing a multilayer ceramic capacitor in the second embodiment, and can more reliably form the second material layer 12 after forming the first material layer 11. In addition, since the second material layer 12 is formed by performing an electroless plating process, the second material layer 12 can be easily formed simply by immersing the capacitor body 1 in a plating solution in which the second material is dissolved.
[0102] The present disclosure is not limited to the above-mentioned embodiments, and various applications and modifications can be made within the scope of the present disclosure. For example, the method of forming the second material layer 12 at the end of the first material layer 11 is not limited to the method described in the above-mentioned second to sixth embodiments, and can also be formed by other methods.
[0103] According to the method for manufacturing the multilayer ceramic capacitor of the first embodiment, after forming the first material layer 11 and the second material layer 12 together with the capacitor body 1 , the step of forming the second material layer 12 of the second to sixth embodiments may be further performed.
[0104] The method for manufacturing the multilayer ceramic capacitor in the present application is as follows.
[0105] <1>
[0106] A method for manufacturing a laminated ceramic capacitor, the laminated ceramic capacitor comprising a capacitor body in which a plurality of dielectric layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are laminated, a first via-hole conductor provided inside the capacitor body and electrically connected to the plurality of first internal electrodes, and a second via-hole conductor provided inside the capacitor body and electrically connected to the plurality of second internal electrodes, wherein:
[0107] In order to form the first via-hole conductor and the second via-hole conductor, the method for manufacturing the multilayer ceramic capacitor includes the following steps:
[0108] forming a first material layer including a first material; and
[0109] A second material layer is formed at an end of at least one of the first via conductor and the second via conductor and includes a second material that is different from the first material and includes any one of Sn, Sn-Ag, Sn-Ag-Cu and Au as a main component.
[0110] <2>
[0111] In the method for manufacturing a multilayer ceramic capacitor described in <1>,
[0112] Including the following processes:
[0113] A laminate is produced by laminating a plurality of ceramic green sheets on which internal electrode patterns are formed;
[0114] forming holes for forming the first via-hole conductor and the second via-hole conductor in the laminate; and
[0115] filling the hole with a conductive paste containing the first material and the second material having a lower melting point than the first material;
[0116] In the step of forming the first material layer and the step of forming the second material layer, the first material layer and the second material layer are formed together with the capacitor body by firing the laminated body in which the holes are filled with the conductive paste for via-hole conductors.
[0117] <3>
[0118] In the method for manufacturing a multilayer ceramic capacitor described in <1>,
[0119] Including the following processes:
[0120] A laminate is produced by laminating a plurality of ceramic green sheets on which internal electrode patterns are formed;
[0121] forming holes for forming the first via-hole conductor and the second via-hole conductor in the laminate; and
[0122] Filling the via-conductor made of the first material into the hole with a conductive paste,
[0123] In the step of forming the first material layer, the first material layer is formed together with the capacitor body by firing the laminated body in which the holes are filled with the conductive paste for via-hole conductors.
[0124] In the step of forming the second material layer, the second material layer is formed at an end portion of the first material layer.
[0125] <4>
[0126] In the method for producing a multilayer ceramic capacitor according to any one of <1> to <3>,
[0127] In the step of forming the second material layer, the second material layer is formed by placing the second material and heating it.
[0128] <5>
[0129] In the method for producing a multilayer ceramic capacitor according to any one of <1> to <3>,
[0130] In the step of forming the second material layer, a paste including the second material is atomized and sprayed onto the surface of the capacitor body, and the attached paste is heated, thereby forming the second material layer.
[0131] <6>
[0132] In the method for producing a multilayer ceramic capacitor according to any one of <1> to <3>,
[0133] In the step of forming the second material layer, the capacitor body is immersed in a molten layer in which the second material is melted, so that the second material adheres to form the second material layer.
[0134] <7>
[0135] In the method for producing a multilayer ceramic capacitor according to any one of <1> to <3>,
[0136] In the step of forming the second material layer, the second material layer is formed by depositing the second material by vapor deposition.
[0137] <8>
[0138] In the method for producing a multilayer ceramic capacitor according to any one of <1> to <3>,
[0139] In the step of forming the second material layer, the second material layer is formed by performing an electroless plating process.
[0140] <9>
[0141] In the method for producing a multilayer ceramic capacitor according to any one of <1> to <8>,
[0142] The first material includes at least one of Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr and Au as a main component.
[0143] The embodiments disclosed this time are illustrative in all aspects and should not be considered restrictive. The scope of the present disclosure is indicated by the claims rather than the above description, and is intended to include all modifications within the meaning and scope equivalent to the claims.
[0144] Description of Reference Numerals
[0145] 1 Capacitor body;
[0146] 2 Dielectric layer;
[0147] 3 first internal electrode;
[0148] 4 second inner electrode;
[0149] 5 first via conductor;
[0150] 6 second via conductor;
[0151] 11 first material layer;
[0152] 12 second material layer;
[0153] 20 concavity;
[0154] 30 Mask;
[0155] 100 multilayer ceramic capacitors.
Claims
1. A method for manufacturing a multilayer ceramic capacitor, the multilayer ceramic capacitor comprising a capacitor body in which a plurality of dielectric layers, a plurality of first internal electrodes, and a plurality of second internal electrodes are stacked, a first via-hole conductor provided inside the capacitor body and electrically connected to the plurality of first internal electrodes, and a second via-hole conductor provided inside the capacitor body and electrically connected to the plurality of second internal electrodes, wherein: In order to form the first via-hole conductor and the second via-hole conductor, the method for manufacturing the multilayer ceramic capacitor includes the following steps: forming a first material layer including a first material; as well as A second material layer is formed at an end portion of at least one of the first via conductor and the second via conductor and includes a second material, the second material being a material different from the first material and including any one of Sn, Sn-Ag, Sn-Bi, Sn-In, Sn-Ag-Cu and Au as a main component.
2. The method for manufacturing a laminated ceramic capacitor according to claim 1, wherein: The method for manufacturing the laminated ceramic capacitor comprises the following steps: A laminate is produced by laminating a plurality of ceramic green sheets on which internal electrode patterns are formed; forming holes for forming the first via-hole conductor and the second via-hole conductor in the laminate; as well as filling the hole with a conductive paste containing the first material and the second material having a lower melting point than the first material; In the step of forming the first material layer and the step of forming the second material layer, the first material layer and the second material layer are formed together with the capacitor body by firing the laminated body in which the holes are filled with the conductive paste for via-hole conductors.
3. The method for manufacturing a laminated ceramic capacitor according to claim 1, wherein: The method for manufacturing the laminated ceramic capacitor comprises the following steps: A laminate is produced by laminating a plurality of ceramic green sheets on which internal electrode patterns are formed; forming holes for forming the first via-hole conductor and the second via-hole conductor in the laminate; as well as Filling the via-conductor made of the first material into the hole with a conductive paste, In the step of forming the first material layer, the first material layer is formed together with the capacitor body by firing the laminated body in which the holes are filled with the conductive paste for via-hole conductors. In the step of forming the second material layer, the second material layer is formed at an end portion of the first material layer.
4. The method for manufacturing a laminated ceramic capacitor according to any one of claims 1 to 3, wherein: In the step of forming the second material layer, the second material layer is formed by placing the second material and heating it.
5. The method for manufacturing a laminated ceramic capacitor according to any one of claims 1 to 3, wherein: In the step of forming the second material layer, a paste including the second material is atomized and sprayed onto the surface of the capacitor body, and the paste attached to the end of the first material layer is heated, thereby forming the second material layer.
6. The method for manufacturing a laminated ceramic capacitor according to any one of claims 1 to 3, wherein: In the step of forming the second material layer, the capacitor body is immersed in a melting tank in which the second material is melted, so that the second material is attached to form the second material layer.
7. The method for manufacturing a laminated ceramic capacitor according to any one of claims 1 to 3, wherein: In the step of forming the second material layer, the second material layer is formed by depositing the second material by vapor deposition.
8. The method for manufacturing a laminated ceramic capacitor according to any one of claims 1 to 3, wherein: In the step of forming the second material layer, the second material layer is formed by performing an electroless plating process.
9. The method for manufacturing a laminated ceramic capacitor according to any one of claims 1 to 8, wherein: The first material includes at least one of Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr and Au as a main component.
Citation Information
Patent Citations
Laminated capacitor array and its wiring connection structure
JP2006135333A
