Semiconductor chip testing method and device

Abstract

The invention discloses a semiconductor chip testing method and device. The testing method comprises the following steps: determining a to-be-tested chip with a good product identifier in a plurality of to-be-tested chips; overturning the to-be-tested chip for the first time to expose the plastic sealing surface of the to-be-tested chip; determining the state of the to-be-tested chip after the first overturning; under the condition that the to-be-tested chip overturned for the first time has no defect, transferring the to-be-tested chip to a second bearing film; forming an electromagnetic shielding layer on the surfaces of the plastic sealing surfaces of all the to-be-tested chips on the second bearing film; turning over one to-be-tested chip for the second time to expose the first surface of the to-be-tested chip; determining a second state of the to-be-tested chip after the second overturning; under the condition that the to-be-tested chip overturned for the second time has no defect, transferring the to-be-tested chip to a third bearing film; and testing the chip to be tested on the third bearing film. According to the invention, the test precision, the test yield and the test efficiency of the chip can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor chip testing method and device. Background Art

[0002] With the increasing popularity of wireless communication equipment and the iterative upgrade of technology, the number of functional devices inside the equipment has increased significantly. These functional devices will generate electromagnetic waves of a certain spectrum when working, and these electromagnetic waves will radiate other functional devices with the same spectrum, generating electromagnetic interference (EMI). RF module devices must effectively isolate the electromagnetic waves generated when they work to limit their interference with adjacent functional devices and avoid the degradation of the performance of adjacent functional devices.

[0003] Currently, the testing methods of RF modules are mainly divided into three categories: tray test, turret test and substrate test. However, the above processes have problems such as low precision, low efficiency and high quality risks in the testing of tiny-sized electromagnetic shielding modules.

[0004] Specifically, the tray test can be applied to the test of larger electromagnetic shielding modules. When the product size is less than 3mmx3mm, the test accuracy and efficiency will be significantly reduced, and the minimum size only supports product testing above 2x2mm. The test accuracy of the equipment depends on hardware debugging and relies on the test board guide block to limit the offset of the contact point with an accuracy of ±20μm, and the test accuracy is poor.

[0005] The turret test can be applied to the test of tiny electromagnetic shielding modules. However, the bulk materials will rub against the equipment during the import process, which may cause the electromagnetic shielding cover to be damaged and reduce the test yield. The test accuracy of the equipment depends on hardware debugging and the test board guide block to limit the offset of the contact point with an accuracy of ±20μm. The test accuracy is poor.

[0006] Substrate testing can be applied to the testing of tiny modules. Before the test, the camera will accurately position the substrate, with a theoretical accuracy of ±2μm. However, the current process does not support material flipping, and therefore does not support the packaging coating process. It is impossible to add a magnetic control shielding cover to the product, and the product cannot have electromagnetic shielding function, which will lead to a decrease in the test yield. Summary of the invention

[0007] The present invention provides a semiconductor chip testing method and device, which can improve the chip testing accuracy, test yield and test efficiency.

[0008] According to one aspect of the present invention, there is provided a semiconductor chip testing method, comprising:

[0009] Determine a chip to be tested having a good product mark among the multiple chips to be tested; the chip to be tested comprises a first surface and a plastic cover which are arranged opposite to each other; the multiple chips to be tested are located on the first carrier film, and the first surfaces of the multiple chips to be tested are exposed;

[0010] Flip the chip to be tested for the first time so that the plastic cover of the chip to be tested is exposed;

[0011] Determine the state of the chip under test after the first flip;

[0012] If the chip to be tested has no defects after the first flip, the chip to be tested is transferred to the second carrier film; if the chip to be tested has defects after the first flip, the chip to be tested is determined to be a defective product after the first flip;

[0013] After all the non-defective chips to be tested are transferred to the second carrier film, the plastic covers of all the chips to be tested on the second carrier film are placed away from the first surface to form an electromagnetic shielding layer; the electromagnetic shielding layer covers the plastic covers;

[0014] Flipping a chip to be tested having an electromagnetic shielding layer for a second time so that a first surface of the chip to be tested is exposed;

[0015] Determine the state of the chip under test after the second flip;

[0016] If the chip to be tested has no defects after the second flip, the chip to be tested is transferred to the third carrier film; if the chip to be tested has defects after the second flip, the chip to be tested is determined to be a defective product after the second flip;

[0017] After all non-defective chips to be tested are transferred to the third carrier film, the chips to be tested on the third carrier film are tested.

[0018] Optionally, the semiconductor chip testing device includes a conveying mechanism and a detection camera; before determining a chip to be tested having a good product mark among the multiple chips to be tested, the device further includes:

[0019] Cutting the substrate into a plurality of chips to be tested, and recording the identity information of each chip to be tested, wherein the identity information includes a good product mark, a defective product mark, and position information on the substrate;

[0020] Placing multiple chips to be tested in the loading area;

[0021] The plurality of chips to be tested are transferred to the production area by a conveying mechanism.

[0022] Optionally, the semiconductor chip testing device includes a pin table and a sorting machine; flipping the chip to be tested for the first time so that the plastic cover of the chip to be tested is exposed, including:

[0023] Fixing the ejector pin stage to the first carrier film of the chip to be tested;

[0024] Fixing the nozzle in the sorting machine to the first side of the chip to be tested;

[0025] Separating the chip to be tested from the first carrier film by using an ejector pin station;

[0026] The chip to be tested is turned over for the first time by the suction nozzle in the sorting machine, so that the plastic cover of the chip to be tested is exposed.

[0027] Optionally, determining the state of the chip under test after the first flip includes:

[0028] Determine the status of the plastic cover of the chip to be tested;

[0029] If the plastic cover of the chip to be tested has no defects, the position of the chip to be tested is determined; if the chip to be tested has defects, the chip to be tested is determined to be a defective product;

[0030] In the case where the position of the chip to be tested is not offset, determining the state of the side of the chip to be tested; in the case where the position of the chip to be tested is offset, determining that the chip to be tested is a defective product;

[0031] When there is no defect on the side of the chip to be tested, determining the state of the first side of the chip to be tested; when there is a defect on the side of the chip to be tested, determining that the chip to be tested is a defective product;

[0032] When there is no defect on the first side of the chip to be tested, it is determined that the chip to be tested after the first flip is free of defects; when there is a defect on the first side of the chip to be tested, it is determined that the chip to be tested is a defective product.

[0033] Optionally, if the chip to be tested after the first flip is free of defects, the chip to be tested is transferred to the second carrier film; if the chip to be tested after the first flip is defective, after determining that the chip to be tested after the first flip is defective, the method further includes:

[0034] The position information of the chip to be tested on the second carrier film is recorded.

[0035] Optionally, forming an electromagnetic shielding layer on the surface of the plastic cover of all the chips to be tested on the second carrier film away from the first surface includes:

[0036] An electromagnetic shielding layer is formed on the surface of the plastic cover of the chip to be tested on the second carrier film away from the first surface by a coating process.

[0037] Optionally, the semiconductor chip testing device includes a pin table and a sorting machine; flipping a chip to be tested having an electromagnetic shielding layer for a second time so that a first surface of the chip to be tested is exposed, comprising:

[0038] Fixing the ejector pin stage to the second carrier film of the chip to be tested;

[0039] Fix the nozzle in the sorting machine to the electromagnetic shielding layer of the chip to be tested;

[0040] Separating the chip to be tested from the second carrier film by using an ejector pin station;

[0041] The chip to be tested is turned over for a second time by a suction nozzle in the sorting machine, so that the first side of the chip to be tested is exposed.

[0042] Optionally, after the chip to be tested is separated from the second carrier film by the ejector pin station, the method further includes:

[0043] Clean the chip to be tested.

[0044] Optionally, after all the non-defective chips to be tested are transferred to the third carrier film, after the chips to be tested on the third carrier film are tested, the method further includes:

[0045] Record the test data of the chip to be tested on the third carrier film.

[0046] According to another aspect of the present invention, a semiconductor chip testing device is provided, which performs testing using the semiconductor chip testing method described in any embodiment of the present invention.

[0047] Based on the existing substrate test, the embodiment of the present invention adds a step of flipping the chip to be tested after the substrate cutting process, so that the plastic cover of the chip to be tested faces upward, and then the plastic cover is subjected to a coating process so that the electromagnetic shielding layer covers the plastic cover, and the chip to be tested is flipped again after the coating process so that the first side of the chip to be tested faces upward, and then the chip to be tested is tested, so that the chip to be tested in the substrate test has an electromagnetic shielding function, and the test yield of the test chip can be improved by about 38%; and the state of the chip to be tested is detected each time it is flipped, and defective chips to be tested can be screened out and marked as defective products, which can improve the test efficiency of the chip to be tested by about 28%, and the test accuracy can be improved from ±20μm to ±2μm.

[0048] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0050] Figure 1The present invention provides a flow chart of a semiconductor chip testing method.

[0051] Figure 2 It is an intermediate flow chart of a semiconductor chip testing method provided by an embodiment of the present invention.

[0052] Figure 3 It is a schematic diagram of a substrate provided by an embodiment of the present invention.

[0053] Figure 4 yes Figure 1 A detailed flow chart included in S120.

[0054] Figure 5 yes Figure 1 A detailed flow chart included in S130.

[0055] Figure 6 is a schematic diagram of another substrate provided by an embodiment of the present invention.

[0056] Figure 7 yes Figure 1 A detailed flow chart included in S160.

[0057] Figure 8 is a schematic diagram of another substrate provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0058] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0059] It should be noted that the terms "first", "second", etc. in the present invention are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0060] The embodiment of the present invention provides a semiconductor chip testing method. Figure 1is a flowchart of a semiconductor chip testing method provided by an embodiment of the present invention, with reference to Figure 1 , semiconductor chip testing methods include:

[0061] S110, determining a chip to be tested having a good product mark among the multiple chips to be tested; the chip to be tested comprises a first surface and a plastic cover which are arranged opposite to each other; the multiple chips to be tested are located on the first carrier film, and the first surfaces of the multiple chips to be tested are exposed.

[0062] Among them, the size of the chip to be tested can be less than 3mmx3mm, and the first side of the chip to be tested is an I / OPAD side; the semiconductor testing device will download the identity information of the corresponding chip to be tested from the system before the process starts, and the identity information includes a good product mark, a defective product mark and position information; the multiple chips to be tested after cutting are located on the first carrier film, and the first carrier film can be a cutting film; the cutting films of the multiple chips to be tested are in contact with the first carrier film, exposing the first sides of the multiple chips to be tested; the position information of each chip to be tested can be detected by a detection camera, as well as the detection of whether the chip to be tested has a good product mark. The chip to be tested that successfully passes the detection camera is a chip to be tested with a good product mark, and the detection camera is used to determine a chip to be tested with a good product mark among the multiple chips to be tested.

[0063] S120, flipping the chip to be tested for the first time so that the plastic cover of the chip to be tested is exposed.

[0064] Among them, the chip to be tested is a chip to be tested with a good product mark on the first carrier film, and the chip to be tested that successfully passes the detection camera will be sucked by the suction module; the ejector table is fixed to the first carrier film of the chip to be tested; the suction nozzle in the sorting machine is fixed to the first side of the chip to be tested; the chip to be tested is separated from the first carrier film by the ejector table; the chip to be tested is flipped for the first time by the suction nozzle in the sorting machine, so that the chip to be tested is flipped from the first side facing up to the plastic cover facing up, so that the plastic cover of the chip to be tested is exposed.

[0065] S130, determining the state of the chip to be tested after the first flip.

[0066] Among them, the status of the chip to be tested includes whether the chip to be tested is defective or not. After determining that the plastic cover of the chip to be tested is not defective, it is handed over through the conveying nozzle and the flip nozzle in the sorting machine, and the chip to be tested is placed on the conveyor belt through the conveying nozzle; then the position of the chip to be tested is corrected by the direction calibration module, and then the position detection camera is used to check whether the position of the calibrated chip to be tested meets the mounting standard; the chip to be tested that successfully passes the position detection camera will be conveyed to the detection position of the side detection camera to check whether there are defects on the four sides of the chip to be tested; the chip to be tested that successfully passes the side detection camera will continue to be conveyed to the detection position of the back detection camera to check whether there are defects on the first side of the chip to be tested. If the first side is not defective, it is determined that the state of the chip to be tested after the first flip is a defect-free state. If any of the above tests fails to pass successfully, the chip to be tested currently being tested is deemed to be defective.

[0067] S140, if the chip to be tested after the first flip is free of defects, transfer the chip to be tested to the second carrier film; if the chip to be tested after the first flip is defective, determine that the chip to be tested after the first flip is defective.

[0068] Among them, if the chip to be tested has no defects after the first flip, the chip to be tested will be transferred to the pressing module, and the pressing block will press the chip to be tested under the control of the program. The pressing module presses the chip to be tested without defects to the second carrier film, and the second carrier film can be a film used in the coating process; if the chip to be tested has defects after the first flip, the chip to be tested after the first flip is determined to be defective, and the defective product is placed in the defective box, and then the next chip to be tested is tested. After waiting for all the chips to be tested to be pressed, the chip to be tested will enter the unloading area through the conveying area; the chip to be tested that has completed the inspection is placed in the unloading area.

[0069] S150, after all non-defective chips to be tested are transferred to the second carrier film, an electromagnetic shielding layer is formed on the surface of the plastic cover of all chips to be tested on the second carrier film away from the first surface; the electromagnetic shielding layer covers the plastic cover.

[0070] Among them, an electromagnetic shielding layer can be formed on the surface of the plastic cover of all chips to be tested on the second carrier film away from the first surface through a coating process, and an electromagnetic shielding layer can be formed on the surface of the plastic cover of each chip to be tested away from the first surface; the electromagnetic shielding layer can be a metal film; the electromagnetic shielding film can enable each chip to be tested to have an electromagnetic shielding function, and can effectively isolate the electromagnetic waves generated during its own operation, so as to limit interference with adjacent functional devices and avoid performance degradation of adjacent functional devices.

[0071] S160, flipping a chip to be tested having an electromagnetic shielding layer for a second time, so that a first surface of the chip to be tested is exposed.

[0072] The second carrier film and all the chips to be tested on the second carrier film can be placed in the loading area; the second carrier film and the plurality of chips to be tested on the second carrier film can be transported to the production area by a conveying mechanism; the position information of each chip to be tested can be detected by a detection camera, and the chip to be tested that has successfully passed the detection of the detection camera can be fixed to the second carrier film of the chip to be tested by the ejector pin table; the suction nozzle in the sorting machine can be fixed to the electromagnetic shielding layer of the chip to be tested; the chip to be tested can be separated from the second carrier film by the ejector pin table; under the action of the vacuum of the suction nozzle, the chip to be tested separated from the second carrier film can be successfully sucked; and then the chip to be tested in the sorting machine can be separated from the second carrier film by the ejector pin table. The conveying nozzle will calibrate the position of the chip to be tested that is separated from the second carrier film through the direction calibration module, and then the position detection camera will check whether the position of the calibrated material meets the mounting standard; the chip to be tested that successfully passes the position detection camera will be conveyed to the back detection camera to check whether there are defects on the first side of the chip to be tested; the chip to be tested that successfully passes the back detection camera will be conveyed to the side detection camera to check whether there are defects on the four sides of the material; the chip to be tested that successfully passes the side detection camera will be flipped over for a second time by the nozzle in the sorting machine, so that the first side of the chip to be tested is exposed.

[0073] S170, determining the state of the chip to be tested after the second flip.

[0074] The state of the chip to be tested after the second flipping includes that the first side of the chip to be tested has no defects or the first side of the chip to be tested has defects; the state of the chip to be tested is checked by a front detection camera.

[0075] S180, if the chip to be tested after the second flipping has no defects, transfer the chip to be tested to the third carrier film; if the chip to be tested after the second flipping has defects, determine that the chip to be tested after the second flipping is a defective product.

[0076] Among them, if the chip to be tested has no defects after the second flip, the chip to be tested will be transferred to the third carrier film, which can be a film used for testing. The chip to be tested that successfully passes the front detection camera will be mounted on the film used for testing for the test process, and the mounting accuracy can be guaranteed to be <±20μm; if the chip to be tested has defects after the second flip, the chip to be tested after the second flip is determined to be defective, and the defective product is placed in a defective box, and then the next chip to be tested is tested. After waiting for all the chips to be tested to be tested, the chip to be tested will enter the unloading area through the conveying area; the chips to be tested that have completed the test are placed in the unloading area.

[0077] S190, after all the non-defective chips to be tested are transferred to the third carrier film, the chips to be tested on the third carrier film are tested.

[0078] Among them, after all defect-free chips to be tested are transferred to the third carrier film, a placement detection camera is used to detect whether there is an offset in the placement position of the chips to be tested. The chips to be tested that are offset and cannot be tested are marked as defective, and then the chips to be tested on the third carrier film are tested.

[0079] Based on the existing substrate test, the embodiment of the present invention adds a step of flipping the chip to be tested after the substrate cutting process, so that the plastic cover of the chip to be tested faces upward, and then the plastic cover is subjected to a coating process so that the electromagnetic shielding layer covers the plastic cover, and the chip to be tested is flipped again after the coating process so that the first side of the chip to be tested faces upward, and then the chip to be tested is tested, so that the chip to be tested in the substrate test has an electromagnetic shielding function, and the test yield of the test chip can be improved by about 38%; and the state of the chip to be tested is detected each time it is flipped, and defective chips to be tested can be screened out and marked as defective products, which can improve the test efficiency of the chip to be tested by about 28%, and the test accuracy can be improved from ±20μm to ±2μm.

[0080] Optionally, the semiconductor chip testing device includes a conveying mechanism and a detection camera; Figure 2 is an intermediate flow chart of a semiconductor chip testing method provided by an embodiment of the present invention, with reference to Figure 2 S110, before determining a chip to be tested having a good product identification among the multiple chips to be tested, the method further includes:

[0081] S111, cutting the substrate into a plurality of chips to be tested, and recording the identity information of each chip to be tested, wherein the identity information includes a good product mark, a defective product mark, and position information on the substrate.

[0082] Among them, before testing the semiconductor chip, the semiconductor chip needs to be packaged first. The specific process flow of packaging includes: surface mounting, which is used to assemble the semiconductor chip onto the printed circuit board; plastic sealing, which is used to cover the area on the printed circuit board where the semiconductor chip is affixed with resin to protect the chip; laser marking is used to print the product batch, trademark, model and other information on the chip surface; substrate cutting is used to cut the semiconductor chip on the printed circuit board into multiple single chips to be tested. At this time, the position, good product, defective product and other information of each chip to be tested on the substrate will be recorded.

[0083] Figure 3 is a schematic diagram of a substrate provided by an embodiment of the present invention, with reference to Figure 3 , Figure 3The substrate includes multiple chips to be tested, and the identity information of the corresponding chips to be tested will be recorded on the system. The identity information includes a good product mark, a defective product mark, and position information on the substrate. The good product mark indicates that the chip to be tested is a qualified chip to be tested, and the defective product mark indicates that the chip to be tested is an unqualified chip to be tested. The position information on the substrate is the position coordinates on the substrate; so as to achieve traceability of each chip to be tested.

[0084] S112, placing a plurality of chips to be tested in a loading area.

[0085] The first carrier film and a plurality of chips to be tested located on the first carrier film are placed in a loading area.

[0086] S113, transferring multiple chips to be tested to the production area through a conveying mechanism;

[0087] The first carrier film and the plurality of chips to be tested on the first carrier film are transported to the production area by a transport mechanism.

[0088] Optionally, the semiconductor chip testing device includes a pin table and a sorting machine; Figure 4 yes Figure 1 A detailed flow chart included in S120, refer to Figure 4 S120, flipping the chip to be tested for the first time so that the plastic cover of the chip to be tested is exposed, including:

[0089] S121, fixing the ejector pin stage to the first carrier film of the chip to be tested.

[0090] Among them, for the chip to be tested that successfully passes the detection of the detection camera, the ejector table will move to the position of the first carrier film of the chip to be tested, and the ejector table will rise to provide a certain vacuum, which will generate a certain suction force to firmly fix the first carrier film on the position of the ejector table.

[0091] S122, fixing the nozzle in the sorting machine to the first side of the chip to be tested.

[0092] The flip nozzle in the sorting machine will descend to the first side of the chip to be tested and press the chip to be tested, and the flip nozzle in the sorting machine is fixed to the first side of the chip to be tested.

[0093] S123, separating the chip to be tested from the first carrier film by using an ejector pin station.

[0094] The ejector pins inside the ejector pin platform rise, causing the firmly fixed first carrier film to undergo partial deformation, and the chip to be tested will be initially separated from the first carrier film.

[0095] S124, the chip to be tested is turned over for the first time by a suction nozzle in the sorting machine, so that the plastic cover of the chip to be tested is exposed.

[0096] The chip to be tested separated from the first carrier film is successfully sucked under the vacuum of the flip nozzle, and then the chip to be tested is flipped from the first side facing up to the plastic cover facing up, so that the plastic cover of the chip to be tested is exposed.

[0097] Optional, Figure 5 yes Figure 1 A detailed flow chart included in S130, refer to Figure 5 S130, determining the state of the chip to be tested after the first flip, including:

[0098] S131, determining the state of the plastic cover of the chip to be tested.

[0099] The status of the plastic cover includes a defective plastic cover and a non-defective plastic cover; the status of the plastic cover of the chip to be tested can be determined by a front detection camera.

[0100] S132. When the plastic cover of the chip to be tested has no defects, determine the position of the chip to be tested; when the chip to be tested has defects, determine that the chip to be tested is a defective product.

[0101] Among them, if the plastic cover of the chip to be tested has no defects, the conveying nozzle and the flip nozzle in the sorting machine are handed over, and the chip to be tested is placed on the conveyor belt through the conveying nozzle; the position of the chip to be tested is corrected by the direction calibration module, and then the position of the chip to be tested is determined by the position detection camera to check whether the position of the calibrated chip to be tested meets the mounting standard. If the chip to be tested has defects, the chip to be tested is determined to be defective and is placed in a defective box.

[0102] S133. When the position of the chip to be tested is not offset, determine the state of the side surface of the chip to be tested; when the position of the chip to be tested is offset, determine that the chip to be tested is a defective product.

[0103] Among them, the state of the side of the chip to be tested is determined by a side detection camera, and the state of the side includes that the side has defects or the side has no defects; when the position of the chip to be tested is offset, the chip to be tested is determined to be defective, and the chip to be tested determined to be defective is placed in a defective box.

[0104] S134. When there is no defect on the side of the chip to be tested, determine the state of the first side of the chip to be tested; when there is a defect on the side of the chip to be tested, determine that the chip to be tested is a defective product.

[0105] Among them, the state of the first side of the chip to be tested is determined by a back detection camera, and the state of the first side includes that the first side has defects or the first side has no defects; when the side of the chip to be tested has defects, the chip to be tested is determined to be defective, and the chip to be tested determined to be defective is placed in a defective box.

[0106] S135. When there is no defect on the first side of the chip to be tested, determine that the chip to be tested after the first flip is free of defects; when there is a defect on the first side of the chip to be tested, determine that the chip to be tested is a defective product.

[0107] Among them, when there are no defects in the plastic cover, position, side and first side of the chip to be tested, it is determined that the chip to be tested after the first flip is free of defects. If any of the above tests fails successfully, the chip to be tested currently being tested is deemed to be defective.

[0108] Optionally, when the chip to be tested is free of defects after the first flip, the chip to be tested is transferred to the second carrier film; when the chip to be tested is defective after the first flip, after determining that the chip to be tested after the first flip is defective, it also includes: recording the position information of the chip to be tested on the second carrier film.

[0109] in, Figure 6 is a schematic diagram of another substrate provided by an embodiment of the present invention, referring to Figure 6 , Figure 6 This is a schematic diagram of the substrate after flipping 180 degrees. At this time, the position information of the chip to be tested on the second carrier film is recorded, and the newly generated information is transmitted to the next process to achieve traceability of each chip to be tested.

[0110] Optionally, forming an electromagnetic shielding layer on the surface of the plastic cover of all the chips to be tested on the second carrier film away from the first surface includes: forming an electromagnetic shielding layer on the surface of the plastic cover of the chips to be tested on the second carrier film away from the first surface through a coating process.

[0111] Among them, a metal film can be plated on the plastic film as an electromagnetic shielding layer.

[0112] Optionally, the semiconductor chip testing device includes a pin table and a sorting machine; Figure 7 yes Figure 1 A detailed flow chart included in S160, refer to Figure 7 S160, flipping a chip to be tested having an electromagnetic shielding layer for a second time so that a first surface of the chip to be tested is exposed, including:

[0113] S161, fixing the ejector pin stage to the second carrier film of the chip to be tested.

[0114] The ejector pin table will move to a position below the second carrier film, and the ejector pin table will rise to provide a certain vacuum, which will generate a certain suction force to firmly fix the second carrier film on the position of the ejector pin table.

[0115] S162, fixing the suction nozzle in the sorting machine to the electromagnetic shielding layer of the chip to be tested.

[0116] The conveying nozzle in the sorting machine descends to the top of the electromagnetic shielding film and presses the chip to be tested, and the conveying nozzle in the sorting machine is fixed to the electromagnetic shielding layer of the chip to be tested.

[0117] S163, separating the chip to be tested from the second carrier film by using an ejector pin station.

[0118] The ejector pins inside the ejector pin station rise, causing the electromagnetic shielding layer that is firmly fixed to undergo local deformation, and the chip to be tested will be initially separated from the second carrier film.

[0119] S164, flipping the chip to be tested for a second time through the suction nozzle in the sorting machine, so that the first side of the chip to be tested is exposed.

[0120] Among them, after S163, it also includes detecting the position, back and side status of the chip to be tested. After the position, back and side status are all free of defects, the flip nozzle in the sorting machine will be handed over to the conveying nozzle. After the handover is completed, the chip to be tested will be flipped for the second time, so that the chip to be tested is flipped from the previous electromagnetic shielding film facing up to the first side of the chip to be tested facing up.

[0121] Optionally, after the chip to be tested is separated from the second carrier film by the ejector pin station, the method further includes: cleaning the chip to be tested.

[0122] Among them, under the action of the vacuum of the suction nozzle, the chip to be tested separated from the second carrier film is successfully sucked; the chip to be tested is cleaned by the cleaning module to remove defects such as burrs and foreign objects; then the conveying suction nozzle in the sorting machine will use the direction calibration module to correct the position of the material of the chip to be tested separated from the second carrier film, and then the position detection camera will check whether the position of the calibrated material meets the mounting standard; the chip to be tested that successfully passes the position detection camera will be transmitted to the back detection camera to check whether there are defects on the first side of the chip to be tested; the chip to be tested that successfully passes the back detection camera will be transmitted to the side detection camera to check whether there are defects on the four sides of the material; the chip to be tested that successfully passes the side detection camera will be flipped over for a second time by the suction nozzle in the sorting machine, so that the first side of the chip to be tested is exposed.

[0123] Optionally, after all the non-defective chips to be tested are transferred to the third carrier film, after the chips to be tested on the third carrier film are tested, the method further includes: recording test data of the chips to be tested on the third carrier film.

[0124] in, Figure 8 is a schematic diagram of another substrate provided by an embodiment of the present invention, referring to Figure 8 , Figure 8This is a schematic diagram after the substrate is flipped 180 degrees for the second time. After all defect-free chips to be tested are transferred to the third carrier film, the position information of the chips to be tested on the third carrier film is recorded, and the newly generated information is transmitted to the next process to achieve traceability of each chip to be tested; before the chips to be tested are tested, the chips to be tested are baked to remove moisture in the packaging process, and then the chips to be tested are terminally tested according to the identity information of the chips to be tested previously transmitted to the testing process, and the test data of the chips to be tested on the third carrier film is recorded and bound with the previous identity information to form a product map of the chips to be tested; the product map includes the position information and test data of the chips to be tested, and the identity information and production information of each chip to be tested in all production processes are traceable by coordinate translation; then the product map can be transmitted to the tape packaging process, and the tape packaging process sorts and packages the good products of the terminal test into the tape, and binds the identity information of the chips to be tested with the position of the tape; then the finished products are packaged and put into storage.

[0125] An embodiment of the present invention provides a semiconductor chip testing device based on the above embodiments, and uses the semiconductor chip testing method described in any embodiment of the present invention to perform testing.

[0126] The semiconductor chip testing device provided by the embodiment of the present invention has the same beneficial effects as the semiconductor chip testing method described in any embodiment of the present invention.

[0127] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0128] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A semiconductor chip testing method, characterized in that: include: Determine a chip to be tested having a good product mark among multiple chips to be tested; the chip to be tested includes a first surface and a plastic cover that are arranged opposite to each other; The plurality of chips to be tested are located on the first carrier film, and the first surfaces of the plurality of chips to be tested are exposed; Flipping the chip to be tested for the first time so that the plastic cover of the chip to be tested is exposed; Determine the state of the chip to be tested after the first flip; If the chip to be tested has no defects after the first flipping, transferring the chip to be tested to a second carrier film; In the case that the chip to be tested after the first flipping is defective, determining that the chip to be tested after the first flipping is a defective product; After all the non-defective chips to be tested are transferred to the second carrier film, an electromagnetic shielding layer is formed on the surface of the plastic cover of all the chips to be tested on the second carrier film away from the first surface; The electromagnetic shielding layer covers the plastic cover; Flipping the chip to be tested having the electromagnetic shielding layer for a second time so that the first surface of the chip to be tested is exposed; Determine the state of the chip to be tested after the second flip; If the chip to be tested has no defects after the second flipping, transferring the chip to be tested to a third carrier film; In the case that the chip to be tested after the second flipping is defective, determining that the chip to be tested after the second flipping is defective; After all non-defective chips to be tested are transferred to the third carrier film, the chips to be tested on the third carrier film are tested.

2. The semiconductor chip testing method according to claim 1, characterized in that: The semiconductor chip testing device includes a conveying mechanism and a detection camera; before determining a chip to be tested having a good product mark among the plurality of chips to be tested, the device also includes: Cutting the substrate into a plurality of chips to be tested, and recording the identity information of each chip to be tested, wherein the identity information includes a good product mark, a defective product mark, and position information on the substrate; Placing the plurality of chips to be tested in a loading area; The plurality of chips to be tested are transferred to a production area by a conveying mechanism.

3. The semiconductor chip testing method according to claim 1, characterized in that: The semiconductor chip testing device comprises a pin table and a sorting machine; the chip to be tested is flipped for the first time so that the plastic cover of the chip to be tested is exposed, comprising: Fixing the ejector pin stage to the first carrier film of the chip to be tested; Fixing the nozzle in the sorting machine to the first surface of the chip to be tested; Separating the chip to be tested from the first carrier film by using the ejector pin stage; The chip to be tested is turned over for the first time by a suction nozzle in the sorting machine, so that the plastic cover of the chip to be tested is exposed.

4. The semiconductor chip testing method according to claim 1, characterized in that: Determining the state of the chip under test after the first flipping includes: Determining the state of the plastic cover of the chip to be tested; If the plastic cover of the chip to be tested has no defects, determining the position of the chip to be tested; if the chip to be tested has defects, determining that the chip to be tested is a defective product; In the case where the position of the chip to be tested is not offset, determining the state of the side surface of the chip to be tested; in the case where the position of the chip to be tested is offset, determining that the chip to be tested is a defective product; If there is no defect on the side of the chip to be tested, determining the state of the first surface of the chip to be tested; if there is a defect on the side of the chip to be tested, determining that the chip to be tested is a defective product; When there is no defect on the first side of the chip to be tested, it is determined that the chip to be tested after the first flip is free of defects; when there is a defect on the first side of the chip to be tested, it is determined that the chip to be tested is a defective product.

5. The semiconductor chip testing method according to claim 1, characterized in that: If the chip to be tested has no defects after the first flipping, transferring the chip to be tested to a second carrier film; In the case that the chip to be tested is defective after the first flip, after determining that the chip to be tested is defective after the first flip, the method further includes: The position information of the chip to be tested on the second carrier film is recorded.

6. The semiconductor chip testing method according to claim 1, characterized in that: The surfaces of the plastic covers of all the chips to be tested on the second carrier film away from the first surface are formed into an electromagnetic shielding layer, comprising: An electromagnetic shielding layer is formed on the surface of the plastic cover of the chip to be tested on the second carrier film away from the first surface by a coating process.

7. The semiconductor chip testing method according to claim 1, characterized in that: The semiconductor chip testing device comprises a pin table and a sorting machine; flipping a chip to be tested having an electromagnetic shielding layer for a second time so that the first surface of the chip to be tested is exposed, comprising: Fixing the ejector pin stage to the second carrier film of the chip to be tested; Fixing the suction nozzle in the sorting machine to the electromagnetic shielding layer of the chip to be tested; Separating the chip to be tested from the second carrier film by using the ejector pin stage; The chip to be tested is turned over for a second time by the suction nozzle in the sorting machine, so that the first side of the chip to be tested is exposed.

8. The semiconductor chip testing method according to claim 7, characterized in that: After the chip to be tested is separated from the second carrier film by the ejector pin station, the method further includes: The chip to be tested is cleaned.

9. The semiconductor chip testing method according to claim 1, characterized in that: After all the non-defective chips to be tested are transferred to the third carrier film, and the chips to be tested on the third carrier film are tested, the method further includes: Record test data of the chip to be tested on the third carrier film.

10. A semiconductor chip testing device, characterized in that: The semiconductor chip testing method according to any one of claims 1 to 9 is used for testing.

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