Server self-check control method, device and equipment and storage medium

Abstract

The embodiment of the invention provides a server self-checking control method, device and equipment and a storage medium, which are applied to the technical field of computers, and the method comprises the following steps: in response to a self-checking instruction for an embedded management controller in a server, controlling the embedded management controller to carry out self-checking to obtain a self-checking result, and according to the self-checking result, controlling the embedded management controller to carry out self-checking according to the self-checking result; an available internal component and an available external component are determined from the multiple internal components and the multiple external components, the available internal component at least comprises an internal starting component, an embedded management controller starting program is loaded through the internal starting component so as to start the embedded management controller, and in the starting process of the embedded management controller, the embedded management controller is started through the internal starting component. And driving the available internal component and the available external component according to a self-checking result. According to the method, the embedded management controller is controlled to perform self-inspection, and the available components are driven according to the self-inspection result, so that the situation that the embedded management controller is stuck again after being restarted is avoided, and the stability of the server is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method, device, equipment and storage medium for server self-check control. Background Art

[0002] The embedded management controller has rich functions, which can monitor the temperature and power consumption of the server in real time, record the server operation log in real time, and remotely control the server's power on and off through the network through the embedded management controller. Therefore, the stable operation of the server is inseparable from the embedded management controller.

[0003] The embedded management controller has many interfaces. For example, the baseboard management controller is connected to components of different types and functions through different interfaces. Therefore, during the operation of the embedded management controller, it is necessary not only to initialize multiple modules of itself, but also to initialize external components. Therefore, once the embedded management controller's own modules or external components fail, the embedded management controller will be hung and the stability of the server will be affected.

[0004] In the related art, the method for handling an EMC hang is to reset the baseboard management controller. However, if the hang is caused by unstable reading and writing of external components or an error caused by the malfunction of internal modules, even if the EMC is reset, it will still hang after working for a period of time, causing unstable operation of the server. Summary of the invention

[0005] In view of the above problems, a method, apparatus, device and storage medium for server self-check control are proposed to overcome the above problems or at least partially solve the above problems, including:

[0006] In a first aspect of the implementation of the present application, a server self-check control is first provided, characterized in that the server is provided with an embedded management controller, the embedded management controller includes a plurality of internal components, the embedded management controller is externally connected to a plurality of external components, and the method includes:

[0007] In response to a self-test instruction for an embedded management controller in the server, controlling the embedded management controller to perform a self-test to obtain a self-test result;

[0008] Determine available internal components and available external components from the multiple internal components and the multiple external components according to the self-check result, wherein the available internal components at least include internal startup components, and the available external components are deployed with the embedded management controller startup program;

[0009] Loading an embedded management controller startup program through the internal startup component to start the embedded management controller;

[0010] During the startup process of the embedded management controller, the available internal components and the available external components are driven according to the self-test result.

[0011] In an optional embodiment of the present application, the multiple internal components include a memory controller and a flash memory, the flash memory is deployed with the embedded management controller startup program, and the loading of the embedded management controller startup program through the internal startup component includes:

[0012] In a case where the available external component includes a memory, loading an embedded management controller startup program in the available external component into the memory through the memory controller;

[0013] In a case where the available external components do not include a memory, the embedded management controller startup program in the flash memory is loaded through the flash memory.

[0014] In an optional embodiment of the present application, the embedded management controller includes a main processor and a coprocessor, and before responding to the self-check instruction for the embedded management controller in the server, the step includes:

[0015] When the coprocessor detects fault information of the embedded management controller in the server, or when the embedded management controller in the server is powered on, a self-check instruction for the embedded management controller in the server is generated.

[0016] In an optional embodiment of the present application, the plurality of internal components further include a self-test module, and the controlling the embedded management controller to perform a self-test to obtain a self-test result includes:

[0017] Testing the self-test modules in turn to obtain module self-test results;

[0018] Initializing a memory interface corresponding to the embedded management controller, and performing a read and write test on the memory of the server through a memory controller inside the embedded management controller to obtain a first memory self-test result;

[0019] Performing a read and write test on the memory of the server through a flash memory controller inside the embedded management controller to obtain a flash memory controller self-test result and a second memory self-test result;

[0020] Performing an in-place detection on the secure digital memory card of the server by means of a secure digital memory controller inside the embedded management controller to determine whether the secure digital memory card is in place;

[0021] When the secure digital memory card is in place, performing a read and write test on the secure digital memory card of the server to obtain a self-test result of the secure digital memory card;

[0022] Initializing a network controller inside the embedded management controller, and testing the network status of the server through the network controller to obtain a network self-test result;

[0023] The self-test results are saved to an error status register in the embedded management controller, wherein the self-test results at least include the module self-test results, the first memory self-test results, the flash memory controller self-test results, the second memory self-test results, the secure digital memory card self-test results and the network self-test results.

[0024] In an optional embodiment of the present application, before determining available internal components and available external components from the plurality of internal components and the plurality of external components according to the self-test result, the method includes:

[0025] The main processor controls the coprocessor to execute basic functions of the embedded management controller, and the basic functions at least include fan speed monitoring, temperature monitoring, power-on monitoring and power-off monitoring of the server.

[0026] In an optional embodiment of the present application, the plurality of internal components further include a static memory, and the controlling the embedded management controller to perform a self-test to obtain a self-test result includes:

[0027] The embedded management controller startup program in the flash memory is loaded into the static memory, and the embedded management controller is controlled to perform a self-test to obtain a self-test result.

[0028] In an optional embodiment of the present application, after driving the available internal component and the available external component, the method further includes:

[0029] Output the self-test result, and / or save the self-test result to a log.

[0030] In a second aspect of the implementation of the present application, a server self-check control device is also provided, characterized in that it includes:

[0031] A first response module, configured to respond to a self-check instruction for an embedded management controller in the server and control the embedded management controller to perform a self-check to obtain a self-check result;

[0032] A result determination module, configured to determine available internal components and available external components from the multiple internal components and the multiple external components according to the self-test result, wherein the available internal components at least include internal startup components, and the embedded management controller startup program is deployed in the available external components;

[0033] A first startup module, configured to load an embedded management controller startup program through the internal startup component to start the embedded management controller;

[0034] The second startup module is used to drive the available internal components and the available external components according to the self-test result during the startup process of the embedded management controller.

[0035] The embodiments of the present application also disclose a computer program product, including a computer program / instruction, which, when executed by a processor, implements the server self-check control method as described in one or more of the embodiments of the present application.

[0036] An embodiment of the present application also discloses an electronic device, including: a processor; and a memory, on which executable code is stored. When the executable code is executed, the processor executes the server self-check control method as described in one or more of the embodiments of the present application.

[0037] The embodiments of the present application also disclose one or more machine-readable media on which executable codes are stored. When the executable codes are executed, the processor executes the server self-check control method as described in one or more of the embodiments of the present application.

[0038] The embodiments of the present application have the following advantages: by responding to a self-test instruction for an embedded management controller in a server, the embedded management controller is controlled to perform a self-test to obtain a self-test result; based on the self-test result, available internal components and available external components are determined from multiple internal components and multiple external components, the available internal components at least include an internal startup component; an embedded management controller startup program is loaded through the internal startup component to start the embedded management controller; during the startup process of the embedded management controller, the available internal components and available external components are driven based on the self-test result, thereby avoiding the situation where the embedded management controller is stuck again after restarting, and improving the stability of the server. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below.

[0040] Figure 1 A flowchart of the steps of a method for server self-check control provided in some embodiments of the present application;

[0041] Figure 2 is a schematic diagram of an embedded management controller provided by some embodiments of the present application;

[0042] Figure 3 is a control flow chart of abnormal self-checking of the operation of an embedded management controller provided by some embodiments of the present application;

[0043] Figure 4 It is a power-on self-test control flow chart of an embedded management controller provided in some embodiments of the present application;

[0044] Figure 5 It is a structural schematic diagram of a server self-check control device provided in some embodiments of the present application. DETAILED DESCRIPTION

[0045] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, each embodiment of the present application will be described in detail below in conjunction with the accompanying drawings. However, it will be appreciated by those skilled in the art that in each embodiment of the present application, many technical details are proposed in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is for the convenience of description, and the specific implementation of the present application should not constitute any limitation, and the various embodiments can be combined with each other and referenced to each other without contradiction.

[0046] The prior art provides a hardware fault diagnosis circuit for detecting the cause of the failure of an embedded management controller. After the system is powered on, the bootloader is started first. If an error message appears during the bootloader startup process, the error message is notified to the BIOS (Basic Input / Output System) through the GPIO (General-Purpose Input / Output), and the BIOS parses the error message and outputs the parsing result to the user through the display. This method requires the assistance of the BIOS and will occupy additional GPIO resources, and the method for handling this problem is to pass the problem to the user, and the system needs to wait for the user to handle the problem before it can continue to operate normally. The prior art also provides an embedded management controller hang self-recovery method, which receives the fault alarm signal sent by the embedded management controller through a complex programmable logic device and counts the duration of the fault alarm signal; if the timing time reaches the set time threshold, a reset signal is sent to the signal reset pin of the embedded management controller to force the embedded management controller to reset. However, if the reset cannot solve the problem, such as the error problem of unstable reading and writing of the memory, the embedded management controller will still hang after working for a period of time after the reset, and the operation of the server will be unstable.

[0047] In order to solve the problem that an embedded management controller cannot autonomously detect the cause of a problem and restore the normal operation of the system after a failure occurs, the present application provides a method for self-checking control of a server.

[0048] Reference Figure 1 , shows a flow chart of the steps of a method for self-checking control of a server provided in some embodiments of the present application, wherein the server is provided with an embedded management controller, the embedded management controller includes a plurality of internal components, and the embedded management controller is externally connected to a plurality of external components, and the method may include:

[0049] Step 101 , in response to a self-check instruction for an embedded management controller in the server, controlling the embedded management controller to perform a self-check to obtain a self-check result.

[0050] Among them, the embedded management controller can be a baseboard management controller BMC. BMC (Baseboard Management Controller) is a hardware component specially designed for remote management of servers. It follows the IPMI (Intelligent Platform Management Interface) protocol and provides a series of functions to monitor and manage the status and operation of the server. The main functions of BMC include real-time monitoring, logging, remote control, power management, etc. Among them, real-time monitoring includes: 1. Temperature monitoring. BMC can monitor the temperature of each key component of the server (such as central processing unit, memory, power supply, etc.) in real time and issue an alarm when the temperature exceeds the preset threshold; 2. Power consumption monitoring. BMC can monitor the power consumption of the server to help administrators understand the energy consumption status of the server and optimize energy use. Log recording includes: 1. Event log. BMC will record key events and error information of the server, such as hardware failure, temperature abnormality, power supply problem, etc. These logs can help administrators perform fault diagnosis and maintenance; 1. System log. BMC can also record the startup and operation logs of the operating system to provide more comprehensive system status information. Among them, remote control includes: 1. Remote power on and off. BMC allows administrators to remotely control the power on and off operations of the server through the network, and can manage even when the operating system is not started. Keyboard, video, and mouse control: BMC supports remote keyboard, video, and mouse control functions. Administrators can remotely access the server console through the network to perform system configuration and troubleshooting; 2. Remote firmware update. BMC supports remote update of server firmware, including BIOS, BMC firmware, etc., which simplifies the maintenance process. Among them, power management includes: 1. Power status monitoring. BMC can monitor the power status of the server, including power input, output voltage and current, etc.; 2. Power control. BMC supports remote control of power on and off and restart to ensure that the server can respond quickly when necessary.

[0051] BMC provides a unified access interface to the outside world, which usually includes the following methods: 1. Command line interface. Administrators can interact with BMC through command line tools (such as ipmitool) to perform various management operations. 2. Web interface (web page interface): BMC usually provides a Web-based management interface, which administrators can access remotely through a browser for graphical management and monitoring. 3. Simple Network Management Protocol: BMC supports Simple Network Management Protocol and can be integrated with other network management tools to achieve centralized server management. In addition, some advanced BMC systems also provide RES Tful API, allowing developers to interact with BMC programmatically to achieve automated management. BMC is widely used in scenarios that require remote management and monitoring, such as data centers, enterprise servers, and network equipment. It can significantly improve the manageability and reliability of servers, reduce the need for on-site maintenance, and reduce operating costs.

[0052] The server in some embodiments of the present application is provided with an embedded management controller, wherein the embedded management controller can be specifically a BMC. Specifically, the BMC may include a WDT module (Watchdog Timer), a DDR module (Double Data Rate Synchronous Dynamic Random Access Memory), a flash memory controller, a serial port and other modules. Among them, the WDT module is a key hardware component for monitoring the operating status of the system and taking corresponding measures when the system is abnormal to ensure the stability and reliability of the system. The WDT module ensures the normal operation of the system by regularly checking the operating status of the system. When the WDT detects a system abnormality, it can trigger a system reset or generate an interrupt to restore the normal operation of the system. Specifically, a timer can be set inside the WDT module and counted according to a preset time interval. When the system is running normally, the WDT timer will be reset regularly to prevent the WDT from timeout. If the system is abnormal, the WDT timer will timeout and trigger the corresponding processing mechanism. The processing method of the WDT when it times out can be configured, such as triggering a system reset, generating an interrupt or performing other predefined operations. WDT can detect hardware failures, such as CPU deadlock, memory errors, etc., and take corresponding measures. It can also detect software failures, such as operating system hangs, application crashes, etc., and trigger a system reset. BMC also includes the system controller SCU, which records and reports various errors and abnormal conditions that occur in the system through the error register.

[0053] In the specific implementation, once the BMC chip fails, after waiting for a period of time, the timing of the WDT module reaches the set time, the operation error register of the system controller SCU in the BMC will record the state and control the BMC to reset. After the BMC detects the error state stored in the operation error state register of the system controller SCU, it first detects whether the chip's flash is functioning normally. If it is normal, it reads and runs the chip self-test program from the flash to control the embedded management controller to perform self-test to obtain the self-test result. For example, the timing of the WDT module is set to 60 seconds. If the BMC fails and the timing starts to 60 seconds and the WDT timer is found not to be reset, the above steps will be executed to prevent the server from being in a hung state for a long time.

[0054] In some embodiments of the present application, the embedded management controller includes a main processor and a coprocessor, and before step 101, the following may also be included:

[0055] When the coprocessor detects fault information of the embedded management controller in the server, or when the embedded management controller in the server is powered on, a self-check instruction for the embedded management controller in the server is generated.

[0056] In a specific implementation, the BMC may include a main processor and a coprocessor. The main processor and the coprocessor are two key computing units. They each undertake different tasks and work together to achieve comprehensive management and monitoring of server hardware. After the BMC fails and waits for a period of time, the timing of the WDT module reaches the set time, and the chip operation error register of the BMC system control unit will record the state and control the BMC to reset. After the BMC coprocessor detects the error state stored in the chip operation error state register of the SCU module, it generates a self-test instruction for the embedded management controller in the server. In a specific implementation, in order to avoid the BMC from hanging in the normal power-on process in advance, it is also possible to directly generate a self-test instruction for the BMC after the BMC is powered on according to the external DIP switch configuration, so that the BMC enters the self-test mode.

[0057] In some embodiments of the present application, the plurality of internal components further include a static memory, and the step 101 of “controlling the embedded management controller to perform a self-test to obtain a self-test result” may further include the following sub-steps:

[0058] Sub-step 11: Load the embedded management controller startup program in the flash memory into the static memory, and control the embedded management controller to perform a self-test to obtain a self-test result.

[0059] In a specific implementation, the BMC also includes a static memory SRAM. While the BMC performs self-test, it first detects whether the flash memory corresponding to the BMC functions normally. If the function is normal, the BMC self-test program is read from the flash memory and run into the SRAM of the main processor, and the main processor is reset at the same time. The main processor runs the chip self-test program from the SRAM to control the chip module to perform self-test. In a specific implementation, during the self-test process of the BMC's normal power-on operation, the self-test program can be read from the flash memory into the main processor SRAM by the coprocessor. In addition, the coprocessor controls the release of the main processor reset so that the main processor runs the self-test program and obtains the self-test result. It should be noted that in this application, a static memory SRAM is set inside the BMC, and the self-test program is selected to be executed in the SRAM. The reason is that if the SRAM is set inside the BMC, there is no need to initialize the SRAM. Since the SRAM is located inside the BMC, it is not easy to fail, and the read and write operations will not be unable to be performed due to problems with the firmware program initialization, thereby ensuring the stability of the self-test process.

[0060] Step 102: Determine available internal components and available external components from the multiple internal components and the multiple external components according to the self-check result, wherein the available internal components at least include internal startup components, and the available external components are deployed with the embedded management controller startup program.

[0061] like Figure 2 As shown, it is a schematic diagram of an embedded management controller provided by some embodiments of the present application. It can be seen from the figure that the embedded management controller may include multiple internal components, such as a main processor, a coprocessor, a system controller, SRAM, a memory controller, a flash memory controller, a network controller, a WDT module, an I2C interface, a serial port, etc. The embedded management controller also includes a clock, which is responsible for generating and distributing system timing signals to ensure that each module and peripheral can work synchronously. Among them, the flash memory controller is used to control the BMC to read and write to the flash memory; the system controller is used to store key information about the server's operating status, and is also used for information exchange between the main processor and the coprocessor. The embedded management controller also connects multiple external components through some internal components, such as external memory through a memory controller, external flash memory through a flash memory controller, external other serial port external components through a serial port, and external network components through a network controller, etc. Therefore, the external component refers to the hardware structure connected to the embedded management controller.

[0062] In a specific implementation, after the self-test of the embedded management controller is completed, the self-test result is stored in the SCU error status register, and the device tree of the currently available devices is modified or generated. The device tree of the currently available devices is the sum of the available internal components and available external components obtained based on the self-test result, so as to be used for the subsequent startup of the BMC and the driving of various modules and components. Among them, the startup program of the BMC is pre-stored in the external component to ensure that the startup program can be obtained from different storage media to start the BMC when the BMC fails to run, further ensuring the stability of the BMC and the server.

[0063] In some embodiments of the present application, the following steps may be included before step 102:

[0064] The main processor controls the coprocessor to execute the basic functions of the embedded management controller, which at least include fan speed monitoring, temperature monitoring, power-on monitoring and power-off monitoring of the server.

[0065] In a specific implementation, the BMC includes a main processor and a co-processor. The BMC responds to the self-test instruction for the BMC and controls the BMC to perform self-test to obtain the self-test result. Specifically, the self-test program is run in the main processor of the BMC. At the same time, the main processor can also control the co-processor to execute the basic functions necessary for the normal operation of the BMC, such as monitoring the fan speed, server temperature, server power on and off, etc., to ensure the normal operation of the server.

[0066] In some embodiments of the present application, step 102 may also include the following sub-steps:

[0067] Sub-step 21: testing the self-test modules in turn to obtain module self-test results;

[0068] Among them, the self-test module refers to the BIST (Built-In Self-Test) module. The BIST module is a test function integrated in the chip or system, which is used to automatically detect the correctness and reliability of the hardware when the system is started or running. The BIST module verifies whether the functions of the hardware components are normal by executing a series of predefined test programs, thereby improving the reliability and stability of the system. The basic functions of BIST include self-test function and automatic execution function. Among them, the self-test function includes hardware detection, fault diagnosis and performance evaluation. The BIST module can detect the functions of hardware components, such as memory, processor, bus, I / O interface, etc.; it can also diagnose hardware faults and generate corresponding error reports to help developers quickly locate problems; it can also evaluate the performance of hardware, such as memory bandwidth, processor speed, etc., to ensure that the hardware is within the normal working range. The automatic execution function means that when the system starts, the BIST module automatically executes the self-test program to verify the initial state of the hardware; the automatic execution function can also include runtime self-test. During the operation of the system, self-test is performed regularly or on demand to ensure the continuous reliability of the hardware.

[0069] In a specific implementation, the self-test modules are tested in sequence to obtain the self-test result of each self-test module.

[0070] Sub-step 22: Initializing a memory interface corresponding to the embedded management controller, and performing a read and write test on the memory of the server through a memory controller inside the embedded management controller to obtain a first memory self-test result;

[0071] In an embedded system, initializing the memory interface corresponding to the embedded management controller and performing read and write tests on the server's memory through the memory controller inside the embedded management controller are important steps to ensure that the system memory functions normally.

[0072] The specific implementation may include the following specific steps and processes: 1. Configuring the memory controller, including setting the memory type, setting the timing parameters, setting the memory capacity, etc. 2. Initializing the memory interface, including resetting the memory controller, configuring the memory interface and initializing the memory device, wherein configuring the memory interface refers to configuring the electrical parameters of the memory interface, and initializing the memory device refers to initializing the memory device by sending an initialization command to ensure that it is in a normal working state. 3. Performing a memory read and write test through the memory controller inside the embedded management controller, generating random read and write data for testing the read and write functions of the memory, and generating fixed-mode read and write data for detecting specific error modes of the memory. 4. Performing a read and write test, writing the test data to the specified address of the memory through the memory controller, reading the data from the specified address of the memory through the memory controller, comparing the read data with the written data, and verifying whether the read and write functions of the memory are normal. 5. Detecting errors, detecting the difference between the read data and the written data, determining whether there is an error, and if an error is detected, locating the specific location of the error, such as the memory address, data bit, etc. 6. Obtain a first memory self-test result. The first memory self-test result records the result of the memory read and write test, including test data, read data, error information, etc. If an error is detected, the first memory self-test result also includes error type, location, time, and other information.

[0073] Sub-step 23: performing a read and write test on the memory of the server through the flash memory controller inside the embedded management controller to obtain a flash memory controller self-test result and a second memory self-test result;

[0074] Similar to the memory self-test process, the flash memory controller in the embedded management controller performs a read and write test on the memory, which requires initializing the flash memory controller, performing a read and write test on the memory through the flash memory controller, and verifying whether the flash memory controller functions normally by executing a series of predefined test programs. Thus, the flash memory controller self-test result and the second memory self-test result corresponding to the flash memory controller performing a read and write test on the memory are obtained.

[0075] Sub-step 24: performing a presence detection on the secure digital memory card of the server through the secure digital memory controller inside the embedded management controller to determine whether the secure digital memory card is in place;

[0076] Sub-step 25: When the secure digital memory card is in place, performing a read and write test on the secure digital memory card of the server to obtain a self-test result of the secure digital memory card;

[0077] During the self-test process, the secure digital storage controller can detect whether the SD card is inserted. If the detection result indicates that the SD card is in place, the SD card read and write test is performed to obtain the SD card self-test result. If the detection result indicates that the SD card is not in place, the SD card is no longer read and written, and the SD card self-test result may be empty.

[0078] Sub-step 26: Initializing the network controller inside the embedded management controller, and testing the network status of the server through the network controller to obtain a network self-test result;

[0079] In the specific implementation, the network controller inside the embedded management controller is initialized. First, the parameters of the network controller are configured, such as IP address, subnet mask, gateway, MAC address, etc. Secondly, the electrical parameters of the network interface are configured, such as speed, duplex mode, automatic negotiation, etc. After the configuration is completed, the network controller is initialized: the network controller is initialized by a reset signal to ensure that it is in the initial state. After the initialization is completed, the driver of the network controller is loaded and the driver parameters are configured to ensure that the operating system can identify and control the network controller. After the above steps are completed, a test data packet is generated and sent: the test data packet is sent to the target IP address through the network controller, and a response data packet from the target IP address is received through the network controller. If the response data packet is successfully received and the content of the data packet is correct, it is judged that the network connectivity is normal, and the network self-test result is obtained. The network connectivity test result is recorded in the network self-test result, including sending data packets, receiving data packets, error information, etc.

[0080] Sub-step 27: Save the self-test results to the error status register in the embedded management controller, the self-test results at least including the module self-test results, the first memory self-test results, the flash memory controller self-test results, the second memory self-test results, the secure digital memory card self-test results and the network self-test results.

[0081] In a specific implementation, after the BMC self-test is completed, the main processor stores the self-test result in the error status register (i.e., the SCU error status register) in the embedded management controller, modifies or generates a device tree for the currently available devices, and the self-test result includes at least a module self-test result, a first memory self-test result, a flash memory controller self-test result, a second memory self-test result, a secure digital memory card self-test result, and a network self-test result.

[0082] In other embodiments of the present application, intelligent analysis and prediction of the self-test results of the embedded management controller may also be included, which may specifically include the following steps: using machine learning and artificial intelligence technology to intelligently analyze the self-test results and identify potential faults and anomalies. Establish a prediction model to predict future system status and failure risks based on historical self-test results and real-time data. For example, historical self-test results and real-time data may be collected first to build a data set; using machine learning and artificial intelligence technology to intelligently analyze the self-test results to identify potential faults and anomalies; establishing a prediction model to predict future system status and failure risks based on historical self-test results and real-time data; and establishing an early warning mechanism based on the prediction results to promptly notify the administrator to handle the problem. Through intelligent analysis and prediction models, system failures can be predicted in advance, downtime and maintenance costs can be reduced, and intelligent decision support can also be provided for system management and maintenance.

[0083] Step 103: Load an embedded management controller startup program through the internal startup component to start the embedded management controller.

[0084] The internal startup component is a component used to load the BMC startup program. If there is no problem with the memory, the internal startup component is a memory controller, which loads the BMC startup program into the memory to start the BMC. If there is a problem with the memory, the internal startup component is a flash memory controller, which loads the startup program in the flash memory to start the BMC.

[0085] The embedded management controller startup program specifically refers to the Bootloader. The Bootloader is a key component in the computer system startup process. Its main tasks are to initialize hardware devices, load the operating system kernel into the memory, and start the operating system. The startup process may involve multiple stages of Bootl oader, for example: the TPL stage is used to initialize security hardware and verify the integrity of the subsequent startup stage. SPL is used to initialize basic hardware and load the main Bootloader. U-Boot is used to initialize more hardware and load the operating system kernel. Under normal working conditions, the BMC will read the Bootloader startup program from the flash memory inside the BMC after power-on. The Bootloader startup program initializes the WDT module, DDR module, flash controller, serial port and other modules in the BMC, and starts the kernel program.

[0086] In a specific implementation, during the self-test restart process after a BMC failure, the self-test results recorded in the SCU error status register can be selectively used to load the embedded management controller boot program Bootloader pre-stored in the media without any problems, such as e MMC cards, serial ports, and networks, into the memory to start the BMC, and the main processor can be reset by controlling the WDT module.

[0087] In some embodiments of the present application, the plurality of internal components include a memory controller and a flash memory, and the flash memory is deployed with the embedded management controller startup program. The following sub-steps may also be included before step 103:

[0088] Sub-step 31: when the available external component includes a memory, loading an embedded management controller startup program in the available external component into the memory through the memory controller;

[0089] Sub-step 32: when the available external components do not include a memory, loading the embedded management controller startup program in the flash memory through the flash memory.

[0090] In a specific implementation, if a problem with the memory is found during the self-check process, the flash memory controller is used to execute the boot program Bootloader inside the flash memory to start the BMC. In addition, the boot program must be controlled not to perform relocation operations, that is, not to move itself to the memory for operation. From the description of sub-steps 11 and 12, it can be seen that in this application, the Bootloader is preferentially loaded through the memory controller. It should be noted that the BMC boot program in the available medium is preferentially loaded into the memory through the memory controller to start the BMC. The reason is that the flash memory needs to be erased and then written, which is time-consuming. Compared with the flash memory, the memory has a faster reading rate, which makes the BMC restart faster, further improving the stability of the server.

[0091] Step 104 : During the startup process of the embedded management controller, the available internal components and the available external components are driven according to the self-test result.

[0092] In the specific implementation, whether it is the process of running the Bootloader program to restart the BMC after the BMC fails the self-check, or the process of running the Bootloader program to start the BMC after the BMC is powered on and self-checked normally, the BMC modules and peripherals are selectively driven, and the chip modules that fail the test are not initialized, thereby avoiding the situation where the BMC is stuck again after restarting.

[0093] In some embodiments of the present application, step 104 may further include:

[0094] Output the self-test result, and / or save the self-test result to a log.

[0095] In the specific implementation, after startup, the firmware program can print out the status of currently available components or devices for operators to selectively use. At the same time, the detection results of failed components or devices can also be automatically stored in the BMC log to provide maintenance personnel with rapid problem location and resolution.

[0096] The following describes in detail the method for self-checking control of the server of this application through two specific implementation methods.

[0097] In the specific implementation, the server includes a BMC, which mainly includes: a main processor, a coprocessor, a watchdog module (WDT module), SRAM, EMAC, UART, a FLASH controller, an SCU, a bus, an SD card controller, etc. Among them, the FLASH controller supports more than two chip-selected flash memories, and reads the program from the backup flash memory when an exception occurs. The SD card controller also supports more than two SD cards, and when an exception occurs in the primary SD card, the program is read from the backup SD card / emmc.

[0098] Among them, the main processor adopts the ARMA7 processor, which is mainly used to execute the chip self-test program, u-Boot startup program, and kernel program. The coprocessor adopts the arm-m3 processor, which mainly runs the rtos program and monitors the performance indicators such as the server fan and the temperature of the central processor in real time. When the chip is abnormal or in the power-on self-test mode, it is responsible for reading the main processing self-test program into the SRAM through the currently available modules and controlling the reset of the main processor. The watchdog module is used to control the processor restart and the reset of each module. SRAM is used to run the chip startup and self-test program. EMAC is used to remotely operate the BMC chip to exchange information with the server. UART is used to output chip startup information. The FLASH controller is used to control the read and write operations of the BMC external flash memory. SCU is used to store key information about the server's operating status and is also used for information exchange between the main processor and the coprocessor. The bus can adopt ARM's NIC series bus to provide a read, write and control interface between the processor and each module of the BMC.

[0099] Implementation method 1:

[0100] like Figure 3As shown, it is a BMC operation abnormality self-check control flow chart provided by some embodiments of the present application. After the BMC runs abnormally, if the watchdog counter (WDT module) is not configured to be cleared within 1 minute. The WDT module configures the main processor to reset, and the operation error register in the system controller SCU records the error status. After the coprocessor detects the error status of the chip operation error register, it reads the BMC self-check program from the flash memory (flash) to the main processor SRAM and verifies it. After the verification is successful, the coprocessor configures the main processor to reset and release.

[0101] The self-test program is executed in SRAM, and the coprocessor takes over some tasks of the main processor, such as server shutdown, fan speed detection, CPU temperature detection, etc. The reason for choosing SRAM to execute the program is that SRAM can be read without additional configuration, and SRAM is encapsulated inside the chip and is not prone to failure. Storage media such as flash memory (flash) and memory (ddr) usually require external flash chips or memory physical interfaces to read. Once there is a problem with the initialization program or the corresponding chip model does not match, it is easy to fail, causing the program to fail to run normally.

[0102] The self-test program first detects storage devices such as memory, flash memory, and SD card to check whether the corresponding storage stores complete firmware programs, and detects whether there are problems with reading and writing in locations where firmware programs are not stored. After the detection is correct, the test program is read from the corresponding location and moved to the memory for execution. Next, the self-test program tests various BMC peripherals, such as PCIE, I2C, ESPI, and other interfaces that interact with the server or external devices such as fans.

[0103] The detection result is recorded in the SCU error status register. According to the error status, the target medium is selected, the complete BMC startup program in the target medium is read into the memory, the main processor is reset, and the normal BMC startup program is run in the memory.

[0104] Implementation method 2:

[0105] like Figure 4 As shown, it is a BMC power-on self-test control flow chart provided by some embodiments of the present application. After the BMC is powered on, according to the configuration of the dial switch, the system enters the self-test mode, and the coprocessor reads the BMC self-test program from the flash memory to the SRAM and verifies its integrity. The system controller is controlled to release the reset of the main processor, the main processor executes the self-test program from the SRAM, and the coprocessor executes the real-time operating system program (RTOS program) to detect the operating status of the server's fan, CPU temperature, etc. in real time.

[0106] The main processor's self-test program first tests the memory. After the test is correct, it reads the second part of the test program from the corresponding location and moves it to the DDR for execution. Next, the self-test program tests various peripherals of the BMC chip, such as PCIE, I2C, ESPI and other interfaces that interact with the server or external devices such as fans.

[0107] The main processor configures the status of each device in the device tree corresponding to the startup program according to the detection results. The main processor resets and starts the BMC according to the updated device tree, and prints the information of the components that are currently unable to run in the internal and external components in the startup log. The present application uses the above two implementation methods to abnormally reset or power on self-test the BMC chip, thereby avoiding the problem of the chip not being able to operate normally due to failures of the BMC chip itself and peripherals. Moreover, through self-test, users can flexibly select the available storage media to start the chip, without having to consider the problem of failure to start the chip from the wrong startup media.

[0108] The server self-check control method provided in the embodiment of the present application controls the embedded management controller to perform self-check to obtain self-check results by responding to a self-check instruction for the embedded management controller in the server, and determines available internal components and available external components from multiple internal components and multiple external components based on the self-check results, wherein the available internal components at least include internal startup components, and the embedded management controller startup program is loaded through the internal startup component to start the embedded management controller. During the startup process of the embedded management controller, the available internal components and available external components are driven based on the self-check results, thereby avoiding the situation where the embedded management controller is stuck again after restarting, and improving the stability of the server.

[0109] Reference Figure 5 , shows a schematic diagram of the structure of a server self-check control device provided by an embodiment of the present application, wherein the server is provided with an embedded management controller, the embedded management controller includes a plurality of internal components, and the embedded management controller is externally connected to a plurality of external components, such as Figure 5 As shown, the device may include:

[0110] A first response module 501, configured to respond to a self-test instruction for an embedded management controller in the server and control the embedded management controller to perform a self-test to obtain a self-test result;

[0111] A result determination module 502 is used to determine available internal components and available external components from the multiple internal components and the multiple external components according to the self-check result, wherein the available internal components at least include internal startup components, and the available external components have the embedded management controller startup program deployed therein;

[0112] A first startup module 503, configured to load an embedded management controller startup program through the internal startup component to start the embedded management controller;

[0113] The second startup module 504 is configured to drive the available internal components and the available external components according to the self-test result during the startup of the embedded management controller.

[0114] In an optional embodiment of the present application, the plurality of internal components include a memory controller and a flash memory, the flash memory is deployed with the embedded management controller startup program, and the first startup module 503 further includes:

[0115] A first startup submodule, configured to load an embedded management controller startup program in the available external component into the memory through the memory controller when the available external component includes a memory;

[0116] The second startup submodule is used for loading the embedded management controller startup program in the flash memory through the flash memory when the available external components do not include the memory.

[0117] In an optional embodiment of the present application, the embedded management controller includes a main processor and a coprocessor, and the device further includes:

[0118] The instruction generation module is used to generate a self-check instruction for the embedded management controller in the server when the coprocessor detects fault information of the embedded management controller in the server or when the embedded management controller in the server is powered on.

[0119] In an optional embodiment of the present application, the first response module 101 further includes:

[0120] A first self-test submodule is used to test the self-test modules in turn to obtain module self-test results;

[0121] A second self-test submodule, used to initialize a memory interface corresponding to the embedded management controller, and perform a read and write test on the memory of the server through a memory controller inside the embedded management controller to obtain a first memory self-test result;

[0122] A third self-test submodule is used to perform a read and write test on the memory of the server through the flash memory controller inside the embedded management controller to obtain a flash memory controller self-test result and a second memory self-test result;

[0123] A fourth self-check submodule, configured to perform an in-place detection on the secure digital memory card of the server through the secure digital memory controller inside the embedded management controller to determine whether the secure digital memory card is in place;

[0124] a fifth self-test submodule, configured to perform a read and write test on the secure digital memory card of the server when the secure digital memory card is in place, and obtain a self-test result of the secure digital memory card;

[0125] a sixth self-check submodule, configured to initialize a network controller inside the embedded management controller, and test the network status of the server through the network controller to obtain a network self-check result;

[0126] a seventh self-test submodule, configured to save a self-test result to an error status register in the embedded management controller, wherein the self-test result includes at least the module self-test result, the first memory self-test result, the flash memory controller self-test result, the second memory self-test result, the secure digital memory card self-test result, and the network self-test result.

[0127] In an optional embodiment of the present application, the device further includes:

[0128] The co-processing sub-module is used to control the co-processor through the main processor to execute the basic functions of the embedded management controller, and the basic functions at least include fan speed monitoring, temperature monitoring, power-on monitoring and power-off monitoring of the server.

[0129] In an optional embodiment of the present application, the plurality of internal components further include a static memory, and the first response module 501 further includes:

[0130] The first loading submodule is used to load the embedded management controller startup program in the flash memory into the static memory, and control the embedded management controller to perform self-test to obtain a self-test result.

[0131] In an optional embodiment of the present application, the device further includes:

[0132] The log processing module is used to output the self-test result and / or save the self-test result to a log.

[0133] The embodiments of the present application have the following advantages: by responding to a self-test instruction for an embedded management controller in a server, the embedded management controller is controlled to perform a self-test to obtain a self-test result; based on the self-test result, available internal components and available external components are determined from multiple internal components and multiple external components, the available internal components at least include an internal startup component; an embedded management controller startup program is loaded through the internal startup component to start the embedded management controller; during the startup process of the embedded management controller, the available internal components and available external components are driven based on the self-test result, thereby avoiding the situation where the embedded management controller is stuck again after restarting, and improving the stability of the server.

[0134] An embodiment of the present application further provides a computer program product, including a computer program / instruction, which implements the above server self-check control method when the computer program / instruction is executed by a processor.

[0135] An embodiment of the present application also provides an electronic device, which may include a processor, a memory, and a computer program stored in the memory and capable of running on the processor, and when the computer program is executed by the processor, the above server self-check control method is implemented.

[0136] An embodiment of the present application further provides a non-volatile readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the above-mentioned server self-check control method is implemented.

[0137] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0138] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0139] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0140] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the embodiments of the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0141] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0142] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0143] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0144] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0145] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the above elements.

[0146] The above is a detailed introduction to a method and device for server self-check control. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for general technicians in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A method for self-checking control of a server, characterized in that: The server is provided with an embedded management controller, the embedded management controller includes a plurality of internal components, the embedded management controller is externally connected to a plurality of external components, and the method includes: In response to a self-test instruction for an embedded management controller in the server, controlling the embedded management controller to perform a self-test to obtain a self-test result; Determine available internal components and available external components from the multiple internal components and the multiple external components according to the self-check result, wherein the available internal components at least include internal startup components, and the available external components are deployed with the embedded management controller startup program; Loading an embedded management controller startup program through the internal startup component to start the embedded management controller; During the startup process of the embedded management controller, the available internal components and the available external components are driven according to the self-test result.

2. The method according to claim 1, characterized in that: The multiple internal components include a memory controller and a flash memory, the flash memory is configured with the embedded management controller startup program, and the loading of the embedded management controller startup program through the internal startup component includes: In a case where the available external component includes a memory, loading an embedded management controller startup program in the available external component into the memory through the memory controller; In a case where the available external components do not include a memory, the embedded management controller startup program in the flash memory is loaded through the flash memory.

3. The method according to claim 1, characterized in that The embedded management controller includes a main processor and a coprocessor. Before responding to the self-check instruction for the embedded management controller in the server, the method includes: When the coprocessor detects fault information of the embedded management controller in the server, or when the embedded management controller in the server is powered on, a self-check instruction for the embedded management controller in the server is generated.

4. The method according to any one of claims 1 to 3, characterized in that: The plurality of internal components further include a self-test module, and the controlling the embedded management controller to perform a self-test to obtain a self-test result includes: Testing the self-test modules in turn to obtain module self-test results; Initializing a memory interface corresponding to the embedded management controller, and performing a read and write test on the memory of the server through a memory controller inside the embedded management controller to obtain a first memory self-test result; Performing a read and write test on the memory of the server through a flash memory controller inside the embedded management controller to obtain a flash memory controller self-test result and a second memory self-test result; Performing an in-place detection on the secure digital memory card of the server by means of a secure digital memory controller inside the embedded management controller to determine whether the secure digital memory card is in place; When the secure digital memory card is in place, performing a read and write test on the secure digital memory card of the server to obtain a self-test result of the secure digital memory card; Initializing a network controller inside the embedded management controller, and testing the network status of the server through the network controller to obtain a network self-test result; The self-test results are saved to an error status register in the embedded management controller, wherein the self-test results at least include the module self-test results, the first memory self-test results, the flash memory controller self-test results, the second memory self-test results, the secure digital memory card self-test results and the network self-test results.

5. The method according to claim 3, characterized in that: Before determining available internal components and available external components from the plurality of internal components and the plurality of external components according to the self-test result, the method includes: The main processor controls the coprocessor to execute basic functions of the embedded management controller, and the basic functions at least include fan speed monitoring, temperature monitoring, power-on monitoring and power-off monitoring of the server.

6. The method according to claim 2, characterized in that The plurality of internal components further include a static memory, and the controlling the embedded management controller to perform a self-test to obtain a self-test result includes: The embedded management controller startup program in the flash memory is loaded into the static memory, and the embedded management controller is controlled to perform a self-test to obtain a self-test result.

7. The method according to claim 1, characterized in that After driving the available internal components and the available external components, the method further includes: Output the self-test result, and / or save the self-test result to a log.

8. A server self-check control device, characterized in that: The server is provided with an embedded management controller, the embedded management controller includes a plurality of internal components, and the embedded management controller is externally connected to a plurality of external components, including: A first response module, configured to respond to a self-check instruction for an embedded management controller in the server and control the embedded management controller to perform a self-check to obtain a self-check result; A result determination module, configured to determine available internal components and available external components from the multiple internal components and the multiple external components according to the self-test result, wherein the available internal components at least include internal startup components, and the embedded management controller startup program is deployed in the available external components; A first startup module, configured to load an embedded management controller startup program through the internal startup component to start the embedded management controller; The second startup module is used to drive the available internal components and the available external components according to the self-test result during the startup process of the embedded management controller.

9. An electronic device, characterized in that: The invention comprises a processor, a memory and a computer program stored in the memory and capable of running on the processor, wherein when the computer program is executed by the processor, the server self-check control method according to any one of claims 1 to 7 is implemented.

10. A non-volatile readable storage medium, characterized in that: The non-volatile readable storage medium stores a computer program, and when the computer program is executed by a processor, the server self-check control method according to any one of claims 1 to 7 is implemented.

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