Method and system for parallel high-precision calculation of EMIR result based on fixed step length

Abstract

The invention discloses a method and a system for parallel high-precision calculation of an EMIR result based on a fixed step length. The method comprises the following steps: constructing a linear equation for a power supply / grounding network; obtaining input current attribute information of a target circuit to be simulated based on transient simulation, wherein the input current attribute information at least comprises sampling step length H and a current value B corresponding to each sampling step length H; determining a value of a preset fixed step length h in the conductivity matrix according to a preset algorithm based on each sampling step length H; and calculating the voltage drop X corresponding to each sampling step length based on AX = B, wherein the voltage value X represents the voltage drop corresponding to each sampling step length H. By presetting a plurality of preset fixed step lengths, a plurality of calculated conductance matrixes A are obtained, when the EMIR result is calculated, the matrixes do not need to be decomposed in time, only the matrixes need to be solved, the time for finally solving the EMIR result is greatly shortened, and the calculation efficiency is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip design, and in particular, relates to a method and system for parallel high-precision accelerated calculation of EMIR results based on a fixed step size. Background Art

[0002] In electronic devices and circuits, electrical migration is an important phenomenon, especially in devices of tiny size. When current passes through a metal wire or dielectric, electrons or ions are moved by the electric field. In the long-term use process, this movement may cause irreversible damage or performance degradation of electronic devices.

[0003] Electromigration is particularly important in semiconductor devices such as transistors. In tiny wires and connections, the current density is high, which may lead to ion migration and electron drift caused by electromigration, resulting in electrode corrosion, material cracking, wire breakage and other problems. Therefore, electromigration phenomena need to be considered and managed in device design and process to ensure device reliability and life.

[0004] IR drop (voltage drop) is the voltage drop in a circuit caused by current passing through a wire or circuit element. The resistance of the wire and the element will cause energy loss when the current passes through, and according to Ohm's law, the voltage drop is proportional to the current. Therefore, when the current passes through the wire or circuit element, a voltage drop will be generated, which will cause the actual voltage received by the electronic device to be smaller than expected. Now digital / analog circuits usually require very precise voltages to achieve operation. If they work at the rated voltage, it will produce unpredictable effects, resulting in catastrophic consequences.

[0005] When calculating EMIR, existing tools usually simplify the power supply network, assuming that it has no parasitic effects and is treated as an ideal power supply. This will reduce the dimension of the matrix and speed up the calculation, but there will be a great loss in accuracy. The current transmitted to the signal network is very inaccurate, resulting in a large difference between the calculated node voltage and the actual value. Summary of the invention

[0006] To solve the above problems, the purpose of the present invention is to provide a method and system for parallel high-precision calculation of EMIR results based on fixed step sizes. By presetting multiple preset fixed step sizes, multiple calculated conductivity matrices A are obtained. Then, when calculating the EMIR results, there is no need to decompose the matrix immediately, and only the matrix needs to be solved. Since the time for decomposing the matrix is ​​often long, the time complexity of decomposing the matrix is ​​the cube of n, while the time for solving the matrix is ​​short, and the time complexity is n, where n represents the dimension of the conductivity matrix. Therefore, the technical solution of this embodiment greatly reduces the time for finally solving the EMIR results and improves the calculation efficiency.

[0007] The technical solution provided by the present invention is: a method for parallel high-precision calculation of EMIR results based on a fixed step, comprising the following steps: constructing a linear matrix equation for the power / ground network of the circuit to be simulated; performing model reduction on the power network used for transient simulation; performing model reduction on the power network used for transient simulation; obtaining input current attribute information of the power / ground network based on transient simulation, wherein the input current attribute information at least includes a sampling step H and a current value B corresponding to each sampling step H; determining the value of a preset fixed step h in the conductance matrix according to a preset algorithm based on each sampling step H; and calculating the voltage of each node under each step based on the circuit matrix equation.

[0008] Preferably, constructing a linear matrix equation for the target circuit to be simulated further includes: obtaining the target circuit to be simulated, constructing a KCL equation AX=B by means of an improved node method; and extracting a conductance matrix A from the KCL equation.

[0009] Preferably, after constructing the linear matrix equation for the power supply / ground network constructed for the target circuit to be simulated, the method further includes: A plurality of possible preset fixed step sizes are set to select the optimal preset fixed step size according to the attribute information of the input current after the current is input.

[0010] Preferably, when performing transient simulation on the target circuit to be simulated, it further includes: obtaining the target circuit to be simulated and performing circuit reduction through a preset algorithm, wherein the methods for performing circuit reduction include but are not limited to: amor, ticer, sip.

[0011] Preferably, determining the value of the preset fixed step length h in the conductivity matrix according to a preset algorithm based on each sampling step length H further includes: comparing multiple preset fixed step lengths h with the sampling step length H, until finding a fixed step length that satisfies the preset fixed step length h and the sampling step length H, and the preset fixed step length h is closest to the sampling step length H.

[0012] Preferably, the method further comprises: while performing corresponding EMIR result settlement for the current sampling step length H, performing transient simulation calculation for the next set of input current attribute information.

[0013] Preferably, based on each sampling step length H, the corresponding voltage drop X and current value B are calculated and output in a predetermined format.

[0014] Based on the same concept, the present invention also provides a system for parallel high-precision calculation of EMIR results based on a fixed step, including: a matrix construction module, used to construct a linear matrix equation for the power / ground network of the circuit to be simulated; a simulation model processing module, used to reduce the model of the power network used for transient simulation; an input acquisition module, used to obtain input current attribute information of the power / ground network based on transient simulation, and the input current attribute information at least includes a sampling step H and a current value B corresponding to each sampling step H; a step determination module, used to determine the value of a preset fixed step h in the conductance matrix according to a preset algorithm based on each sampling step H; a result calculation module, used to calculate the voltage of each node under each step based on the circuit matrix equation.

[0015] Based on the same concept, the present invention also provides an electronic device, characterized in that it includes: a memory, the memory is used to store a processing program; and a processor, when the processor executes the processing program, it implements any one of the above-mentioned methods for parallel high-precision calculation of EMIR results based on a fixed step size.

[0016] Based on the same concept, the present invention also provides a readable storage medium, characterized in that a processing program is stored on the readable storage medium, and when the processing program is executed by a processor, any one of the above-mentioned methods for parallel high-precision calculation of EMIR results based on a fixed step size is implemented.

[0017] Due to the adoption of the above technical solution, the present invention has the following advantages and positive effects compared with the prior art:

[0018] 1. The present invention pre-sets multiple preset fixed step sizes to obtain multiple calculated conductivity matrices A. Then, when calculating the EMIR result, there is no need to decompose the matrix immediately, and only the matrix needs to be solved. Since the time for decomposing the matrix is ​​often long, the time complexity of decomposing the matrix is ​​the cube of n, while the time for solving the matrix is ​​short, and the time complexity is n, where n represents the dimension of the conductivity matrix. Therefore, the technical solution of this embodiment greatly reduces the time for finally solving the EMIR result and improves the calculation efficiency.

[0019] 2. The present invention constructs the conductivity matrix A by improving the node method. The circuit only contains linear devices, including resistors, capacitors, voltage sources and current sources. The matrix is ​​established by improving the node method to ensure the symmetry and diagonal dominance of the matrix. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The specific embodiments of the present invention are further described in detail below with reference to the accompanying drawings, wherein:

[0021] Figure 1 This is a flow chart of a method for parallel high-precision calculation of EMIR results based on a fixed step size according to the present invention;

[0022] Figure 2 The present invention is a schematic diagram of an embodiment of a method process for parallel high-precision calculation of EMIR results based on a fixed step size. DETAILED DESCRIPTION

[0023] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description and claims. It should be noted that the drawings are all in a very simplified form and use non-precise ratios, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0024] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0025] First embodiment

[0026] like Figure 1 As shown, this embodiment provides a method for parallel high-precision calculation of EMIR results based on a fixed step size, including the following steps:

[0027] S100: Construct a linear matrix equation for the power / ground network of the circuit to be simulated;

[0028] S200: Model reduction of power network for transient simulation;

[0029] S300: Acquire input current attribute information of the power supply / ground network based on transient simulation, wherein the input current attribute information at least includes a sampling step length H and a current value B corresponding to each sampling step length H (current value of a boundary device);

[0030] S400: Determine the value of a preset fixed step length h in the conductivity matrix according to a preset algorithm based on each of the sampling step lengths H;

[0031] S500: Calculate the voltage of each node at each step based on the circuit matrix equation.

[0032] The technical solution of this embodiment obtains multiple calculated conductivity matrices A by presetting multiple preset fixed step sizes. Then, when calculating the EMIR result, there is no need to decompose the matrix immediately, and only the matrix needs to be solved. Since the time for decomposing the matrix is ​​often long, the time complexity of decomposing the matrix is ​​n to the power of 3, while the time for solving the matrix is ​​short, and the time complexity is n, where n represents the dimension of the conductivity matrix. Therefore, the technical solution of this embodiment greatly reduces the time for finally solving the EMIR result and improves the calculation efficiency.

[0033] Based on the same concept, matrix decomposition methods such as LU decomposition and Cholesky decomposition can also be used.

[0034] The existing technical solution first completes the transient simulation to obtain the current waveform of each port point, and then solves the linear matrix. However, the tool of the present invention can perform the two steps in parallel. After each time step of the transient simulation is completed, the linear part can solve the irdrop of this step, so our speed can be doubled compared with the existing tools, and the user's operation process is also simplified.

[0035] In this embodiment, the existing tools use a post-simulation netlist without parasitic power RC when obtaining the simulated input current, while this embodiment uses a post-simulation netlist with power RC, which can make the input of the power net more accurate, thereby obtaining high precision. At the same time, in order to take into account the speed, we will reduce the RC of the power net.

[0036] The transient simulation and emir analysis of this embodiment are performed synchronously and in parallel. After the transient simulation calculates the current value of each simulation step, the emir solver can use the current value as input to solve, thereby achieving the effect of parallel acceleration. The prior art is to perform transient simulation first, and then perform emir analysis after the simulation is completed. Preferably, constructing a linear matrix equation for the target circuit to be simulated further includes: obtaining the target circuit to be simulated, constructing the KCL equation AX=B by improving the node method; extracting the conductivity matrix A from the KCL equation.

[0037] The technical solution of this embodiment constructs the conductivity matrix A by improving the node method. The circuit only contains linear devices, including resistors, capacitors, voltage sources and current sources. The matrix is ​​established by improving the node method to ensure the symmetry and diagonal dominance of the matrix.

[0038] Preferably, after constructing the linear matrix equation for the power supply / ground network constructed for the target circuit to be simulated, the method further includes: A plurality of possible preset fixed step sizes are set to select the optimal preset fixed step size according to the attribute information of the input current after the current is input.

[0039] When performing emir analysis, we can use a fixed step size strategy to speed up. By presetting multiple possible preset fixed step sizes, the matrix decomposition and storage of the decomposition results are completed in advance, so that after obtaining the input current attribute information, the optimal fixed step size can be determined according to the input current attribute information. It is not necessary to perform matrix decomposition every time, which saves a lot of matrix decomposition time.

[0040] Preferably, when performing transient simulation on the target circuit to be simulated, it further includes: obtaining the target circuit to be simulated and performing circuit reduction through a preset algorithm, wherein the methods for performing circuit reduction include but are not limited to: amor, ticer, sip.

[0041] The technical solution of this embodiment reduces the circuit to a certain extent, which can improve the accuracy of the EMIR results while increasing the simulation speed. When calculating EMIR, existing tools usually simplify the power supply network, assuming that it has no parasitic effects and treats it as an ideal power supply; this will reduce the dimension of the matrix to achieve the effect of speeding up the calculation speed, but there will be a great loss in accuracy, and the current transmitted to the signal network is very inaccurate, resulting in a large difference between the calculated node voltage and the actual value. The solution of the present invention will reduce the model of the power supply network (including parasitic resistance and capacitance) in the transient simulation through mathematical methods, thereby reducing the dimension of the matrix and ensuring the accuracy of the current calculation, so that the obtained IRDROP result is more accurate than the prior art.

[0042] Preferably, determining the value of the preset fixed step length h in the conductivity matrix according to a preset algorithm based on each sampling step length H further includes: comparing multiple preset fixed step lengths h with the sampling step length H, until finding a fixed step length that satisfies the preset fixed step length h and the sampling step length H, and the preset fixed step length h is closest to the sampling step length H.

[0043] The technical solution of this embodiment discloses a method for determining the value of a preset fixed step length h based on the sampling step length H. This method can quickly and effectively determine the target preset fixed step length without the need for real-time matrix decomposition and calculation of the sampling step length H, thereby providing computational efficiency of EMIR results.

[0044] Preferably, the method further comprises: while performing corresponding EMIR result settlement for the current sampling step length H, performing transient simulation calculation for the next set of input current attribute information.

[0045] See also Figure 2 The technical solution of this embodiment enables two steps to be carried out in parallel. After each time step of the transient simulation is solved, the linear part can solve the irdrop in this step, so our speed can be doubled compared with the existing tools, and the user's operation process is simplified.

[0046] Preferably, based on each sampling step length H, the corresponding voltage drop X and current value B are calculated and output in a predetermined format.

[0047] Since the relationship between the sampling step size H and the preset fixed step size h is decoupled in the linear matrix equation related to the conductivity matrix, the fixed step size method is used to keep the left side of the linear matrix equation unchanged, which can accelerate the repeated solution speed of the linear matrix. After the solution, the results are output according to the sampling step size, the preset fixed step size, and the corresponding current value and voltage drop value, so that users can conduct a comprehensive analysis of the simulation and calculation results.

[0048] Second embodiment

[0049] Based on the same concept, the present invention also provides a system for parallel high-precision calculation of EMIR results based on a fixed step, including: a matrix construction module, used to construct a linear matrix equation for the power / ground network of the circuit to be simulated; a simulation model processing module, used to reduce the model of the power network used for transient simulation; an input acquisition module, used to obtain input current attribute information of the power / ground network based on transient simulation, and the input current attribute information at least includes a sampling step H and a current value B corresponding to each sampling step H; a step determination module, used to determine the value of a preset fixed step h in the conductance matrix according to a preset algorithm based on each sampling step H; a result calculation module, used to calculate the voltage of each node under each step based on the circuit matrix equation.

[0050] The technical solution of this embodiment obtains multiple calculated conductivity matrices A by presetting multiple preset fixed step sizes. Then, when calculating the EMIR result, there is no need to decompose the matrix immediately, and only the matrix needs to be solved. Since the time for decomposing the matrix is ​​often long, the time complexity of decomposing the matrix is ​​n to the power of 3, while the time for solving the matrix is ​​short, and the time complexity is n, where n represents the dimension of the conductivity matrix. Therefore, the technical solution of this embodiment greatly reduces the time for finally solving the EMIR result and improves the calculation efficiency.

[0051] Third embodiment

[0052] Based on the same concept, the present invention also provides an electronic device, comprising: a memory, the memory being used to store a processing program; a processor, the processor implementing any one of the above-mentioned methods for parallel high-precision calculation of EMIR results based on a fixed step size when executing the processing program.

[0053] Based on the same concept, the present invention also provides a readable storage medium, on which a processing program is stored. When the processing program is executed by a processor, any one of the above-mentioned methods for parallel high-precision calculation of EMIR results based on a fixed step size is implemented.

[0054] If the method of parallel high-precision calculation of EMIR results based on a fixed step size is implemented in the form of program instructions and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of software, and the computer software is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present disclosure. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.

[0055] Those skilled in the art can clearly understand that, for the sake of convenience and brevity in description, the identification content specifically executed by the above-described system and device can refer to the corresponding process in the aforementioned method embodiment.

[0056] The embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments. Even if various changes are made to the present invention, if these changes fall within the scope of the claims of the present invention and their equivalents, they still fall within the protection scope of the present invention.

Claims

1. A method for parallel high-precision calculation of EMIR results based on a fixed step size, characterized in that: The following steps are involved: Construct the linear matrix equations for the power / ground network of the circuit to be simulated; Model reduction of power networks for transient simulations; Acquire input current attribute information of the power supply / ground network based on transient simulation, wherein the input current attribute information at least includes a sampling step length H and a current value B corresponding to each sampling step length H; Determine the value of a preset fixed step length h in the conductivity matrix according to a preset algorithm based on each of the sampling step lengths H; The voltage of each node at each step is calculated based on the circuit matrix equation.

2. The method for parallel high-precision calculation of EMIR results with a fixed step size according to claim 1, characterized in that: Constructing a linear matrix equation for the target circuit to be simulated further includes: Obtain the target circuit to be simulated, and construct the KCL equation AX=B by improving the node method; Extract the conductivity matrix A from the KCL equation.

3. The method for parallel high-precision calculation of EMIR results based on fixed step size according to claim 1, characterized in that: After building the linear matrix equations for the power / ground network of the target circuit to be simulated, it also includes: For the conductivity matrix A = G +C h A plurality of possible preset fixed step sizes are set to select the optimal preset fixed step size according to the attribute information of the input current after the current is input.

4. The method for parallel high-precision calculation of EMIR results based on fixed step size according to claim 1, characterized in that: When performing transient simulation on the target circuit to be simulated, the method further includes: Obtain the target circuit to be simulated and perform circuit reduction through a preset algorithm, wherein the methods for performing circuit reduction include but are not limited to: amor, ticer, sip.

5. The method for parallel high-precision calculation of EMIR results based on fixed step size according to claim 1, characterized in that: Determining the value of the preset fixed step length h in the conductivity matrix according to a preset algorithm based on each sampling step length H further includes: A plurality of preset fixed step lengths h are compared with the sampling step length H until a fixed step length that satisfies the preset fixed step length h and the sampling step length H is found and the preset fixed step length h and the sampling step length H are closest.

6. The method for parallel high-precision calculation of EMIR results based on fixed step size according to claim 1, characterized in that: The method further comprises: While the corresponding EMIR result is being settled for the current sampling step length H, a transient simulation calculation is performed on the next set of input current attribute information.

7. The method for parallel high-precision calculation of EMIR results based on fixed step size according to claim 6, characterized in that: Based on each sampling step length H, the corresponding voltage drop X and current value B are calculated and output in a predetermined format.

8. A system for parallel high-precision calculation of EMIR results based on fixed step size, characterized in that: include: A matrix building module for building linear matrix equations for the power / ground network of the circuit to be simulated; A simulation model processing module, used for reducing the model order of a power network used for transient simulation; An input acquisition module, used to acquire input current attribute information of a power supply / ground network based on transient simulation, wherein the input current attribute information at least includes a sampling step length H and a current value B corresponding to each sampling step length H; A step length determination module, used to determine the value of a preset fixed step length h in the conductivity matrix according to a preset algorithm based on each of the sampling step lengths H; The result calculation module is used to calculate the voltage of each node at each step based on the circuit matrix equation.

9. An electronic device, characterized in that: include: A memory, the memory being used to store a processing program; A processor, wherein when executing the processing program, the processor implements the method for parallel high-precision calculation of EMIR results based on a fixed step size as described in any one of claims 1 to 7.

10. A readable storage medium, characterized in that: The readable storage medium stores a processing program, and when the processing program is executed by a processor, the method for parallel high-precision EMIR results based on a fixed step size as described in any one of claims 1 to 7 is implemented.

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