Wireless power transmitting chip and method thereof

Abstract

The invention relates to the field of intelligent control, and particularly discloses a wireless power source transmitting chip and a method thereof. A time queue of voltage level of an input power source and a time queue of real-time temperature of the chip are obtained; the time sequence correlation implicit coding of the voltage level and the real-time temperature of the chip is carried out by adopting a deep learning data analysis and processing technology; the switching frequency value of the next time point is automatically recommended based on conditional significant interaction fusion representation between the voltage level time sequence correlation implicit feature and the chip real-time temperature time sequence correlation implicit feature. Therefore, the switching frequency can be dynamically adjusted according to the data monitored in real time, and the optimal performance can be kept under various working conditions, so that the thermal management capability of the chip is remarkably improved, and the intelligent control degree is greatly enhanced.

Description

Technical Field

[0001] The present application relates to the field of intelligent control, and more specifically, to a wireless power transmission chip and a method thereof. Background Art

[0002] Wireless power transmission technology has become an indispensable part of modern electronic devices, especially in portable devices and Internet of Things (IoT) devices. Wireless power transmission technology can achieve power transmission without physical connection, which improves the convenience and safety of use. The wireless power transmission chip is the core component of wireless power transmission technology and an important support for the realization of wireless charging technology.

[0003] Thermal management is a critical technical consideration in the design of wireless power transmitter chips. Since power consumption varies under different voltages, it is necessary to consider heat dissipation and adjust the corresponding output in time to avoid overheating. The switching frequency has a direct impact on efficiency and heat generation. Therefore, the efficiency can be improved by changing the switching frequency, thereby reducing unnecessary heat generation.

[0004] In traditional wireless switching power supply designs, a fixed switching frequency is usually set. However, at a fixed switching frequency, the efficiency of the system may be significantly affected when the load changes. For example, under light load conditions, a higher switching frequency will result in higher switching losses, thereby reducing the overall efficiency. In addition, fixed frequency control cannot be flexibly adjusted according to environmental changes (such as temperature, input voltage fluctuations, etc.), resulting in poor performance in dynamic environments. Therefore, under different working conditions, traditional control methods find it difficult to find the optimal switching frequency, making it impossible for the system performance and energy efficiency ratio to reach the optimal state, thereby limiting the adaptability and flexibility, and making it difficult to cope with complex and changeable practical application scenarios.

[0005] Therefore, an optimized wireless power transmission chip is desired. Summary of the invention

[0006] In order to solve the above technical problems, the present application is proposed. The embodiment of the present application provides a wireless power transmission chip and a method thereof, which obtains the time queue of the voltage level of the input power supply and the time queue of the real-time temperature of the chip, and uses deep learning data analysis and processing technology to perform time-series correlation implicit encoding of the voltage level and the real-time temperature of the chip, thereby automatically recommending the switching frequency value at the next time point based on the conditional significant interaction fusion representation between the implicit features of the voltage level timing correlation and the implicit features of the chip real-time temperature timing correlation. In this way, whether under different load conditions or in changing ambient temperatures, the switching frequency can be dynamically adjusted according to the real-time monitored data to ensure that the best performance can be maintained under various working conditions, which not only significantly improves the thermal management capability of the chip, but also greatly enhances the degree of intelligent control.

[0007] According to one aspect of the present application, a wireless power transmission chip is provided, which includes: A voltage identification module, used to identify the voltage level of the input power supply; Temperature detection module, used to detect the real-time temperature of the chip through a temperature sensor; An adaptive control module, configured to adaptively adjust the switching frequency based on the voltage level of the input power supply and the real-time temperature of the chip; Wherein, the adaptive control module comprises: A voltage level timing acquisition unit, used to acquire a time sequence of a voltage level of the input power supply; A real-time temperature timing acquisition unit, used to acquire a time sequence of the real-time temperature of the chip; A voltage level real-time temperature timing association unit, used for performing time series encoding on the time queue of the voltage level and the time queue of the chip real-time temperature to obtain a voltage level timing association implicit feature vector and a chip real-time temperature timing association implicit feature vector; A voltage level-chip temperature timing significant interaction unit, used for performing conditional feature significant interaction fusion on the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector to obtain a voltage level-chip temperature timing significant interaction fusion representation; The optimization instruction generating unit is used to obtain the optimization instruction based on the voltage level-chip temperature timing significant interaction fusion representation, and the optimization instruction includes a recommended value of the switching frequency at the next time point.

[0008] In the above-mentioned wireless power transmitting chip, the voltage level real-time temperature timing association unit is used to: input the time queue of the voltage level and the time queue of the chip real-time temperature into the time series encoder based on the forward LSTM model to obtain the voltage level timing association implicit feature vector and the chip real-time temperature timing association implicit feature vector.

[0009] In the above-mentioned wireless power transmitting chip, the voltage level-chip temperature timing significant interaction unit includes: a voltage level-chip temperature implicit feature combination subunit, which is used to perform shared implicit feature combination on the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector to obtain a voltage level-chip temperature conditional feature vector; a voltage level-chip temperature conditional feature interaction subunit, which is used to perform feature weighted interaction based on conditional information on the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector based on the voltage level-chip temperature conditional feature vector to obtain the voltage level-chip temperature timing significant interaction fusion representation.

[0010] In the above-mentioned wireless power transmitting chip, the voltage level-chip temperature implicit feature joint subunit includes: a voltage level-chip temperature timing joint secondary subunit, which is used to input the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector into a joint implicit feature capture network to obtain a voltage level-chip temperature timing joint implicit feature vector; a voltage level-chip temperature conditional feature generation secondary subunit, which is used to perform feature activation based on the Sigmoid function on the voltage level-chip temperature timing joint implicit feature vector to obtain the voltage level-chip temperature conditional feature vector.

[0011] In the above-mentioned wireless power transmitting chip, the voltage level-chip temperature timing joint secondary sub-unit is used to: add the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector by position, multiply the obtained voltage level-chip temperature timing sum vector with the weight matrix, and then add it by position with the bias vector to obtain the voltage level-chip temperature timing joint interaction vector; use the tanh function to process the voltage level-chip temperature timing joint interaction vector to obtain the voltage level-chip temperature timing joint implicit feature vector.

[0012] In the above-mentioned wireless power transmitting chip, the voltage level-chip temperature condition feature interaction subunit includes: a voltage level semantic contribution calculation secondary subunit, which is used to calculate the voltage level semantic contribution of the voltage level timing-associated implicit feature vector relative to the voltage level-chip temperature condition feature vector; a chip temperature semantic contribution calculation secondary subunit, which is used to calculate the chip temperature semantic contribution of the chip real-time temperature timing-associated implicit feature vector relative to the voltage level-chip temperature condition feature vector; a voltage level chip temperature feature modulation secondary subunit, which is used to normalize the voltage level semantic contribution and the chip temperature semantic contribution, and use the normalized voltage level semantic contribution and the normalized chip temperature semantic contribution to modulate the voltage level timing-associated implicit feature vector and the chip real-time temperature. The timing-associated implicit feature vector is weighted modulated to obtain the timing-associated implicit feature vector of the modulated voltage level and the timing-associated implicit feature vector of the modulated chip real-time temperature; the voltage level-chip temperature interaction fusion secondary subunit is used to use the timing-associated implicit feature vector of the modulated voltage level as the query vector, the timing-associated implicit feature vector of the modulated chip real-time temperature as the key vector and the voltage level-chip temperature conditional feature vector as the value vector, and input the timing-associated implicit feature vector of the modulated voltage level, the timing-associated implicit feature vector of the modulated chip real-time temperature and the voltage level-chip temperature conditional feature vector into the feature-significant guided interaction module based on the converter structure to obtain the voltage level-chip temperature timing significant interaction fusion representation vector as the voltage level-chip temperature timing significant interaction fusion representation.

[0013] In the above-mentioned wireless power transmitting chip, the voltage level semantic contribution calculation secondary sub-unit is used to: calculate the positional division of the voltage level timing-associated implicit feature vector and the voltage level-chip temperature condition feature vector to obtain the voltage level semantic contribution vector; calculate the logarithmic function value with base two of the absolute value of each eigenvalue of the voltage level semantic contribution vector to obtain the voltage level semantic contribution logarithmic vector; calculate the positional dot product of the voltage level timing-associated implicit feature vector and the voltage level semantic contribution logarithmic vector, and perform positional multiplication on the obtained dot product vector to obtain the voltage level semantic contribution value; calculate the exponential function of the voltage level semantic contribution value with the natural constant e as the base to obtain the voltage level semantic contribution.

[0014] In the above-mentioned wireless power transmitting chip, the voltage level chip temperature feature modulation secondary subunit is used to: calculate the sum of the voltage level semantic contribution and the chip temperature semantic contribution to obtain the voltage level-chip temperature semantic contribution sum; respectively divide the voltage level semantic contribution and the chip temperature semantic contribution by the voltage level-chip temperature semantic contribution sum to obtain the normalized voltage level semantic contribution and the normalized chip temperature semantic contribution; perform position point multiplication on the voltage level timing-associated implicit feature vector and the normalized voltage level semantic contribution to obtain the modulated voltage level timing-associated implicit feature vector; perform position point multiplication on the chip real-time temperature timing-associated implicit feature vector and the normalized chip temperature semantic contribution to obtain the modulated chip real-time temperature timing-associated implicit feature vector.

[0015] In the above-mentioned wireless power transmitting chip, the optimization instruction generating unit is used to: input the voltage level-chip temperature timing significant interaction fusion representation vector into the decoder-based optimization controller to obtain the optimization instruction, and the optimization instruction includes the recommended value of the switching frequency at the next time point.

[0016] According to another aspect of the present application, a method for a wireless power transmission chip is provided, comprising: Obtaining a time queue of a voltage level of the input power supply; A time queue for obtaining the real-time temperature of the chip; Performing time series encoding on the time queue of the voltage level and the time queue of the chip real-time temperature to obtain a voltage level timing-related implicit feature vector and a chip real-time temperature timing-related implicit feature vector; Performing conditional feature-inter-significant interaction fusion on the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector to obtain a voltage level-chip temperature timing-significant interaction fusion representation; Based on the voltage level-chip temperature timing significant interaction fusion representation, an optimization instruction is obtained, and the optimization instruction includes a recommended value of the switching frequency at the next time point.

[0017] Compared with the prior art, the wireless power transmission chip and method provided by the present application obtain the time queue of the voltage level of the input power supply and the time queue of the real-time temperature of the chip, and use the data analysis and processing technology of deep learning to perform the time series correlation implicit encoding of the voltage level and the real-time temperature of the chip, so as to automatically recommend the switching frequency value at the next time point based on the conditional significant interaction fusion representation between the implicit features of the voltage level time series correlation and the implicit features of the chip real-time temperature time series correlation. In this way, whether under different load conditions or in changing ambient temperatures, the switching frequency can be dynamically adjusted according to the real-time monitored data to ensure that the best performance can be maintained under various working conditions, which not only significantly improves the thermal management capability of the chip, but also greatly enhances the degree of intelligent control. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] By describing the embodiments of the present application in more detail in conjunction with the accompanying drawings, the above and other purposes, features and advantages of the present application will become more apparent. The accompanying drawings are used to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0019] Figure 1 is a block diagram of a wireless power transmission chip according to an embodiment of the present application.

[0020] Figure 2 4 is a block diagram of an adaptive control module in a wireless power transmitting chip according to an embodiment of the present application.

[0021] Figure 3 Schematic diagram of data flow of an adaptive control module in a wireless power transmitting chip according to an embodiment of the present application.

[0022] Figure 4 4 is a block diagram of a voltage level-chip temperature timing significant interaction unit in a wireless power transmission chip according to an embodiment of the present application.

[0023] Figure 5 4 is a circuit design diagram of a wireless power transmitting chip according to an embodiment of the present application.

[0024] Figure 6 The figure is a flowchart of a method for a wireless power transmitting chip according to an embodiment of the present application. DETAILED DESCRIPTION

[0025] The embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments described herein, but rather these embodiments are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0026] It should be understood that the various steps described in the method embodiments of the present disclosure may be performed in different orders and / or in parallel. In addition, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present disclosure is not limited in this respect.

[0027] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to". The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0028] It should be noted that the modifications of "one" and "plurality" mentioned in the present disclosure are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more".

[0029] Wireless power transmission technology has become an indispensable part of modern electronic devices, especially in portable devices and Internet of Things (IoT) devices. Wireless power transmission technology can achieve power transmission without physical connection, which improves the convenience and safety of use. The wireless power transmission chip is the core component of wireless power transmission technology and an important support for the realization of wireless charging technology.

[0030] Thermal management is a critical technical consideration in the design of wireless power transmitter chips. Since power consumption varies under different voltages, it is necessary to consider heat dissipation and adjust the corresponding output in time to avoid overheating. The switching frequency has a direct impact on efficiency and heat generation. Therefore, the efficiency can be improved by changing the switching frequency, thereby reducing unnecessary heat generation.

[0031] In traditional wireless switching power supply designs, a fixed switching frequency is usually set. However, at a fixed switching frequency, the efficiency of the system may be significantly affected when the load changes. For example, under light load conditions, a higher switching frequency will result in higher switching losses, thereby reducing the overall efficiency. In addition, fixed frequency control cannot be flexibly adjusted according to environmental changes (such as temperature, input voltage fluctuations, etc.), resulting in poor performance in dynamic environments. Therefore, under different working conditions, traditional control methods find it difficult to find the optimal switching frequency, making it impossible for the system performance and energy efficiency ratio to reach the optimal state, thereby limiting the adaptability and flexibility, and making it difficult to cope with complex and changeable practical application scenarios.

[0032] Based on this, Figure 1 FIG. 1 is a block diagram of a wireless power transmission chip according to an embodiment of the present application. Figure 1 As shown, the wireless power transmitter chip 100 according to the embodiment of the present application includes: a voltage identification module 110, which is used to identify the voltage level of the input power supply; a temperature detection module 120, which is used to detect the real-time temperature of the chip through a temperature sensor; and an adaptive control module 130, which is used to adaptively adjust the switching frequency based on the voltage level of the input power supply and the real-time temperature of the chip.

[0033] Specifically, in an embodiment of the present application, the voltage identification module 110 is used to identify the voltage level of the input power supply. It should be understood that the voltage level of the input power supply may change due to factors such as power grid fluctuations and load changes. A stable input voltage is a prerequisite for ensuring the normal operation of the system. Different voltage levels will affect the efficiency of the system. For example, too high a voltage may cause excessive current, thereby increasing losses; too low a voltage may cause the system to fail to work properly. Therefore, by identifying the voltage level of the input power supply, corresponding protective measures can be taken to avoid chip damage.

[0034] Specifically, in the embodiment of the present application, the temperature detection module 120 is used to detect the real-time temperature of the chip through a temperature sensor. Accordingly, excessive temperature will affect the performance of the chip and even cause system failure or damage. By monitoring the temperature in real time, timely measures can be taken, such as reducing the output power or adjusting the switching frequency to control the temperature, so as to better perform thermal management.

[0035] Correspondingly, in the adaptive control module, the technical concept of the present application is to obtain the time queue of the voltage level of the input power supply and the time queue of the real-time temperature of the chip, and use deep learning data analysis and processing technology to perform implicit coding of the timing association of the voltage level and the real-time temperature of the chip, so as to automatically recommend the switching frequency value at the next time point based on the conditional significant interaction fusion representation between the implicit characteristics of the timing association of the voltage level and the implicit characteristics of the timing association of the real-time temperature of the chip. In this way, whether under different load conditions or in changing ambient temperatures, the switching frequency can be dynamically adjusted according to the real-time monitored data to ensure that the best performance can be maintained under various working conditions, which not only significantly improves the thermal management capability of the chip, but also greatly enhances the degree of intelligent control.

[0036] Figure 2 4 is a block diagram of an adaptive control module in a wireless power transmitting chip according to an embodiment of the present application. Figure 3 Schematic diagram of data flow of the adaptive control module in the wireless power transmitter chip according to the embodiment of the present application. Figure 2 and Figure 3 As shown, the adaptive control module 130 includes: a voltage level timing acquisition unit 131, which is used to acquire the time queue of the voltage level of the input power supply; a real-time temperature timing acquisition unit 132, which is used to acquire the time queue of the real-time temperature of the chip; a voltage level real-time temperature timing association unit 133, which is used to perform time series encoding on the time queue of the voltage level and the time queue of the real-time temperature of the chip to obtain a voltage level timing association implicit feature vector and a chip real-time temperature timing association implicit feature vector; a voltage level-chip temperature timing significant interaction unit 134, which is used to perform conditional feature significant interaction fusion on the voltage level timing association implicit feature vector and the chip real-time temperature timing association implicit feature vector to obtain a voltage level-chip temperature timing significant interaction fusion representation; an optimization instruction generation unit 135, which is used to obtain an optimization instruction based on the voltage level-chip temperature timing significant interaction fusion representation, and the optimization instruction includes a recommended value of the switching frequency at the next time point.

[0037] In an embodiment of the present application, the voltage level timing acquisition unit 131 is used to acquire the time queue of the voltage level of the input power supply. The real-time temperature timing acquisition unit 132 is used to acquire the time queue of the real-time temperature of the chip. It should be understood that the voltage level of the input power supply refers to the voltage value provided by the power supply, and different voltage levels will affect the power consumption of the chip. The real-time temperature of the chip refers to the actual temperature of the wireless power transmitter chip during operation. If the temperature is too high, it will affect the performance of the chip and even cause system failure or damage. Based on this, in order to more accurately and dynamically adjust the switching frequency according to the current working state and ensure that the best performance can be maintained under different load conditions and ambient temperatures, in the technical solution of the present application, the time queue of the voltage level of the input power supply is obtained, and the time queue of the real-time temperature of the chip is obtained.

[0038] In an embodiment of the present application, the voltage level real-time temperature timing association unit 133 is used to perform time series encoding on the time queue of the voltage level and the time queue of the chip real-time temperature to obtain the voltage level timing association implicit feature vector and the chip real-time temperature timing association implicit feature vector. Specifically, in an embodiment of the present application, the voltage level real-time temperature timing association unit is used to: input the time queue of the voltage level and the time queue of the chip real-time temperature into a time series encoder based on a forward LSTM model to obtain the voltage level timing association implicit feature vector and the chip real-time temperature timing association implicit feature vector. Accordingly, considering that the voltage level and the chip real-time temperature have different degrees of timing feature association in a specific time period, and in order to capture the relationship between early information and current information, so as to better understand the timing association influence between different time spans, in the technical solution of the present application, the time queue of the voltage level and the time queue of the chip real-time temperature are input into a time series encoder based on a forward LSTM model to obtain the voltage level timing association implicit feature vector and the chip real-time temperature timing association implicit feature vector. That is, the forward LSTM model is able to capture long-term dependencies in the data. In particular, the model uses a gating mechanism to control the inflow and outflow of information, thereby effectively managing long-term dependencies in different specific time scales to better understand the temporal correlation between voltage level and real-time temperature.

[0039] In an embodiment of the present application, the voltage level-chip temperature timing significant interaction unit 134 is used to perform conditional feature significant interaction fusion on the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector to obtain a voltage level-chip temperature timing significant interaction fusion representation. Figure 41 is a block diagram of a voltage level-chip temperature timing significant interaction unit in a wireless power transmitter chip according to an embodiment of the present application. Specifically, in the embodiment of the present application, Figure 4 As shown, the voltage level-chip temperature timing significant interaction unit 134 includes: a voltage level-chip temperature implicit feature combination subunit 1341, which is used to perform shared implicit feature combination on the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector to obtain a voltage level-chip temperature conditional feature vector; a voltage level-chip temperature conditional feature interaction subunit 1342, which is used to perform feature weighted interaction based on conditional information on the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector based on the voltage level-chip temperature conditional feature vector to obtain the voltage level-chip temperature timing significant interaction fusion representation. Further, considering that the voltage level and chip temperature are two independent measurement indicators, there may be an intrinsic connection between them. For example, input voltage fluctuations may cause chip temperature changes, and vice versa. In order to capture and integrate the complex temporal interaction relationship between the two sequence features, and to extract deeper correlations and patterns to derive a more comprehensive and useful representation therefrom, in the technical solution of the present application, the voltage level timing-associated implicit feature vector and the chip real-time temperature timing-associated implicit feature vector are subjected to conditional feature significant interaction fusion to obtain a voltage level-chip temperature timing significant interaction fusion representation vector as a voltage level-chip temperature timing significant interaction fusion representation.

[0040] In detail, first, the voltage level timing-associated implicit feature vector and the chip real-time temperature timing-associated implicit feature vector are combined by shared implicit features to obtain the voltage level-chip temperature condition feature vector. In this way, the information of the voltage level and the chip temperature can be integrated together, and the shared implicit features between the two can be captured and mined at the same time to form a higher-level feature representation. Specifically, the voltage level timing-associated implicit feature vector and the chip real-time temperature timing-associated implicit feature vector are input into the joint implicit feature capture network to generate a more representative voltage level-chip temperature timing joint implicit feature vector by learning the intrinsic correlation pattern between the voltage level and the chip temperature. Afterwards, the Sigmoid function is used to process it to further capture and extract the most critical feature parts for the comprehensive description of the conditions, and suppress relatively minor features to obtain the voltage level-chip temperature condition feature vector.

[0041] Then, based on the voltage level-chip temperature condition feature vector, the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector are subjected to feature weighted interaction based on condition information to emphasize those features that have a significant impact on the switching frequency control, and obtain the voltage level-chip temperature timing significant interaction fusion representation. Specifically, the semantic contribution of the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector relative to the voltage level-chip temperature condition feature vector is calculated to determine the importance of each feature to the comprehensive representation of the condition, and the voltage level semantic contribution and the chip temperature semantic contribution are obtained. Afterwards, in order to ensure that they are compared on the same scale and that there will be no bias due to numerical differences in the subsequent feature weighted modulation interaction process, the voltage level semantic contribution and chip temperature semantic contribution are normalized, and the normalized voltage level semantic contribution and chip temperature semantic contribution are used to weighted modulate the voltage level timing association implicit feature vector and chip real-time temperature timing association implicit feature vector to highlight and characterize the more important parts of the conditional features, thereby generating the modulated voltage level timing association implicit feature vector and the modulated chip real-time temperature timing association implicit feature vector. Finally, the modulated voltage level timing association implicit feature vector is used as the query vector, the modulated chip real-time temperature timing association implicit feature vector is used as the key vector, and the voltage level-chip temperature conditional feature vector is used as the value vector, which is input into the converter-structure-based feature-inter-feature significant guided interaction module to utilize the converter structure mechanism to better capture the nonlinear relationship and the complex timing dependency that significantly gives key information, and the voltage level-chip temperature timing significant interaction fusion representation vector is obtained.

[0042] Specifically, in an embodiment of the present application, the voltage level-chip temperature implicit feature joint subunit 1341 includes: a voltage level-chip temperature timing joint secondary subunit, which is used to input the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector into a joint implicit feature capture network to obtain a voltage level-chip temperature timing joint implicit feature vector; and a voltage level-chip temperature conditional feature generation secondary subunit, which is used to perform feature activation based on a Sigmoid function on the voltage level-chip temperature timing joint implicit feature vector to obtain the voltage level-chip temperature conditional feature vector.

[0043] More specifically, in an embodiment of the present application, the voltage level-chip temperature timing joint secondary sub-unit is used to: after adding the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector by position, multiply the obtained voltage level-chip temperature timing sum vector by the weight matrix and then add it by position with the bias vector to obtain the voltage level-chip temperature timing joint interaction vector; use the tanh function to process the voltage level-chip temperature timing joint interaction vector to obtain the voltage level-chip temperature timing joint implicit feature vector.

[0044] Specifically, in an embodiment of the present application, the voltage level-chip temperature condition feature interaction subunit 1342 includes: a voltage level semantic contribution calculation secondary subunit, which is used to calculate the voltage level semantic contribution of the voltage level timing-associated implicit feature vector relative to the voltage level-chip temperature condition feature vector; a chip temperature semantic contribution calculation secondary subunit, which is used to calculate the chip temperature semantic contribution of the chip real-time temperature timing-associated implicit feature vector relative to the voltage level-chip temperature condition feature vector; a voltage level chip temperature feature modulation secondary subunit, which is used to normalize the voltage level semantic contribution and the chip temperature semantic contribution, and use the normalized voltage level semantic contribution and the normalized chip temperature semantic contribution to modulate the voltage level timing-associated implicit feature vector and the chip real-time temperature timing-associated implicit feature vector. The temperature timing-associated implicit feature vector is weighted modulated to obtain the modulated voltage level timing-associated implicit feature vector and the modulated chip real-time temperature timing-associated implicit feature vector; the voltage level-chip temperature interaction fusion secondary subunit is used to use the modulated voltage level timing-associated implicit feature vector as the query vector, the modulated chip real-time temperature timing-associated implicit feature vector as the key vector and the voltage level-chip temperature conditional feature vector as the value vector, and input the modulated voltage level timing-associated implicit feature vector, the modulated chip real-time temperature timing-associated implicit feature vector and the voltage level-chip temperature conditional feature vector into the converter structure-based feature-significant guided interaction module to obtain the voltage level-chip temperature timing significant interaction fusion representation vector as the voltage level-chip temperature timing significant interaction fusion representation.

[0045] More specifically, in the embodiment of the present application, the voltage level semantic contribution calculation secondary subunit is used to: calculate the positional division of the voltage level timing-associated implicit feature vector and the voltage level-chip temperature condition feature vector to obtain the voltage level semantic contribution vector; calculate the base-two logarithmic function value of the absolute value of each eigenvalue of the voltage level semantic contribution vector to obtain the voltage level semantic contribution logarithmic vector; calculate the positional dot product of the voltage level timing-associated implicit feature vector and the voltage level semantic contribution logarithmic vector, and perform position-by-position multiplication on the obtained dot product vector to obtain the voltage level semantic contribution value; calculate the exponential function of the voltage level semantic contribution value with the natural constant e as the base to obtain the voltage level semantic contribution. Similarly, the calculation process of the chip temperature semantic contribution is consistent with the calculation process of the voltage level semantic contribution.

[0046] More specifically, in an embodiment of the present application, the voltage level chip temperature feature modulation secondary sub-unit is used to: calculate the sum of the voltage level semantic contribution and the chip temperature semantic contribution to obtain the voltage level-chip temperature semantic contribution sum; respectively divide the voltage level semantic contribution and the chip temperature semantic contribution by the voltage level-chip temperature semantic contribution sum to obtain the normalized voltage level semantic contribution and the normalized chip temperature semantic contribution; perform position point multiplication on the voltage level timing-associated implicit feature vector and the normalized voltage level semantic contribution to obtain the modulated voltage level timing-associated implicit feature vector; perform position point multiplication on the chip real-time temperature timing-associated implicit feature vector and the normalized chip temperature semantic contribution to obtain the modulated chip real-time temperature timing-associated implicit feature vector.

[0047] More specifically, the voltage level-chip temperature interaction fusion secondary sub-unit is used to: vector multiply the modulated voltage level timing associated implicit feature vector with the transposed vector of the modulated chip real-time temperature timing associated implicit feature vector, and divide the obtained modulated voltage level-chip temperature timing association matrix by the square root of the length of the modulated chip real-time temperature timing associated implicit feature vector by position to obtain a modulated voltage level-chip temperature timing association scaling matrix; input the modulated voltage level-chip temperature timing association scaling matrix into a softmax function, and matrix-vector multiply the obtained modulated voltage level-chip temperature timing association scaling activation matrix with the voltage level-chip temperature conditional feature vector to obtain the voltage level-chip temperature timing significant interaction fusion representation vector.

[0048] In the embodiment of the present application, specifically, the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector are subjected to significant interactive fusion between conditional features, which can be expressed by the formula: ; ; ; ; ; ; ; ; ; Wherein, V1 and V2 are the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector, respectively. To add by position, W VT and b VT are the weight matrix and bias vector respectively, for Function, V J is the voltage level-chip temperature timing joint implicit eigenvector, for function, represents the voltage level-chip temperature condition feature vector, is the eigenvalue of each position in the voltage level time series associated implicit eigenvector, The eigenvalues ​​of each position in the implicit eigenvector associated with the chip real-time temperature timing, is the eigenvalue of each position in the voltage level-chip temperature condition eigenvector, L is the number of eigenvalues ​​in the voltage level timing-related implicit eigenvector and the chip real-time temperature timing-related implicit eigenvector, represents the logarithmic function value with base 2, represents an exponential function with the natural constant e as the base, is the voltage level semantic contribution, is the semantic contribution of chip temperature, and They are the normalized voltage level semantic contribution and the normalized chip temperature semantic contribution, and They are the implicit feature vector associated with the timing of the voltage level after modulation and the implicit feature vector associated with the timing of the real-time temperature of the chip after modulation, yes The transposed vector of Length, represents vector multiplication, yes function, is a vector representing the significant interaction between voltage level and chip temperature timing.

[0049] In an embodiment of the present application, the optimization instruction generation unit 135 is used to obtain an optimization instruction based on the voltage level-chip temperature timing significant interaction fusion representation, and the optimization instruction includes a recommended value of the switching frequency at the next time point. Specifically, in an embodiment of the present application, the optimization instruction generation unit is used to: input the voltage level-chip temperature timing significant interaction fusion representation vector into a decoder-based optimization controller to obtain the optimization instruction, and the optimization instruction includes a recommended value of the switching frequency at the next time point. That is, the voltage level-chip temperature timing significant interaction fusion representation obtained by significantly interacting and fusion of the voltage level timing association implicit feature vector and the chip real-time temperature timing association implicit feature vector is used for decoding processing, so as to automatically recommend the switching frequency value at the next time point. In this way, whether under different load conditions or in changing ambient temperatures, the switching frequency can be dynamically adjusted according to the real-time monitored data to ensure that the best performance can be maintained under various working conditions, which not only significantly improves the thermal management capability of the chip, but also greatly enhances the degree of intelligent control.

[0050] It should be understood that in the technical solution of the present application, the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector respectively represent the long-range-short-range timing-related features of the voltage level of the input power supply of the wireless power transmitting chip and the long-range-short-range timing-related features of the chip real-time temperature. When the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector are subjected to significant interaction fusion between conditional features, the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector have a more significant feature distribution fine-grained deviation due to the source data modality difference and the source data dimension difference, which will cause the extraction of the joint implicit feature to have fine-grained expression distortion, thereby causing the feature manifold of the voltage level-chip temperature timing-significant interaction fusion representation vector obtained by significantly guiding the interaction between the features of the conditional information to have expression sparsity and uneven distribution in the high-dimensional feature space, thereby affecting the accuracy of the optimization instructions obtained by the decoder-based optimization controller.

[0051] Based on this, in a preferred embodiment, the voltage level-chip temperature timing significant interaction fusion representation vector is input into a decoder-based optimization controller to obtain an optimization instruction, including: performing L random sampling on the voltage level-chip temperature timing significant interaction fusion representation vector to obtain L chip state random perturbation eigenvalues; arranging the L chip state random perturbation eigenvalues ​​in order from large to small to obtain a chip state random perturbation ordered vector; calculating the self-inner product of the voltage level-chip temperature timing significant interaction fusion representation vector to obtain a chip state energy modulation eigenvalue; and performing L random sampling on the chip state random perturbation ordered vector based on the chip state energy modulation eigenvalue. Perform semantic intensity scaling to obtain a semantically enhanced chip state random perturbation ordered vector; calculate the product of the semantically enhanced chip state random perturbation ordered vector and the transposed vector of the voltage level-chip temperature timing significant interaction fusion representation vector to obtain the chip state best sample prompt orthogonal modulation matrix; calculate the matrix product of the chip state best sample prompt orthogonal modulation matrix and the voltage level-chip temperature timing significant interaction fusion representation vector to obtain an optimized voltage level-chip temperature timing significant interaction fusion representation vector; input the optimized voltage level-chip temperature timing significant interaction fusion representation vector into the decoder-based optimization controller to obtain the optimization instruction.

[0052] The above optimization process is expressed as follows: ; ; ; ; ; ; ; ; in, and The voltage level-chip temperature timing significant interaction fusion representation vector is The random sampling The random perturbation characteristic value of each chip state, represents L random samplings, represents the Gaussian density probability function, The voltage level-chip temperature timing significant interaction fusion represents the mean value of the vector, The voltage level-chip temperature timing significant interaction fusion representation vector, It means to calculate the mean of the vector. The variance of the fusion representation vector indicating the significant interaction between the voltage level and chip temperature timing is, The voltage level-chip temperature timing significant interaction fusion representation vector The eigenvalues ​​at the positions, The length of the vector representing the significant interaction between the voltage level and chip temperature timing is, Express Arrange them in order from large to small. represents the randomly disturbed ordered vector of the semantically enhanced chip state, represents the square of the vector's two-norm, represents the chip state energy modulation characteristic value, It means point multiplication by position. represents matrix multiplication, The transposed vector of the fusion representation vector representing the significant interaction between the voltage level and the chip temperature timing is shown, The best sample of the chip state indicates the orthogonal modulation matrix, A vector is shown representing the optimized voltage level-chip temperature timing significant interaction fusion.

[0053] Accordingly, by performing L random sampling on the voltage level-chip temperature timing significant interaction fusion representation vector to obtain a set of new feature values ​​based on the original features but containing slight changes, randomness is introduced to explore different aspects of the feature space, and by simulating the noise or variation in the actual data, the model can be better generalized to unseen data. Then, these chip state random perturbation feature values ​​are arranged in order from large to small to form a chip state random perturbation ordered vector to identify which perturbation directions may be the most important for the current problem. Such an ordering not only helps the algorithm focus on the feature differences that can best distinguish different categories, but also helps to reveal hidden data structures or patterns. Subsequently, the inner product of the voltage level-chip temperature timing significant interaction fusion representation vector is calculated to obtain the chip state energy modulation eigenvalue. The chip state energy modulation eigenvalue reflects the overall strength or "energy" of the original feature vector, and provides a benchmark for measuring the importance of the feature. Using this chip state energy modulation eigenvalue as a reference point, the previously formed chip state random perturbation ordered vector is semantically scaled to construct a semantically enhanced chip state random perturbation ordered vector. In this way, those disturbances that appear to be more important in the original feature space are amplified, thereby enhancing the model's sensitivity to changes in key features, while also retaining relatively small but potentially useful disturbance information.

[0054] Then, the product of the semantically enhanced random perturbation ordered vector of chip state and the transpose of the voltage level-chip temperature timing significant interaction fusion representation vector is calculated to obtain the chip state best sample prompt orthogonal modulation matrix, the purpose of which is to find the interaction between features from two different perspectives. The formed matrix can be regarded as a conversion tool for capturing and representing the complex linear relationship between features. Finally, the final feature structure modulation is completed by applying the above-constructed chip state best sample prompt orthogonal modulation matrix to the original voltage level-chip temperature timing significant interaction fusion representation vector, so that the features are more in line with the requirements of the objective function, reducing redundant information, while maximizing the retention of useful information, so as to improve learning efficiency and prediction performance.

[0055] In summary, the feature manifold optimization process of the voltage level-chip temperature timing significant interaction fusion representation vector is clarified, which is based on the fine-grained target retrieval of random perturbations to extract the best prompt samples, and then guide the adversarial robustness learning based on the best prompt samples to complete the structure of the high-dimensional manifold of the feature vector in the feature space, so as to improve the detail and structure of the feature expression. In this way, the accuracy of the optimization instructions obtained by the decoder-based optimization controller is improved. In this way, whether under different load conditions or in changing ambient temperatures, the switching frequency can be dynamically adjusted according to the real-time monitored data to ensure that the best performance can be maintained under various working conditions. This not only significantly improves the thermal management capabilities of the chip, but also greatly enhances the degree of intelligent control.

[0056] Specifically, in another embodiment of the present application, a circuit design diagram of a wireless power transmission chip is also provided. Figure 5 4 is a circuit design diagram of a wireless power transmitting chip according to an embodiment of the present application.

[0057] In summary, the wireless power transmitter chip 100 based on the embodiment of the present application is explained, which obtains the time queue of the voltage level of the input power supply and the time queue of the real-time temperature of the chip, and uses deep learning data analysis and processing technology to perform implicit coding of the timing association of the voltage level and the real-time temperature of the chip, so as to automatically recommend the switching frequency value at the next time point based on the conditional significant interaction fusion representation between the implicit characteristics of the timing association of the voltage level and the implicit characteristics of the timing association of the real-time temperature of the chip. In this way, whether under different load conditions or in changing ambient temperatures, the switching frequency can be dynamically adjusted according to the real-time monitored data to ensure that the best performance can be maintained under various working conditions, which not only significantly improves the thermal management capability of the chip, but also greatly enhances the degree of intelligent control.

[0058] As described above, the wireless power transmitting chip 100 according to the embodiment of the present application can be implemented in various wireless terminals, such as a server with a wireless power transmitting chip algorithm. In a possible implementation, the wireless power transmitting chip 100 according to the embodiment of the present application can be integrated into the wireless terminal as a software module and / or a hardware module. For example, the wireless power transmitting chip 100 can be a software module in the operating system of the wireless terminal, or can be an application developed for the wireless terminal; of course, the wireless power transmitting chip 100 can also be one of the many hardware modules of the wireless terminal.

[0059] Alternatively, in another example, the wireless power transmitter chip 100 and the wireless terminal may also be separate devices, and the wireless power transmitter chip 100 may be connected to the wireless terminal through a wired and / or wireless network, and transmit interactive information in accordance with an agreed data format.

[0060] Figure 6 Flowchart of the method for transmitting a wireless power chip according to an embodiment of the present application. Figure 6 As shown, the method of the wireless power transmitting chip according to the embodiment of the present application includes: S110, obtaining the time queue of the voltage level of the input power supply; S120, obtaining the time queue of the real-time temperature of the chip; S130, performing time series encoding on the time queue of the voltage level and the time queue of the real-time temperature of the chip to obtain the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector; S140, performing conditional significant interaction fusion on the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector to obtain the voltage level-chip temperature timing significant interaction fusion representation; S150, based on the voltage level-chip temperature timing significant interaction fusion representation, obtaining an optimization instruction, the optimization instruction including a recommended value of the switching frequency at the next time point.

[0061] Here, those skilled in the art can understand that the specific operations of each step in the method of the wireless power transmission chip have been referred to above. Figures 1 to 4 The wireless power transmission chip has been described in detail, and therefore, its repeated description will be omitted.

[0062] The above descriptions of various implementations of the present disclosure are exemplary and not exhaustive. The disclosure is not limited to the disclosed implementations, and many modifications and variations are obvious to those of ordinary skill in the art without departing from the scope and spirit of the described implementations. The terms used herein are selected to best explain the principles of the implementations, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the various practical methods disclosed herein.

Claims

1. A wireless power transmission chip, characterized in that: include: A voltage identification module, used to identify the voltage level of the input power supply; Temperature detection module, used to detect the real-time temperature of the chip through a temperature sensor; An adaptive control module, configured to adaptively adjust the switching frequency based on the voltage level of the input power supply and the real-time temperature of the chip; Wherein, the adaptive control module comprises: A voltage level timing acquisition unit, used to acquire a time sequence of a voltage level of the input power supply; A real-time temperature timing acquisition unit, used to acquire a time sequence of the real-time temperature of the chip; A voltage level real-time temperature timing association unit, used for performing time series encoding on the time queue of the voltage level and the time queue of the chip real-time temperature to obtain a voltage level timing association implicit feature vector and a chip real-time temperature timing association implicit feature vector; A voltage level-chip temperature timing significant interaction unit, used for performing conditional feature significant interaction fusion on the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector to obtain a voltage level-chip temperature timing significant interaction fusion representation; The optimization instruction generating unit is used to obtain the optimization instruction based on the voltage level-chip temperature timing significant interaction fusion representation, and the optimization instruction includes a recommended value of the switching frequency at the next time point.

2. The wireless power transmitting chip according to claim 1, characterized in that: The voltage level real-time temperature timing association unit is used to: input the time queue of the voltage level and the time queue of the chip real-time temperature into a time series encoder based on a forward LSTM model to obtain the voltage level timing association implicit feature vector and the chip real-time temperature timing association implicit feature vector.

3. The wireless power transmitting chip according to claim 2, characterized in that: The voltage level-chip temperature timing significant interaction unit includes: A voltage level-chip temperature implicit feature combining subunit, used for combining the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector by sharing implicit features to obtain a voltage level-chip temperature condition feature vector; The voltage level-chip temperature condition feature interaction subunit is used to perform feature weighted interaction based on conditional information on the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector based on the voltage level-chip temperature condition feature vector to obtain the voltage level-chip temperature timing significant interaction fusion representation.

4. The wireless power transmitting chip according to claim 3, characterized in that: The voltage level-chip temperature implicit feature combined subunit includes: A voltage level-chip temperature timing joint secondary subunit, used for inputting the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector into a joint implicit feature capture network to obtain a voltage level-chip temperature timing joint implicit feature vector; The voltage level-chip temperature condition feature generation secondary subunit is used to perform feature activation based on the Sigmoid function on the voltage level-chip temperature timing joint implicit feature vector to obtain the voltage level-chip temperature condition feature vector.

5. The wireless power transmitting chip according to claim 4, characterized in that: The voltage level-chip temperature timing is combined with a secondary subunit for: After adding the voltage level timing associated implicit feature vector and the chip real-time temperature timing associated implicit feature vector by position, the obtained voltage level-chip temperature timing sum vector is multiplied by the weight matrix and then added by position with the bias vector to obtain the voltage level-chip temperature timing joint interaction vector; The voltage level-chip temperature timing joint interaction vector is processed using a tanh function to obtain the voltage level-chip temperature timing joint implicit feature vector.

6. The wireless power transmitting chip according to claim 5, characterized in that: The voltage level-chip temperature condition characteristic interaction subunit includes: A voltage level semantic contribution calculation secondary subunit is used to calculate the voltage level semantic contribution of the voltage level timing associated implicit feature vector relative to the voltage level-chip temperature condition feature vector; A chip temperature semantic contribution calculation secondary subunit is used to calculate the chip temperature semantic contribution of the chip real-time temperature timing associated implicit feature vector relative to the voltage level-chip temperature condition feature vector; The voltage level chip temperature feature modulation secondary subunit is used to normalize the voltage level semantic contribution and the chip temperature semantic contribution, and use the normalized voltage level semantic contribution and the normalized chip temperature semantic contribution to weighted modulate the voltage level timing-associated implicit feature vector and the chip real-time temperature timing-associated implicit feature vector to obtain the modulated voltage level timing-associated implicit feature vector and the modulated chip real-time temperature timing-associated implicit feature vector; The voltage level-chip temperature interaction fusion secondary sub-unit is used to use the implicit feature vector associated with the modulation voltage level timing as the query vector, the implicit feature vector associated with the modulation chip real-time temperature timing as the key vector and the voltage level-chip temperature condition feature vector as the value vector, and input the implicit feature vector associated with the modulation voltage level timing, the implicit feature vector associated with the modulation chip real-time temperature timing and the voltage level-chip temperature condition feature vector into the feature-significant guided interaction module based on the converter structure to obtain the voltage level-chip temperature timing significant interaction fusion representation vector as the voltage level-chip temperature timing significant interaction fusion representation.

7. The wireless power transmitting chip according to claim 6, characterized in that: The voltage level semantic contribution calculation secondary subunit is used to: Calculating the positional division of the voltage level timing-associated implicit feature vector and the voltage level-chip temperature condition feature vector to obtain a voltage level semantic contribution vector; Calculating a logarithmic function value with base 2 of the absolute value of each eigenvalue of the voltage level semantic contribution vector to obtain a voltage level semantic contribution logarithmic vector; Calculate the positional dot product of the voltage level time series associated implicit feature vector and the voltage level semantic contribution logarithmic vector, and perform positional multiplication on the obtained dot product vector to obtain the voltage level semantic contribution value; An exponential function with the natural constant e as the base and the voltage level semantic contribution value as the exponent is calculated to obtain the voltage level semantic contribution degree.

8. The wireless power transmitting chip according to claim 7, characterized in that: The voltage level chip temperature characteristic modulation secondary subunit is used to: Calculating a sum of the voltage level semantic contribution and the chip temperature semantic contribution to obtain a voltage level-chip temperature semantic contribution sum; Respectively dividing the voltage level semantic contribution and the chip temperature semantic contribution by the voltage level-chip temperature semantic contribution sum to obtain the normalized voltage level semantic contribution and the normalized chip temperature semantic contribution; Multiplying the voltage level time series associated implicit feature vector and the normalized voltage level semantic contribution by position points to obtain the modulated voltage level time series associated implicit feature vector; The chip real-time temperature timing-associated implicit feature vector is multiplied by the normalized chip temperature semantic contribution by position point to obtain the modulated chip real-time temperature timing-associated implicit feature vector.

9. The wireless power transmitting chip according to claim 8, characterized in that: The optimization instruction generating unit is used to: input the voltage level-chip temperature timing significant interaction fusion representation vector into a decoder-based optimization controller to obtain the optimization instruction, and the optimization instruction includes a recommended value of the switching frequency at the next time point.

10. A method for transmitting a wireless power supply chip according to any one of claims 1 to 9, characterized in that: include: Obtaining a time queue of a voltage level of the input power supply; A time queue for obtaining the real-time temperature of the chip; Performing time series encoding on the time queue of the voltage level and the time queue of the chip real-time temperature to obtain a voltage level timing-related implicit feature vector and a chip real-time temperature timing-related implicit feature vector; Performing conditional feature-inter-significant interaction fusion on the voltage level timing-related implicit feature vector and the chip real-time temperature timing-related implicit feature vector to obtain a voltage level-chip temperature timing-significant interaction fusion representation; Based on the voltage level-chip temperature timing significant interaction fusion representation, an optimization instruction is obtained, and the optimization instruction includes a recommended value of the switching frequency at the next time point.

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