Photoelectric detector, preparation method thereof and electronic equipment

Abstract

The invention discloses a photoelectric detector, a preparation method thereof and electronic equipment, the photoelectric detector comprises a substrate, a first electrode, a first planarization layer, a photoelectric conversion layer and a second electrode, and the first electrode is arranged on one side of the substrate; the first planarization layer is arranged on the side, away from the substrate, of the first electrode, an opening is formed in the first planarization layer, and at least part of the first electrode is exposed out of the opening; at least part of the photoelectric conversion layer is arranged in the opening, the photoelectric conversion layer within a preset distance away from the side wall of the opening in the direction parallel to the substrate forms a passivation area, and the second electrode is arranged on the side, away from the substrate, of the photoelectric conversion layer. The side wall of the photoelectric conversion layer is passivated to form the passivation layer, so that an electric leakage channel can be blocked, and the performance of the photoelectric detector is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a photoelectric detector and a preparation method thereof, and an electronic device. Background Art

[0002] Photodetectors are photoelectric conversion devices that convert light into electricity based on the photovoltaic effect. Photodetectors have the advantages of fast response speed, high sensitivity and wide linear range, and are widely used in communications, photoelectric measurement and medical fields.

[0003] In order to improve the performance of photodetectors, it is urgent to improve them. Summary of the invention

[0004] The present application mainly provides a photoelectric detector and a preparation method thereof, and an electronic device, which can improve the performance of the photoelectric detector.

[0005] In order to solve the above technical problems, the technical solution adopted in the present application is: to provide a photodetector, comprising: a substrate; a first electrode, arranged on one side of the substrate; a first planarization layer, arranged on the side of the first electrode away from the substrate, the first planarization layer has an opening, and at least a portion of the first electrode is exposed from the opening; a photoelectric conversion layer, at least a portion of which is arranged in the opening, wherein in a direction parallel to the substrate, the photoelectric conversion layer within a preset distance from the side wall of the opening forms a passivation region; a second electrode, arranged on the side of the photoelectric conversion layer away from the substrate.

[0006] In order to solve the above technical problem, another technical solution adopted in the present application is: to provide an electronic device, which includes the photoelectric detector in the above embodiment.

[0007] In order to solve the above technical problems, another technical solution adopted in the present application is: to provide a method for preparing a photodetector, the method comprising: forming a first electrode on one side of a substrate; forming a first planarization layer and a third planarization layer on the entire surface in sequence on the side of the first electrode facing away from the substrate; forming an opening that passes through the first planarization layer and the third planarization layer to expose at least part of the first electrode; forming a photoelectric conversion layer on the entire surface of the first electrode facing away from the substrate; peeling off the third planarization layer from the first planarization layer and removing the third planarization layer; forming a second electrode on the surface of the remaining photoelectric conversion layer facing away from the substrate.

[0008] The beneficial effect of the present application is that a passivation region is formed on the surface of the photoelectric conversion layer facing the side wall of the opening, which can block the leakage channel and improve the performance of the photodetector. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them:

[0010] Figure 1 This is a schematic structural diagram of an implementation scheme of a photoelectric detector in this application;

[0011] Figure 2 for Figure 1 A schematic structural diagram of an embodiment of a photoelectric conversion layer;

[0012] Figure 3 It is a structural schematic diagram of another embodiment of the photoelectric detector in this application;

[0013] Figure 4 It is a structural schematic diagram of another embodiment of the photoelectric detector in this application;

[0014] Figure 5 This is a schematic diagram of a process for implementing a method for preparing a photodetector in this application;

[0015] Figure 6 In one embodiment Figure 5 Part of the preparation process diagram corresponding to the method;

[0016] Figure 7 In another embodiment Figure 5 Part of the preparation process diagram corresponding to the method;

[0017] Figure 8 In another embodiment Figure 5 Diagram of some preparation processes corresponding to the method.

[0018] Explanation of the reference numerals: 10 substrate; 90 driving layer; 91 thin film transistor; 20 first electrode; 30 first planarization layer; 31 opening; 40 photoelectric conversion layer; 41 side wall; 42 gap; 43 first semiconductor sublayer; 44 intrinsic semiconductor sublayer; 45 second semiconductor sublayer; 46 passivation layer; 50 second electrode; 60 second planarization layer; 70 third electrode; 80 photoresist layer; 82 third planarization layer; 81 insulating layer. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0021] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0022] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0023] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0024] See also Figure 1The present application provides a photodetector, which includes a substrate 10, a first electrode 20, a first planarization layer 30, a photoelectric conversion layer 40 and a second electrode 50, wherein the first electrode 20 is arranged on one side of the substrate 10; the first planarization layer 30 is arranged on the side of the first electrode 20 away from the substrate 10 and is provided with an opening 31, and at least a portion of the first electrode 20 is exposed from the opening 31; at least a portion of the photoelectric conversion layer 40 is arranged in the opening 31, wherein in a direction parallel to the substrate 10, the photoelectric conversion layer 40 within a preset distance from the side wall of the opening 31 forms a passivation region 46; the second electrode 50 is arranged on the side of the photoelectric conversion layer 40 away from the substrate 10.

[0025] Specifically, the substrate 10 plays a supporting role, and it can be a flexible substrate or a rigid substrate, and it can be made of materials such as glass and polyimide, which is not limited in the present application.

[0026] The first electrode 20 is located on one side of the substrate 10 and is used to apply a voltage. In one embodiment, the first electrode 20 is made of a light-proof metal material, which can block light from passing through the first electrode 20 .

[0027] At least part of the photoelectric conversion layer 40 is located in the opening 31 of the first flat layer, and is used to convert optical signals and electrical signals. During the preparation process, after the photoelectric conversion layer 40 is formed in the opening 31, the sidewall 41 of the photoelectric conversion layer 40 is passivated to form a passivation region 46, which can block the leakage channel and improve performance. The sidewall 41 of the photoelectric conversion layer 40 can be passivated by ion implantation or plasma passivation.

[0028] The second electrode 50 is disposed on the side of the photoelectric conversion layer 40 away from the substrate 10 to connect the photoelectric conversion layer 40 to the outside. Among them, one of the first electrode 20 and the second electrode 50 is an anode and the other is a cathode. For example, the first electrode 20 is an anode and the second electrode 50 is a cathode.

[0029] It can be seen from the above content that the present application forms a passivation region 46 by passivating the sidewall 41 of the photoelectric conversion layer 40 , thereby blocking the leakage channel and improving the performance of the photodetector.

[0030] Please continue reading Figure 1 A gap 42 is formed between the photoelectric conversion layer 40 and the side wall of the opening 31 ; the photodetector further includes a second planarization layer 60 , which is arranged on the side of the first planarization layer 30 away from the substrate 10 and fills the gap 42 between the photoelectric conversion layer 40 and the side wall of the opening 31 .

[0031] Specifically, the gap 42 between the photoelectric conversion layer 40 and the side of the opening 31 can facilitate the passivation of the side wall 41 of the photoelectric conversion layer 40 during the preparation process, that is, during the preparation process, before the photoelectric conversion layer 40 is passivated, there is a gap 42 between the photoelectric conversion layer 40 and the side of the opening 31, and then the side wall 41 of the photoelectric conversion layer 40 is passivated through the gap 42. At the same time, in order to ensure the sealing and overall flatness, after passivation, a second flattening layer 60 is also provided to fill the gap 42 between the photoelectric conversion layer 40 and the opening 31, so as to improve the overall structural stability of the photodetector.

[0032] In one embodiment, the first planarization layer 30 and the second planarization layer 60 are made of the same material. For example, the first planarization layer 30 and the second planarization layer 60 are both made of resin material. The same material is convenient for the same preparation process, which can reduce costs and improve preparation efficiency. Of course, in other embodiments, different materials can be used to prepare the first planarization layer 30 and the second planarization layer 60. Specifically, appropriate materials can be selected according to the preparation conditions and positions of the two.

[0033] In one embodiment, the thickness of the first planarization layer 30 ranges from 2000A to 8000A; for example, the thickness of the first planarization layer 30 may be 2000A, 2500A, 3000A, 3500A, 4000A, 4500A, 5000A, 5500A, 6000A, 6500A, 7000A, 7500A or 8000A, etc.

[0034] In one embodiment, the thickness of the photoelectric conversion layer 40 is equal to the thickness of the first planarization layer 30 to ensure a high flatness of the photodetector. The thickness of the photoelectric conversion layer 40 is equal to the thickness of the first planarization layer 30, which means that the thickness of the photoelectric conversion layer 40 is substantially equal to the thickness of the first planarization layer 30, and the thickness difference between the two is less than a threshold value.

[0035] In one embodiment, the thickness of the photoelectric conversion layer 40 ranges from 2000A to 8000A; for example, the thickness of the photoelectric conversion layer 40 may be 2000A, 2500A, 3000A, 3500A, 4000A, 4500A, 5000A, 5500A, 6000A, 6500A, 7000A, 7500A or 8000A, etc.

[0036] In one embodiment, the width of the cross section of the opening 31 is constant in the direction away from the substrate 10. Figure 1 , the cross section of the opening 31 is rectangular. In other embodiments, the cross section of the opening 31 may also be in other shapes such as an inverted trapezoid, which is not limited here.

[0037] In one embodiment, the angle between the side surface of the opening 31 and the substrate 10 is in the range of 30°-90°, for example, the angle may be 30°, 45°, 60°, 75° or 90°.

[0038] Please combine Figure 1 as well as Figure 2 The photoelectric conversion layer 40 includes a first semiconductor sublayer 43, an intrinsic semiconductor sublayer 44, and a second semiconductor sublayer 45 which are stacked in sequence in a direction away from the substrate 10, wherein the first semiconductor sublayer 43 is an N-type semiconductor layer, the second semiconductor sublayer 45 is a P-type semiconductor layer, and the material of the N-type semiconductor layer includes an oxide semiconductor material. Specifically, the N-type semiconductor layer is prepared using an oxide semiconductor material. Since the oxide semiconductor material has the advantages of low defects, high mobility, and wide bandwidth, when electrons flow to the first semiconductor sublayer 43, the first semiconductor sublayer 43 can block the flow of current, thereby achieving current limiting and low leakage performance.

[0039] In one embodiment, the oxide semiconductor material includes indium gallium zinc oxide. Specifically, the indium gallium zinc oxide material has a more complete structure and fewer defects. When the photodetector is working, the indium gallium zinc oxide material generates less energy loss and thermal noise, which is beneficial to reducing the leakage current of the photodetector. In addition, since the electron mobility of the indium gallium zinc oxide material is relatively high, the electrons move faster in the first semiconductor sublayer 43, thereby reducing the occurrence of leakage current. In addition, the indium gallium zinc oxide material also has a wider band gap, and a higher voltage is required to allow electrons to enter the conduction band, so the generation of leakage current can be reduced during the switching process of the photodetector.

[0040] In one embodiment, the thickness of the N-type semiconductor layer ranges from 1 to 50 nm. Specifically, the thickness of the N-type semiconductor layer can be 1, 5, 10, 15, 20, 25, 30, 35, 40, 45 or 50 nm.

[0041] Of course, in other implementations, the material of the N-type semiconductor layer may also be an amorphous semiconductor, an inorganic composite semiconductor, an organic composite semiconductor, etc.

[0042] See also Figure 3 and Figure 4 The first semiconductor sublayer 43 is located on the side of the first planarization layer 30 close to the substrate 10 , and at least a portion of the first semiconductor sublayer 43 is exposed from the opening 31 , while the intrinsic semiconductor sublayer 44 and the second semiconductor sublayer 45 are located in the opening 31 .

[0043] Specifically, during the preparation process, before forming the first planarization layer 30, the first semiconductor sublayer 43 is first formed on the first electrode 20, and then the first planarization layer 30 is formed, and the opening 31 is formed on the first planarization layer 30. Because the first semiconductor sublayer 43 has been formed on the first electrode 20 when the opening 31 is formed, the first semiconductor sublayer 43 can protect the first electrode 20 and avoid damaging the first electrode 20 when forming the opening 31. Then, after the opening 31 is formed, the intrinsic semiconductor sublayer 44 and the second semiconductor sublayer 45 are formed in the opening 31.

[0044] Continue reading Figure 3 as well as Figure 4 In one embodiment, the orthographic projection of the first semiconductor sublayer 43 on the substrate 10 covers the orthographic projection of the first electrode 20 on the substrate 10. Specifically, this arrangement can increase the contact area between the first semiconductor sublayer 43 and the first electrode 20, which can effectively reduce the resistance of the first electrode 20, and can also protect the first electrode 20 in all aspects.

[0045] Of course, in other embodiments, such as Figure 1 As shown, the first semiconductor sublayer 43, the intrinsic semiconductor sublayer 44 and the second semiconductor sublayer 45 can also be located in the opening 31, that is, during preparation, the first planarization layer 30 is formed first, then the opening 31 is formed, and then the first semiconductor sublayer 43, the intrinsic semiconductor sublayer 44 and the second semiconductor sublayer 45 are formed in the opening 31 in sequence.

[0046] Please continue reading Figure 1 , Figure 3 and Figure 4 The photodetector further includes a driving layer 90, which is disposed between the substrate 10 and the first electrode 20, and the driving layer 90 includes a thin film transistor 91, wherein the first electrode 20 is electrically connected to the thin film transistor 91. Specifically, the thin film transistor 91 in the driving layer 90 is electrically connected to the photoelectric conversion layer 40 to control the photoelectric conversion layer 40. The type of the thin film transistor 91 can be a single-gate thin film transistor or a double-gate thin film transistor, and the present application does not limit its type.

[0047] In one embodiment, continue to refer to Figure 3 The photodetector further includes a third electrode 70, which is located on the side of the first planarization layer 30 away from the substrate 10 and is electrically connected to the second electrode 50. Figure 3 As shown, the third electrode 70 is located on the surface of the first planarization layer 30 facing away from the substrate 10, and is flat, and covers the surface of the second electrode 50 facing away from the substrate 10. Alternatively, as Figure 1 and Figure 4As shown, the third electrode 70 is located on the side of the second planarization layer 60 away from the substrate 10, and is electrically connected to the second electrode 50 through the via hole on the second planarization layer 60. The photodetector further includes an insulating layer 81, which is located on the surface of the third electrode 70 away from the second electrode 50 to play a protective role.

[0048] In one embodiment, the material of the third electrode 70 is the same as that of the second electrode 50. The same material is used to prepare the third electrode 70 and the second electrode 50, which can improve the preparation efficiency. Of course, in other embodiments, different materials can also be used to prepare the third electrode 70 and the second electrode 50, and appropriate materials are selected according to the preparation conditions and positions of the two.

[0049] In one embodiment, the materials of the third electrode 70 and the second electrode 50 both include indium tin oxide. Specifically, the materials of the third electrode 70 and the second electrode 50 can be colorless and transparent indium tin oxide (ITO), which has a good light transmission effect. In another embodiment, the second electrode 50 and the third electrode 70 can be made of other transparent conductive materials, such as indium zinc oxide IZO, indium gallium zinc oxide IGZO.

[0050] The present application also provides an electronic device, which includes the photodetector in the above embodiment. The photodetector provided in the electronic device converts light into photocurrent, outputs and measures the magnitude of the photocurrent, thereby determining the magnitude of the light intensity. For example, the electronic device provided with the photodetector can be specifically applied to under-screen camera or biometric recognition, for example, fingerprint recognition and other scenarios.

[0051] See also Figure 5 and Figure 6 The present application also provides a method for preparing a photoelectric detector, the method comprising:

[0052] S10 : forming a first electrode 20 on one side of the substrate 10 .

[0053] Specifically, the first electrode 20 is prepared first. The first electrode 20 is formed on one side of the substrate 10, and the substrate 10 provides support.

[0054] S20 : ​​forming a first planarization layer 30 , a photoelectric conversion layer 40 and a second electrode 50 on the side of the first electrode 20 facing away from the substrate 10 .

[0055] The first planarization layer 30 has an opening 31 exposing at least a portion of the first electrode 20 , at least a portion of the photoelectric conversion layer 40 is formed in the opening 31 , and the second electrode 50 is located on a side of the photoelectric conversion layer 40 away from the substrate 10 .

[0056] Specifically, the first planarization layer 30, the photoelectric conversion layer 40, and the second electrode 50 are all formed on the side of the first electrode 20 facing away from the substrate 10. After the first planarization layer 30 is prepared, an opening 31 is prepared on the first planarization layer 30, at least part of the first electrode 20 is exposed from the opening 31, and all or part of the photoelectric conversion layer 40 is formed in the opening 31. At this time, the photoelectric conversion layer 40 located in the opening 31 is electrically connected to the first electrode 20. At the same time, the second electrode 50 is located on the side of the photoelectric conversion layer 40 facing away from the substrate 10.

[0057] See also Figure 7 In one embodiment, step S20 includes:

[0058] S21 : forming a first planarization layer 30 on the entire surface of the side of the first electrode 20 facing away from the substrate 10 .

[0059] The first planarization layer 30 is prepared. The first planarization layer 30 is located on the side of the first electrode 20 facing away from the substrate 10 , so the entire surface of the first planarization layer 30 covers the first electrode 20 .

[0060] S22 : forming an opening 31 on the first planarization layer 30 to expose at least a portion of the first electrode 20 , and forming a photoelectric conversion layer 40 in the opening 31 .

[0061] An opening 31 is formed in the first planarization layer 30 , the first electrode 20 is entirely exposed from the opening 31 , or a portion of the first electrode 20 is exposed from the opening 31 , and the photoelectric conversion layer 40 is formed in the opening 31 .

[0062] S23 : patterning the first planarization layer 30 to expose the sidewall 41 of the photoelectric conversion layer 40 .

[0063] The first planarization layer 30 is patterned to expose the sidewall 41 of the photoelectric conversion layer 40 .

[0064] S24 : performing a passivation process on the sidewall 41 of the photoelectric conversion layer 40 .

[0065] The exposed sidewalls 41 of the photoelectric conversion layer 40 are passivated, specifically, ion implantation or plasma passivation is performed to form a passivation region 46 .

[0066] It should be noted that passivation treatment of the sidewalls 41 of the photoelectric conversion layer 40 is not a necessary step. In other embodiments, the sidewalls of the photoelectric conversion layer 40 may not be passivated, and it is not necessary to pattern the first planarization layer 30 to expose the sidewalls 41 of the photoelectric conversion layer 40.

[0067] In one embodiment, in combination Figure 7 , before step S23 patterning the first planarization layer 30, the method further includes:

[0068] S231 : forming a second electrode 50 on a surface of the photoelectric conversion layer 40 facing away from the substrate 10 , wherein the surface of the second electrode 50 facing away from the substrate 10 and the surface of the first planarization layer 30 facing away from the substrate 10 are in the same plane.

[0069] Specifically, the second electrode 50 is formed before the patterned first planarization layer 30, so that the surface of the photoelectric conversion layer 40 facing away from the substrate 10 is protected by the second electrode 50, thereby preventing the surface of the photoelectric conversion layer 40 facing away from the substrate 10 from being patterned, and also preventing the surface of the photoelectric conversion layer 40 facing away from the substrate 10 from being damaged in the subsequent passivation process.

[0070] Please continue reading Figure 7 The specific process of step S23 patterning the first planarization layer 30 includes:

[0071] S232 : forming a photoresist layer 80 on the entire surface of the first planarization layer 30 on the side facing away from the substrate 10 .

[0072] A full-surface photoresist layer 80 is prepared, which is located on the side of the first planarization layer 30 facing away from the substrate 10 .

[0073] S233 : patterning the photoresist layer 80 to expose the first planarization layer 30 around the opening 31 .

[0074] The photoresist layer 80 is patterned, and the first planarization layer 30 around the opening 31 is exposed.

[0075] S234 : using the remaining photoresist layer 80 as a mask pattern to pattern the first planarization layer 30 , so as to expose the sidewall 41 of the photoelectric conversion layer 40 .

[0076] The first planarization layer 30 is patterned using the remaining photoresist layer 80 as a mask, so that the sidewalls 41 of the photoelectric conversion layer 40 are exposed.

[0077] Continue reading Figure 7 In one embodiment, after the passivation process is performed in step S24, the process further includes:

[0078] S241 : forming a second planarization layer 60 on a side of the first planarization layer 30 facing away from the substrate 10 , wherein the second planarization layer 60 fills the side surfaces of the photoelectric conversion layer 40 and the opening 31 .

[0079] The second planarization layer 60 is prepared. The material of the second planarization layer 60 has fluidity and can fill the gap 42 between the side wall 41 of the photoelectric conversion layer 40 and the opening 31 , thereby improving the overall structural stability of the photodetector.

[0080] In one embodiment, see Figure 6 In step S22, an opening 31 exposing at least a portion of the first electrode 20 is formed on the first planarization layer 30, and a photoelectric conversion layer 40 is formed in the opening 31 according to the following method:

[0081] S221 : forming a third planarization layer 82 on the entire surface of the first planarization layer 30 facing away from the substrate 10 .

[0082] The third planarization layer 82 is prepared. The third planarization layer 82 is located on the side of the first planarization layer 30 facing away from the substrate 10 .

[0083] S222 : forming an opening 31 penetrating the first planarization layer 30 and the third planarization layer 82 to expose at least a portion of the first electrode 20 .

[0084] The opening 31 penetrates the first planarization layer 30 and the third planarization layer 82 , so that all or at least a portion of the first electrode 20 is exposed from the opening 31 .

[0085] S223 : forming a photoelectric conversion layer 40 on the entire surface of the third planarization layer 82 on the side facing away from the substrate 10 .

[0086] The entire photoelectric conversion layer 40 is prepared. At this time, part of the photoelectric conversion layer 40 covers the surface of the third planarization layer 82 facing away from the substrate 10 , and part of the photoelectric conversion layer 40 is located in the opening 31 .

[0087] S224 : peeling off the third planarization layer 82 and the first planarization layer 30 , and removing the third planarization layer 82 .

[0088] The third planarization layer 82 and the first planarization layer 30 are separated. At this time, the photoelectric conversion layer 40 located on the surface of the third planarization layer 82 facing away from the substrate 10 is peeled off together with the third planarization layer 82, and only the photoelectric conversion layer 40 in the opening 31 is retained.

[0089] In this embodiment, by first forming the first planarization layer 30, and forming the photoelectric conversion layer 40 in the opening 31 on the first planarization layer 30, the slope angle, smoothness and uniformity of the photoelectric conversion layer 40 can be controlled through the opening 31, thereby ensuring the flatness of the subsequent process. In addition, by stripping the third planarization layer 82 and the first planarization layer 30, the unnecessary photoelectric conversion layer 40 is taken away, and only the photoelectric conversion layer 40 in the opening 31 is retained, which can ensure the preparation efficiency.

[0090] In this embodiment, in order to ensure that the third planarization layer 82 can be completely peeled off from the first planarization layer 30 and avoid the third planarization layer 82 from remaining, before forming the third planarization layer 82, a barrier layer can be formed on the first planarization layer 30 by, for example, coating, and then a third planarization layer 82 can be formed on the barrier layer. When the third planarization layer 82 is subsequently peeled off, the barrier layer and the third planarization layer 82 can be peeled off together, or the barrier layer can be retained and only the third planarization layer 82 can be peeled off.

[0091] In one embodiment, the material of the barrier layer may include hexamethyldisilazane HMDS. It should be noted that the present application does not limit the material of the barrier layer.

[0092] See also Figure 8 , when the photoelectric conversion layer 40 includes a first semiconductor sublayer 43, an intrinsic semiconductor sublayer 44, and a second semiconductor sublayer 45 which are sequentially stacked in a direction away from the substrate 10, wherein the first semiconductor sublayer 43 is an N-type semiconductor layer, the second semiconductor sublayer 45 is a P-type semiconductor layer, and the material of the N-type semiconductor layer includes an oxide semiconductor material, step S20 includes:

[0093] S25 : forming a first semiconductor sublayer 43 on the side of the first electrode 20 facing away from the substrate 10 .

[0094] The first semiconductor sublayer 43 is prepared. The first semiconductor sublayer 43 is located on the side of the first electrode 20 facing away from the substrate 10 .

[0095] S26 : forming a first planarization layer 30 on the entire surface of the side of the first semiconductor sublayer 43 facing away from the substrate 10 .

[0096] After the first semiconductor sublayer 43 is prepared, a first planarization layer 30 is prepared on the entire surface. At this time, the first planarization layer 30 covers the surface of the first semiconductor sublayer 43 facing away from the substrate 10 .

[0097] S27 : forming an opening 31 on the first planarization layer 30 to expose at least a portion of the first semiconductor sub-layer 43 .

[0098] An opening 31 is prepared in the first planarization layer 30, and all or part of the first semiconductor sublayer 43 is exposed from the opening 31. In one embodiment, the first semiconductor sublayer 43 is completely exposed from the opening 31, increasing the contact area between the film layer subsequently prepared in the opening 31 and the first semiconductor sublayer 43. In another embodiment, part of the first semiconductor sublayer 43 is exposed from the opening 31, which can also ensure the contact between the film layer subsequently prepared in the opening 31 and the first semiconductor sublayer 43, and is beneficial to improving the flatness of the subsequent film layer. S28: An intrinsic semiconductor sublayer 44 and a second semiconductor sublayer 45 are sequentially formed in the opening 31.

[0099] The intrinsic semiconductor sublayer 44 and the second semiconductor sublayer 45 are prepared to complete the preparation of the photoelectric conversion layer 40 .

[0100] In this embodiment, the first semiconductor sublayer 43 is formed before forming the first planarization layer 30 , so that during the preparation of subsequent film layers such as the first planarization layer 30 , the first semiconductor sublayer 43 can effectively protect the first electrode 20 .

[0101] In one embodiment, step S27 and step S28 can also be replaced by: forming a first planarization layer 30 and a third planarization layer 82 on the entire surface on the side of the first semiconductor sublayer 43 facing away from the substrate 10, forming an opening 31 penetrating the first planarization layer 30 and the third planarization layer 82 to expose at least part of the first semiconductor sublayer 43, forming an intrinsic semiconductor sublayer 44 and a second semiconductor sublayer 45 on the entire surface on the side of the first electrode facing away from the substrate 10, peeling the third planarization layer 82 from the first planarization layer 30, and removing the third planarization layer 82, thereby retaining the intrinsic semiconductor sublayer 44 and the second semiconductor sublayer 45 formed in the opening 31. In one embodiment, the orthographic projection of the first semiconductor sublayer 43 on the substrate 10 covers the orthographic projection of the first electrode 20 on the substrate 10. Specifically, this arrangement increases the contact area between the first semiconductor sublayer 43 and the first electrode 20, which can effectively reduce the resistance of the first electrode 20, and at the same time can effectively protect the first electrode 20 in subsequent processes.

[0102] At the same time Figure 8 In an embodiment, after forming the photoelectric conversion layer 40 , a second electrode 50 and a third electrode 70 are further formed, wherein the second electrode 50 is formed on the side of the photoelectric conversion layer 40 facing away from the substrate 10 , and the third electrode 70 is formed on the side of the second electrode 50 facing away from the substrate 10 .

[0103] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A photoelectric detector, characterized in that: include: substrate; A first electrode is arranged on one side of the substrate; A first planarization layer is disposed on a side of the first electrode facing away from the substrate, the first planarization layer is provided with an opening, and at least a portion of the first electrode is exposed through the opening; A photoelectric conversion layer is at least partially disposed in the opening, wherein the photoelectric conversion layer within a preset distance from a side wall of the opening in a direction parallel to the substrate forms a passivation region; The second electrode is arranged on a side of the photoelectric conversion layer away from the substrate.

2. The photodetector according to claim 1, characterized in that: A gap is formed between the photoelectric conversion layer and the side wall of the opening; the photodetector further comprises: A second planarization layer, disposed on a side of the first planarization layer away from the substrate and filling the gap between the photoelectric conversion layer and the side wall of the opening; Preferably, the first planarization layer and the second planarization layer are made of the same material; Preferably, the thickness of the first planarization layer ranges from 2000A to 8000A; Preferably, the thickness of the photoelectric conversion layer is equal to the thickness of the first planarization layer; Preferably, in a direction away from the substrate, a width of the cross section of the opening remains constant.

3. The photodetector according to claim 1, characterized in that: The photoelectric conversion layer includes a first semiconductor sublayer, an intrinsic semiconductor sublayer, and a second semiconductor sublayer which are sequentially stacked in a direction away from the substrate, wherein the first semiconductor sublayer is an N-type semiconductor layer, the second semiconductor sublayer is a P-type semiconductor layer, and the material of the N-type semiconductor layer includes an oxide semiconductor material; Preferably, the oxide semiconductor material comprises indium gallium zinc oxide; Preferably, the thickness of the N-type semiconductor layer is in the range of 1 to 50 nm.

4. The photodetector according to claim 3, characterized in that: The first semiconductor sublayer is located on a side of the first planarization layer close to the substrate and at least a portion of the first semiconductor sublayer is exposed from the opening, and the intrinsic semiconductor sublayer and the second semiconductor sublayer are located in the opening; Preferably, the orthographic projection of the first semiconductor sublayer on the substrate covers the orthographic projection of the first electrode on the substrate.

5. The photodetector according to claim 1, characterized in that: The photodetector further comprises: a driving layer, disposed between the substrate and the first electrode, comprising a thin film transistor, wherein the first electrode is electrically connected to the thin film transistor; Preferably, the photodetector further comprises: a third electrode, located on a side of the first planarization layer away from the substrate, the third electrode being electrically connected to the second electrode; Preferably, a gap is formed between the photoelectric conversion layer and the side wall of the opening, and the photodetector further comprises a second planarization layer, which is arranged on a side of the first planarization layer away from the substrate and fills the gap between the photoelectric conversion layer and the side wall of the opening, wherein the third electrode is electrically connected to the second electrode through a via hole on the second planarization layer; Preferably, the material of the third electrode is the same as that of the second electrode; Preferably, the third electrode and the second electrode are both made of indium tin oxide.

6. An electronic device, characterized in that: Comprising the photoelectric detector according to any one of claims 1 to 5.

7. A method for preparing a photoelectric detector, characterized in that: The method comprises: forming a first electrode on one side of the substrate; sequentially forming a first planarization layer and a third planarization layer on the entire surface of the first electrode on a side facing away from the substrate; forming an opening penetrating the first planarization layer and the third planarization layer to expose at least a portion of the first electrode; forming a photoelectric conversion layer on the entire surface of the first electrode on a side facing away from the substrate; peeling the third planarization layer from the first planarization layer, and removing the third planarization layer; A second electrode is formed on the remaining surface of the photoelectric conversion layer facing away from the substrate.

8. The preparation method according to claim 7, characterized in that: After removing the third planarization layer, the method further includes: patterning the first planarization layer to expose the sidewalls of the photoelectric conversion layer; Passivating the sidewalls of the photoelectric conversion layer to form a passivation region; Preferably, before patterning the first planarization layer to expose the sidewall of the photoelectric conversion layer, the method further comprises: forming the second electrode on a surface of the photoelectric conversion layer facing away from the substrate, wherein the surface of the second electrode facing away from the substrate and the surface of the first planarization layer facing away from the substrate are in the same plane; Preferably, the step of patterning the first planarization layer to expose the sidewalls of the photoelectric conversion layer comprises: forming a photoresist layer on the entire surface of the first planarization layer on a side facing away from the substrate; patterning the photoresist layer to expose the first planarization layer around the opening; Using the remaining photoresist layer as a mask pattern to pattern the first planarization layer to expose the sidewalls of the photoelectric conversion layer; Preferably, after the passivation treatment is performed on the sidewall of the photoelectric conversion layer, the method further comprises: forming a second planarization layer on a side of the first planarization layer away from the substrate, wherein the second planarization layer fills the side surfaces of the photoelectric conversion layer and the opening; Preferably, after forming a second planarization layer on a side of the first planarization layer away from the substrate, the method further comprises: Opening a via hole in the second planarization layer to expose at least a portion of the second electrode; A third electrode is formed which is electrically connected to the second electrode through the via hole.

9. The preparation method according to claim 7, characterized in that: The step of sequentially forming a first planarization layer and a third planarization layer on the entire surface of the first electrode on a side facing away from the substrate comprises: forming the first planarization layer, the barrier layer and the third planarization layer on the entire surface of the first electrode on the side facing away from the substrate in sequence; Preferably, the material of the barrier layer includes hexamethyldisilazane.

10. The preparation method according to claim 7, characterized in that: The photoelectric conversion layer includes a first semiconductor sublayer, an intrinsic semiconductor sublayer, and a second semiconductor sublayer which are sequentially stacked in a direction away from the substrate, wherein the first semiconductor sublayer is an N-type semiconductor layer, the second semiconductor sublayer is a P-type semiconductor layer, and the material of the N-type semiconductor layer includes an oxide semiconductor material; The step of sequentially forming a first planarization layer and a third planarization layer on the entire surface of the first electrode on the side facing away from the substrate comprises: forming the first semiconductor sublayer on a side of the first electrode facing away from the substrate; forming the first planarization layer and the third planarization layer on the entire surface of the first semiconductor sublayer on the side facing away from the substrate, wherein when subsequently forming a planarization layer penetrating the first planarization layer and the third planarization layer, at least a portion of the first semiconductor sublayer is exposed from the opening; And, the step of forming a photoelectric conversion layer on the entire surface of the first electrode on the side facing away from the substrate comprises: forming the entire intrinsic semiconductor sublayer and the entire second semiconductor sublayer on a side of the first electrode facing away from the substrate; Preferably, the orthographic projection of the first semiconductor sublayer on the substrate covers the orthographic projection of the first electrode on the substrate.

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