Power measurement circuit, chip and electronic equipment

Abstract

The embodiment of the invention provides a power measurement circuit, a chip and electronic equipment, and the circuit comprises a current measurement module which is used for measuring a first differential voltage between a first input end and a second input end, so as to determine an input current flowing through a standard resistor; the voltage measuring module is used for measuring a second differential voltage between the first input end and the reference grounding end so as to determine the input voltage of the standard resistor; and the error voltage compensation module is used for compensating the error voltage generated at the first input end in the process of measuring the second differential voltage by the voltage measurement module. According to the invention, the first input end and the second input end are enabled to generate corresponding voltage drops, which is equivalent to reducing the influence of the current consumed by the voltage measurement module on the voltage difference (namely the first differential voltage) between the first input end and the second input end, and finally the measurement precision of the current measurement module is improved.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuits, and in particular to a power measurement circuit, a chip and an electronic device. Background Art

[0002] At present, electronic devices can usually count the power consumption of the system / a certain module in order to display the performance of the electronic device and determine whether abnormal power consumption occurs. Obviously, counting power consumption requires measuring current and voltage, which can be measured by an analog-to-digital converter and converted into digital signals, and finally the system power is calculated by a digital circuit. However, when measuring voltage, the analog-to-digital converter for measuring voltage will extract part of the current at one end of the resistor. Combined with the limited input impedance of the analog-to-digital converter for measuring voltage, this causes the differential voltage signal connected to the analog-to-digital converter for measuring current to generate a corresponding error voltage, which ultimately causes the problem of reduced measurement accuracy of the analog-to-digital converter for measuring current. Summary of the invention

[0003] In view of the above problems, the embodiments of the present application provide a power measurement circuit, a chip and an electronic device to solve the above technical problems.

[0004] In a first aspect, an embodiment of the present application provides a power measurement circuit, the power measurement circuit is used to measure the power consumed by a target circuit, the target circuit includes a standard resistor, the power measurement circuit has a first input terminal and a second input terminal, the first input terminal and the second input terminal are respectively used to connect two ends of the standard resistor, the power measurement circuit includes:

[0005] A current measurement module, the current measurement module is used to measure a first differential voltage between the first input terminal and the second input terminal to determine an input current flowing through the standard resistor;

[0006] A voltage measurement module, the voltage measurement module is used to measure a second differential voltage between the first input terminal and the reference ground terminal to determine an input voltage of the standard resistor;

[0007] The error voltage compensation module is connected between the second input terminal and the reference ground terminal, and is used to compensate for the error voltage generated at the first input terminal when the voltage measurement module measures the second differential voltage.

[0008] In a second aspect, an embodiment of the present application further provides a chip, comprising the above-mentioned power measurement circuit.

[0009] In a third aspect, an embodiment of the present application further provides an electronic device, comprising the above-mentioned chip or power measurement circuit.

[0010] The present application measures the first differential voltage between the first input terminal and the second input terminal through a current measurement module, and measures the second differential voltage between the first input terminal and the reference ground terminal through a voltage measurement module, so the input current of the target circuit can be determined according to the first differential voltage and the resistance value of the standard resistor, and the input voltage corresponding to the target circuit can be determined according to the second differential voltage, and finally the power of the target circuit can be determined by the input voltage and the input current. At the same time, since the voltage measurement module consumes the current of the first input terminal in the process of measuring the second differential voltage and thus generates an error voltage at the first input terminal, and the error voltage compensation module can compensate the error voltage generated at the first input terminal in the process of measuring the second differential voltage by the voltage measurement module at the second input terminal, the first input terminal and the second input terminal both generate corresponding voltage drops, thereby reducing the voltage difference between the first input terminal and the second input terminal (i.e., the first differential voltage) affected by the current consumed by the voltage measurement module, which is ultimately beneficial to improving the power measurement accuracy.

[0011] These and other aspects of the present application will become more clearly understood in the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0013] Figure 1 A circuit schematic diagram of power measurement in the related art is shown.

[0014] Figure 2 A schematic diagram of a power measurement circuit in an embodiment of the present application is shown.

[0015] Figure 3 Another schematic diagram of a power measurement circuit in an embodiment of the present application is shown.

[0016] Figure 4 Another schematic diagram of a power measurement circuit in an embodiment of the present application is shown.

[0017] Figure 5 Another schematic diagram of a power measurement circuit in an embodiment of the present application is shown.

[0018] Figure 6 Another schematic diagram of a power measurement circuit in an embodiment of the present application is shown.

[0019] Figure 7 Another schematic diagram of a power measurement circuit in an embodiment of the present application is shown.

[0020] Wherein, 100 is a power measurement circuit, 101 is a first input terminal, 102 is a second input terminal, a standard resistor R0, an input current I0, a reference ground terminal GND, and 200 is a target circuit;

[0021] 10 current measurement module, 20 voltage measurement module, 21 second sampling unit, 30 error voltage compensation module, 31 first sampling unit;

[0022] First current I1, second current I2, second capacitor C2, fourth switch S4, fifth switch S5, sixth switch S6, first capacitor C1, first switch S1, second switch S2, third switch S3, fourth capacitor C4, ninth switch S9, tenth switch S10, eleventh switch S11, second common-mode switch S02, third capacitor C3, seventh switch S7, eighth switch S8, first common-mode switch S01. DETAILED DESCRIPTION

[0023] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0024] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0025] In the embodiments of the present application, it should be noted that, in this article, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0026] Moreover, the terms "comprises," "comprising," or any other variation thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0027] In the description of the embodiments of the present application, words such as "example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "example" or "for example" in the embodiments of the present application is not to be interpreted as being more preferred or having more advantages than another embodiment or design. The use of words such as "example" or "for example" is intended to present relative concepts in a clear manner.

[0028] In addition, the "plurality" in the embodiments of the present application refers to two or more than two. In view of this, in the embodiments of the present application, "plurality" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two or more. For example, including at least one means including one, two or more, and there is no limit on which ones are included. For example, including at least one of A, B and C, then A, B, C, A and B, A and C, B and C, or A, B and C can be included.

[0029] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0030] In the circuit structure provided in the embodiments of the present application, the first node, the second node and other nodes do not represent actual existing components, but represent the junction points of related couplings in the circuit diagram, that is, these nodes are nodes formed by the equivalent junction points of related couplings in the circuit diagram.

[0031] Currently, electronic devices can usually count the power consumption of the system / a certain module, see Figure 1 , Figure 1 A circuit schematic diagram of power measurement in the related art is shown, a standard resistor R0 and a load are connected in series between a power supply terminal AVDD and a ground terminal, a single-chip microcomputer MCU having a current measurement analog-to-digital converter IADC and a voltage measurement analog-to-digital converter VADC are respectively connected to the two ends of the standard resistor R0 through two pins (interfaces), the current measurement analog-to-digital converter IADC can measure the voltage difference between the two pins, thereby obtaining the current flowing through the standard resistor R0; and the voltage measurement analog-to-digital converter VADC can measure the voltage difference between a pin and the ground terminal, thereby obtaining the power supply voltage AVDD, so the power consumed by the load can be calculated by combining the digital signals output by the current measurement analog-to-digital converter IADC and the voltage measurement analog-to-digital converter VADC.

[0032] Generally, a resistor RX is connected in series between one end of the standard resistor and the pin, and a resistor RY is connected in series between the other end of the standard resistor and the other pin. The resistor RX and the resistor RY can be line resistors, or filter resistors corresponding to the filter capacitor C0, or surge protection resistors. Due to the existence of the resistor RX and the resistor RY, and the voltage measurement analog-to-digital converter VADC consumes current Ivadc during the measurement process, the voltage V0 across the standard resistor and the voltage V0' between the two pins satisfy the following relationship:

[0033] V0-V0'=Ivadc*RX

[0034] It can be seen that since the voltage measurement analog-to-digital converter VADC extracts the current Ivadc during the measurement process, the differential voltage signal V0' connected to the current measurement analog-to-digital converter IADC generates a corresponding error voltage, which ultimately causes the measurement accuracy of the input current to decrease.

[0035] To this end, the present application provides a power measurement circuit 100, a chip, and an electronic device, which are described in detail below.

[0036] First, see Figure 2 , Figure 2 A schematic diagram of a power measurement circuit 100 in an embodiment of the present application is shown, wherein the power measurement circuit 100 is used to measure the power consumed by the target circuit 200, and the power measurement circuit 100 includes a current measurement module 10, a voltage measurement module 20 and an error voltage compensation module 30.

[0037] Specifically, the power measurement circuit 100 has a first input terminal 101 and a second input terminal 102. The target circuit 200 includes a standard resistor R0 with a known resistance value. The standard resistor R0 and the load are connected in series between the power supply terminal AVDD and the reference ground terminal GND. The first input terminal 101 and the second input terminal 102 are respectively used to connect the two ends of the standard resistor R0. Therefore, the current measurement module 10 measures the voltage across the two ends of the standard resistor R0 to determine the current flowing through the standard resistor R0 and the load.

[0038] It should be pointed out that there is a series resistor RX between one end of the standard resistor R0 and the first input terminal 101, and there is a series resistor RY between the other end of the standard resistor R0 and the second input terminal 102. The resistor RX and the resistor RY can be equivalent resistors corresponding to the line resistance, or can be filter resistors corresponding to the filter capacitor C0, or can be surge protection resistors or any combination of the above, and this application does not make specific limitations.

[0039] The current measurement module 10 is used to measure the first differential voltage V1 between the first input terminal 101 and the second input terminal 102, so as to determine the input current I0 flowing through the standard resistor R0. In some embodiments of the present application, the current measurement module 10 may include an analog-to-digital converter, and the first differential voltage V1 is directly converted into a digital signal DI by the analog-to-digital converter, so as to achieve the measurement of the first differential voltage V1. In some embodiments of the present application, the current measurement module 10 may include an amplifier circuit (such as a PGA programmable operational amplifier) ​​and an analog-to-digital converter, and the first differential voltage V1 is amplified by the amplifier circuit, and then the analog-to-digital converter performs analog-to-digital conversion to obtain a digital signal DI corresponding to the first differential voltage V1.

[0040] The voltage measurement module 20 is used to measure the second differential voltage V2 between the first input terminal 101 and the reference ground terminal GND, so as to determine the input voltage of the standard resistor R0 (i.e., the power supply voltage AVDD). In some embodiments of the present application, the voltage measurement module 20 may include an analog-to-digital converter, and the second differential voltage V2 is directly converted into a digital signal DV by the analog-to-digital converter, so as to measure the second differential voltage V2. In some embodiments of the present application, the voltage measurement module 20 may include a voltage conversion circuit and an analog-to-digital converter, and the second differential voltage V2 is amplified or reduced by the voltage conversion circuit (such as an amplifier circuit), and then the analog-to-digital converter performs analog-to-digital conversion to obtain a digital signal DV corresponding to the second differential voltage V2.

[0041] Exemplarily, the analog-to-digital converter included in the current measurement module 10 and the voltage measurement module 20 may be, but is not limited to, a hybrid analog-to-digital converter consisting of one or more of a successive approximation ADC (SAR ADC), a Sigma-Delta ADC (SD ADC), a pipeline ADC, or a ramp-compare ADC.

[0042] The error voltage compensation module 30 is connected between the second input terminal 102 and the reference ground terminal GND. The error voltage compensation module 30 can compensate the error voltage generated at the first input terminal 101 when the voltage measurement module 20 measures the second differential voltage V2 at the second input terminal 102, so as to reduce the influence of the voltage measurement module 20 on the magnitude of the first differential voltage V1 during the process of measuring the second differential voltage V2.

[0043] In some embodiments of the present application, the error voltage compensation module 30 may include a switch resistance circuit, and when the switch is closed, the second input terminal 102 can output current to the reference ground terminal GND through the resistance, so that the error voltage compensation module 30 can form a voltage drop at the second input terminal 102 that is equivalent to the error voltage, thereby making the magnitude of the first differential voltage V1 basically unchanged.

[0044] In some embodiments of the present application, the error voltage compensation module 30 may include a switched capacitor circuit, which controls the second input terminal 102 to charge the capacitor through a switch, and controls the capacitor to discharge to the reference power terminal through another switch, thereby utilizing the switched capacitor circuit to indirectly enable the second input terminal 102 to output current to the reference ground terminal GND, so that the error voltage compensation module 30 can form a voltage drop at the second input terminal 102 that is equivalent to the error voltage, thereby making the first differential voltage V1 substantially unchanged.

[0045] In the embodiment of the present application, since the error voltage compensation module 30 can compensate the error voltage generated at the first input terminal 101 during the process of the voltage measurement module 20 measuring the second differential voltage V2 at the second input terminal 102, the magnitude of the first differential voltage V1 will be closer to the actual voltage across the standard resistor R0. Figure 2 In the example, the voltages at both ends of the standard resistor R0 are VX and VY respectively, the voltages at the first input terminal 101 and the second input terminal 102 are VA and VB respectively, and the error voltage △Verror generated at the first input terminal 101 during the process of the voltage measurement module 20 measuring the second differential voltage V2 is:

[0046] △Verror=VA-VX

[0047] Due to the existence of the error voltage compensation module 30, the voltage of the second input terminal 102 can satisfy the following relationship:

[0048] VB-VY=△Verror

[0049] It can be seen that:

[0050] VA-VB=(VX+△Verror)-(VY+△Verror)

[0051] Then, the first differential voltage V1 and the voltage difference V0 across the standard resistor R0 satisfy the following relationship:

[0052] V1=VA-VB=VX-VY

[0053] It can be seen that since the error voltage compensation module 30 can compensate for the error voltage generated at the first input terminal 101 during the process of the voltage measurement module 20 measuring the second differential voltage V2 at the second input terminal 102, the magnitude of the first differential voltage V1 is closer to the actual voltage across the standard resistor R0, thereby improving the measurement accuracy of the current measurement module 10 for the input current I0.

[0054] Therefore, in an embodiment of the present application, the present application measures the first differential voltage V1 between the first input terminal 101 and the second input terminal 102 through the current measurement module 10, and measures the second differential voltage V2 between the first input terminal 101 and the reference ground terminal GND through the voltage measurement module 20. Therefore, the input current I0 of the target circuit 200 can be determined according to the first differential voltage V1 and the resistance value of the standard resistor R0, and the input voltage corresponding to the target circuit 200 can be determined according to the second differential voltage V2. Finally, the power of the target circuit 200 can be determined by the input voltage and the input current I0. At the same time, since the voltage measurement module 20 consumes the current of the first input terminal 101 in the process of measuring the second differential voltage V2 and thus generates an error voltage at the first input terminal, and the error voltage compensation module 30 can compensate for the error voltage generated at the first input terminal 101 in the process of the voltage measurement module 20 measuring the second differential voltage V2 at the second input terminal 102, the first input terminal 101 and the second input terminal 102 both generate corresponding voltage drops, which is equivalent to reducing the voltage difference between the first input terminal 101 and the second input terminal 102 (i.e., the first differential voltage V1) affected by the current consumed by the voltage measurement module 20, which is ultimately beneficial to improving the power measurement accuracy.

[0055] In some embodiments of the present application, see Figure 3 , Figure 3 Another schematic diagram of the power measurement circuit 100 in an embodiment of the present application is shown, the error voltage compensation module 30 controls the second input terminal 102 to output the first current I1 to the reference ground terminal GND; the voltage measurement module 20 outputs the second current I2 to the reference ground terminal during the measurement of the second differential voltage V2, and the average magnitude of the second current I2 is equal to the average magnitude of the first current I1.

[0056] It should be noted that, in general, the resistor RX is equal to the resistor RY. Therefore, when the average value of the second current I2 is equal to the average value of the first current I1, it can be known that the voltage difference V0 between the first differential voltage V1 and the standard resistor R0 satisfies the following relationship:

[0057] V0-V1=I2*RX-I1*RY=0

[0058] That is to say, when the resistor RX is equal to the resistor RY in size, and the average size of the second current I2 is equal to the average size of the first current I1, the first differential voltage V1 is substantially equal to the voltage difference V0 across the standard resistor R0. At this time, what the current measurement module 10 measures is equivalent to the actual voltage difference V0 across the standard resistor R0, which is beneficial to further reduce the measurement error of the current measurement module 10 on the input current I0.

[0059] It can be understood that when the resistor RX is not equal to the resistor RY, the ratio of the second current I2 to the first current I1 can be adaptively adjusted to ensure that the first differential voltage V1 between the first input terminal 101 and the second input terminal 102 remains unchanged relative to the actual voltage difference V0 across the standard resistor R0.

[0060] In some embodiments of the present application, see Figure 4 , Figure 4 Another schematic diagram of the power measurement circuit 100 in an embodiment of the present application is shown, wherein the error voltage compensation module 30 includes a first sampling unit 31, and the first sampling unit 31 is used to sample the third differential voltage V3 between the second input terminal 102 and the reference ground terminal GND; the voltage measurement module 20 includes a second sampling unit 21, and the second sampling unit 21 is used to sample the second differential voltage V2; wherein the first sampling unit 31 consumes a first current I1 when sampling the third differential voltage V3, and the second sampling unit 21 consumes a second current I2 when sampling the second differential voltage V2.

[0061] It should be noted that when the voltage measurement module 20 directly uses an analog-to-digital converter to measure the second differential voltage V2, the second sampling unit 21 of the analog-to-digital converter will first sample the second differential voltage V2 and consume the second current I2, and then the integrator 22 and the quantizer 23 convert it and output the corresponding digital signal DV. Therefore, the error voltage compensation module 30 is provided with a first sampling unit 31 that consumes the first current I1, and finally a corresponding voltage drop can be generated at both the first input terminal 101 and the second input terminal 102, and it is ensured that the first differential voltage V1 is substantially equal to the voltage difference V0 across the standard resistor R0.

[0062] It can be understood that for the embodiment in which the voltage measurement module 20 uses an amplifier circuit to amplify the second differential voltage V2 before measuring it, the amplifier circuit will also consume the corresponding first current I1. Therefore, when the error voltage compensation module 30 is also provided with a corresponding amplifier circuit to consume the corresponding second current I2, it can also be ensured that the first differential voltage V1 is basically equal to the voltage difference V0 across the standard resistor R0.

[0063] As an example, the voltage measurement module 20 includes a Sigma-Delta analog-to-digital converter. Figure 5 , Figure 5 Another schematic diagram of the power measurement circuit 100 in an embodiment of the present application is shown, wherein the second sampling unit 21 includes a second capacitor C2, a fourth switch S4, a fifth switch S5 and a sixth switch S6; a first end of the fourth switch S4 is connected to the first input terminal 101, and a second end of the fourth switch S4 is connected to a first plate of the second capacitor C2; a first end of the fifth switch S5 is connected to a reference ground terminal GND, and a second end of the fifth switch S5 is connected to a first plate of the second capacitor C2; a first end of the sixth switch S6 is connected to a second plate of the second capacitor C2, and a second end of the sixth switch S6 is used to access a common mode voltage VCM.

[0064] The integrator 22 includes an operational amplifier OP, an integrating switch SI and an integrating capacitor CI. The first end of the integrating switch SI is connected to the second plate of the second capacitor C2, the second end of the integrating switch SI is connected to the inverting input terminal of the operational amplifier OP, the non-inverting input terminal of the operational amplifier OP is connected to the reference ground terminal GND, the first end of the integrating capacitor CI is connected to the inverting input terminal of the operational amplifier OP, and the second end of the integrating capacitor CI is connected to the output terminal of the operational amplifier OP.

[0065] When the second sampling unit 21 samples the second differential voltage V2, the fourth switch S4 and the sixth switch S6 are in a closed state, the fifth switch S5 and the integral switch S1 are in an open state, and the amount of charge accumulated in the second capacitor C2 is:

[0066] Q2=C2*(V2-VCM)

[0067] When the integrator 22 is integrating, the fourth switch S4 and the sixth switch S6 are in the open state, the fifth switch S5 and the integration switch SI are in the closed state, and the charge accumulated in the second capacitor C2 is 0, so that the charge accumulated in the integration capacitor CI of the integrator 22 is: C2*(V2-VCM), so the second current I2 consumed when the second sampling unit 21 is sampling is:

[0068] I2=Q2 / t2=C2*(V2-VCM) / t2

[0069] Wherein, t2 is the sampling period of the second sampling unit 21 .

[0070] In some embodiments of the present application, see Figure 5The first sampling unit 31 includes a first capacitor C1, a first switch S1, a second switch S2 and a third switch S3; a first end of the first switch S1 is connected to the second input end 102, and a second end of the first switch S1 is connected to a first plate of the first capacitor C1; a first end of the second switch S2 is connected to a reference ground end GND, and a second end of the second switch S2 is connected to a first plate of the first capacitor C1; a first end of the third switch S3 is connected to a second plate of the first capacitor C1, and a second end of the third switch S3 is used to access a common mode voltage VCM.

[0071] Specifically, when the first switch S1 and the third switch S3 are in a closed state and the second switch S2 is in an open state, the amount of charge accumulated in the first capacitor C1 is:

[0072] Q1=C1*(V2-V1-VCM)

[0073] When the first switch S1 and the third switch S3 are in the open state and the second switch S2 is in the closed state, the amount of charge accumulated in the first capacitor C1 is 0. Since the resistance value of the standard resistor R0 is usually reduced and the first differential voltage V1 is small, the first current I1 consumed when the first sampling unit 31 samples is approximately:

[0074] I1=Q1 / t1=C1*(V2-VCM) / t1

[0075] Wherein, t1 is the sampling period of the first sampling unit 31 .

[0076] It can be seen from the calculation formula of the second current I2 of the second sampling unit 21 that by controlling the sizes of the first capacitor C1 and the second capacitor C2, and the sampling periods of the first sampling unit 31 and the second sampling unit 21, the first current I1 output by the error voltage compensation module 30 and the average size of the second current I2 consumed by the voltage measurement module 20 can be equal.

[0077] In some embodiments of the present application, Figure 5 In the embodiment, the capacitance value of the first capacitor C1 is equal to the capacitance value of the second capacitor C2; the first switch S1 and the fourth switch S4 are controlled based on the same clock signal, the second switch S2 and the fifth switch S5 are controlled based on the same clock signal, and the third switch S3 and the sixth switch S6 are controlled based on the same clock signal. In other words, the sampling period of the first sampling unit 31 is equal to that of the second sampling unit 21, and the capacitance values ​​of the first capacitor C1 and the second capacitor C2 are also equal, so that the average magnitude of the first current I1 and the second current I2 can be equal, and finally ensure that the first differential voltage V1 measured by the current measurement module 10 is substantially equal to the actual voltage difference V0 across the standard resistor R0.

[0078] As another example, taking the voltage measurement module 20 including a successive approximation analog-to-digital converter as an example, see Figure 6 , Figure 6 Another schematic diagram of the power measurement circuit 100 in the embodiment of the present application is shown, wherein the second sampling unit 21 includes a plurality of fourth capacitors C4, a plurality of ninth switches S9, a plurality of tenth switches S10, a plurality of eleventh switches S11 and a second common-mode switch S02, and the second plates of each fourth capacitor C4 are connected to each other; the ninth switch S9 corresponds to the fourth capacitor C4 one by one, the first end of the ninth switch S9 is connected to the first input terminal 101, and the second end of the ninth switch S9 is connected to the first plate of the corresponding fourth capacitor C4; the tenth switch S10 corresponds to the fourth capacitor C4 one by one, the first end of the tenth switch S10 is connected to the reference ground terminal GND, and the second end of the tenth switch S10 is connected to the first plate of the corresponding fourth capacitor C4; the eleventh switch S11 corresponds to the fourth capacitor C4 one by one, the first end of the eleventh switch S11 is used to access the reference voltage, and the second end of the eleventh switch S11 is connected to the first plate of the corresponding fourth capacitor C4; the first end of the second common-mode switch S02 is connected to the common-mode voltage VCM, and the second end of the second common-mode switch S02 is connected to the second plate of each fourth capacitor C4.

[0079] Specifically, when the successive approximation analog-to-digital converter performs sampling, each ninth switch S9 is in a closed state, each tenth switch S10 and eleventh switch S11 is in an open state, and the second common-mode switch S02 is in a closed state, so each fourth capacitor C4 is charged and the amount of charge accumulated by all fourth capacitors C4 is:

[0080] Q4=C4*(V2-VCM)*N1

[0081] Wherein, N1 is the number of the fourth capacitors C4.

[0082] In the conversion phase of the successive approximation analog-to-digital converter, each ninth switch S9 is in the off state, and the comparator COMP and the successive approximation logic module control the state of each tenth switch S10 and the eleventh switch S11, and realize the analog-to-digital conversion of the second differential voltage V2. After the conversion is completed, the charge accumulated in each fourth capacitor C4 is reset, so the second current I2 consumed by the second sampling unit 21 during sampling is:

[0083] I2=Q4 / t4=C4*N1*(V2-VCM) / t4

[0084] Wherein, t4 is the analog-to-digital conversion period of the successive approximation analog-to-digital converter.

[0085] In some embodiments of the present application, see Figure 6, wherein the first sampling unit 31 includes at least one third capacitor C3, a seventh switch S7, an eighth switch S8 and a first common-mode switch S01, and the second plates of each third capacitor C3 are connected to each other; the first end of the seventh switch S7 is connected to the second input terminal 102, and the second end of the seventh switch S7 is connected to the first plate of each third capacitor C3; the first end of the eighth switch S8 is connected to the reference ground terminal GND, and the second end of the eighth switch S8 is connected to the first plate of each third capacitor C3; the first end of the first common-mode switch S01 is connected to the common-mode voltage, and the second end of the first common-mode switch S01 is connected to the second plate of each third capacitor C3.

[0086] When the successive approximation analog-to-digital converter performs sampling, the seventh switch S7 and the first common-mode switch S01 are in a closed state, and the eighth switch S8 is in an open state, the amount of charge accumulated in the third capacitor C3 is:

[0087] Q3=C3*(V2-V1-VCM)*N2

[0088] Wherein, N2 is the number of the third capacitors C3.

[0089] In the conversion stage of the successive approximation analog-to-digital converter, the seventh switch S7 and the first common-mode switch S01 are in an open state, the eighth switch S8 is in a closed state, and the amount of charge accumulated in the third capacitor C3 is 0. Since the resistance value of the standard resistor R0 is usually large and the first differential voltage V1 is small, the first current I1 consumed when the first sampling unit 31 samples is approximately:

[0090] I1=Q3 / t4=C3*N2*(V2-VCM) / t4

[0091] It can be seen from the calculation formula of the second current I2 of the second sampling unit 21 that by controlling the total capacitance of the third capacitor C3 and the fourth capacitor C4, and the sampling periods of the first sampling unit 31 and the second sampling unit 21, the first current I1 output by the error voltage compensation module 30 and the average magnitude of the second current I2 consumed by the voltage measurement module 20 can be made equal.

[0092] In some embodiments of the present application, the total capacitance value of at least one third capacitor C3 is equal to the total capacitance value of multiple fourth capacitors C4. In combination with the embodiment in which the seventh switch S7 and the first common-mode switch S01 are in a closed state when the successive approximation analog-to-digital converter performs sampling, and in the conversion phase of the successive approximation analog-to-digital converter, the seventh switch S7 and the first common-mode switch S01 are in an open state, and the eighth switch S8 is in a closed state, at this time, the sampling period of the first sampling unit 31 is equal to that of the second sampling unit 21, and the total capacitance value of the third capacitor C3 is equal to the total capacitance value of the multiple fourth capacitors C4, so that the first current I1 and the second current I2 can be equal in average size, and finally ensure that the first differential voltage V1 measured by the current measurement module 10 is substantially equal to the actual voltage difference V0 across the standard resistor R0.

[0093] It is worth noting that the above contents about the power measurement circuit 100 are intended to clearly illustrate the implementation verification process of the present application. Those skilled in the art may also make equivalent modified designs under the guidance of the present application. For example, Figure 5 The Sigma-Delta analog-to-digital converter of the conventional differential circuit structure is shown, and those skilled in the art can modify it to be equivalent to Figure 7 The Sigma-Delta analog-to-digital converter with a fully differential circuit structure shown in the figure, in this case, the second sampling unit 21 and the first sampling unit 31 are both fully differential sampling circuits.

[0094] The embodiment of the present application also provides a chip, which includes the above-mentioned power measurement circuit 100. A chip (Integrated Circuit, IC) is also called a chip, and the chip can be, but is not limited to, a SOC (System on Chip) chip or a SIP (system in package) chip. Since the chip of the present application has the power measurement circuit 100 described in the above embodiment, it has all the beneficial effects of the power measurement circuit 100 in the above embodiment, which will not be repeated here.

[0095] The embodiment of the present application also provides an electronic device, which includes a device body and a chip as described above provided in the device body. The electronic device may be, but is not limited to, a weight scale, a body fat scale, a nutrition scale, an infrared electronic thermometer, a pulse oximeter, a human body composition analyzer, a mobile power supply, a wireless charger, a fast charger, a car charger, an adapter, a display, a USB (Universal Serial Bus) docking station, a stylus, a true wireless headset, a car central control screen, a car, a smart wearable device, a mobile terminal, and a smart home device. Smart wearable devices include, but are not limited to, smart watches, smart bracelets, and cervical massagers. Mobile terminals include, but are not limited to, smart phones, laptops, tablet computers, and POS (point of sales terminal). Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart sweepers, and smart lights.

[0096] The above are only preferred embodiments of the present application, and are not intended to limit the present application in any form. Although the present application has been disclosed as above with preferred embodiments, it is not intended to limit the present application. Any technical personnel in the field can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present application. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A power measurement circuit, characterized in that: The power measurement circuit has a first input terminal and a second input terminal, wherein the first input terminal and the second input terminal are respectively used to connect two ends of a standard resistor, and the power measurement circuit includes: a current measuring module, the current measuring module being used to measure a first differential voltage between the first input terminal and the second input terminal to determine an input current of the standard resistor; a voltage measuring module, the voltage measuring module being used to measure a second differential voltage between the first input terminal and a reference ground terminal to determine an input voltage of the standard resistor; An error voltage compensation module is connected between the second input terminal and a reference ground terminal, and is used to compensate for an error voltage generated at the first input terminal when the voltage measurement module measures the second differential voltage.

2. The power measurement circuit according to claim 1, characterized in that: The error voltage compensation module controls the second input terminal to output a first current to the reference ground terminal; The voltage measurement module outputs a second current to the reference ground terminal during the process of measuring the second differential voltage, and an average magnitude of the second current is equal to an average magnitude of the first current.

3. The power measurement circuit according to claim 2, characterized in that: The error voltage compensation module includes a first sampling unit, and the first sampling unit is used to sample a third differential voltage between the second input terminal and the reference ground terminal; The voltage measurement module includes a second sampling unit, and the second sampling unit is used to sample the second differential voltage; The first sampling unit consumes the first current when sampling the third differential voltage, and the second sampling unit consumes the second current when sampling the second differential voltage.

4. The power measurement circuit according to claim 3, characterized in that: The second sampling unit includes a second capacitor, a fourth switch, a fifth switch and a sixth switch; A first end of the fourth switch is connected to the first input end, and a second end of the fourth switch is connected to the first plate of the second capacitor; A first end of the fifth switch is connected to the reference ground terminal, and a second end of the fifth switch is connected to the first plate of the second capacitor; A first end of the sixth switch is connected to the second plate of the second capacitor, and a second end of the sixth switch is used to access a common mode voltage.

5. The power measurement circuit according to claim 4, characterized in that: The first sampling unit includes a first capacitor, a first switch, a second switch and a third switch; A first end of the first switch is connected to the second input end, and a second end of the first switch is connected to the first plate of the first capacitor; A first end of the second switch is connected to the reference ground terminal, and a second end of the second switch is connected to the first plate of the first capacitor; A first end of the third switch is connected to the second plate of the first capacitor, and a second end of the third switch is used to access a common mode voltage.

6. The power measurement circuit according to claim 5, characterized in that: The capacitance value of the first capacitor is equal to the capacitance value of the second capacitor; The first switch and the fourth switch are controlled based on the same clock signal, the second switch and the fifth switch are controlled based on the same clock signal, and the third switch and the sixth switch are controlled based on the same clock signal.

7. The power measurement circuit according to claim 3, characterized in that: The second sampling unit includes a plurality of fourth capacitors, a plurality of ninth switches, a plurality of tenth switches, a plurality of eleventh switches and a second common-mode switch, and the second plates of each of the fourth capacitors are connected to each other; The ninth switch corresponds to the fourth capacitor in a one-to-one manner, a first end of the ninth switch is connected to the first input end, and a second end of the ninth switch is connected to a first plate of the corresponding fourth capacitor; The tenth switch corresponds to the fourth capacitor in a one-to-one manner, a first end of the tenth switch is connected to the reference ground terminal, and a second end of the tenth switch is connected to a first plate of the corresponding fourth capacitor; The eleventh switch corresponds to the fourth capacitor one by one, the first end of the eleventh switch is used to access the reference voltage, and the second end of the eleventh switch is connected to the first plate of the corresponding fourth capacitor; A first end of the second common-mode switch is connected to a common-mode voltage, and a second end of the second common-mode switch is connected to the second plate of each of the fourth capacitors.

8. The power measurement circuit according to claim 7, characterized in that: The first sampling unit includes at least one third capacitor, a seventh switch, an eighth switch and a first common mode switch, and the second plates of each of the third capacitors are connected to each other; A first end of the seventh switch is connected to the second input end, and a second end of the seventh switch is connected to a first plate of each of the third capacitors; A first end of the eighth switch is connected to the reference ground terminal, and a second end of the eighth switch is connected to a first electrode plate of each of the third capacitors; A first end of the first common-mode switch is connected to a common-mode voltage, and a second end of the first common-mode switch is connected to the second plate of each of the third capacitors.

9. The power measurement circuit according to claim 8, characterized in that: A total capacitance value of at least one of the third capacitors is equal to a total capacitance value of the plurality of fourth capacitors.

10. A chip, characterized in that: The method comprises a power measurement circuit as claimed in any one of claims 1 to 9.

11. An electronic device, characterized in that: Comprising the chip as claimed in claim 10.

Images