Power failure or undervoltage detection circuit for wide-amplitude wide-frequency alternating current input

Abstract

The invention relates to the technical field of power-down under-voltage detection circuits, in particular to a power-down or under-voltage detection circuit for wide-amplitude wide-frequency alternating-current input, which comprises a power-down under-voltage threshold setting circuit, two integrating circuits, three operational amplifiers, an MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) and a capacitor resistor, when a sampling signal is smaller than V4, an R1C1 integrating circuit begins to integrate, and the R1C1 integrating circuit begins to output a sampling signal; if the sampling alternating current signal is not higher than V4 before the capacitor C1 reaches the voltage of the non-inverting input end of the operational amplifier X1, triggering a power-down undervoltage response; when a sampling signal is larger than V4, an R8C3 integrating circuit carries out integration, if a capacitor C3 reaches the voltage of the same-direction input end of an operational amplifier X3 and a sampling alternating current signal is not lower than V4, a power failure undervoltage response is triggered, the detection circuit does not need to use low-pass filtering, direct proportional sampling of the alternating current signal is carried out for integration, and due to the fact that steamed bun waves with doubled frequency are obtained after sine alternating current is rectified, power failure undervoltage response is triggered. The time lower than and higher than a set point can be estimated in a steamed bun wave to judge whether power failure and undervoltage occur or not.

Description

Technical Field

[0001] The invention relates to the technical field of power-off or undervoltage detection circuits, and in particular to a power-off or undervoltage detection circuit for wide-amplitude and wide-frequency AC input. Background Art

[0002] With the continuous development of power electronics technology, various electronic devices have higher and higher requirements for the stability and reliability of power supply. Especially in the application scenarios of wide-amplitude and wide-frequency AC input, such as industrial control, power systems, communication equipment and other fields, power failure or undervoltage detection circuits are particularly important. These circuits can monitor the power supply voltage in real time to ensure that protective measures are taken in time when the voltage is abnormal to prevent equipment damage or data loss.

[0003] In the prior art, traditional power-off or undervoltage detection circuits can often only adapt to AC inputs within a specific amplitude and frequency range, which has limitations in many practical application scenarios. At present, conventional detection of AC undervoltage or power-off detection directly uses the signal after bridge rectification to use low-pass filtering and compare it with the reference value to detect undervoltage or power-off. This method uses low-pass filtering. Considering power consumption, the time constant must be relatively large and the response is relatively slow. Due to the use of low-pass filtering, if the ripple voltage on the capacitor is near the reference value during the power-off process, it is easy to generate an oscillating signal. In addition, when the AC is disconnected, the indicator light cannot be extinguished due to the long power retention time, which can give customers a better user experience. However, for devices that need to save information through AC power-off signals, since the retention time of the switching power supply under specific conditions is fixed, if the AC disconnection can be quickly detected, then the time left for the device to save data will be more sufficient.

[0004] Therefore, it is necessary to propose a wide-amplitude and wide-frequency AC input power-off or undervoltage detection circuit to solve the above problems. Summary of the invention

[0005] The purpose of the present invention is to provide a wide-amplitude and wide-frequency AC input power-off or undervoltage detection circuit to solve the problem that conventional AC undervoltage or power-off detection is prone to generate oscillation signals.

[0006] To achieve the above object, the present invention provides the following technical solutions:

[0007] A power-off or undervoltage detection circuit for wide-amplitude and wide-frequency AC input, comprising a power-off undervoltage threshold setting circuit, two sets of integration circuits, three operational amplifiers, five MOSFET transistors and capacitors and resistors, characterized in that: the power-off undervoltage threshold setting circuit comprises a voltage source V4, a resistor R6 and a resistor R7, the two sets of integration circuits comprise an integration circuit R1C1 below the power-off undervoltage threshold and an integration circuit R8C3 above the power-off undervoltage threshold, the three operational amplifiers comprise operational amplifiers X1, X2 and X3, an AC sinusoidal signal is input through the operational amplifier X2, and enters the circuit after bridge rectification, the resistors R6 and R7 scale the input voltage, and then the sampling signal is compared with the voltage source V4, and V4 can set the power-off undervoltage protection point accordingly;

[0008] When the sampling signal is less than the reference voltage V4, that is, the output of the operational amplifier X2 is low, the current on the resistor R1 and the capacitor C1 on the integration circuit R1C1 below the power-off undervoltage threshold begins to integrate. If before the capacitor C1 reaches the voltage at the same-direction input terminal of the operational amplifier X1, where the voltage at the same-direction input terminal of the operational amplifier X1 is set by the voltage divider of the resistors R2 and R3, the sampled AC signal is not higher than the voltage source V4, that is, the voltage at the same-direction input terminal of the operational amplifier X1 is less than the voltage at the reverse input terminal of the operational amplifier X1, where the voltage at the reverse input terminal of the operational amplifier X1 comes from the input AC sinusoidal signal after bridge rectification, the resistors R6 and R7 scale the input voltage, and then connect to the reverse input terminal of the operational amplifier X1 through some specific circuit paths, then the power-off undervoltage response is triggered;

[0009] When the sampling signal is greater than the reference voltage V4, that is, when the output of the operational amplifier X2 is high, it is higher than the power-off undervoltage threshold. The current on the resistor R8 on the integration circuit R8C3 and the capacitor C3 are integrated. If the capacitor C3 voltage reaches the voltage at the same-direction input terminal of the operational amplifier X3 before reaching the voltage at the same-direction input terminal, where the voltage at the same-direction input terminal of the operational amplifier X3 is set by the voltage divider of the resistors R9 and R10, and the sampled AC signal is not lower than the voltage source V4, that is, the voltage at the same-direction input terminal of the operational amplifier X3 is higher than the voltage at the reverse input terminal of the operational amplifier X3, where the voltage at the reverse input terminal of the operational amplifier X3 comes from the input AC sinusoidal signal after bridge rectification, the resistors R6 and R7 scale the input voltage, and then connect to the reverse input terminal of the operational amplifier X3 through some specific circuit paths, then the power-off undervoltage response is triggered;

[0010] Among the two sets of integration circuits, one set of integration circuits can first respond quickly to power failure and undervoltage.

[0011] Preferably, the detection circuit also includes an integration time, in which one end of a resistor R18 is connected to a resistor R1 and a capacitor C1, the other end of the resistor R18 is connected to a reverse input terminal of an operational amplifier X1, the same-direction input terminal of the operational amplifier X1 is connected to resistors R3 and R2, the other end of the resistor R3 is grounded, the resistor R2 is connected to a voltage source VCC1, the output of the operational amplifier X1 is connected to a resistor R13 and a G pole of an NMOSFET transistor Q4, the other end of the resistor R13 is grounded, the D pole of the NMOSFET transistor Q4 is connected to a resistor R15, the other end of the resistor R15 is connected to the voltage source VCC1, and the S pole of the NMOSFET transistor Q4 is connected to ground.

[0012] Preferably, during the integration time, one end of resistor R19 is connected to the D pole of NMOSFET transistor Q2, resistor R19 is connected to the reverse input terminal of operational amplifier X3, the same-direction input terminal of operational amplifier X4 is connected to resistor R9 and resistor R10, the other end of resistor R9 is connected to voltage source VCC1, the other end of resistor R10 is grounded, the output of operational amplifier X3 is connected to resistor R12 and the G pole of NMOSFET transistor Q5, the other end of resistor R12 is grounded, the S pole of NMOSFET transistor Q5 is grounded, the D pole of NMOSFET transistor Q5 is connected to resistor R16, and the other end of resistor R16 is connected to voltage source VCC1.

[0013] Preferably, the output signal of the operational amplifier X2 in the integration circuit R1C1 below the power-off undervoltage threshold is connected to the resistor R4, the other end of the resistor R4 is connected to the resistor R5 and the G pole of the NMOSFET transistor Q1, the other end of the resistor R5 and the S pole of the NMOSFET transistor Q1 are grounded, the D pole of the NMOSFET transistor Q1 is connected to the capacitor C1 and the resistor R1, the other end of the resistor R1 is connected to the voltage source VCC1, and the other end of the capacitor C1 is grounded, and the output of the operational amplifier X2 in the integration circuit R8C3 above the power-off undervoltage threshold is connected to the resistor R20, and the other end of the resistor R20 is connected to the The ends are respectively connected to the G pole of the NMOSFET transistor Q3 and the resistor R21, the other end of the resistor R21 is grounded, the S pole of the NMOSFET transistor Q3 is grounded, the D pole of the NMOSFET transistor Q3 is connected to the resistor R11, the resistor R14 and the G pole of the NMOSFET transistor Q2, the other end of the resistor R11 is connected to the voltage source VCC1 and the resistor R8, the other end of the resistor R14 is grounded, the S pole of the NMOSFET transistor Q2 is grounded, the D pole of the NMOSFET transistor Q2 is connected to the resistor R8 and the capacitor C3, and the other end of the capacitor C3 is grounded.

[0014] Preferably, the detection circuit also includes a signal output circuit, a power-off undervoltage signal holding circuit, and an MCU controlled LED circuit. The anode of the diode D5 in the signal output circuit is connected to the D pole of the NMOSFET transistor Q4, and the cathode of the diode D5 is connected to the signal output. The cathode of the diode D5 and the cathode of the diode D6 in the power-off undervoltage signal holding circuit are connected to the MCU pin, and the pin can identify the level change. The MCU is also connected to the anode of LED1 with an IO port, and the cathode of LED1 is connected to the resistor R22, and the other end of the resistor R22 is grounded.

[0015] Preferably, the resistor R1 and the capacitor C1 are set by calculating the time when two adjacent half waves after rectification are equal to the power-off undervoltage value through the minimum frequency of the sine wave. Assuming that the peak value of the AC sine wave is Vpk, the frequency is f, the frequency of the steamed bun wave after rectification is 2f, and the power-off undervoltage setting value is Vset;

[0016] The mathematical expression of the rectified AC voltage is:

[0017] Vac(t)=|Vpk×sin(2×π×f×t)|;

[0018] Among them, "sin(2×π×f×t)" is the standard sine function expression, where t is the time variable, 2πft represents the angle that changes with time, and |Vpksin(2πft)| represents the absolute value of the sine wave;

[0019] use Solve to get the minimum time required to reach Vset from t=0s in the first cycle. Since it is a periodic half-wave, and the negative half-cycle is turned into a positive half-cycle, the continuous time that is less than the set value is between two adjacent half-waves, which is equal to 2 times Preferably, the mathematical relationship between t, R1, C1, and VCC1 is obtained through the RC step response:

[0020] Assume that the voltage on capacitor C1 in the integration circuit R1C1 reaches Vref_d, which is lower than the power-off threshold, and is considered to be undervoltage or power-off. VCC1 is known, R1 is freely set and adjusted according to the value of C1. The calculation formula of C1 is:

[0021]

[0022] Among them, VCC1 is the power supply voltage;

[0023] The voltage divider of resistors R2 and R3 is set to the value of Vref_d, thereby obtaining the voltage of the same-direction input terminal of the operational amplifier X1. When the voltage of the reverse input terminal of the operational amplifier X1 is greater than the voltage of the same-direction input terminal, it is determined that undervoltage or power failure is triggered.

[0024] Preferably, when the AC is disconnected, due to the different phases of disconnection, the initial voltage on the capacitor before the rectifier bridge will be different, and the voltage on the capacitor will slowly decrease over time. The voltage on the capacitor is much higher than the power-off undervoltage value, and the above circuit for detecting power-off undervoltage will respond very slowly. The integral of the non-integrated time of the resistor R1 and the capacitor C1 in the above circuit is simultaneously increased. When the input of the operational amplifier X2 is higher than the set value, the resistor R8 and the capacitor C3 are integrated. The above formula is used. The time higher than the set Vset is the steamed bun wave period after rectification minus the time less than the set value. The formula is: The voltage of the same-direction input terminal for setting X3 is obtained. When the voltage of the reverse input terminal of the operational amplifier X3 is less than the voltage of the same-direction input terminal, it is determined that undervoltage or power failure is triggered.

[0025] Preferably, the longest response time is less than or equal to half of the maximum AC cycle, the frequency is doubled after bridge rectification, and the time above or below the set point in one cycle after rectification is less than or equal to half of the AC cycle.

[0026] Compared with the conventional detection of AC undervoltage or power failure, which directly uses the signal after bridge rectification to use low-pass filtering and compare it with the reference value to detect undervoltage or power failure, this method uses low-pass filtering. Considering the power consumption, the time constant must be relatively large and the response is relatively slow. Due to the use of low-pass filtering, if the ripple voltage on the capacitor is near the reference value during the power failure process, it is easy to generate an oscillating signal problem. The technical effects and advantages of the present invention are:

[0027] 1. No need to use low-pass filtering, directly proportionally sample the AC signal for integration. Since the sinusoidal AC obtains a steamed wave with doubled frequency after rectification, the time below and above the set point can be estimated within a steamed wave to determine whether there is power failure or undervoltage. Unlike the low-pass filter, it will cross the set point before reaching the steady state. If the ripple of the low-pass filter is large, it will cross the set point back and forth, causing the risk of false operation. The integral method can avoid this risk;

[0028] 2. When the AC power is disconnected, the present invention can respond quickly, and for devices that need to save information through AC power-off signals, it can give the devices more time to save data;

[0029] 3. The detection circuit has strong anti-interference ability and fast response speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 The present invention is a schematic diagram of an AC power-off or undervoltage detection circuit and a power-off or undervoltage signal holding circuit for a wide input voltage range and a wide frequency range.

[0031] Figure 2The present invention is a circuit diagram of an AC power-off or undervoltage detection circuit and a power-off or undervoltage signal holding circuit for a wide input voltage range and a wide frequency range.

[0032] Figure 3 This is a schematic diagram of applying the AC power-off undervoltage signal to the MCU to turn off the indicator light.

[0033] Figure 4 The present invention uses an AC power-off undervoltage signal to transmit a circuit diagram of the MCU to turn off the indicator light.

[0034] Figure 5 Schematic diagram of waveforms according to an embodiment of the present invention.

[0035] In the figure: 1. Power-off undervoltage threshold setting circuit; 2. Below power-off undervoltage threshold integration circuit; 3. Integration time threshold judgment circuit 1; 4. Signal output circuit; 5. Integration time threshold judgment circuit 2; 6. Above power-off undervoltage threshold integration circuit; 7. Power-off undervoltage signal holding circuit; 8. Control circuit. DETAILED DESCRIPTION

[0036] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] The present invention provides Figure 1-Figure 4 The circuit shown is a power-off or undervoltage detection circuit for wide-amplitude and wide-frequency AC input, including a power-off undervoltage threshold setting circuit, two sets of integration circuits, three operational amplifiers, five MOSFET transistors and capacitors and resistors. The power-off undervoltage threshold setting circuit includes a voltage source V4, a resistor R6 and a resistor R7. The two sets of integration circuits include an integration circuit R1C1 below the power-off undervoltage threshold and an integration circuit R8C3 above the power-off undervoltage threshold. The three operational amplifiers include operational amplifiers X1, X2 and X3. Through the operational amplifier X2, an AC sinusoidal signal is input and enters the circuit after bridge rectification. Resistors R6 and R7 scale the input voltage, and then the sampled signal is compared with the voltage source V4. V4 can set the power-off undervoltage protection point accordingly.

[0038] When the sampling signal is less than the reference voltage V4, that is, the output of the operational amplifier X2 is low, the current on the resistor R1 and the capacitor C1 on the integration circuit R1C1 below the power-off undervoltage threshold begins to integrate. If before the capacitor C1 reaches the voltage at the same-direction input terminal of the operational amplifier X1, where the voltage at the same-direction input terminal of the operational amplifier X1 is set by the voltage divider of the resistors R2 and R3, the sampled AC signal is not higher than the voltage source V4, that is, the voltage at the same-direction input terminal of the operational amplifier X1 is less than the voltage at the reverse input terminal of the operational amplifier X1, where the voltage at the reverse input terminal of the operational amplifier X1 comes from the input AC sinusoidal signal after bridge rectification, the resistors R6 and R7 scale the input voltage, and then connect to the reverse input terminal of the operational amplifier X1 through some specific circuit paths, then the power-off undervoltage response is triggered;

[0039] When the sampling signal is greater than the reference voltage V4, that is, when the output of the operational amplifier X2 is high, it is higher than the power-off undervoltage threshold. The current on the resistor R8 on the integration circuit R8C3 and the capacitor C3 are integrated. If the capacitor C3 voltage reaches the voltage at the same-direction input terminal of the operational amplifier X3 before reaching the voltage at the same-direction input terminal, where the voltage at the same-direction input terminal of the operational amplifier X3 is set by the voltage divider of the resistors R9 and R10, and the sampled AC signal is not lower than the voltage source V4, that is, the voltage at the same-direction input terminal of the operational amplifier X3 is higher than the voltage at the reverse input terminal of the operational amplifier X3, where the voltage at the reverse input terminal of the operational amplifier X3 comes from the input AC sinusoidal signal after bridge rectification, the resistors R6 and R7 scale the input voltage, and then connect to the reverse input terminal of the operational amplifier X3 through some specific circuit paths, then the power-off undervoltage response is triggered;

[0040] Among the two sets of integration circuits, one set of integration circuits can first respond quickly to power failure and undervoltage;

[0041] The detection circuit also includes a signal output circuit, a power-off undervoltage signal holding circuit, and an MCU controlled LED circuit. The anode of the diode D5 in the signal output circuit is connected to the D pole of the NMOSFET transistor Q4, and the cathode of the diode D5 is connected to the signal output. The cathode of the diode D5 and the cathode of the diode D6 in the power-off undervoltage signal holding circuit are connected to the MCU pin, and the pin can identify the level change. The MCU is also connected to the anode of LED1 through the IO port, and the cathode of LED1 is connected to the resistor R22, and the other end of the resistor R22 is grounded;

[0042] See also Figure 2 , Figure 4 , Figure 5① is the power-off undervoltage threshold setting circuit, ②⑥ are respectively the integration circuit R1C1 below the power-off undervoltage threshold and the integration circuit R8C3 above the power-off undervoltage threshold, ③⑤ are respectively the integration time threshold judgment circuit 1 and the integration time threshold judgment circuit 2, ④ is the signal output circuit, ⑦ is the power-off undervoltage signal holding circuit, ⑧ is the MCU control LED circuit, the AC sinusoidal signal is input and then enters the circuit through the bridge rectification, the input voltage is proportionally scaled by the resistors R6 and R7, the sampling signal is compared with the voltage source V4, V4 is set as the power-off undervoltage protection point, when the sampling signal is less than the reference voltage V4, the operational amplifier X2 outputs low, and the integration circuit R1C1 below the power-off undervoltage threshold starts Integration, when the sampling signal is greater than the reference voltage V4, the output of the operational amplifier X2 is high, and the integration circuit R8C3 starts to integrate when it is higher than the power-off undervoltage threshold. Compared with the conventional detection using low-pass filtering, which leads to slow response speed and susceptibility to interference, this circuit does not require low-pass filtering, and directly performs proportional sampling and integration on the AC signal. After rectification, the sinusoidal AC obtains a steamed bun wave with doubled frequency. Within a steamed bun wave, the time below and above the set point can be estimated to determine whether there is power failure or undervoltage. Unlike the low-pass filter, which will cross the set point before reaching the steady state, and will cross the set point back and forth when the ripple is large, causing the risk of false operation, the integration method can avoid this risk and has the advantages of fast response speed and avoiding false triggering.

[0043] The detection circuit also includes an integration time, during which one end of the resistor R18 is connected to the resistor R1 and the capacitor C1, the other end of the resistor R18 is connected to the reverse input end of the operational amplifier X1, the same-direction input end of the operational amplifier X1 is connected to the resistor R3 and the resistor R2, the other end of the resistor R3 is grounded, the resistor R2 is connected to the voltage source VCC1, the output of the operational amplifier X1 is connected to the resistor R13 and the G pole of the NMOSFET transistor Q4, the other end of the resistor R13 is grounded, the D pole of the NMOSFET transistor Q4 is connected to the resistor R15, the other end of the resistor R15 is connected to the voltage source VCC1, and the S pole of the NMOSFET transistor Q4 is connected to the ground During the integration time, one end of the resistor R19 is connected to the D pole of the NMOSFET transistor Q2, the resistor R19 is connected to the reverse input terminal of the operational amplifier X3, the same-direction input terminal of the operational amplifier X4 is connected to the resistor R9 and the resistor R10, the other end of the resistor R9 is connected to the voltage source VCC1, the other end of the resistor R10 is grounded, the output of the operational amplifier X3 is connected to the resistor R12 and the G pole of the NMOSFET transistor Q5, the other end of the resistor R12 is grounded, the S pole of the NMOSFET transistor Q5 is grounded, the D pole of the NMOSFET transistor Q5 is connected to the resistor R16, and the other end of the resistor R16 is connected to the voltage source VCC1, which is lower than the power-off undervoltage threshold integration circuit R1 The output signal of the operational amplifier X2 in C1 is connected to the resistor R4, and the other end of the resistor R4 is connected to the resistor R5 and the G pole of the NMOSFET transistor Q1. The other end of the resistor R5 and the S pole of the NMOSFET transistor Q1 are grounded. The D pole of the NMOSFET transistor Q1 is connected to the capacitor C1 and the resistor R1. The other end of the resistor R1 is connected to the voltage source VCC1. The other end of the capacitor C1 is grounded, which is higher than the power-off undervoltage threshold integration circuit R8C3. The output of the operational amplifier X2 is connected to the resistor R20. The other end of the resistor R20 is connected to the G pole of the NMOSFET transistor Q3 and the resistor R21 respectively. The other end of the resistor R21 is grounded. The S pole of the ET transistor Q3 is grounded, the D pole of the NMOSFET transistor Q3 is connected to the resistor R11, the resistor R14 and the G pole of the NMOSFET transistor Q2, the other end of the resistor R11 is connected to the voltage source VCC1 and the resistor R8, the other end of the resistor R14 is grounded, the S pole of the NMOSFET transistor Q2 is grounded, the D pole of the NMOSFET transistor Q2 is connected to the resistor R8 and the capacitor C3, and the other end of the capacitor C3 is grounded: the longest response time is less than or equal to half of the maximum AC cycle, the frequency is doubled after the bridge rectification, and the time higher or lower than the set point in one cycle after rectification is less than or equal to half of the AC cycle;

[0044] The resistor R1 and the capacitor C1 are set by calculating the time between two adjacent half waves after rectification to equal the power-off undervoltage value through the minimum frequency of the sine wave. Assuming that the peak value of the AC sine wave is Vpk, the frequency is f, the frequency of the rectified sine wave is 2f, and the power-off undervoltage setting value is Vset;

[0045] The mathematical expression of the rectified AC voltage is:

[0046] Vac(t)=|Vpk×sin(2×π×f×t)|;

[0047] Among them, "sin(2×π×f×t)" is the standard sine function expression, where t is the time variable, 2πft represents the angle that changes with time, and |Vpksin(2πft)| represents the absolute value of the sine wave;

[0048] use Solve to get the minimum time required to reach Vset from t=0s in the first cycle. Since it is a periodic half-wave, and the negative half-cycle is turned into a positive half-cycle, the continuous time that is less than the set value is between two adjacent half-waves, which is equal to 2 times The mathematical relationship between t, R1, C1, and VCC1 is obtained through the RC step response. Assume that the voltage on capacitor C1 in the integration circuit R1C1 reaches Vref_d, which is lower than the power-off threshold, and is considered to be undervoltage or power-off. VCC1 is known, and R1 is freely set (adjusted according to the value of C1). The calculation formula of C1 is:

[0049]

[0050] Among them, VCC1 is the power supply voltage;

[0051] The voltage divider of resistors R2 and R3 is set to the value of Vref_d, thereby obtaining the voltage of the same-direction input terminal of the operational amplifier X1. When the voltage of the reverse input terminal of the operational amplifier X1 is greater than the voltage of the same-direction input terminal, it is determined that undervoltage or power failure is triggered;

[0052] When the AC is disconnected, due to the different phases of disconnection, the initial voltage on the capacitor before the rectifier bridge will be different, and the voltage on the capacitor will slowly decrease over time. The voltage on the capacitor is much higher than the power-off undervoltage value. The above circuit for detecting power-off undervoltage will respond very slowly. The integral of the non-integrated time of the resistor R1 and the capacitor C1 in the above circuit is simultaneously increased. When the input of the operational amplifier X2 is higher than the set value, the resistor R8 and the capacitor C3 are integrated. The above formula is used. The time higher than the set Vset is the steamed bun wave period after rectification minus the time less than the set value. The formula is: The voltage of the same-direction input terminal for setting X3 is obtained. When the voltage of the reverse input terminal of the operational amplifier X3 is less than the voltage of the same-direction input terminal, it is determined that undervoltage or power failure is triggered;

[0053] Assume that the AC input voltage range is 90Vac~264Vac, the frequency range is 50Hz~60Hz, and protection is required when the undervoltage AC value is less than 85Vac. The VCC1 power supply is 12V.

[0054] For circuit ①, it mainly includes scaling the AC input voltage and selecting the appropriate working undervoltage threshold point. 85Vac corresponds to a peak value of about 120V, and 264Vac corresponds to a peak value of about 373V. In order to make the op amp better, R6 and R7 are selected. The scaling factor Kp is 1 / 15 times, that is, If R7 is 1MΩ, then R6 is 14MΩ. In this way, the peak voltage after rectification and scaling at 85Vac is Vpk_85Vac=8V.

[0055] The peak voltage of 264Vac after rectification and scaling is Vpk_264Vac=24.86V. For voltage below the undervoltage point 85Vac, V4 can be set at half of the peak voltage of 85Vac, i.e. 60V. The voltage after rectification and scaling is 4V.

[0056] For circuit ②, the design mainly focuses on calculating the maximum time when the waveform is less than or equal to the set value of 4V. It can be clearly seen that the waveform is continuously less than 4V in the time period [t3~t6]. When the input is 85Vac, the formula is

[0057] The calculation result is 0.003333s. It is assumed that during this time, the voltage of C1 rises from 0V to 75% of VCC1, that is, to 9V. If R1 is 10kΩ, then the calculation formula for the capacity of C1 is: The calculation results need to take into account the tolerance of resistors and capacitors, so here the calculated theoretical value is amplified by about 1.07 times. The tolerance of conventional chip capacitors is 5% and the tolerance of resistors is 1%. Please select the appropriate value according to the device tolerance for the actual amplification factor. The capacitor is 260nF.

[0058] For circuit ⑥, the design is mainly to calculate the maximum time that is greater than or equal to the set value of 4V. It can be clearly seen that the waveform is continuously greater than 4V in the time period [t1~t4]. When 264Vac is input, the formula is

[0059] The calculation result is 0.008971s. If C3 rises from 0V to 75% of VCC1 during this period, even if it rises to 9V, and R8 is 10kΩ, then the calculation formula for C3 capacity is: The calculation results need to take into account the tolerance of resistors and capacitors, so here the calculated theoretical value is amplified by about 1.07 times. The tolerance of conventional chip capacitors is 5% and the tolerance of resistors is 1%. Please select the appropriate value according to the device tolerance for the actual amplification factor. The capacitor is 700nF.

[0060] For circuit ③ and circuit ⑤, you only need to set the voltage divider of R2 and R3 to 9V, and the voltage divider of R9 and R10 to 9V. For the diodes used in all circuits, you can choose 1n4148, MOS transistors can choose 2n7002, and operational amplifiers can choose LM324.

[0061] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions only describe the principles of the present invention. The present invention may be subject to various changes and improvements without departing from the spirit and scope of the present invention. These changes and improvements fall within the scope of the present invention. The scope of protection claimed by the present invention is defined by the attached claims and their equivalents.

Claims

1. A wide-amplitude and wide-frequency AC input power-off or undervoltage detection circuit, comprising a power-off undervoltage threshold setting circuit, two sets of integration circuits, three operational amplifiers, five MOSFET transistors and capacitors and resistors, characterized in that: The power-off undervoltage threshold setting circuit includes a voltage source V4, a resistor R6 and a resistor R7, two sets of integration circuits include an integration circuit R1C1 below the power-off undervoltage threshold and an integration circuit R8C3 above the power-off undervoltage threshold, three operational amplifiers include operational amplifier X1, operational amplifier X2, and operational amplifier X3, through operational amplifier X2, using AC sinusoidal signal input, after bridge rectification into the circuit, resistor R6 and resistor R7 scale the input voltage, then the sampling signal is compared with the voltage source V4, V4 can set the power-off undervoltage protection point accordingly; When the sampling signal is less than the reference voltage V4, that is, the output of the operational amplifier X2 is low, the current on the resistor R1 and the capacitor C1 on the integration circuit R1C1 below the power-off undervoltage threshold begins to integrate. If before the capacitor C1 reaches the voltage at the same-direction input terminal of the operational amplifier X1, where the voltage at the same-direction input terminal of the operational amplifier X1 is set by the voltage divider of the resistors R2 and R3, the sampled AC signal is not higher than the voltage source V4, that is, the voltage at the same-direction input terminal of the operational amplifier X1 is less than the voltage at the reverse input terminal of the operational amplifier X1, where the voltage at the reverse input terminal of the operational amplifier X1 comes from the input AC sinusoidal signal after bridge rectification, the resistors R6 and R7 scale the input voltage, and then connect to the reverse input terminal of the operational amplifier X1 through some specific circuit paths, then the power-off undervoltage response is triggered; When the sampling signal is greater than the reference voltage V4, that is, when the output of the operational amplifier X2 is high, it is higher than the power-off undervoltage threshold. The current on the resistor R8 on the integration circuit R8C3 and the capacitor C3 are integrated. If the capacitor C3 voltage reaches the voltage at the same-direction input terminal of the operational amplifier X3 before reaching the voltage at the same-direction input terminal, where the voltage at the same-direction input terminal of the operational amplifier X3 is set by the voltage divider of the resistors R9 and R10, and the sampled AC signal is not lower than the voltage source V4, that is, the voltage at the same-direction input terminal of the operational amplifier X3 is higher than the voltage at the reverse input terminal of the operational amplifier X3, where the voltage at the reverse input terminal of the operational amplifier X3 comes from the input AC sinusoidal signal after bridge rectification, the resistors R6 and R7 scale the input voltage, and then connect to the reverse input terminal of the operational amplifier X3 through some specific circuit paths, then the power-off undervoltage response is triggered; Among the two sets of integration circuits, one set of integration circuits can first respond quickly to power failure and undervoltage.

2. A wide-amplitude and wide-frequency AC input power-off or undervoltage detection circuit according to claim 1, characterized in that: The detection circuit also includes an integration time, in which one end of a resistor R18 is connected to a resistor R1 and a capacitor C1, the other end of the resistor R18 is connected to a reverse input end of an operational amplifier X1, the same-direction input end of the operational amplifier X1 is connected to resistors R3 and R2, the other end of the resistor R3 is grounded, the resistor R2 is connected to a voltage source VCC1, the output of the operational amplifier X1 is connected to a resistor R13 and a G pole of an NMOSFET transistor Q4, the other end of the resistor R13 is grounded, the D pole of the NMOSFET transistor Q4 is connected to a resistor R15, the other end of the resistor R15 is connected to the voltage source VCC1, and the S pole of the NMOSFET transistor Q4 is connected to ground.

3. A wide-amplitude and wide-frequency AC input power-off or undervoltage detection circuit according to claim 2, characterized in that: During the integration time, one end of the resistor R19 is connected to the D pole of the NMOSFET transistor Q2, the resistor R19 is connected to the reverse input terminal of the operational amplifier X3, the same-direction input terminal of the operational amplifier X4 is connected to the resistor R9 and the resistor R10, the other end of the resistor R9 is connected to the voltage source VCC1, the other end of the resistor R10 is grounded, the output of the operational amplifier X3 is connected to the resistor R12 and the G pole of the NMOSFET transistor Q5, the other end of the resistor R12 is grounded, the S pole of the NMOSFET transistor Q5 is grounded, the D pole of the NMOSFET transistor Q5 is connected to the resistor R16, and the other end of the resistor R16 is connected to the voltage source VCC1.

4. The circuit for detecting power failure or undervoltage of wide amplitude and wide frequency AC input according to claim 1, characterized in that: The output signal of the operational amplifier X2 in the integration circuit R1C1 which is lower than the power-off undervoltage threshold is connected to the resistor R4, the other end of the resistor R4 is connected to the resistor R5 and the G pole of the NMOSFET transistor Q1, the other end of the resistor R5 and the S pole of the NMOSFET transistor Q1 are grounded, the D pole of the NMOSFET transistor Q1 is connected to the capacitor C1 and the resistor R1, the other end of the resistor R1 is connected to the voltage source VCC1, the other end of the capacitor C1 is grounded, and the output of the operational amplifier X2 in the integration circuit R8C3 which is higher than the power-off undervoltage threshold is connected to the resistor R20, the other end of the resistor R20 is connected to the The G pole of the NMOSFET transistor Q3 is connected to the resistor R21, the other end of the resistor R21 is grounded, the S pole of the NMOSFET transistor Q3 is grounded, the D pole of the NMOSFET transistor Q3 is connected to the resistor R11, the resistor R14 and the G pole of the NMOSFET transistor Q2, the other end of the resistor R11 is connected to the voltage source VCC1 and the resistor R8, the other end of the resistor R14 is grounded, the S pole of the NMOSFET transistor Q2 is grounded, the D pole of the NMOSFET transistor Q2 is connected to the resistor R8 and the capacitor C3, and the other end of the capacitor C3 is grounded.

5. The circuit for detecting power failure or undervoltage of wide amplitude and wide frequency AC input according to claim 1, characterized in that: The detection circuit also includes a signal output circuit, a power-off undervoltage signal holding circuit, and an MCU controlled LED circuit. The anode of the diode D5 in the signal output circuit is connected to the D pole of the NMOSFET transistor Q4, and the cathode of the diode D5 is connected to the signal output. The cathode of the diode D5 and the cathode of the diode D6 in the power-off undervoltage signal holding circuit are connected to the MCU pin, and the pin can identify the level change. The MCU is also connected to the anode of LED1 through the IO port, and the cathode of LED1 is connected to the resistor R22, and the other end of the resistor R22 is grounded.

6. The circuit for detecting power failure or undervoltage of wide amplitude and wide frequency AC input according to claim 1, characterized in that: The resistor R1 and the capacitor C1 are set by calculating the time between two adjacent half waves after rectification to equal the power-off undervoltage value through the minimum frequency of the sine wave. Assuming that the peak value of the AC sine wave is Vpk, the frequency is f, the frequency of the rectified sine wave is 2f, and the power-off undervoltage setting value is Vset; The mathematical expression of the rectified AC voltage is: Vac(t)=|Vpk×sin(2×π×f×t)|; Among them, "sin(2×π×f×t)" is the standard sine function expression, where t is the time variable, 2πft represents the angle that changes with time, and |Vpksin(2πft)| represents the absolute value of the sine wave; use Solve to get the minimum time required to reach Vset from t=0s in the first cycle. Since it is a periodic half-wave, and the negative half-cycle is turned into a positive half-cycle, the continuous time that is less than the set value is between two adjacent half-waves, which is equal to 2 times 7. A wide-amplitude and wide-frequency AC input power-off or undervoltage detection circuit according to claims 1-6, characterized in that: The mathematical relationship between t, R1, C1, and VCC1 is obtained through the RC step response. Assume that the voltage on capacitor C1 in the integration circuit R1C1 reaches Vref_d, which is lower than the power-off threshold, and is considered to be undervoltage or power-off. VCC1 is known, R1 is freely set and adjusted according to the value of C1. The calculation formula of C1 is: Among them, VCC1 is the power supply voltage; The voltage divider of resistors R2 and R3 is set to the value of Vref_d, thereby obtaining the voltage of the same-direction input terminal of the operational amplifier X1. When the voltage of the reverse input terminal of the operational amplifier X1 is greater than the voltage of the same-direction input terminal, it is determined that undervoltage or power failure is triggered.

8. The circuit for detecting power failure or undervoltage of wide-amplitude and wide-frequency AC input according to claim 7, characterized in that: When the AC is disconnected, due to the different phases of disconnection, the initial voltage on the capacitor before the rectifier bridge will be different, and the voltage on the capacitor will slowly decrease over time. The voltage on the capacitor is much higher than the power-off undervoltage value. The above circuit for detecting power-off undervoltage will respond very slowly. The integral of the non-integrated time of the resistor R1 and the capacitor C1 in the above circuit is simultaneously increased. When the input of the operational amplifier X2 is higher than the set value, the resistor R8 and the capacitor C3 are integrated. The above formula is used. The time higher than the set Vset is the steamed bun wave period after rectification minus the time less than the set value. The formula is: The voltage of the same-direction input terminal for setting X3 is obtained. When the voltage of the reverse input terminal of the operational amplifier X3 is less than the voltage of the same-direction input terminal, it is determined that undervoltage or power failure is triggered.

9. A wide-amplitude and wide-frequency AC input power-off or undervoltage detection circuit according to claim 8, characterized in that: The longest response time is less than or equal to half of the maximum AC cycle. The frequency is doubled after bridge rectification. The time above or below the set point in one cycle after rectification is less than or equal to half of the AC cycle.

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