Load detection circuit and driving device

Abstract

The invention discloses a load detection circuit comprising a first detection port used for receiving a detection current and used for being coupled with a first end of a load, and the first end of the load has a first potential; the first end of the first resistor receives the detection current; the first end of the first switch is coupled with the second end of the first resistor; the second detection port is coupled with the second end of the first switch and is used for being coupled with the second end of a load, and the second end of the load has a second potential; when the first switch is closed, the first potential and the second potential are both related to the detection current and the first resistor; when the load is short-circuited, the difference value between the first potential and the second potential is smaller than a first preset value, and when the load is open, the difference value between the first potential and the second potential is larger than a second preset value; wherein the first current value is greater than the second current value. According to the invention, the difference value between the first potential and the second potential can be quickly established, so that boosting is realized, and the voltage establishment time is shortened. The state of the load is then determined from the voltage value of the load.

Description

Technical Field

[0001] The present invention relates to the technical field of load detection, and in particular to a load detection circuit and a driving device. Background Art

[0002] With the rapid development of electronic technology, terminal equipment such as audio amplifiers, power amplifiers and various high-precision electronic equipment are increasingly widely used. These devices often need to operate under high power or specific load conditions to achieve their specific functions, such as providing high-quality audio output, driving high-power loads, etc. In order to achieve these functions, the traditional driving method mainly relies on a stable power supply and amplifies the signal through an amplifier circuit.

[0003] When the device has high power or uses a multi-stage amplification structure (such as connecting another amplifier to achieve linear amplification), the load impedance faced by the system often increases significantly. High-impedance loads place higher demands on the stability and driving capability of the power supply, and also bring huge challenges to testing.

[0004] Traditional load testing methods, such as the current-passing and voltage-measuring method, can reflect the electrical characteristics of the load to a certain extent, but they are obviously insufficient when facing high-impedance loads. Since the charging time of high-impedance loads is relatively long, when testing by current-passing and voltage-measuring, a lot of time is required to wait for the load voltage to reach a stable state, which not only reduces the test efficiency but also increases the uncertainty in the test process. In addition, since the current charging process is difficult to control accurately, especially under high current and high voltage conditions, overcharging is prone to occur, which may not only damage the test equipment, but also cause irreversible damage to the load being tested. Summary of the invention

[0005] The purpose of the present invention is to provide a load detection circuit and a driving device to solve the technical problem in the prior art that when testing a load, it often takes several dozen times the working time under normal conditions to detect the open circuit / short circuit state of the load.

[0006] To achieve one of the above-mentioned purposes of the invention, an embodiment of the present invention provides a load detection circuit, the load detection circuit comprising: a first detection port, for receiving a detection current, for coupling a first end of a load, the first end of the load having a first potential; a first resistor, having a first end and a second end, the first end of which receives the detection current; a first switch, having a first end and a second end, the first end of which is coupled to the second end of the first resistor; a second detection port, coupled to the second end of the first switch, for coupling the second end of the load, the second end of the load having a second potential; in a first state, the first switch is closed, the detection current represents a first current value, the first potential and the second potential are both related to the detection current and the first resistor; in a second state, the first switch is disconnected, the detection current represents a second current value, when the load is short-circuited, the difference between the first potential and the second potential is less than a first preset value, and when the load is disconnected, the difference between the first potential and the second potential is greater than a second preset value; wherein the first current value is greater than the second current value, and the load detection circuit operates in the first state and the second state in sequence.

[0007] To achieve one of the above-mentioned purposes of the invention, an embodiment of the present invention further provides a load detection circuit, which includes: a first detection port for receiving a detection current and for coupling a first end of a load, the first end of the load having a first potential; a first resistor having a first end and a second end, the first end of which receives the detection current; a first switch having a first end and a second end, the first end of which is coupled to the second end of the first resistor; a second detection port, coupled to the second end of the first switch, for coupling the second end of the load, the second end of the load having a second potential; a second switch having a first end and a second end, the first end of which is coupled to the first detection port, and the second end of which is coupled to the second detection port; and a gain amplifier having a first input end, a second input end and an output end, the first input end of which is coupled to the second detection port; The input end receives a reference voltage, the second input end is coupled to the output end, and the output end is respectively coupled to the second end of the first switch and the second end of the second switch; in the first state, the second switch is closed, the gain amplifier outputs a driving current, and the first potential and the second potential are related to the load; in the second state, the first switch is closed, the detection current represents the first current value, and the first potential and the second potential are both related to the detection current and the first resistor; in the third state, the first switch is disconnected, the detection current represents the second current value, when the load is short-circuited, the difference between the first potential and the second potential is less than the first preset value, and when the load is disconnected, the difference between the first potential and the second potential is greater than the second preset value; wherein the first current value is greater than the second current value, and the load detection circuit operates in the first state, the second state and the third state in sequence.

[0008] An embodiment of the present invention further provides a driving device, wherein the class D amplifier comprises the load detection circuit in the above embodiment and a class D amplifier, wherein the output end of the class D amplifier is used to couple the load through the first detection port and the second detection port.

[0009] Compared with the prior art, the present invention has the following beneficial effects: in the first state, the present invention uses a detection current of a first current value so that the difference between the first potential and the second potential is generated according to the set first resistor and the detection current. Since the first current value is greater than the second current value, the difference between the first potential and the second potential can be quickly established, thereby achieving the purpose of rapid voltage boost, thereby reducing the time for voltage establishment. Subsequently, the difference between the first potential and the second potential is adjusted to a voltage value corresponding to the relevant load through a detection current of a second current value, and the state of the load can be determined by the size of the voltage value. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 A schematic structural diagram of a load detection circuit 100 according to an embodiment of the present invention is provided.

[0011] Figure 2 A schematic structural diagram of a load detection circuit 200 according to an embodiment of the present invention is provided.

[0012] Figure 3 A schematic structural diagram of a voltage detector 2 according to an embodiment of the present invention is given. DETAILED DESCRIPTION

[0013] The present invention will be described in detail below in conjunction with the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional changes made by a person skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0014] It should be noted that the term "comprises" or any other variation thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In addition, the terms "first", "second", "third", etc. are used for descriptive purposes only and are not to be understood as indicating or implying relative importance.

[0015] The phrases "one embodiment", "an embodiment", "an example", and "example" that appear in various places throughout the specification do not necessarily refer to the same embodiment or example. It should be understood by those skilled in the art that the various specific features, structures or parameters, steps, etc. disclosed in one or more embodiments of the present disclosure can be combined in any suitable manner.

[0016] Figure 1A structural schematic diagram of a load detection circuit 100 according to an embodiment of the present invention is given. The load detection circuit 100 includes a first detection port P1, a first resistor R1, a first switch K1, and a second detection port P2. The first detection port P1 is used to receive a detection current I1, and the first detection port P1 is used to couple a first end of a load Rk, and the first end of the load Rk has a first potential U1. The first resistor R1 has a first end and a second end, and the first end thereof receives the detection current I1. The first switch K1 has a first end and a second end, and the first end thereof is coupled to the second end of the first resistor R1. The second detection port P2 is coupled to the second end of the first switch K1, and the second detection port P2 is used to couple the second end of the load Rk, and the second end of the load Rk has a second potential U2. In one embodiment, when the load detection circuit 100 is in the first state, the first switch K1 is closed, the detection current I1 represents a first current value, and the first potential U1 and the second potential U2 are both related to the detection current I1 and the first resistor R1. In one embodiment, U1-U2=I1*R1. In one embodiment, when the load detection circuit 100 is in the second state, the first switch K1 is disconnected, and the detection current I1 represents the second current value. The load detection circuit 100 operates in the first state and the second state in sequence. The first current value is greater than the second current value. When the load Rk is short-circuited, the difference between the first potential U1 and the second potential U2 is less than the first preset value VTH1, that is, U1-U2<VTH1. When the load Rk is open-circuited, the difference between the first potential U1 and the second potential U2 is greater than the second preset value VTH2, that is, U1-U2>VTH2. In one embodiment, the first preset value VTH1 is equal to the second preset value VTH2.

[0017] in this way, Figure 1 The load detection circuit 100 shown in the above configuration first uses the detection current I1 of the first current value to make the voltage difference between the first detection port P1 and the second detection port P2 reach the preset voltage value according to the set first resistor R1 and the detection current I1. Since the first current value is greater than the second current value, the difference between the first potential U1 and the second potential U2 can quickly reach the preset voltage value, thereby achieving the purpose of rapid voltage boost, thereby reducing the time for voltage establishment. Subsequently, the detection current I1 of the second current value is used to make the voltage difference between the first detection port P1 and the second detection port P2 reach the real voltage value of the load according to the resistance value of the load Rk and the detection current I1, and the state of the load Rk (open circuit, short circuit or stable) is determined by the size of the real voltage value.

[0018] continue Figure 1In the description, when the load detection circuit 100 is in the first state, when the detection current I1 flows through the first resistor R1, the difference between the first potential U1 and the second potential U2 is generated according to the detection current I1 and the first resistor R1, that is, U1-U2=I1*R1. When the load detection circuit 100 is in the second state, the detection current I1 flows through the load Rk, and the difference between the first potential U1 and the second potential U2 is generated according to the detection current I1 and the load Rk, that is, U1-U2=I1*RLO, where RLO is the resistance of the load Rk. In one embodiment, RLO is 10kΩ.

[0019] continue Figure 1 The load detection circuit 100 further includes a gain amplifier A. The gain amplifier A has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the gain amplifier A receives a reference voltage Vref, the second input terminal of the gain amplifier A is coupled to the output terminal, and the output terminal of the gain amplifier A is coupled to the second terminal of the first switch K1. The gain amplifier A is configured to absorb the detection current I1 when the load detection circuit 100 operates in the first state and the second state.

[0020] exist Figure 1 In the embodiment of the load detection circuit 100, when the load detection circuit 100 operates in the first state, the detection current I1 flows through the first resistor R1 and the first switch K1 and then flows to the gain amplifier A, and the gain amplifier A absorbs the detection current I1. The first potential U1 and the second potential U2 increase, and the difference between the first potential U1 and the second potential U2 (the voltage difference between the first detection port P1 and the second detection port P2) is generated according to the detection current I1 and the first resistor R1, so that U1-U2=I1*R1.

[0021] exist Figure 1 In an embodiment, when the load detection circuit 100 operates in the second state, based on the difference between the first potential U1 and the second potential U2 in the first state, the detection current I1 is output from the first detection port P1, flows through the load Rk, is input from the second detection port P2, and flows to the gain amplifier A, and the gain amplifier A absorbs the detection current I1. The difference between the first potential U1 and the second potential U2 is generated according to the detection current I1 and the load Rk. That is, the value of the first potential U1 and the difference between the second potential U2 are adjusted so that U1-U2=I1*RLO. In an embodiment, if the difference between the first potential U1 and the second potential U2 in the first state is less than the value of I1*RLO, the difference between the first potential U1 and the second potential U2 increases. In an embodiment, if the difference between the first potential U1 and the second potential U2 in the first state is greater than the value of I1*RLO, the difference between the first potential U1 and the second potential U2 decreases.

[0022] exist Figure 1In one embodiment, the gain amplifier A is a unit gain driver, and its efficiency effect is 1. In one embodiment, the first input terminal of the gain amplifier A is a positive phase input terminal, and the second input terminal of the gain amplifier A is a negative phase input terminal. In this way, the detection current I1 flows into the gain amplifier A from the negative phase input terminal, and the second input terminal of the gain amplifier A is coupled to the output terminal to achieve that the output current is consistent with the input current, that is, the output current follows the input current. The detection current I1 circulates inside the gain amplifier A, achieving the effect of being "absorbed" by the gain amplifier A. Then, through a current path provided by the gain amplifier A, the detection current I1 can maintain its constant current output.

[0023] continue Figure 1 As described above, the load detection circuit 100 further includes a voltage detector 2. The voltage detector 2 has a first input terminal and a second input terminal, the first input terminal of the voltage detector 2 is coupled to the first detection port P1, and the second input terminal of the voltage detector 2 is coupled to the second detection port P2. The voltage detector 2 is configured to detect the difference between the first potential U1 and the second potential U2 and compare it with the first preset value VTH1 and the second preset value VTH2 when the load detection circuit 100 is in the second state.

[0024] Figure 2A structural schematic diagram of a load detection circuit 200 according to an embodiment of the present invention is given. The load detection circuit 200 includes a first detection port P1, a first resistor R1, a first switch K1, a second detection port P2, a second switch K2, and a gain amplifier A. The first detection port P1 is used to receive a detection current I1, and the first detection port P1 is used to couple a first end of a load Rk, and the first end of the load Rk has a first potential U1. The first resistor R1 has a first end and a second end, and the first end thereof receives the detection current I1. The first switch K1 has a first end and a second end, and the first end thereof is coupled to the second end of the first resistor R1. The second detection port P2 is coupled to the second end of the first switch K1, and the second detection port P2 is used to couple the second end of the load Rk, and the second end of the load Rk has a second potential U2. The second switch K2 has a first end and a second end, and the first end of the second switch K2 is coupled to the first detection port P1, and the second end of the second switch K2 is coupled to the second detection port P2. The gain amplifier A has a first input terminal, a second input terminal and an output terminal. The first input terminal of the gain amplifier A receives a reference voltage Vref, the second input terminal of the gain amplifier A is coupled to the output terminal, and the output terminal of the gain amplifier A is respectively coupled to the second terminal of the first switch K1 and the second terminal of the second switch K2. In one embodiment, when the load detection circuit 100 is in the first state, the second switch K2 is closed, the gain amplifier A outputs a driving current I2, and the first potential U1 and the second potential U2 are related to the load Rk. In one embodiment, when the load detection circuit 100 is in the second state, the first switch K1 is closed, the detection current I1 represents the first current value, and the first potential U1 and the second potential U2 are both related to the detection current I1 and the first resistor R1. In one embodiment, U1-U2=I1*R1. In one embodiment, when the load detection circuit 100 is in the third state, the first switch K1 is disconnected, and the detection current I1 represents the second current value. Among them, the load detection circuit 100 operates in the first state, the second state, and the third state in sequence. The first current value is greater than the second current value. When the load Rk is short-circuited, the difference between the first potential U1 and the second potential U2 is less than the first preset value VTH1, that is, U1-U2<VTH1. When the load Rk is open-circuited, the difference between the first potential U1 and the second potential U2 is greater than the second preset value VTH2, that is, U1-U2>VTH2. In one embodiment, the first preset value VTH1 is equal to the second preset value VTH2.

[0025] exist Figure 2In one embodiment, the load Rk includes an amplifier 11, a first filter 12, and a second filter 13. The amplifier 11 has a first input terminal and a second input terminal. The first filter 12 is coupled to the first detection port P1 and the first input terminal of the amplifier 11. The second filter 13 is coupled to the second detection port P2 and the second input terminal of the amplifier 11. In this way, the detection current I1 is input to the amplifier 11 through the first filter 12 and the second filter 13, so that the amplifier 11 can operate more stably and prevent the load Rk from being damaged.

[0026] exist Figure 2 In the embodiment of the load detection circuit 200, when the load detection circuit 200 is in the first state, the gain amplifier A outputs a driving current I2, and the driving current I2 flows through the first filter 12 and the second filter 13 to charge the first filter 12 and the second filter 13. The value of the first potential U1 is related to the first filter 12, and the value of the second potential U2 is related to the second filter 13. Among them, the first potential U1 is the same as the second potential U2, that is, the potentials at the first detection port P1 and the second detection port P2 are the same. In one embodiment, the magnitude of the driving current I2 output by the gain amplifier A is related to the value of the reference voltage VREF. In this way, when the load detection circuit 100 is in the first state, the potential at the first filter 12 and the second filter 13 is charged to a preset common mode voltage through the driving current I2, thereby avoiding the problem of negative differential voltages at the two input terminals of the load Rk when the load detection circuit 200 is in the second state, that is, the voltage of the first input terminal of the load Rk representing the positive phase input terminal is less than the voltage of the second input terminal representing the negative phase input terminal, and the first potential U1 and the second potential U2 are preferentially charged to high potentials through the driving current I2, which can greatly improve the speed.

[0027] exist Figure 2 In an embodiment, when the load detection circuit 200 is in the second state, based on the potential values ​​of the first potential U1 and the second potential U2 in the first state, the detection current I1 flows through the first resistor R1. The difference between the first potential U1 and the second potential U2 (the voltage difference between the first detection port P1 and the second detection port P2) is generated according to the detection current I1 and the first resistor R1. That is, the value of the first potential U1 and the value of the second potential U2 are adjusted so that U1-U2=I1*R1. In one embodiment, the first potential U1 increases and the second potential U2 decreases, so that U1-U2=I1*R1. In one embodiment, the voltage value of the first potential U1 increases is greater than the voltage value of the second potential U2 increases, so that U1-U2=I1*R1. In one embodiment, the voltage value of the first potential U1 decreases is less than the voltage value of the second potential U2 decreases, so that U1-U2=I1*R1.

[0028] exist Figure 2In an embodiment, when the load detection circuit 200 is in the third state, based on the difference between the first potential U1 and the second potential U2 in the second state, the detection current I1 flows through the amplifier 11, and the difference between the first potential U1 and the second potential U2 is generated according to the detection current I1 and the amplifier 11. That is, the value of the first potential U1 and the difference between the second potential U2 are adjusted so that U1-U2=I1*RLO, where RLO is the impedance of the amplifier 11. In one embodiment, if the difference between the first potential U1 and the second potential U2 in the second state is less than the value of I1*RLO, the difference between the first potential U1 and the second potential U2 increases. In one embodiment, if the difference between the first potential U1 and the second potential U2 in the second state is greater than the value of I1*RLO, the difference between the first potential U1 and the second potential U2 decreases. In one embodiment, the impedance RLO of the amplifier 11 is 10kΩ.

[0029] exist Figure 2 In one embodiment, the gain amplifier A and Figure 1 The gain amplifier A in is the same as that in FIG. 1 and will not be described in detail here.

[0030] exist Figure 2 In the embodiment, the load detection circuit 200 further includes a voltage detector 2. The voltage detector 2 has a first input terminal and a second input terminal, the first input terminal of the voltage detector 2 is coupled to the first detection port P1, and the second input terminal of the voltage detector 2 is coupled to the second detection port P2. The voltage detector 2 is configured to detect the difference between the first potential U1 and the second potential U2 and compare it with the first preset value VTH1 and the second preset value VTH2 when the load detection circuit 200 is in the third state. In one embodiment, the voltage detector 2 is an analog-to-digital converter.

[0031] exist Figure 2In an embodiment of the present invention, the first filter 12 includes a first inductor L1 and a first capacitor C1. The first inductor L1 has a first end and a second end, the first end of the first inductor L1 is coupled to the first input end of the amplifier 11, and the first detection port P1 is used to couple the second end of the first inductor L1. The first capacitor C1 has a first end and a second end, the first end of the first capacitor C1 is coupled to the first end of the first inductor L1, and the second end of the first capacitor C1 is coupled to the reference ground GND. In this way, when the load detection circuit 200 is in the first state, the gain amplifier A outputs a driving current I2 to charge the first capacitor C1. In an embodiment, the capacitance value of the first capacitor C1 is between 1uF and 4.7uF. The second filter 13 includes a second inductor L2 and a second capacitor C2. The second inductor L2 has a first end and a second end, the first end of the second inductor L2 is coupled to the second input end of the amplifier 11, and the second detection port P2 is used to couple the second end of the second inductor L2. The second capacitor C2 has a first end and a second end, the first end of the second capacitor C2 is coupled to the first end of the second inductor L2, and the second end of the second capacitor C2 is coupled to the reference ground GND. In this way, when the load detection circuit 200 is in the first state, the gain amplifier A outputs a driving current I2 to charge the second capacitor C2. In one embodiment, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 are the same. In one embodiment, the capacitance value of the second capacitor C2 is between 1uF and 4.7uF.

[0032] Figure 3 A schematic diagram of the structure of a voltage detector 2 according to an embodiment of the present invention is given. The voltage detector 2 includes a voltage acquisition circuit 21 and an analog-to-digital converter 22. In this embodiment, the voltage acquisition circuit 21 and the analog-to-digital converter 22 are coupled, the first input end of the voltage acquisition circuit 21 is coupled to the first detection port P1, and the second input end of the voltage acquisition circuit 21 is coupled to the second detection port P2. The analog-to-digital converter 22 receives the difference between the first potential U1 and the second potential U2 acquired by the voltage acquisition circuit 21 and converts the difference between the first potential U1 and the second potential U2 into a digital signal. In a specific embodiment, the analog-to-digital converter 22 is a successive approximation analog-to-digital converter. In a specific embodiment, the analog-to-digital converter 22 is an increment-sum analog-to-digital converter.

[0033] An embodiment of the present invention further provides a driving device. The driving device comprises Figure 1 The load detection circuit 100 or Figure 2 The load detection circuit 200 in any of the illustrated embodiments and the class-D amplifier have an output terminal for coupling to a load Rk through a first detection port and a second detection port.

[0034] In summary, the present invention adopts a load detection circuit 100, including a first resistor R1 and a first switch K1 arranged in series, and a detection current I1 flows through the first resistor R1 and the first switch K1 to adjust the potential at the first detection port P1 and the second detection port P2. When the first switch K1 is turned on, the load detection circuit 100 is in the first state, and the first resistor R1 and the detection current I1 are used to adjust the first potential U1 and the second potential U2 so that the voltage difference between the first potential U1 and the second potential U2 is R1*I1. Then the first switch K1 is turned off to put the load detection circuit 100 in the second state, and the load Rk and the detection current I1 are used to adjust the voltage difference between the first potential U1 and the second potential U2 so that it is RLO*I1. Since the current value of the detection current I1 in the first state is greater than the current value in the second state, the voltage difference between the first potential U1 and the second potential U2 can quickly reach the value of R1*I1, so that the value of R1*I1 is adjusted to the value of RLO*I1 more quickly in the second state.

[0035] The present invention also adopts a load detection circuit 200, which adjusts the potential at the first detection port P1 and the second detection port P2 by a first resistor R1 and a first switch K1 connected in series, and a second switch K2 connected in parallel with the first resistor R1 and the first switch K1. When the second switch K2 is turned on, the load detection circuit 100 is in the first state, and the gain amplifier A outputs a drive current I2 to charge the filter at the load Rk end so that the potential at the first detection port P1 and the second detection port P2 are at the same potential, thereby avoiding the problem of negative differential voltage generated at the two input ends of the load Rk when the load detection circuit 200 is in the second state. Then the second switch K2 is turned off and the first switch K1 is turned on to put the load detection circuit 100 in the second state, and the potential at the first detection port P1 and the second detection port P2 is adjusted by the first resistor R1 and the detection current I1 so that the voltage difference between the first detection port P1 and the second detection port P2 is R1*I1. In this state, based on the preprocessing of the first potential U1 and the second potential U2 in the first state, the detection current I1 with a larger current flows through the first resistor R1 so that the voltage difference between the first potential U1 and the second potential U2 can be quickly adjusted to the value of R1*I1. Then the first switch K1 is disconnected to put the load detection circuit 100 in the third state, and the voltage difference between the first potential U1 and the second potential U2 is adjusted to RLO*I1 by using the load Rk and the detection current I1, thereby ensuring that the voltage difference between the first potential U1 and the second potential U2 is adjusted from the value of R1*I1 to the value of RLO*I1 more quickly.

[0036] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0037] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention. They are not intended to limit the scope of protection of the present invention. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. A load detection circuit, characterized in that: include: A first detection port, used for receiving a detection current and coupled to a first end of a load, wherein the first end of the load has a first potential; A first resistor having a first end and a second end, wherein the first end receives a detection current; A first switch having a first end and a second end, wherein the first end is coupled to the second end of the first resistor; A second detection port is coupled to the second end of the first switch and is used to couple to the second end of the load, wherein the second end of the load has a second potential; In the first state, the first switch is closed, the detection current represents a first current value, and the first potential and the second potential are both related to the detection current and the first resistor; In the second state, the first switch is disconnected, the detection current represents a second current value, when the load is short-circuited, the difference between the first potential and the second potential is less than a first preset value, and when the load is disconnected, the difference between the first potential and the second potential is greater than a second preset value; The first current value is greater than the second current value, and the load detection circuit operates in the first state and the second state in sequence.

2. The load detection circuit according to claim 1, wherein in the first state, when the detection current flows through the first resistor, the difference between the first potential and the second potential is generated according to the detection current and the first resistor; In the second state, the detection current flows through the load, and the difference between the first potential and the second potential is generated according to the detection current and the load.

3. The load detection circuit according to claim 1, further comprising: A gain amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage, the second input terminal is coupled to the output terminal, and the output terminal is coupled to the second terminal of the first switch; The gain amplifier is configured to sink a sense current in a first state and in a second state.

4. The load detection circuit according to claim 1, further comprising: A voltage detector having a first input terminal and a second input terminal, wherein the first input terminal is coupled to the first detection port, and the second input terminal is coupled to the second detection port; The voltage detector is configured to detect a difference between the first potential and the second potential and compare the difference with the first preset value and the second preset value in the second state. The load detection circuit according to claim 1 , wherein the first preset value is equal to the second preset value.

6. A load detection circuit, characterized in that: include: A first detection port, used for receiving a detection current and coupled to a first end of a load, wherein the first end of the load has a first potential; A first resistor having a first end and a second end, wherein the first end receives a detection current; A first switch having a first end and a second end, wherein the first end is coupled to the second end of the first resistor; A second detection port is coupled to the second end of the first switch and is used to couple to the second end of the load, wherein the second end of the load has a second potential; A second switch having a first end and a second end, wherein the first end is coupled to the first detection port, and the second end is coupled to the second detection port; as well as A gain amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage, the second input terminal is coupled to the output terminal, and the output terminal is respectively coupled to the second terminal of the first switch and the second terminal of the second switch; In the first state, the second switch is closed, the gain amplifier outputs a driving current, and the first potential and the second potential are related to the load; In the second state, the first switch is closed, the detection current represents the first current value, and the first potential and the second potential are both related to the detection current and the first resistor; In the third state, the first switch is disconnected, the detection current represents a second current value, when the load is short-circuited, the difference between the first potential and the second potential is less than a first preset value, and when the load is disconnected, the difference between the first potential and the second potential is greater than a second preset value; The first current value is greater than the second current value, and the load detection circuit operates in the first state, the second state and the third state in sequence. 7 . The load detection circuit of claim 6 , wherein the gain amplifier is configured to sink the detection current in the second state and the third state.

8. The load detection circuit according to claim 6, wherein the load comprises: an amplifier having a first input terminal and a second input terminal; a first filter coupled to the first detection port and the first input terminal of the amplifier; The second filter is coupled to the second detection port and the second input terminal of the amplifier.

9. The load detection circuit according to claim 8, wherein in the first state, the driving current flows through the first filter and the second filter, the value of the first potential is related to the first filter, and the value of the second potential is related to the second filter, wherein, The first potential is equal to the second potential; In the second state, when the detection current flows through the first resistor, the difference between the first potential and the second potential is generated according to the detection current and the first resistor; In the third state, the detection current flows through the amplifier, and the difference between the first potential and the second potential is generated according to the detection current and the amplifier.

10. The load detection circuit according to claim 6, further comprising: A voltage detector having a first input terminal and a second input terminal, wherein the first input terminal is coupled to the first detection port, and the second input terminal is coupled to the second detection port; The voltage detector is configured to detect a difference between the first potential and the second potential and compare the difference with the first preset value and the second preset value in the third state.

11. The load detection circuit according to claim 6, wherein the first preset value is equal to the second preset value.

12. A driving device, characterized in that: include: The load detection circuit according to any one of claims 1 to 5 or the load detection circuit according to any one of claims 6 to 11; as well as The output end of the class D amplifier is used to couple to a load through a first detection port and a second detection port.

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